74VCX245BQX中文资料

74VCX245BQX中文资料
74VCX245BQX中文资料

? 2005 Fairchild Semiconductor Corporation DS500167

https://www.360docs.net/doc/52257331.html,

June 1999Revised April 2005

74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

74VCX245

Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

General Description

The VCX245 contains eight non-inverting bidirectional buff-ers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by plac-ing them in a high impedance state.

The 74VCX245 is designed for low voltage (1.4V to 3.6V)V CC applications with I/O compatibility up to 3.6V.

The 74VCX245 is fabricated with an advanced CMOS technology to achieve high-speed operation while main-taining low CMOS power dissipation.

Features

s 1.4V to 3.6V V CC supply operation s 3.6V tolerant inputs and outputs

s Power-off high impedance inputs and outputs s Supports Live Insertion and Withdrawal (Note 1)s t PD

3.5 ns max for 3.0V to 3.6V V CC s Static Drive (I OH /I OL )

r 24 mA @ 3.0V V CC

s Uses patented noise/EMI reduction circuitry s Latchup performance exceeds 300 mA s ESD performance:

Human body model ! 2000V Machine model ! 200V

s Leadless DQFN Pb-Free package

Note 1: To ensure the high impedance state during power up and power down, OE n should be tied to V CC through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver.

Ordering Code:

Pb-Free package per JEDEC J-STD-020B.

Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.Note 3: DQFN package available in Tape and Reel only,

Logic Symbol Pin Descriptions

Order Number Package Number Package Description

74VCX245WM (Note 2)M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74VCX245BQX (Note 3)MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm

74VCX245MTC (Note 2)

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

OE Output Enable Input (Active LOW)T/R Transmit/Receive Input

A 0–A 7Side A Inputs or 3-STATE Outputs

B 0–B 7

Side B Inputs or 3-STATE Outputs

https://www.360docs.net/doc/52257331.html, 2

74V C X 245

Connection Diagrams

Pin Assignments for SOIC and TSSOP

Pin Assignment for DQFN

(Top Through View)

Truth Table

H HIGH Voltage Level L LOW Voltage Level X Immaterial

Z High Impedance

Note 4: Unused bus terminals during HIGH Z State must be held HIGH or LOW.

Logic Diagram

Inputs Outputs

OE T/R L L Bus

B 0–B 7 Data to Bus A 0–A 7L H Bus A 0–A 7 Data to Bus B 0–B 7

H

X

HIGH Z State on A 0–A 7, B 0–B 7 (Note 4)

https://www.360docs.net/doc/52257331.html,

74VCX245

Absolute Maximum Ratings (Note 5)

Recommended Operating Conditions (Note 7)

Note 5: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat-ings. The “Recommended Operating Conditions ” table will define the condi-tions for actual device operation.

Note 6: I O Absolute Maximum Rating must be observed.Note 7: Floating or unused inputs must be held HIGH or LOW.

DC Electrical Characteristics

Supply Voltage (V CC ) 0.5V to 4.6V DC Input Voltage (V I ) 0.5V to 4.6V DC Output Voltage (V O )Outputs 3-STATE 0.5V to 4.6V Outputs Active (Note 6)

0.5V to V CC 0.5V

DC Input Diode Current (I IK ) V I 0V 50 mA

DC Output Diode Current (I OK ) V O 0V 50 mA V O ! V CC

50 mA

DC Output Source/Sink Current (I OH /I OL )

r 50 mA DC V CC or Ground Current r 100 mA

Storage Temperature (T STG )

65q C to 150q C

Power Supply Operating 1.4V to 3.6V

Input Voltage 0.3V to 3.6V

Output Voltage (V O )Output in Active States 0V to V CC Output in 3-STATE 0V to 3.6V

Output Current in I OH /I OL V CC 3.0V to 3.6V r 24 mA V CC 2.3V to 2.7V r 18 mA V CC 1.65V to 2.3V r 6 mA V CC 1.4V to 1.6V

r 2 mA

Free Air Operating Temperature (T A ) 40q C to 85q C

Minimum Input Edge Rate ('t/'V)

V IN 0.8V to 2.0V, V CC 3.0V

10 ns/V

Symbol Parameter

Conditions

V CC Min Max

Units

(V)V IH

HIGH Level Input Voltage

2.7 to

3.6 2.0V

2.3 to 2.7 1.61.65 to 2.30.65 u V CC 1.4 to 1.6

0.65 u V CC

V IL

LOW Level Input Voltage

2.7 to

3.60.8V 2.3 to 2.70.71.65 to 2.30.35 u V CC 1.4 to 1.6

0.35 u V CC

V OH

HIGH Level Output Voltage

I OH 100 P A 2.7 to 3.6V CC 0.2V

I OH 12 mA 2.7 2.2I OH 18 mA 3.0 2.4I OH 24 mA 3.0 2.2I OH 100 P A 2.3 to 2.7V CC 0.2I OH 6 mA 2.3 2.0I OH 12 mA 2.3 1.8I OH 18 mA 2.3 1.7I OH 100 P A 1.65 to 2.3V CC 0.2I OH 6 mA 1.65 1.25I OH 100 P A 1.4 to 1.6V CC 0.2I OH 2 mA

1.4

1.05

https://www.360docs.net/doc/52257331.html, 4

74V C X 245

DC Electrical Characteristics (Continued)

Note 8: Outputs disabled or 3-STATE only.

AC Electrical Characteristics (Note 9)

Note 9: For C L 50P F, add approximately 300 ps to the AC maximum specification.

Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ).

Symbol Parameter

Conditions

V CC Min Max Units

(V)V OL

LOW Level Output Voltage

I OL 100 P A 2.7 to 3.60.2V

I OL 12 mA 2.70.4I OL 18 mA 3.00.4I OL 24 mA 3.00.55I OL 100 P A 2.3 to 2.70.2I OL 12 mA 2.30.4I OL 18 mA 2.30.6I OL 100 P A 1.65 to 2.30.2I OL 6 mA 1.650.3I OL 100 P A 1.4 to 1.60.2I OL 2 mA

1.40.35I I Input Leakage Current 0 d V I d 3.6V 1.4 to 3.6r 5.0P A I OZ 3-STATE Output Leakage 0 d V O d 3.6V 1.4 to 3.6

r 10P A V I V IH or V IL I OFF I Power-OFF Leakage Current 0 d (V I , V O ) d 3.6V 010P A I CC Quiescent Supply Current V I V CC or GND

1.4 to 3.620P A V CC d (V I , V O ) d 3.6V (Note 8) 1.4 to 3.6r 20'I CC

Increase in I CC per Input

V IH V CC 0.6V

2.7 to

3.6

750

P A

Symbol Parameter

Conditions

V CC T A 40q C to 85q C Units

Figure (V)Min Max Number t PHL , t PLH

Propagation Delay C L 30 pF, R L 500:

3.3 r 0.30.6 3.5ns

Figures 1, 2A n to B n or B n to A n

2.5 r 0.20.8 4.21.8 r 0.15 1.58.4C L 15 pF, R L 2k :

1.5 r 0.1 1.016.8Figures 5, 6t PZL , t PZH

Output Enable Time

C L 30 pF, R L 500:

3.3 r 0.30.6

4.5ns

Figures 1, 3, 42.5 r 0.20.8 5.61.8 r 0.15

1.59.8C L 15 pF, R L 2k :

1.5 r 0.1 1.019.6Figures 5, 7, 8t PLZ , t PHZ

Output Disable Time

C L 30 pF, R L 500:

3.3 r 0.30.6 3.6ns

Figures 1, 3, 42.5 r 0.20.8 4.01.8 r 0.15

1.57.2C L 15 pF, R L 2k :

1.5 r 0.1 1.0

14.4Figures 5, 7, 8

t OSHL Output to Output Skew C L 30 pF, R L 500:

3.3 r 0.30.5ns

t OSLH

(Note 10)

2.5 r 0.20.51.8 r 0.150.75C L 15 pF, R L 2k :

1.5 r 0.1

1.5

https://www.360docs.net/doc/52257331.html,

74VCX245

Dynamic Switching Characteristics

Capacitance

Symbol Parameter

Conditions

V CC (V)T A 25q C Units

Typical V OLP

Quiet Output Dynamic Peak V OL

C L 30 pF, V IH V CC , V IL 0V

1.80.3V

2.50.7

3.3

1.0V OLV

Quiet Output Dynamic Valley V OL

C L 30 pF, V IH V CC , V IL 0V

1.8 0.3V

2.5 0.7

3.3

1.0V OHV

Quiet Output Dynamic Valley V OH

C L 30 pF, V IH V CC , V IL 0V

1.8 1.3V

2.5 1.7

3.3

2.0

Symbol Parameter

Conditions

T A 25q C Units Typical C IN Input Capacitance V I 0V or V CC , V CC 1.8V, 2.5V or 3.3V 6.0pF C I/O Input/Output Capacitance V I 0V or V CC , V CC 1.8V, 2.5V or 3.3V

7.0pF C PD

Power Dissipation Capacitance

V I 0V or V CC , f 10 MHz, V CC 1.8V, 2.5V or 3.3V

20.0

pF

https://www.360docs.net/doc/52257331.html, 6

74V C X 245

AC Loading and Waveforms (V

CC 3.3V r 0.3V to 1.8V r 0.15V)

FIGURE 1. AC Test Circuit

FIGURE 2. Waveform for Inverting and Non-Inverting Functions

FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

TEST SWITCH t PLH , t PHL Open

t PZL , t PLZ 6V at V CC 3.3V r 0.3V;

V CC x 2 at V CC 2.5V r 0.2V; 1.8V r 0.15V

t PZH , t PHZ

GND

Symbol V CC

3.3V r 0.3V

2.5V r 0.2V 1.8V r 0.15V

V mi 1.5V V CC /2V CC /2V mo 1.5V V CC /2V CC /2V X V OL 0.3V V OL 0.15V V OL 0.15V V Y

V OH 0.3V

V OH 0.15V

V OH 0.15V

https://www.360docs.net/doc/52257331.html,

74VCX245

AC Loading and Waveforms (V

CC 1.5 r 0.1V)

FIGURE 5. AC Test Circuit

FIGURE 6. Waveform for Inverting and Non-Inverting Functions

FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

TEST SWITCH t PLH , t PHL Open

t PZL , t PLZ V CC x 2 at V CC 1.5V r 0.1V

t PZH , t PHZ

GND

Symbol V CC 1.5V r 0.1V V mi V CC /2V mo V CC /2V X V OL 0.1V V Y

V OH 0.1V

https://www.360docs.net/doc/52257331.html, 8

74V C X 245

Tape and Reel Specification

Tape Format for DQFN

TAPE DIMENSIONS inches (millimeters)

REEL DIMENSIONS inches (millimeters)

Package

Tape Number Cavity Cover Tape Designator

Section Cavities Status Status Leader (Start End)

125 (typ)Empty Sealed BQX

Carrier 3000Filled Sealed Trailer (Hub End)

75 (typ)

Empty

Sealed

Tape

Size A B C D N W1W212 mm

13.00.0590.5120.795 2.1650.4880.724(330.0)

(1.50)

(13.00)

(20.20)

(55.00)

(12.4)

(18.4)

https://www.360docs.net/doc/52257331.html, 74VCX245

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

https://www.360docs.net/doc/52257331.html, 10

74V C X 245

Physical Dimensions

inches (millimeters) unless otherwise noted (Continued)

Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm

Package Number MLP020B

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1.Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

https://www.360docs.net/doc/52257331.html,

https://www.360docs.net/doc/52257331.html, 74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs

相关主题
相关文档
最新文档