PMV117EN中文资料
1.Product pro?le
1.1General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using T renchMOS? technology.
1.2Features
1.3Applications
1.4Quick reference data
2.Pinning information
PMV117EN
μTrenchMOS? enhanced logic level FET
Rev. 02 — 7
April 2005
Product data sheet
s Logic level threshold
s Very fast switching
s Subminiature surface-mounted package
s Battery management s Low power DC-to-DC converter
s High-speed switch
s V DS ≤30V
s I D ≤2.5A s R DSon ≤117m ? (V GS =10V)
s P tot ≤0.83W
Table 1:Pinning Pin Description Simpli?ed outline Symbol
1gate (G)SOT23
2source (S)3
drain (D)
1
23
S
D
G
mbb076
3.Ordering information
Table 2:Ordering information
Type number Package
Name Description Version PMV117EN TO-236AB plastic surface mounted package; 3 leads SOT23
4.Limiting values
Table 3:Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit V DS drain-source voltage (DC)25°C≤T j≤150°C-30V
V DGR drain-gate voltage (DC)25°C≤T j≤150°C; R GS=20k?-30V
V GS gate-source voltage (DC)-±20V
I D drain current (DC)T sp=25°C; V GS=10V;Figure2 and3- 2.5A
T sp=100°C; V GS=10V;Figure2- 1.6A
I DM peak drain current T sp=25°C; pulsed; t p≤10μs;Figure3-10A
P tot total power dissipation T sp=25°C;Figure1-0.83W T stg storage temperature?65+150°C T j junction temperature?65+150°C Source-drain diode
I S source (diode forward) current (DC)T sp=25°C-0.8A
I SM peak source (diode forward) current T sp=25°C; pulsed; t p≤10μs- 3.3A
V GS ≥10V
Fig 1.Normalized total power dissipation as a
function of solder point temperature
Fig 2.Normalized continuous drain current as a
function of solder point temperature
T sp =25°C; I DM is single pulse
Fig 3.Safe operating area; continuous and peak drain currents as a function of drain-source voltage
03aa17
4080
120050100150
200
T sp (°C)
P der (%)03aa25
40
80
120050100150
200
T sp (°C)
I der (%)P der P tot
P tot 25C °
()
------------------------100%
×=I der I D
I D 25C °
()
--------------------100%
×=03ak56
1
10?1
10
102I D (A)10?2
V DS (V)
10?1
102
10
1t p = 10 μs 100 μs
1 ms 10 ms 100 ms
Limit R DSon = V DS / I D
DC
5.Thermal characteristics
Table 4:Thermal characteristics
Symbol Parameter
Conditions Min Typ Max Unit R th(j-sp)
thermal resistance from junction to solder point
Figure 4
--100
K/W
Fig 4.Transient thermal impedance from junction to solder point as a function of pulse duration
03ak55
10?4
t p (s)
1
10
10?1
10?310?2102
10
103Z th(j-sp)(K/W)
1t p
t p T
P
t
T
δ =
δ = 0.5 0.2
0.1 0.05 0.02single pulse
6.Characteristics
Table 5:Characteristics
T j=25°C unless otherwise speci?ed.
Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown voltage I D=10μA; V GS=0V
T j=25°C3037-V
T j=?55°C27--V
V GS(th)gate-source threshold voltage I D=1mA; V DS=V GS;Figure9 and10
T j=25°C 1.52-V
T j=150°C 1.1--V
T j=?55°C-- 2.7V
I DSS drain-source leakage current V DS=24V; V GS=0V
T j=25°C-0.010.5μA
T j=150°C--10μA I GSS gate-source leakage current V GS=±20V; V DS=0V-10100nA R DSon drain-source on-state resistance V GS=10V; I D=500mA;Figure6 and8
T j=25°C-74117m?
V GS=4.5V; I D=500mA;Figure6 and8-
T j=25°C-117190m?
T j=150°C188300m?Dynamic characteristics
Q g(tot)total gate charge I D=0.5A; V DD=15V; V GS=10V;
Figure11- 4.6-nC
Q gs gate-source charge-0.6-nC Q gd gate-drain (Miller) charge- 1.35-nC
C iss input capacitance V GS=0V; V DS=10V; f=1MHz;
Figure13-147-pF
C oss output capacitance-65-pF C rss reverse transfer capacitance-41-pF t d(on)turn-on delay time V DD=15V; R L=15?; V GS=10V-4-ns t r rise time-7.5-ns t d(off)turn-off delay time-18-ns t f fall time-13-ns Source-drain diode
V SD source-drain (diode forward) voltage I S=0.83A; V GS=0V;Figure12-0.7 1.2V t rr reverse recovery time I S=1A; dI S/dt=?100A/μs; V GS=0V;
V DS=25V
-69-ns
T j =25°C T j =25°C
Fig 5.Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6.Drain-source on-state resistance as a function
of drain current; typical values
T j =25°C and 150°C; V DS >I D ×R DSon
Fig 7.Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 8.Normalized drain-source on-state resistance
factor as a function of junction temperature
03ak57
00.20.40.60.8
1
V DS (V)
1
2
3I D (A)
3.8 V GS (V) = 2.4
3.610 6
4.5 3.4
2.6
2.8
3.2
3
03ak58
012
3
I D (A)
100
200
300
400R DSon (m ?)
T j = 25 ?C V GS (V) = 3
3.2
3.610
63.84.53.4
03ak59
0123
4
V GS (V)
1
2
3
I D (A)V DS > I D × R DSon
T j = 150 ?C
25 ?C
03ad57
?60
060120
180
T j (°C)
00.5
1
1.5
2a a R DSon
R DSon 25C °()
------------------------------=
I D =1mA; V DS =V GS T j =25°C; V DS =5V
Fig 9.Gate-source threshold voltage as a function of
junction temperature
Fig 10.Sub-threshold drain current as a function of
gate-source voltage
I D =0.5A; V DD =15V
Fig 11.Gate-source voltage as a function of gate charge; typical values
03ak63
?60
060120
180
T j (°C)
00.511.5
2
2.5V GS(th)(V)
typ
min
03ak64
00.8 1.6 2.4
3.2
V GS (V)
10?110?2
10?3
10?4
10?5
10?6
I D (A)typ
min 03ak62
024
6
Q G (nC)
2
4
6
8
10V GS (V)
I D = 0.5 A T j = 25 °C V DD = 15 V
T j =25°C and 150°C; V GS =0V V GS =0V; f =1MHz
Fig 12.Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical values
Fig 13.Input,output and reverse transfer capacitances
as a function of drain-source voltage; typical values
03ak60
00.30.60.9
1.2
V SD (V)
1
2
3
I S (A)
V GS = 0 V T j = 150 ?C
25 ?C
03ak61
10?1
110
102
V DS (V)
10102
103
C (pF)
C iss
C oss
C rss
7.Package outline
Fig 14.Package outline SOT23
UNIT A 1max.b p c D E e 1H E L p Q w v REFERENCES
OUTLINE VERSION EUROPEAN PROJECTION
ISSUE DATE 99-09-1304-11-04
IEC
JEDEC JEITA
mm
0.1
0.480.38
0.150.09
3.02.8
1.41.2
0.95
e 1.9
2.52.1
0.550.45
0.1
0.2
DIMENSIONS (mm are the original dimensions)0.450.15
SOT23
TO-236AB
b p
D e 1
e
A
A 1
L p
Q
detail X
H E
E w M v M A
B
A
B 01 2 mm
scale
A 1.10.9
c
X
1
2
3
Plastic surface mounted package; 3 leads
SOT23
8.Revision history
Table 6:Revision history
Document ID Release date Data sheet status Change notice Doc. number Supersedes
PMV117EN_220050407Product data sheet-9397 750 14709PMV117EN-01 Modi?cations:?The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
?Table 5 “Characteristics”; correction to V GS(th) data
?Table 2 “Ordering information”: added
PMV117EN-0120030226Product data-9397 750 11095-
9.Data sheet status
[1]Please consult the most recently issued data sheet before initiating or completing a design.
[2]The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL https://www.360docs.net/doc/6c14243277.html,.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
10.De?nitions
Short-form speci?cation —The data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values de?nition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device.These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speci?cation is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation.
11.Disclaimers
Life support —These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes —Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’),relevant changes will be communicated via a Customer Product/Process Change Noti?cation (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products,and makes no representations or warranties that these products are free from patent,copyright,or mask work right infringement,unless otherwise speci?ed.
12.Trademarks
TrenchMOS —is a trademark of Koninklijke Philips Electronics N.V .
13.Contact information
For additional information, please visit: https://www.360docs.net/doc/6c14243277.html,
For sales of?ce addresses, send an email to: sales.addresses@https://www.360docs.net/doc/6c14243277.html,
Level Data sheet status [1]Product status [2][3]De?nition
I Objective data Development This data sheet contains data from the objective speci?cation for product development. Philips Semiconductors reserves the right to change the speci?cation in any manner without notice.
II
Preliminary data
Quali?cation
This data sheet contains data from the preliminary speci?cation.Supplementary data will be published at a later date.Philips Semiconductors reserves the right to change the speci?cation without notice,in order to improve the design and supply the best possible product.
III Product data Production
This data sheet contains data from the product speci?cation. Philips Semiconductors reserves the right to make changes at any time in order to improve the design,manufacturing and supply.Relevant changes will be communicated via a Customer Product/Process Change Noti?cation (CPCN).
14.Contents
1Product pro?le. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
3Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
6Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
8Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 11
10De?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
13Contact information . . . . . . . . . . . . . . . . . . . . 11
? Koninklijke Philips Electronics N.V.2005
All rights are reserved.Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.The information presented in this document does
not form part of any quotation or contract,is believed to be accurate and reliable and may
be changed without notice.No liability will be accepted by the publisher for any
consequence of its use.Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 7April2005
Document number: 9397 750 14709