重拾mini2440(二)

重拾mini2440（二）——

u-boot添加NAND驱动

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目的

NAND 是NOR 的替代器件，其与NOR 的优势与区别，请自行搜索,我们接下来要做的是，将代码从NAND 启动。首先，需要添加s3c2440 nand控制器的驱动

代码

此处的代码，请参阅commit

接下来，将针对代码的关键部分，进行注释。

由于某些文件比较大，所以，只列出了代码的改动部分，这与github上的显示方式是一致

的。每一行前面的数字是行号。“+” 代表这是添加的代码。 “-”号代表改行代码被删除。 include/configs/mini2440.h ... ... @@ -37,6 +37,9 @@

37

37 38

38 #define CONFIG_SYS_TEXT_BASE 0x0 39

39 #define CONFIG_S3C2440_GPIO

40 +#define CONFIG_NAND_S3C2440 添加2440的宏定义

41 +//#define CONFIG_S3C2440_NAND_HWECC 暂时屏蔽硬件ecc ，稍后会打开

42 +//#define CONFIG_SYS_NAND_ECCSIZE 512 40

43 41

44 42 45 /*

... ... @@ -177,6 +180,14 @@

177 180 /* 16k Total Size of Environment Sector */

178 181 #define CONFIG_ENV_SIZE 0x4000

179 182

183 +/*

184 + * Config for NAND flash

185 + */

186 +

187 +#define CONFIG_CMD_NAND 添加NAND 命令，否则不会在启动时初始化NAND

188 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 只有NAND

189 +#define CONFIG_SYS_NAND_BASE 0x4e000000 S3C2440的nand 控制寄存器地址 请参阅s3c2440的datasheet

190 +

180 191 /* ATAG configuration */

181 192 #define CONFIG_INITRD_TAG

182 193 #define CONFIG_SETUP_MEMORY_TAGS

drivers/mtd/nand/Makefile

... ... @@ -72,6 +72,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o

72

72 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o 73

73 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o 74

74 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o

75 +COBJS-$(CONFIG_NAND_S3C2440) += s3c2440_nand.o 添加2440的驱动文件 75

76 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o 76 77 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o

77 78 COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o

drivers/mtd/nand/s3c2440_nand.c ... ... @@ -0,0 +1,199 @@

1 +/*

2 + * (C) Copyright 201

3 Johnson Diao

3 + * Author: Johnson Diao

4 + * This file base on the s3c2410_nand.c,which author

5 + * is :

6 + *

7 + * (C) Copyright 2006 OpenMoko, Inc.

8 + * Author: Harald Welte

9 + *

10 + * This program is free software; you can redistribute it and/or

11 + * modify it under the terms of the GNU General Public License as

12 + * published by the Free Software Foundation; either version 2 of

13 + * the License, or (at your option) any later version.

14 + *

15 + * This program is distributed in the hope that it will be useful,

16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of

17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

18 + * GNU General Public License for more details.

19 + *

20 + * You should have received a copy of the GNU General Public License

21 + * along with this program; if not, write to the Free Software

22 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,

23 + * MA 02111-1307 USA

24 + */

25 +

26 +#include

27 +

28 +#include

29 +#include

30 +#include

31 +

32 +

33 +#define S3C2440_NFCONF_INITECC (1<<4) 这里有个错误，本意是对应NFCONT 的 bit[4],由于这个commit 没有添加硬件的ecc ，所以没发现，后面的commit 会修改

34 +#define S3C2440_NFCONT_nFCE (1<<1) 35 +#define S3C2440_NFCONT_EN 0x01

36 +

37 +#define S3C2440_NFCONF_TACLS(x) ((x)<<12)

38 +#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)

39 +#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)

40 +

41 +#define S3C2440_ADDR_NALE 0x08 命令寄存器NFCMMD

42 +#define S3C2440_ADDR_NCLE 0x0c 地址寄存器NFADDR

43 +#define S3C2440_ADDR_DATA 0x10

44 +

45 +#ifdef CONFIG_NAND_SPL

46 +

47 +/* in the early stage of NAND flash booting, printf() is not available */

48 +#define printf(fmt, args...)

49 +

50 +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)

51 +{

52 + int i;

53 + struct nand_chip *this = mtd->priv;

54 +

55 + for (i = 0; i < len; i++)

56 + buf[i] = readb(this->IO_ADDR_R);

57 +}

58 +#endif

59 +

60 +static void s3c2440_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)

61 +{

62 + struct nand_chip *chip = mtd->priv;

63 + struct s3c2440_nand *nand = s3c2440_get_base_nand();

64 +

65 +

66 + debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);

67 +

68 + if (ctrl & NAND_CTRL_CHANGE) {

69 + ulong IO_ADDR_W = (ulong)nand;

70 + if (!(ctrl & NAND_CLE))

71 + IO_ADDR_W |= S3C2440_ADDR_NCLE; 没有CLE 时写地址寄存器

72 + if (!(ctrl & NAND_ALE))

73 + IO_ADDR_W |= S3C2440_ADDR_NALE; 没有ALE 时写命令寄存器

74 +

75 + if ( (ctrl & NAND_CLE) &&

76 + (ctrl & NAND_ALE)) {

77 + IO_ADDR_W |= S3C2440_ADDR_DATA; 写数据到数据寄存器

78 + }

79 +

80 + chip->IO_ADDR_W = (void *)IO_ADDR_W;

81 +

82 + if (ctrl & NAND_NCE) 片选信号使能

83 + writel(readl(&nand->nfcont) & ~S3C2440_NFCONT_nFCE,

84 + &nand->nfcont);

85 + else

86 + writel(readl(&nand->nfcont) | S3C2440_NFCONT_nFCE,

87 + &nand->nfcont);

88 + }

89 +

90 + if (cmd != NAND_CMD_NONE)

91 + writeb(cmd, chip->IO_ADDR_W); 将上面的数值写到对应的寄存器

92 +}

93 +

94 +static int s3c2440_dev_ready(struct mtd_info *mtd)

95 +{

96 + struct s3c2440_nand *nand = s3c2440_get_base_nand();

97 + int ret;

98 +

99 + ret = readl(&nand->nfstat) & 0x01; 读取状态寄存器

100 +

101 + return ret;

102 +}

103 +

104 +#ifdef CONFIG_S3C2440_NAND_HWECC

105 +void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)

106 +{

107 + struct s3c2440_nand *nand = s3c2440_get_base_nand();

108 + debug("s3c2440_nand_enable_hwecc(%p, %d)\n", mtd, mode);

109 + writel(readl(&nand->nfconf) | S3C2440_NFCONF_INITECC, &nand->nfconf);

110 +}

111 +

112 +static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, 113 + u_char *ecc_code)

114 +{

115 + struct s3c2440_nand *nand = s3c2440_get_base_nand();

116 + ecc_code[0] = readb(&nand->nfecc);

117 + ecc_code[1] = readb(&nand->nfecc + 1);

118 + ecc_code[2] = readb(&nand->nfecc + 2);

119 + debug("s3c2440_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",

120 + mtd , ecc_code[0], ecc_code[1], ecc_code[2]);

121 +

122 + return 0;

123 +}

124 +

125 +static int s3c2440_nand_correct_data(struct mtd_info *mtd, u_char *dat, 126 + u_char *read_ecc, u_char *calc_ecc)

127 +{

128 + if (read_ecc[0] == calc_ecc[0] &&

129 + read_ecc[1] == calc_ecc[1] &&

130 + read_ecc[2] == calc_ecc[2])

131 + return 0;

132 +

133 + debug("s3c2440_nand_correct_data: not implemented\n");

134 + return -1;

135 +}

136 +#endif

137 +

138 +int board_nand_init(struct nand_chip *nand)

139 +{

140 + u_int32_t cfg;

141 + u_int8_t tacls, twrph0, twrph1;

142 + struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); 143 + struct s3c2440_nand *nand_reg = s3c2440_get_base_nand();

144 + debug("board_nand_init()\n");

145 +

146 + writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);

147 +

148 + /* initialize hardware */

149 + /* Modify if you change NAND JohnsonDiao */

150 + tacls = 4; 需要参考datasheet上的时序图，为保险，这里设置的比较宽松

151 + twrph0 = 8;

152 + twrph1 = 8;

153 +

154 + cfg |= S3C2440_NFCONF_TACLS(tacls - 1);

155 + cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);

156 + cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);

157 + writel(cfg, &nand_reg->nfconf);

158 +

159 + cfg = 0;

160 + cfg |= S3C2440_NFCONT_EN;

161 + cfg &= ~S3C2440_NFCONT_nFCE;

162 + writel(readl(&nand_reg->nfcont) | cfg,

163 + &nand_reg->nfcont);

164 +

165 + /* initialize nand_chip data structure */

166 + nand->IO_ADDR_R = (void *)&nand_reg->nfdata;

167 + nand->IO_ADDR_W = (void *)&nand_reg->nfdata;

168 + nand->select_chip = NULL;

169 +

170 + /* read_buf and write_buf are default */

171 + /* read_byte and write_byte are default */

172 +#ifdef CONFIG_NAND_SPL

173 + nand->read_buf = nand_read_buf;

174 +#endif

175 +

176 + /* hwcontrol always must be implemented */

177 + nand->cmd_ctrl = s3c2440_hwcontrol;

178 +

179 + nand->dev_ready = s3c2440_dev_ready;

180 +

181 +#ifdef CONFIG_S3C2440_NAND_HWECC

182 + nand->ecc.hwctl = s3c2440_nand_enable_hwecc;

183 + nand->ecc.calculate = s3c2440_nand_calculate_ecc;

184 + nand->ecc.correct = s3c2440_nand_correct_data;

185 + nand->ecc.mode = NAND_ECC_HW;

186 + nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;

187 + nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;

188 +#else

189 + nand->ecc.mode = NAND_ECC_SOFT;

190 +#endif

191 +

192 +#ifdef CONFIG_S3C2440_NAND_BBT

193 + nand->options = NAND_USE_FLASH_BBT;

194 +#else

195 + nand->options = 0;

196 +#endif

197 +

198 + return 0;

199 +}

将这个commit的代码编译后运行，可以用nand 命令来查看nand flash的信息，不过，这是的nand 帮助信息很少，如果想看完整的帮助信息，可以添加long help 的宏定义include/configs/mini2440.h

... ... @@ -40,6 +40,8 @@

40 40 #define CONFIG_NAND_S3C2440

41 41 //#define CONFIG_S3C2440_NAND_HWECC

42 42 //#define CONFIG_SYS_NAND_ECCSIZE 512

43 +#define CONFIG_SYS_LONGHELP

44 +

43 45

44 46

45 47 /*