Understanding and characterizing timing jitter

Understanding and characterizing timing jitter
Understanding and characterizing timing jitter

1. 2. 3. 4. 5. 6. 7. 8. 9. Understanding and Characterizing Timing Jitter

Publish Date: Apr 17, 2013

Overview

Timing jitter is the unwelcome companion of all electrical systems that use voltage transitions to represent timing information. This paper focuses primarily on jitter in electrical systems.Table of Contents

Introduction

The Consequences of Jitter

What is Jitter?

Jitter Measurement and Visualization

Components of Jitter

Putting It All Together

Jitter vs. Bit Error Rate

Summary Download a Jitter, Signal Integrity, and Connectivity Fundamentals Resource Kit

Download a Jitter, Signal Integrity, and Connectivity Fundamentals Resource Kit

Download the technical ekit to learn more about improving measurement accuracy with an understanding of signal integrity and probing concepts.

1. Introduction

Timing jitter is the unwelcome companion of all electrical systems that use voltage transitions to represent timing information. Historically, electrical systems have lessened the ill effects of timing jitter (or, simply “jitter”) by employing relatively low signaling rates. As a consequence, jitter-induced errors have been small when compared with the time intervals that they corrupt. The timing margins associated with today’s high-speed serial buses and data links reveal that a tighter control of jitter is needed throughout the system design.

As signaling rates climb above 2 GHz and voltage swings shrink to conserve power, the timing jitter in a system becomes a significant percentage of the signaling interval. Under these circumstances, jitter becomes a fundamental performance limit. Understanding what jitter is, and how to characterize it, is the first step to successfully deploying high-speed systems that dependably meet their performance requirements.

A more thorough definition will be introduced in the following section, but conceptually, jitter is the deviation of timing edges from their “correct” locations. In a timing-based system, timing jitter is the most obvious and direct form of non-idealness. As a form of noise, jitter must be treated as a random process and characterized in terms of its statistics.

If you have a way to measure jitter statistics, you can compare components and systems to each other and to chosen limits. However, this alone will not allow you to efficiently refine and debug a cutting-edge design. Only by thoroughly analyzing jitter is it possible for the root causes to be isolated, so that they can be reduced systematically rather than by trial and error. This analysis takes the form of jitter visualization and decomposition, discussed in later sections.

Although there are many similarities between the causes, behavior and characterization of electrical and optical jitter, the equipment used to measure jitter in optical systems differs from that used in electrical systems. This paper focuses primarily on jitter in electrical systems.

2. The Consequences of Jitter

Why should you be concerned about jitter? What impact does jitter have on system performance? In this section, two cases are considered: a high-speed computer bus, and a serial data link. For each case, the specific effects of jitter are considered in some detail.

Computer Bus Design

Let’s say you are bringing up a new embedded processor design, and are seeing occasional data errors when reading flash memory. You suspect that the address decode that generates the flash memory’s chip enable (CE) is not meeting its setup time requirement with respect to the rising edge of the write enable (WE). You probe the CE and WE signals with your high-speed scope to observe the timing relationship. After ten single-shot acquisitions, you have measured durations of 87 to 92 nsec, all above the minimum setup time of 75 nsec by what seems like a comfortable margin. But what is an adequate margin? Are these times great enough to remove doubt that you are sometimes violating the setup-time requirement? What percent of the time is a violation likely to occur?

After evaluating several million waveforms in infinite persistence mode and seeing setup times as short as 82 nsec, you decide that the setup time might be a problem after all. But is the problem due to variations in the system clock period, in the address decoder, or somewhere else?

Serial Data Link

Your Gigabit Ethernet physical-layer transceiver chip is pushing up against deadline and you are a bit nervous about the compliance tests that will soon be run by an external test house. The spec in the standards document calls for a measurement of data jitter relative to the local data clock, and another measurement of the clock’s jitter relative to a jitter free reference, whatever that is. In any event, you’d like to make sure you have enough margin that the parts from the qualification run satisfy the compliance lab.

You start by using an oscilloscope in infinite-persistence mode to check the peak-to-peak jitter on the data clock. Since your scope allows you to define histogram boxes on-screen, you use this feature to create a histogram of the edge locations. You find a peak-to-peak value of 550 psec, and the spec says you must have less than 300 psec. Fortunately, the 300 psec spec is after the jitter has been filtered by a 5 kHz high-pass filter. Unfortunately, you have no way of knowing what part of the jitter in the histogram is due to lower frequencies and can safely be disregarded.You take a look at the jitter on the data lines relative to the clock, and find that this, too, is dangerously close to the spec limit. However, you suspect that this jitter is not in your chip, but that it has been picked up because of the test board, which doesn’t adhere to good design practice on the layout of the differential data lines. You know that the switching supply on the test board may be to blame, but need to determine how much of the measured jitter is coming from this source. Both this case and the one above are examples of times when even a high-performance oscilloscope may not provide enough muscle to answer all your questions. To really feel confident about your design, you may need two additional tools: some means of advanced jitter analysis, and a good grasp of the basic causes and characteristics of timing jitter.

3. What is Jitter?

This simple and intuitive definition is provided by the SONET specification (Bell Communications Research, Inc (Bellcore), 1997)

“Jitter is defined as the short-term variations of a digital signal’s significant instants from their ideal positions in time.” This captures the essence of jitter, but some of the individual terms (short-term, significant instants, ideal positions) need to be more specific before this definition can be unambiguously used.

In all real applications, jitter has a random component, so it must be specified using statistical terms. Metrics such as mean value and standard deviation, and qualifiers such as confidence interval,must be used to establish meaningful, repeatable measurements. A review of the basic concepts from statistical mathematics that underlie the following material is beyond the scope of this paper,but the bibliography at the end provides some references for the reader who wishes to delve deeper.

Jitter vs. Wander

By convention, timing variations are split into two categories, called jitter and wander, based on a Fourier analysis of the variations vs. time. Timing variations that occur slowly are called wander.Jitter describes timing variations that occur more rapidly.

The threshold between wander and jitter is defined to be 10 Hz according to the ITU (ITU, 1996) but other definitions may be encountered. In many cases wander is of little or no consequence on serial communications links, where a clock recovery circuit effectively eliminates it.

Reference Level

The significant instants referred to by our definition are the transitions, or edges, between logic states in the digital signal. To be more specific, the significant instants are the exact moments when the transitioning signal crosses a chosen amplitude threshold, which may be referred to as the reference level or decision threshold. For two-level signal (by far the most common case), the mean signal voltage is frequently used as this reference level. If the signal-of interest is to be received by a Schmitt-trigger input, it may be desirable to use one reference level when analyzing the rising edges and a different reference level when analyzing the falling edges.

The phrase digital signal in our definition is perhaps optimistic, since for high-speed signals, the transitions are analog events that are subject to rise-time and slew-rate limitations. During the small but finite time when the signal is ramping through the reference level, any voltage noise that corrupts the waveform will be converted proportionately into timing jitter.

Clock Recovery

Before a digital signal’s deviations from ideal positions can be measured, those ideal positions must be identified. For a clock-like signal (alternating 1’s and 0’s), the ideal positions conceptually correspond to a jitter-free clock with the same mean frequency and phase as the measured one. More care must be used for a data signal, since no event (transition) occurs when the same bit repeats two or more times in a row. Clock Recovery is the name given to the process of establishing the timing of the reference clock.

One method of clock recovery is to use the constant frequency clock that best fits the measured events, in the least-squares sense. This means that a reference clock of the form:

Α ? sin(ωct + φc )

is assumed, where ωc and φc are constants. The constants are chosen such that the sum of the squares of the time errors between the reference clock and the measured clock is minimized. This is an excellent approach when a finite-length block of contiguous data is to be analyzed. If the duration of the data is sufficiently long, the resulting jitter measurement may include wander as well as jitter. In this case, a high-pass filter may be used subsequently to remove the wander component.

Another effective method of clock recovery is through the use of a phase locked loop (PLL). A PLL constantly tracks slowly varying changes in the symbol rate of the measured data. Consequently, it acts as a high-pass filter with respect to the jitter that remains on the signal. Since most datacom links use PLLs in their receivers, this measurement approach has the advantage of modeling the behavior of the system in which the measured device will be used. For consistency and repeatability of measurement, many datacom specifications define a golden PLL. In this context, golden simply means that the PLL characteristics are precisely defined and tightly controlled. If a PLL conforming to these specs is used to measure jitter on multiple devices, the jitter may be objectively compared and logically related to the system in which the devices are to be used.

Period Jitter, Cycle-Cycle Jitter, and TIE

There are several ways in which jitter may be measured on a single waveform. These are period jitter, cycle-cycle jitter, and time interval error (TIE). It is important to understand how these measurements relate to each other and what they reveal.

Figure 1 shows a clock-like signal with timing jitter. The dotted lines show the ideal edge locations, corresponding to a jitter-free version of the clock. The period jitter, indicated by the measurements P1, P2 and P3, simply measures the period of each clock cycle in the waveform. This is the easiest and most direct measurement to make. Its peak-to-peak value may be estimated by adjusting an oscilloscope to display a little more than one complete clock cycle with the display set for infinite persistence. If the scope triggers on the first edge, the period jitter can be seen on the second edge. This is shown in Figure 2.

The cycle-cycle jitter, indicated by C2 and C3 in Figure 1, measures how much the clock period changes between any two adjacent cycles. As shown, the cycle-cycle jitter can be found by applying a first-order difference operation to the period jitter. This measurement can be of interest because it shows the instantaneous dynamics a clock-recovery PLL might be subjected to. Notice that no knowledge of the ideal edge locations of the reference clock was required in order to calculate either the period jitter or the cycle-cycle jitter.

The time interval error is shown in Figure 1 by the measurements TIE1 through TIE4. The TIE measures how far each active edge of the clock varies from its ideal position. For this measurement to be performed, the ideal edges must be known or estimated. For this reason, it is difficult to observe TIE directly with an oscilloscope, unless some means of clock recovery or post-processing is available.

The TIE may also be obtained by integrating the period jitter, after first subtracting the nominal (ideal) clock period from each measured period. TIE is important because it shows the cumulative effect that even a small amount of period jitter can have over time. Once the TIE reaches ±0.5 unit intervals, the eye is closed and a receiver circuit will experience bit errors.

Figure 3 gives an example of how these three jitter measurements compare to each other for a specific waveform. For this example, the waveform has a nominal period of 1 μsec, but the actual period follows a pattern of eight 990 nsec cycles followed by eight cycles of 1010 nsec.

Figure

1.Different Measurements of Jitter

Figure 2. Period Jitter Measured with Cursors

Figure 3. Trend Views of Different Measurements

4. Jitter Measurement and Visualization

The paragraphs in this section discuss some of the tools and techniques that are useful for quantifying and/or analyzing jitter.

Jitter Statistics

Since all known signals contain jitter that has a random component, statistical measures are required to properly characterize the jitter. Some of the commonly used measures are:

Mean Value: The arithmetic mean, or average, value of a clock period is the nominal period. This is the reciprocal of the frequency that a frequency counter would measure. The mean value of the TIE is theoretically zero, although a small residual value may result depending on the measurement technique.

Standard Deviation: The standard deviation, represented by the greek character sigma (σ), is the average amount by which a measurement varies from its mean value. It is particularly useful in describing Gaussian processes, for which the distribution is completely specified by the mean and standard deviation.

Maximum, Minimum and Peak-Peak Values: The Max and Min values generally refer to values actually observed during a measurement interval, and the Peak-Peak value is simply the Max minus the Min. These measurements should be used judiciously. For a deterministic signal, these values may equal the true values even after a relatively short measurement interval. But for a random signal with a Gaussian distribution, there is theoretically no limit on the max and min values, so the observed peak-peak value will generally grow over time. For this reason, the peak-peak value should be used in conjunction with the population size and some knowledge of the type of distribution.

Population: The population is the number of individual observations included in a statistical data set. For a random process, a high population intuitively gives greater confidence that the measurement results are repeatable. If the characteristics of the distribution are known or can be estimated, it is possible to calculate the population needed to reduce the measurement uncertainty below a desired point.

Jitter Histogram

A histogram is a diagram that plots the measurement values in a data set against the frequency of occurrence of the measurements. If the number of measurements in the data set is large, the

A histogram is a diagram that plots the measurement values in a data set against the frequency of occurrence of the measurements. If the number of measurements in the data set is large, the histogram provides a good estimate of the probability density function (pdf) of the set. For example, if you rolled a fair die 1000 times and recorded the results, they might be as depicted in Figure 4, where the HITS axis shows the number of times each value occurred.

Note that a histogram provides no information about the order in which the observations occurred.

An example of a jitter histogram for a TIE measurement is shown in Figure 5. In this case, the continuous variable is mapped into 500 bins and the total population of the data set is 3,200,000. Since this is a TIE measurement, the mean value is 0 nsec. For this plot, the distribution is approximately Gaussian with a standard deviation of 1.3 psec.

Consider a second example, in which the TIE of the signal in Figure 5 is modulated by the sine wave depicted in Figure 6. If this sine wave were sampled at an arbitrary instant, there is an equal likelihood that the sample value would lie anywhere between -15 nsec and 15 nsec. Hence, the TIE histogram of the modulated signal is spread over ±15 nsec with roughly equal likelihood, as shown in Figure 7. (The steep but sloping tails at the left and right edges of the histogram show that the jitter still has a Gaussian component.).

Figure 4. Measurement Histogram

Figure 5. Histogram of a Time Interval Error Measurement.

Figure 6. Intended Sinewave Modulation to Apply to a Data Signal.

Figure 6. Intended Sinewave Modulation to Apply to a Data Signal.

Figure 7. Time Interval Error of a Modulated Signal plotted as a Histogram.

Jitter vs. Time (Time Trend)

Since the jitter histogram doesn’t show the order in which the measurement observations occur, it cannot reveal repeating patterns that might indicate a modulation or other periodic component. A plot of jitter value versus time can make such a pattern obvious. As an example, the TIE from the phase modulated signal of Figure 7 was plotted against time to produce Figure 8. Now, the pattern of jitter variation becomes apparent, and its correlation with one of several possible sources of coupled noise might become clear.

Figure 8.Time Interval Error of a Modulated Signal plotted as a Trend

Jitter vs. Frequency (Jitter Spectrum)

Since the jitter measurements can be plotted versus time, an obvious extension is to apply a Fourier transform to these measurements and display the results in the frequency domain. This results in a jitter spectrum, with the modulation frequency displayed on the horizontal axis and the amplitude of modulation shown on the vertical axis. One of the benefits of spectral analysis is that periodic components that otherwise might be hidden by wideband noise can often be clearly distinguished.

The prior example of a clock with sinusoidal modulation is used again here. Figure 9 shows the same TIE measurement as Figure 8, displayed as a TIE spectrum.

Figure 9.Time Interval Error of a Modulated Signal plotted as a Spectrum

Now, the sinusoidal modulation is seen to have a fundamental frequency of 15 kHz, as indicated by the largest spur. In theory, the Fourier series representation of a triangle wave only has odd harmonics. This is corroborated by the spectrum, where components can clearly be seen at 3 kHz, 5 kHz, 7 kHz, and so on. The random noise still appears, but in this view it is manifested as a broad flat noise floor, that becomes flat above 2 MHz.

It was mentioned earlier that timing variations with Fourier components below some limit, usually 10 Hz, are considered by convention to be wander rather than jitter. Of more practical interest, some other frequency limit (e.g. the loop bandwidth of your system’s clock-recovery loop) may determine which noise can be safely tolerated. A spectral view of jitter can reveal whether the noise in a system is of concern or not.

Eye Diagram

All of the methods discussed so far rely on edge locations only. These locations are extracted from a waveform by detecting when the waveform crosses one or more amplitude thresholds. The eye diagram is a more general tool, since it gives insight into the amplitude behavior of the waveform as well as the timing behavior.

An eye diagram is created when many short segments of a waveform are superimposed such that the nominal edge locations and voltage levels are aligned, as suggested in Figure 10. Usually, a horizontal span of two unit intervals is shown. The waveform segments may be adjacent ones, as shown in the figure, or may be taken from more widely spaced samples of the signal. If the waveform is repeatable, a sampling scope may be used to build an eye diagram from individual samples taken at random delays on many waveforms.

Color has been used in the stylized Figure 10 to show how the individual waveform segments are composed into an eye diagram. In practice, eye diagrams are usually either monochrome or use color to indicate the density of waveform samples at any given point of the display. Figure 11 shows such a color density display for a waveform that exhibits several types of noise.

In this diagram, white arrows are used to show the vertical and horizontal extent of the eye opening. As the noise on a signal increases, the eye becomes less open, either horizontally, vertically or both. The eye is said to be closed when no open area remains in the center of the diagram.

The easiest way to create an eye diagram is with an oscilloscope or digitizer in a long-persistence display mode. You should use caution in how you trigger the scope, if you use this approach. Simply triggering on a waveform edge will result in an eye diagram showing waveforms relative to that edge. This can be very different from an eye diagram relative to the underlying bit clock. To produce a diagram that is relative to the bit clock, you need some form of clock recovery, either in software or hardware. If your oscilloscope does not provide this feature, you may be able to use a trigger derived from an external clock-recovery circuit.

The relationship between the eye diagram and the TIE histogram can be seen by turning the density eye diagram of Figure 11 into a three dimensional figure and slicing it along the decision threshold, as illustrated in Figure 12. The area highlighted in pink is equivalent to a histogram of the first of the two zero-crossings in the eye diagram.

Figure 10. Constructing a Real-Time Eye Diagram

Figure 11. A Waveform Database with Color Gradation

Figure 12. In a Waveform Database, Colors can Represent Population Jitter & BER

5. Components of Jitter

Jitter separation, or jitter decomposition, is an analysis technique that uses a parameterized model to describe and predict system behavior. This section explains why this technique is used, and provides details about the jitter model most commonly used today.

Motivations for Decomposing Jitter

To understand how real systems behave, it is often useful to use a mathematical model of the system. The behavior of such a model can be tuned by adjusting the parameters of its individual components. If the parameters of the model are chosen based on observations of the real system, then the model can be used to predict the behavior of the system in other situations. Thus, one of the motivations for jitter decomposition (also called jitter separation) is to extrapolate system performance to cases that would be difficult or time consuming to measure directly. Another motivation for modeling the system this way has to do with analysis. If each of the model components is associated with one or more underlying physical effects, an understanding of the model can provide insight into the precise cause or causes of excessive jitter.

All models of complex systems make assumptions and simplifications, so the fit between the model and the true system behavior will never be exact. And in fact, there is usually some latitude in parameter choice when fitting the model’s behavior to the observed measurements. For this reason, jitter separation has some elements of art as well as science, and "four nines" repeatability of measurements is not to be expected.

The Jitter Model

The jitter model most commonly used is based on the hierarchy shown in Figure 13. In this hierarchy, the total jitter (TJ) is first separated into two categories, random jitter (RJ) and deterministic jitter (DJ). It will be seen later that correctly distinguishing between these two jitter types has a dramatic impact on model correctness – more so than any other modeling decision.

The deterministic jitter is further subdivided into several categories: periodic jitter (PJ, also sometimes called sinusoidal jitter or SJ), duty-cycle dependent jitter (DCD), and data dependent jitter (DDJ, also known as inter-symbol interference, ISI). An additional category (bounded, uncorrelated jitter, or BUJ) is sometimes used.

For each of these jitter types, the characteristics and root causes are discussed below.

Figure 13. Jitter is Composed of Random and Deterministic Parts

Random Jitter

Random jitter is timing noise that cannot be predicted, because it has no discernible pattern. A classic example of random noise is the sound that is heard when a radio receiver is tuned to an inactive carrier frequency. While a random process can, in theory, have any probability distribution, random jitter is assumed to have a Gaussian distribution for the purpose of the jitter model. One reason for this is that the primary source of random noise in many electrical circuits is thermal noise (also called Johnson noise or shot noise), which is known to have a Gaussian distribution. Another, more fundamental reason is that the composite effect of many uncorrelated noise sources, no matter what the distributions of the individual sources, approaches a Gaussian distribution according, to the central limit theorem.

The Gaussian distribution, also known as the normal distribution, has a PDF that is described by the familiar bell curve. An example of the distribution, with a mean value of zero and a standard deviation of 1.0, is shown in Figure 14. This distribution is covered thoroughly in one of the references in the bibliography (Davenport and Root, 1987), but its single most important characteristic is this: For a Gaussian variable, the peak value that it might attain is infinite. That is, although most samples of this random variable will be clustered around its mean value, any particular sample could, in theory, differ from that mean by an arbitrarily large amount. So, there is no bounded peak-to-peak value for the underlying distribution. The more samples one takes of such a distribution, the larger the measured peak-to-peak value will be. Frequently, efforts are made to characterize such a distribution by sampling it some large number of times and recording the peak-to-peak value that results. One should use caution with this approach. The peak-to-peak value of a set of N observations of a random variable is itself a random variable, albeit one with a lower standard deviation. Using such a random variable as a pass-fail criterion for quality screening, for example, requires that the pass threshold be raised to account for the uncertainty in the measurement, resulting in some acceptable units being failed.

A better approach is to fit the N observations to the assumed distribution (in this case Gaussian). Then, the mathematical description of the distribution can be used to predict longer-term behavior to a particular confidence level. An eye diagram for a signal with only Gaussian jitter, together with the associated TIE histogram, is shown in Figure 15.

Figure 14. Gaussian Distribution

Figure 15. An Eye Diagram and Histogram of Gaussian Jitter

Deterministic Jitter

Deterministic jitter is timing jitter that is repeatable and predictable. Because of this, the peak-to-peak value of this jitter is bounded, and the bounds can usually be observed or predicted with high confidence based on a reasonably low number of observations. This category of jitter is further subdivided in the paragraphs that follow, based both on the characteristics of the jitter and the root causes.

Periodic Jitter

Jitter that repeats in a cyclic fashion is called periodic jitter. An example was shown in Figure 3, where the TIE time trend shows a repeating triangle wave. Since any periodic waveform can be decomposed into a Fourier series of harmonically related sinusoids, this kind of jitter is sometimes called sinusoidal jitter. The probability distribution for a sine wave with peak amplitude of 1.0 is shown in Figure 16.

By convention, periodic jitter is uncorrelated with any periodically repeating patterns in a data stream. Jitter that is correlated with repeating data patterns is covered in the next paragraph. Periodic jitter is typically caused by external deterministic noise sources coupling into a system, such as switching power supply noise or a strong local RF carrier. It may also be caused by an unstable clock-recovery PLL.

An eye diagram for a signal with 0.2 unit intervals of periodic jitter, together with the associated TIE histogram, is shown in Figure 17.

Figure 16. A non-Gaussian Distribution

Figure 17. An Eye Diagram and Histogram of non-Gaussian Jitter

Data Dependent Jitter

Any jitter that is correlated with the bit sequence in a data stream is termed Data-Dependent Jitter, or DDJ. DDJ is often caused by the frequency response of a cable or device. Consider the waveform in Figure 18, in which a data sequence is strongly low-pass filtered. Because of the filtering, the waveform doesn’t reach a full HIGH or LOW state unless there are several bits in a row of the same polarity.

Figure 19 shows this waveform superimposed on an offset version of itself. You can see that an earlier threshold crossing occurs when a falling transition follows a 1,0,1,0,1,0,1 sequence than when following a 1,0,1,0,1,1,1 sequence.

Since this timing shift is predictable and is related to the particular data preceding the transition, it is an example of DDJ. Another common name is Inter-Symbol Interference, or ISI.

An eye diagram for a signal with 0.2 unit intervals of DDJ, together with the associated TIE histogram, is shown in Figure 20. The histogram for ISI jitter always consists solely of impulses.

Figure 18. Data Signal with Data Dependent Jitter

Figure 19. Limited Bandpass One Source of Data Dependent Jitter

Figure 20. An Eye Diagram and Histogram of Data Dependent Jitter

Duty-cycle dependent jitter

Jitter that may be predicted based on whether the associated edge is rising or falling is called Duty-Cycle Jitter (DCD). There are two common causes of DCD:

1. The slew rate for the rising edges differs from that of the falling edges.

2. The decision threshold for a waveform is higher or lower than it should be.

Figure 21 is an eye diagram demonstrating the first case. Here, the decision threshold is at the 50% amplitude point but the slow rise time of the waveform causes the rising edges to cross the threshold later than the falling edges. As a result, the histogram of an edge crossing (gray) shows two distinct groupings. (In contrast to the prior eye diagrams, the waveform in this example has some Gaussian noise in addition to the duty-cycle jitter.)

Figure 22 is an eye diagram showing the second case, in which the waveform has balanced rise and fall times but the decision threshold is not set at the 50% amplitude point. The edge-crossing histogram would look very much like that from Figure 21.

Figure 21. Duty Cycle Distortion Caused by Non-symmetrical Rise/Fall Times

Figure 22. Duty Cycle Distortion Caused by Incorrect Detection Threshold

6. Putting It All Together

The paragraphs above included eye diagrams and TIE histograms for each of the jitter types individually. But what happens to the histogram when more than one jitter type is present at the same time? A useful and applicable result from statistical theory can be paraphrased as follows: If two or more random processes are independent, the distribution that results from the sum of their effects is equal to the convolution of the individual distributions.

A visual example of this concept is much more compelling than the verbal description. Figure 23 depicts what happens when duty-cycle jitter (with a histogram consisting of two impulses) is combined with random jitter (with its Gaussian distribution). Another example was shown earlier in Figure 7, where the uniform distribution of a triangle wave (a form of periodic jitter) was combined with random jitter.

A knowledgeable person could look at the final histogram from Figure 23 and infer what two types of jitter had contributed to it. However, real examples may involve all the jitter types in various amounts, resulting in a composite histogram that is much less intuitive. One of the objectives of a thorough jitter analysis is to identify all the individual jitter components that contributed to the final result.

The real power of jitter separation comes when the accurately identified jitter components are inserted back into the jitter model outlined in Figure 13 and the model is used to predict how a system will behave in new circumstances. This is the basis for Bit Error Rate estimation, which is covered in the next section.

To understand why accurate analysis tools are important, we compare two systems with different jitter characteristics. The first system, identified as System I, has only random jitter with a standard deviation of 0.053 unit intervals (UI). A TIE histogram for this system, which has a data rate of 1062.5 Mbps, is shown in Figure 24.

The second system, identified as System II, has random jitter with a standard deviation of 0.028 UI, about half that of the first system. However, it also has two uncorrelated components of periodic jitter, each with a peak-to-peak amplitude of 0.14 UI. Figure 25 shows the TIE histogram for System II.

The two histograms, which contain identical populations of about 42,000 edges, don’t look remarkably different. In fact, for these two sample sets the peak-to-peak value of the time interval error is exactly the same: 430 ps (0.457 UI). If visual comparison were the only tool available, distinguishing between these two cases would be difficult. Accurately predicting how the systems might behave over a longer observation interval would be impossible.

One might ask whether it is important to distinguish between these cases, since they look so similar. We shall return for a second look at this example after a review of Bit Error Rates and Bathtub curves.

Figure 23. Random Jitter is Convolved with Deterministic Jitter to Find Total Jitter

Figure 23. Random Jitter is Convolved with Deterministic Jitter to Find Total Jitter

Figure 24. A Histogram of a Jitter Distribution with Dominant Random Jitter

Figure 25. A Histogram of a Jitter Distribution with Dominant Deterministic Jitter

7. Jitter vs. Bit Error Rate

The Jitter Budget

A real communications system consists of transmitter, channel and receiver, as modeled in Figure 26. The channel may include cabling, interconnects, and active devices that don’t perform clock regeneration. The channel may introduce filtering, non-linearity, DC offset, impedance mismatches and additional random jitter. Various circuit test points and system connectors will provide access points where the signal quality may be monitored. As one progresses from the transmitter to the receiver and monitors the signal quality at each access point (perhaps using an eye diagram), the signal jitter generally gets worse.

Simplistically, one might assume that success has been achieved if the eye is still open, even just a little, when the signal reaches the input to the receiver’s clock-data recovery circuit (access point D). However, the receiver circuit isn’t perfect. The received signal’s eye must be sufficiently open horizontally to account for timing uncertainty in the receiver’s decision circuit, and open enough vertically to accommodate noise influencing the decision threshold.

Thus, a thorough system design specification will allocate a jitter budget so that each well-defined access point has known jitter limits, and that adequate margin remains when the signal enters the receiver to be resynchronized.

Figure 26. Common Measurement Points for Setting System Jitter Budgets

The Bathtub Curve

The concepts of eye diagrams and eye openings and Gaussian probability distribution, with its theoretically unbounded peak-to-peak value were discussed in earlier. Considering these two topics

The concepts of eye diagrams and eye openings and Gaussian probability distribution, with its theoretically unbounded peak-to-peak value were discussed in earlier. Considering these two topics together leads to an interesting conclusion: For any signal that contains some Gaussian jitter, the eye diagram should close completely if you accumulate samples for a long enough time. This would render the concept of eye opening useless as a basis for comparison. Fortunately, the usefulness of the eye diagram is restored if a confidence level is applied to the eye opening. Consider Figure 27, in which a green ruler 0.5 unit intervals long has been placed horizontally in the center of the eye. Suppose that it is regarded a failure if any waveforms cross this ruler, either rising or falling. In the figure, it appears that this ruler has not been crossed by any waveforms yet, but such a crossing is inevitable if waveform samples continue to accumulate and the signal contains some Gaussian jitter. Now suppose instead that the test was considered successful if no more than one waveform out of every 1000 waveforms crossed over the ruler. It would no longer matter how long the test ran. If 50,000 waveforms were allowed to accumulate and 50 or less crossed over the ruler, the test would have passed.

3-3

One could say that, aside from one waveform in 10, the eye was 50% open. Since each crossing is assumed to represent a bit error, this would be a bit error rate (BER) of 10.

If the same signal were tested with a shorter ruler, say, 0.25 unit intervals long, then the ruler would certainly be crossed less frequently. Perhaps only one waveform out of every 100,000

5

waveforms, on average, would cross this shorter ruler. One could say that, aside from one waveform in 10, the eye was 25% open.

Continuing along these lines and using a series of rulers, one could fully characterize the eye opening versus the bit error rate. (Note that each ruler should be allowed to slide left or right to obtain the best possible fit.) If the rulers are all plotted against their corresponding bit error rates on a single chart, with the ends of the rulers connected, a plot something like Figure 28 results.

A plot of this description is called a Bathtub Plot, since the pink lines can be imagined to look like a bathtub. Using such a figure, one can tell what horizontal portion of the eye will remain completely free of signal transitions, for a given confidence level.

Finally, note that it can take a long time to accumulate enough data to directly measure the eye openings near the bottom of the chart. For this reason, the mathematical model covered in earlier can be used to predict performance on the basis of a much smaller sample set.

Figure 27. Eye Width is used to Determine Performance

Figure 28. Measuring Eye Width Over Time to Determine Bit Error Ratio

A BER Example

The Putting It All Together section discussed an example in which two systems with different jitter characteristics had similar TIE histograms and identical peak-to-peak jitter for a sample size of about 42,000 edges. (See Figure 24 and Figure 25.) We now return to that example, and show the associated bathtub curves. Figure 29 shows the bathtub curve for System I, and Figure 30 shows the plot for System II.

-4.63

Since both of these plots represent data sets of 42,000 observed edges, a red cursor has been placed on each plot corresponding to a BER of one part in 42,000, or 10. At these levels, both of the systems show an eye opening of about 58%, and the eye opening for System I is actually greater than that for System II. However, at a BER of 1e-12 (which is a frequent specification point for serial communication links) the eye for System I is only open 26%. The eye for System II is open 37%, or about half-again as much as System I. This is a significant difference, and could easily determine whether a system meets its requirements or not.

Figure 29. BER Plot of System with Dominant Random Jitter

Figure 30. BER Plot of System with Dominant Deterministic Jitter

8. Summary

Timing jitter has always degraded electrical systems, but the drive to higher data rates and lower logic levels has focused increasing interest and concern on its characterization.

Characterization is needed to identify sources of jitter for reduction by redesign. It also serves to define, identify or measure jitter for compliance standards and design specifications. All jitter has random and deterministic components. Because of its random nature, care must be used in specifying acceptable limits for jitter. This is especially true when jitter performance at very high confidence levels is to be estimated based on modest amounts of data. To enable working with random components of jitter, a method that has found favor in jitter analysis and prediction is to use a mathematical model, the parameters of which are adjusted based on observed measurements. The model can then be used to predict performance in other situations. The model can also give insight into the specific causes of the jitter, and therefore aid in understanding how to reduce it.

An oscilloscope or digitizer has been a traditional tool for observing jitter, using such techniques as histograms and eye diagrams. When augmented by back-end processing that provides additional features like cycle to cycle measurements, trend and spectrum plots, data logging and worst case capture, the scope continues to be the tool of choice for characterizing timing jitter. When further augmented with sophisticated clock recovery, jitter separation algorithms and bit error ratio estimation, the oscilloscope or digitizer becomes the only solution for characterizing and reducing timing jitter.

9. Download a Jitter, Signal Integrity, and Connectivity Fundamentals Resource Kit

Download the technical ekit to learn more about improving measurement accuracy with an understanding of signal integrity and probing concepts.

References

https://www.360docs.net/doc/aa7258055.html,/primer/understanding-and-characterizing-timing-jitter-primer

Glossary of Acronyms

BER Bit Error Rate

CDF Cumulative Distribution Function

DCD Duty-Cycle Jitter

DDJ Data-Dependent Jitter

DJ Deterministic Jitter

FFT Fast Fourier Transform

ISI Inter-Symbol Interference

PDF Probability Density Function

PJ Periodic Jitter

PLL Phase-Locked Loop PSD Power Spectral Density RJ Random Jitter

SJ Sinusoidal Jitter

TIE Time Interval Error

TJ Total Jitter

UI Unit Interval

芯片封装全套整合(图文精选对照)

芯片封装方式大全 各种IC封装形式图片 BGA Ball Grid Array EBGA 680L LBGA 160L PBGA 217L Plastic Ball Grid Array SBGA 192L QFP Quad Flat Package TQFP 100L SBGA SC-70 5L SDIP SIP Single Inline Package

TSBGA 680L CLCC CNR Communicatio n and Networking Riser Specification Revision 1.2 CPGA Ceramic Pin Grid Array DIP Dual Inline Package SO Small Outline Package SOJ 32L SOJ SOP EIAJ TYPE II 14L SOT220 SSOP 16L

DIP-tab Dual Inline Package with Metal Heatsink FBGA FDIP FTO220 Flat Pack HSOP28SSOP TO18 TO220 TO247 TO264 TO3

ITO220 ITO3p JLCC LCC LDCC LGA LQFP PCDIP TO5 TO52 TO71 TO72 TO78 TO8 TO92

PGA Plastic Pin Grid Array PLCC 详细规格PQFP PSDIP LQFP 100L 详细规格METAL QUAD 100L 详细规格PQFP 100L 详细规格TO93 TO99 TSOP Thin Small Outline Package TSSOP or TSOP II Thin Shrink Outline Package uBGA Micro Ball Grid Array uBGA Micro Ball Grid

最新初中数学九年级知识点汇总

最新初中数学九年级知识点汇总

第一章实数 一、重要概念1.数的分类及概念数系表: 说明:“分类”的原则:1)相称(不重、不漏)2)有标准 2.非负数:正实数与零的统称。(表为:x≥0) 性质:若干个非负数的和为0,则每个非负数均为0。 3.倒数:①定义及表示法 ②性质:A.a≠1/a(a≠±1);B.1/a中,a≠0;C.01时,1/a<1;D.积为1。 4.相反数:①定义及表示法 ②性质:A.a≠0时,a≠-a;B.a与-a在数轴上的位置;C.和为0,商为-1。 5.数轴:①定义(“三要素”) ②作用:A.直观地比较实数的大小;B.明确体现绝对值意义;C.建立点与实数的一一对应关系。 6.奇数、偶数、质数、合数(正整数—自然数) 定义及表示: 奇数:2n-1 偶数:2n(n为自然数) 7.绝对值:①定义(两种):

代数定义: 几何定义:数a的绝对值顶的几何意义是实数a在数轴上所对应的点到原点的距离。 ②│a│≥0,符号“││”是“非负数”的标志;③数a的绝对值只有一个;④处理任何类型的题目,只要其中有“││”出现,其关键一步是去掉“││”符号。 二、实数的运算 1.运算法则(加、减、乘、除、乘方、开方) 2.运算定律(五个—加法[乘法]交换律、结合律;[乘法对加法的] 分配律) 3.运算顺序:A.高级运算到低级运算;B.(同级运算)从“左” 到“右”(如5÷×5);C.(有括号时)由“小”到“中”到“大”。 三、应用举例(略) 附:典型例题 1.已知:a、b、x在数轴上的位置如下图,求证:│x-a│+│x-b =b-a. 2.已知:a-b=-2且ab<0,(a≠0,b≠0),判断a、b的符号。 第二章代数式 ★重点★代数式的有关概念及性质,代数式的运算 ☆内容提要☆ 一、重要概念 分类:

步进电机驱动电路设计

步进电机驱动电路设计 摘要 随着数字化技术发展,数字控制技术得到了广泛而深入的应用。步进电机是一种将数字信号直接转换成角位移或线位移的控制驱动元件, 具有快速起动和停止的特点。因为步进电动机组成的控制系统结构简单,价格低廉,性能上能满足工业控制的基本要求,所以广泛地应用于手工业自动控制、数控机床、组合机床、机器人、计算机外围设备、照相机,投影仪、数码摄像机、大型望远镜、卫星天线定位系统、医疗器件以及各种可控机械工具等等。直流电机广泛应用于计算机外围设备( 如硬盘、软盘和光盘存储器) 、家电产品、医疗器械和电动车上, 无刷直流电机的转子都普遍使用永磁材料组成的磁钢, 并且在航空、航天、汽车、精密电子等行业也被广泛应用。在电工设备中的应用,除了直流电磁铁(直流继电器、直流接触器等)外,最重要的就是应用在直流旋转电机中。在发电厂里,同步发电机的励磁机、蓄电池的充电机等,都是直流发电机;锅炉给粉机的原动机是直流电动机。此外,在许多工业部门,例如大型轧钢设备、大型精密机床、矿井卷扬机、市内电车、电缆设备要求严格线速度一致的地方等,通常都采用直流电动机作为原动机来拖动工作机械的。直流发电机通常是作为直流电源,向负载输出电能;直流电动机则是作为原动机带动各种生产机械工作,向负载输出机械能。在控制系统中,直流电机还有其它的用途,例如测速电机、伺服电机等。他们都是利用电和磁的相互作用来实现向机械能能的转换。 介绍了步进电机和直流电机原理及其驱动程序控制控制模块,通过AT89S52单片机及脉冲分配器(又称逻辑转换器) L298完成步进电机和直流电机各种运行方式的控制。实现步进电机的正反转速度控制并且显示数据。整个系统采用模块化设计,结构简单、可靠,通过按键控制,操作方便,节省成本。 关键词:步进电机,单片机控制,AT89S52,L297,L298目录

芯片封装大全(图文对照)

封装有两大类;一类是通孔插入式封装(through-hole package);另—类为表面安装式封装(surface moun te d Package)。每一类中又有多种形式。表l和表2是它们的图例,英文缩写、英文全称和中文译名。图6示出了封装技术在小尺寸和多引脚数这两个方向发展的情况。 DIP是20世纪70年代出现的封装形式。它能适应当时多数集成电路工作频率的要求,制造成本较低,较易实现封装自动化印测试自动化,因而在相当一段时间内在集成电路封装中占有主导地位。 但DIP的引脚节距较大(为2.54mm),并占用PCB板较多的空间,为此出现了SHDIP和SKDIP等改进形式,它们在减小引脚节距和缩小体积方面作了不少改进,但DIP最大引脚数难以提高(最大引脚数为64条)且采用通孔插入方式,因而使它的应用受到很大限制。 为突破引脚数的限制,20世纪80年代开发了PGA封装,虽然它的引脚节距仍维持在2.54mm或1.77mm,但由于采用底面引出方式,因而引脚数可高达500条~600条。 随着表面安装技术(surface mounted technology, SMT)的出现,DIP封装的数量逐渐下降,表面安装技术可节省空间,提高性能,且可放置在印刷电路板的上下两面上。SOP应运而生,它的引脚从两边引出,且为扁平封装,引脚可直接焊接在PCB板上,也不再需要插座。它的引脚节距也从DIP的2.54 mm减小到1.77mm。后来有SSOP和TSOP改进型的出现,但引脚数仍受到限制。 QFP也是扁平封装,但它们的引脚是从四边引出,且为水平直线,其电感较小,可工作在较高频率。引脚节距进一步降低到1.00mm,以至0.65 mm和0.5 mm,引脚数可达500条,因而这种封装形式受到广泛欢迎。但在管脚数要求不高的情况下,SOP以及它的变形SOJ(J型引脚)仍是优先选用的封装形式,也是目前生产最多的一种封装形式。 方形扁平封装-QFP (Quad Flat Package) [特点] 引脚间距较小及细,常用于大规模或超大规模集成电路封装。必须采用SMT(表面安装技术)进行焊接。操作方便,可靠性高。芯片面积与封装面积的比值较大。 小型外框封装-SOP (Small Outline Package) [特点] 适用于SMT安装布线,寄生参数减小,高频应用,可靠性较高。引脚离芯片较远,成品率增加且成本较低。芯片面积与封装面积比值约为1:8 小尺寸J型引脚封装-SOJ (Smal Outline J-lead) 有引线芯片载体-LCC (Leaded Chip Carrier) 据1998年统计,DIP在封装总量中所占份额为15%,SOP在封装总量中所占57%,QFP则占12%。预计今后DIP的份额会进一步下降,SOP也会有所下降,而QFP会维持原有份额,三者的总和仍占总封装量的80%。 以上三种封装形式又有塑料包封和陶瓷包封之分。塑料包封是在引线键合后用环氧树脂铸塑而成,环氧树脂的耐湿性好,成本也低,所以在上述封装中占有主导地位。陶瓷封装具有气密性高的特点,但成本较高,在对散热性能、电特性有较高要求时,或者用于国防军事需求时,常采用陶瓷包封。 PLCC是一种塑料有引脚(实际为J形引脚)的片式载体封装(也称四边扁平J形引脚封装QFJ (quad flat J-lead package)),所以采用片式载体是因为有时在系统中需要更换集成电路,因而先将芯片封装在一种载体(carrier)内,然后将载体插入插座内,载体和插座通过硬接触而导通的。这样在需要时,只要在插座上取下载体就可方便地更换另一载体。 LCC称陶瓷无引脚式载体封装(实际有引脚但不伸出。它是镶嵌在陶瓷管壳的四侧通过接触而导通)。有时也称为CLCC,但通常不加C。在陶瓷封装的情况下。如对载体结构和引脚形状稍加改变,载体的引脚就可直接与PCB板进行焊接而不再需要插座。这种封装称为LDCC即陶瓷有引脚片式载体封装。 TAB封装技术是先在铜箔上涂覆一层聚酰亚胺层。然后用刻蚀方法将铜箔腐蚀出所需的引脚框架;再在聚酰亚胺层和铜层上制作出小孔,将金属填入铜图形的小孔内,制作出凸点(采用铜、金或镍等材料)。由这些凸点与芯片上的压焊块连接起来,再由

人教版初中数学九年级全册教案

22.1一元二次方程(教案) 教学内容 本节课主要学习一元二次方程概念及一元二次方程一般式及有关概念. 教学目标 知识技能 探索一元二次方程及其相关概念,能够辨别各项系数;能够从实际问题中抽象出方 程知识。 数学思考 在探索问题的过程中使学生感受方程是刻画现实世界的一个模型,体会方程与实际生活的联系。 解决问题 培养学生良好的研究问题的习惯,使学生逐步提高自己的数学素养。 情感态度 通过用一元二次方程解决身边的问题,体会数学知识应用的价值,提高学生学习数学的兴趣,了解数学对促进社会进步和发展人类理性精神的作用. 重难点、关键 重点:一元二次方程的定义、各项系数的辨别,根的作用. 难点:根的作用的理解. 关键:通过提出问题,建立一元二次方程的数学模型,?再由一元一次方程的概念迁移到一元二次方程的概念 教学准备 教师准备:制作课件,精选习题 学生准备:复习有关知识,预习本节课内容 教学过程 一、 情境引入 【问题情境】 问题1 如图,有一块矩形铁皮,长100 cm ,宽50 cm .在它的四个角分别切去一个正 方形,然后将四周突出的部分折起,就能制作一个无盖方盒.如果要制作的无盖方盒的底面积是3 600 cm 2,那么铁皮各角应切去多大的正方形? 分析:设切去的正方形的边长为xcm,则盒底的长为 ,宽为 .根据方盒的底面积为3600cm2,得方程为 _______________ ,, 整理, 得 问题 2 要组织一次排球邀请赛,参赛的每两个队之间都要比赛一场.根据场地和时间等条件,赛程计划安排7天,每天安排4场比赛,比赛组织者应该邀请多少个队参赛? 分析:全部比赛共4×7=28场 设应邀请x 个队参赛,每个队要与其他 _____ 个队各赛1场,由于甲队对乙队的比赛和乙队对甲队的比赛是同一场比赛,所以全部比赛共 ______________场. 得方程____________________________ 0350752 =+-x x 0350752=+-x x 56 2=-x x 56 2=-x x

实用的步进电机驱动电路图

实用的步进电机驱动电路(图) 概述 步进电机是一种将电脉冲转化为角位移的执行机构,可以通过控制脉冲个数来控制角位移量,从而达到准确定位的目的;同时可以通过控制脉冲频率来控制电机转动的速度和加速度,从而达到调速的目的。 目前,对步进电机的控制主要有由分散器件组成的环形脉冲分配器、软件环形脉冲分配器、专用集成芯片环形脉冲分配器等。本设计选用第三种方案,用PMM8713三相或四相步进电机的脉冲分配器、SI-7300A 两相或四相功率驱动器,组成四相步进电机功率驱动电路,以提高集成度和可靠性,步进电机控制框图见图1。 图1 步进电机控制系统框图 硬件简介 ● PMM8713原理框图及功能 PMM8713是日本三洋电机公司生产的步进电机脉冲分配器,适用于控制三相或四相步进电机。控制三相或四相步进电机时都可以选择3种励磁方式,每相最小吸入与拉出电流为20mA,它不仅满足后级功率放大器的输入要求,而且在其所有输入端上均内嵌施密特触发电路,抗干扰能力强,其原理框图如图2所示。

图2 PMM8713的原理框图 在PMM8713的内部电路中,时钟选通部分用于设定步进电机的正反转脉冲输入发。PMM8713有两种脉冲输入法:双脉冲输入法和单脉冲输入法。采用双脉冲输入法时,CP、CU两端分别输入步进电机正反转的控制脉冲。当采用单脉冲输入时,步进电机的正反转方向由U/D的高、低电位决定。 激励方式控制电路用来选择采用何种励磁方式。激励方式判断电路用于输出检测;而可逆环形计数器则用于产生步进电机在选定的励磁方式下的各相通断时序信号。 ● SI-7300A的结构及功率驱动原理 SI-7300A是日本三青公司生产的高性能步进电机集成功率放大器,该器件为单极性四相驱动,采用SIP18封装。 步进电机功率驱动级电路可分为电压和电流两种驱动方式。电流驱动方式最常用的是PWM恒流斩波驱动电路,也是最常用的高性能驱动方式,其中一相的等效电路图如图3所示。

【人教版】初中数学九年级知识点总结:概率

【人教版】初中数学九年级知识点总结 概率 概率是初中数学的常考知识点,但考题难度不大。本章内容要求学生了解事件的可能性,在探究交流中学习体验概率在生活中的乐趣和实用性,学会计算概率。由浅入深,层层递进,解决问题以学生为主,发挥学生的集体智慧,利用所学知识解决问题,突现应用意识,进一步巩固所学知识。 一、目标与要求 1.知道通过大量重复试验时的频率可以作为事件发生概率的估计值 2.在具体情境中了解概率的意义 二、知识框架 三、重点、难点 在具体情境中了解概率意义。 对频率与概率关系的初步理解。 四、知识点、概念总结 1. 随机事件:在随机试验中,可能出现也可能不出现,而在大量重复试验中具有某种规律性的事件,简称事件。随机事件通常用大写英文字母A、B、C等表示。 2.特殊的事件 必然事件记作Ω,样本空间Ω也是其自身的一个子集,Ω也是一个“随机”事件,每次试验中必定有Ω中的一个样本点出现,必然发生。 不可能事件记作Φ,空集Φ也是样本空间的一个子集,Φ也是一个特殊的“随机”事件,不包含任何样本点,不可能发生。 3.随机事件的关系和运算 (1)交换律:A∪B=B∪A、AB=BA (2)结合律:( A∪B )∪C=A∪( B∪C ) (3)分配律:A∪( BC )=( A∪B )( A∪C ) A( B∪C )=( AB )∪( AC )

(具体图表意义请参照初中数学九年级上册人教版课本P135页) 6.频率与概率的区别与联系 从定义可以得到二者的联系, 可用大量重复试验中事件发生频率来估计事件发生的概率.另一方面,大量重复试验中事件发生的频率稳定在某个常数(事件发生的概率)附近,说明概率是个定值,而频率随不同试验次数而有所不同,是概率的近似值,二者不能简单地等同.

人教版初中数学九年级知识点总结

反比例函数 一.知识框架 二.知识概念 1.反比例函数:形如y =x k (k 为常数,k ≠0)的函数称为反比例函数。其他形式xy=k 1-=kx y x k y 1 = 2.图像:反比例函数的图像属于双曲线。反比例函数的图象既是轴对称图形又是中心对称图形。有两条对称轴:直线y=x 和 y=-x 。对称中心是:原点 3.性质:当k >0时双曲线的两支分别位于第一、第三象限,在每个象限内y 值随x 值的增大而减小; 当k <0时双曲线的两支分别位于第二、第四象限,在每个象限内y 值随x 值的增大而增大。 4.|k|的几何意义:表示反比例函数图像上的点向两坐标轴所作的垂线段与两坐标轴围成的矩形的面积。

一元二次方程 二.知识概念 一元二次方程:方程两边都是整式,只含有一个未知数(一元),并且未知数的最高次数是2(二次)的方程,叫做一元二次方程. 一般地,任何一个关于x的一元二次方程,?经过整理,?都能化成如下形式ax2+bx+c=0(a≠0).这种形式叫做一元二次方程的一般形式. 一个一元二次方程经过整理化成a x2+bx+c=0(a≠0)后,其中ax2是二次项,a是二次项系数;bx是一次项,b是一次项系数;c是常数项. 本章内容主要要求学生在理解一元二次方程的前提下,通过解方程来解决一些实际问题。

(1)运用开平方法解形如(x+m)2=n(n≥0)的方程;领会降次──转化的数学思想. (2)配方法解一元二次方程的一般步骤:现将已知方程化为一般形式;化二次项系数为1;常数项移到右边;方程两边都加上一次项系数的一半的平方,使左边配成一个完全平方式;变形为(x+p)2=q的形式,如果q≥0,方程的根是x=-p±√q;如果q<0,方程无实根. 介绍配方法时,首先通过实际问题引出形如的方程。这样的方程可以化为更 为简单的形如的方程,由平方根的概念,可以得到这个方程的解。进而举例 说明如何解形如的方程。然后举例说明一元二次方程可以化为形如 的方程,引出配方法。最后安排运用配方法解一元二次方程的例题。在例题中,涉及二次项系数不是1的一元二次方程,也涉及没有实数根的一元二次方程。对于没有实数根的一元二次方程,学了“公式法”以后,学生对这个内容会有进一步的理解。 (3)一元二次方程a x2+bx+c=0(a≠0)的根由方程的系数a、b、c而定,因此:解一元二次方程时,可以先将方程化为一般形式ax2+bx+c=0,当b2-4ac≥0时, ?将a、b、c代入式子x= 24 2 b b ac a -±- 就得到方程的根.(公式所出现的运算,恰 好包括了所学过的六中运算,加、减、乘、除、乘方、开方,这体现了公式的统一性与和谐性。)这个式子叫做一元二次方程的求根公式.利用求根公式解一元二次方程的方法叫公式法.

沪教版2020初三数学九年级上册期末试题和答案

沪教版2020初三数学九年级上册期末试题和答案 一、选择题 1.一组数据0、-1、3、2、1的极差是( ) A .4 B .3 C .2 D .1 2.抛物线223y x x =++与y 轴的交点为( ) A .(0,2) B .(2,0) C .(0,3) D .(3,0) 3.如图,点I 是△ABC 的内心,∠BIC =130°,则∠BAC =( ) A .60° B .65° C .70° D .80° 4.若关于x 的一元二次方程x 2-2x -k =0没有实数根,则k 的取值范围是( ) A .k >-1 B .k≥-1 C .k <-1 D .k≤-1 5.若一元二次方程x 2﹣2x+m=0有两个不相同的实数根,则实数m 的取值范围是( ) A .m≥1 B .m≤1 C .m >1 D .m <1 6.下列函数中属于二次函数的是( ) A .y = 12 x B .y =2x 2-1 C .y =23x + D .y =x 2+ 1x +1 7.若圆锥的底面半径为2,母线长为5,则圆锥的侧面积为( ) A .5π B .10π C .20π D .40π 8.一个扇形的半径为4,弧长为2π,其圆心角度数是( ) A .45 B .60 C .90 D .180 9.如图,已知等边△ABC 的边长为4,以AB 为直径的圆交BC 于点F ,CF 为半径作圆,D 是⊙C 上一动点,E 是BD 的中点,当AE 最大时,BD 的长为( ) A .3 B .5 C .4 D .6 10.已知反比例函数k y x = 的图象经过点(m ,3m ),则此反比例函数的图象在( ) A .第一、二象限 B .第一、三象限 C .第二、四象限 D .第三、四象限 11.在△ABC 中,∠C =90°,AC =8,BC =6,则sin B 的值是( )

九年级上数学全套试卷及答案

2005~2006学年度上期目标检测题 九年级 数学 第一章 证明(Ⅱ) 班级 姓名 学号 成绩 一、判断题(每小题2分,共10分)下列各题正确的在括号内画“√”,错误 的在括号内画“×”. 1、两个全等三角形的对应边的比值为1 . ( ) 2、两个等腰三角形一定是全等的三角形. ( ) 3、等腰三角形的两条中线一定相等. ( ) 4、两个三角形若两角相等,则两角所对的边也相等. ( ) 5、在一个直角三角形中,若一边等于另一边的一半,那么,一个锐角一定等于30°.( ) 二、选择题(每小题3分,共30分)每小题只有一个正确答案,请将正确答 案的番号填在括号内. 1、在△ABC 和△DEF 中,已知AC=DF ,BC=EF ,要使△ABC ≌△DEF ,还需要的条件是( ) A 、∠A=∠D B 、∠C=∠F C 、∠B=∠E D 、∠C=∠D 2、下列命题中是假命题的是( ) A 、两条中线相等的三角形是等腰三角形 B 、两条高相等的三角形是等腰三角形 C 、两个内角不相等的三角形不是等腰三角形 D 、三角形的一个外角的平分线平行于这个三角形的一边,则这个三角形是等腰三角形 3、如图(一),已知AB=AC ,BE=CE ,D 是AE 上的一点, 则下列结论不一定成立的是( ) A 、∠1=∠2 B 、AD=DE C 、BD=C D D 、∠BDE=∠CDE 4、如图(二),已知AC 和BD 相交于O 点,AD ∥BC ,AD=BC ,过O (一) 任作一条直线分别交AD 、BC 于点E 、F ,则下列结论:①OA=OC ②OE=OF ③AE=CF ④OB=OD ,其中成立的个数是( ) A 、1 B 、2 C 、3 D 、4 5、若等腰三角形的周长是18,一条边的长是5,则其他两边的长是( ) (二) A 、5,8 B 、6.5,6.5 C 、5,8或6.5,6.5 D 、8,6.5 6、下列长度的线段中,能构成直角三角形的一组是( ) A 、543,, ; B 、6, 7, 8; C 、12, 25, 27; D 、245232,, 7、如图(三),AC=AD BC=BD ,则下列结果正确的是( ) (三) A 、∠ABC=∠CA B B 、OA=OB C 、∠ACD=∠BDC D 、AB ⊥CD 8、如图(四),△ABC 中,∠A=30°,∠C=90°AB 的垂直平分线 交AC 于D 点,交AB 于E 点,则下列结论错误的是( ) A 、AD=D B B 、DE=DC C 、BC=AE D 、AD=BC (四)

初中数学九年级旋转知识点总结

初中数学九年级旋转知识点总结 1.旋转:在平面内,将一个图形绕一个图形按某个方向转动一个角度,这样的运动叫做图形的旋转。这个定点叫做旋转中心,转动的角度叫做旋转角。 图形的旋转是图形上的每一点在平面上绕着某个固定点旋转固定角度的位置移动,其中对应点到旋转中心的距离相等,对应线段的长度、对应角的大小相等,旋转前后图形的大小和形状没有改变。 如下图所示: 2.旋转对称中心:把一个图形绕着一个定点旋转一个角度后,与初始图形重合,这种图形叫做旋转对称图形,这个定点叫做旋转对称中心,旋转的角度叫做旋转角(旋转角小于0°,大于360°)。 3.旋转的性质 (1)对应点到旋转中心的距离相等。 (2)对应点与旋转中心所连线段的夹角等于旋转角。 4.中心对称图形与中心对称: 中心对称图形:如果把一个图形绕着某一点旋转180度后能 与自身重合,那么我们就说,这个图形成中心对称图形。 中心对称:如果把一个图形绕着某一点旋转180度后能与另一个图形重合,那么我们就说,这两个图形成中心对称。

5.中心对称和中心对称图形的区别 区别:中心对称是指两个全等图形之间的相互位置关系,这两个图形关于一点对称,这个点是对称中心,两个图形关于点的对称也叫做中心对称.成中心对称的两个图形中,其中一个上所有点关于对称中心的对称点都在另一个图形上,反之,另一个图形上所有点的对称点,又都在这个图形上;而中心对称图形是指一个图形本身成中心对称.中心对称图形上所有点关于对称中心的对称点都在这个图形本身上。 如果将中心对称的两个图形看成一个整体(一个图形),那么这个图形就是中心对称图形;一个中心对称图形,如果把对称的部分看成是两个图形,那么它们又是关于中心对称。6.中心对称图形的判定 如果两个图形的对应点连线都经过某一点,并且被这一点平分,那么这两个图形关于这一点对称。 7.中心对称的性质: 关于中心对称的两个图形是全等形。 关于中心对称的两个图形,对称点连线都经过对称中心,并且被对称中心平分。 关于中心对称的两个图形,对应线段平行(或者在同一直线上)且相等。 8.坐标系中对称点的特征 (1)关于原点对称的点的特征 两个点关于原点对称时,它们的坐标的符号相反,即点P(x,y)关于原点的对称点为P’(-x,-y) (2)关于x轴对称的点的特征 两个点关于x轴对称时,它们的坐标中,x相等,y的符号相反,即点P(x,y)关于x轴的对称点为P’(x,-y) (3)关于y轴对称的点的特征 两个点关于y轴对称时,它们的坐标中,y相等,x的符号相反,即点P(x,y)关于y轴的对称点为P’(-x,y)

步进电机控制驱动电路设计.

实习名称:电子设计制作与工艺实习 学生姓名:周文生 学号:201216020134 专业班级:T-1201 指导教师:李文圣 完成时间: 2014年6月13日 报告成绩:

步进电机控制驱动电路设计 摘要: 本设计在根据已有模电、物电知识的基础上,用具有置位,清零功能的JK 触发器74LS76作为主要器件来设计环行分配器,来对555定时器产生的脉冲进行分配,通过功率放大电路来对步进电机进行驱动,并且产生的脉冲的频率可以控制,从而来控制步进电机的速度,环形分配器中具有复位的功能,在对于异常情况可以按复位键来重新工作。 关键字:555定时器脉冲源环行分配器功率放大电路 一、方案论证与比较: (一)脉冲源的方案论证及选择: 方案一:采用555定时器产生脉冲,它工作频率易于改变从而可以控制步进电机的速度并且工作可靠,简单易行。 C2 10uF 图一 555定时器产生的方法 方案二:采用晶振电路来实现,晶振的频率较大,不利于电机的工作,易失步,我们可以利用分频的方法使晶振的频率变小,可以使电机工作稳定,但分频电路较复杂,并且晶振起振需要一定的条件,不好实现。

X1 1kohm 1kohm 图二晶振产生脉冲源电路 综上所述,我们采用方案一来设计脉冲源。 (二)环形分配器的设计: 方案一:采用74ls194通过送入不同的初值来进行移位依此产生正确的值使步进电机进行转动。但此方案的操作较复杂,需要每次工作时都要进行置位,正反转的操作较复杂,这里很早的将此方案放弃。 方案二:使用单独的JK 触发器来分别实现单独的功能。 图三双三拍正转 图四单三拍正转

图五三相六拍正转 利用单独的做,电路图较简单,单具体操作时不方便,并且不利于工程设计。块分的较零散,无法统一。 方案三:利用JK触发器的自己运动时序特性设计,利用卡诺图来进行画简。 图六单,双三拍的电路图 单,双三拍的正,反转主要由键s1,s2的四种状态来决定四种情况的选择。

最新人教版初中数学九年级上下册说课稿全套

最新人教版初中数学九年级上下册 名师精品说课稿 目录 第21章一元二次方程(13) (4) 21.1 一元二次方程说课稿(一) (4) 《一元二次方程》说课稿(二) (6) 21.2.1 配方法说课稿(一) (10) 配方法说课稿(二) (14) 21.2.2 公式法说课稿(一) (18) 21.2.3 因式分解法说课稿(一) (21) 21.2.4 一元二次方程的根与系数的关系说课稿(一) (25) 一元二次方程根与系数的关系说课稿(二) (28) 21.3 实际问题与一元二次方程说课稿(一) (31) 实际问题与一元二次方程说课稿(二) (35) 第22章二次函数(12) (38) 22.1 二次函数的图象和性质(6) (38) 22.1.1 二次函数说课稿(一) (38) 22.1.2二次函数y=ax2的图象和性质说课稿(一) (41) 二次函数y=ax2+c的图像与性质说课稿(二) (45) 22.1.3 二次函数y=a(x-h)2+k的图象和性质说课稿(一) (49) 22.1.4 二次函数y=ax2+bx+c的图象和性质说课稿(一) (52) 二次函数y=ax2+bx+c的图象说课稿(二) (57) 2.2 用函数观点看一元二次方程说课稿(一) (62) 22.2用函数观点看一元二次方程(二) (64) 22.3实际问题与二次函数说课稿(一) (71) 《实际问题与二次函数》说课稿(二) (73) 第23章旋转(9) (76) 23.1 图形的旋转说课稿(一) (76)

《图形的旋转》说课稿(二) (81) 《中心对称》说课材料 (85) 23.2.2 中心对称图形说课稿 (90) 23.2.3 关于原点对称的点的坐标说课稿 (93) 《23.3课题学习图案设计》说课材料 (97) 第24章圆(16) (100) 24.1.1 圆说课稿(一) (100) 《垂直于弦的直径》说课稿(一) (103) 《垂直于弦的直径》说课稿(二) (106) 24.1.3 弧、弦、圆心角说课稿(一) (110) 《弧、弦、圆心角》说课稿(二) (113) 24.1.4 圆周角说课稿(一) (118) 24.1.4 圆周角(说课稿)(二) (127) 24.2.1 点和圆的位置关系说课稿(一) (129) 24.2.2 直线和圆的位置关系说课稿(一) (132) 直线与圆的位置关系说课稿(二) (135) 24.3 正多边形和圆说课稿(一) (139) 24.4 弧长和扇形面积说课稿(一) (141) 《弧长和扇形的面积》说课稿(二) (144) 第25章概率初步(12) (147) 25.1.1 随机事件说课稿(一) (147) 《随机事件》说课稿(二) (149) 25.1.2 概率说课稿(一) (156) 《25.1.2概率》说课稿(二) (160) 《用列举法求概率》说课稿r (162) 3.3应用新知,深化拓展 (169) 25.3用频率估计概率(1)说课稿 (172) 九年级下册 (176) 第26章反比例函数(8) (176) 《26.1.1反比例函数》说课稿 (176)

初中数学九年级上下册知识点总结

[九年级(上册) 第一章 证明(二) ※等腰三角形的“三线合一”:顶角平分线、底边上的中线、底边上的高互相重合。 ※等边三角形是特殊的等腰三角形,作一条等边三角形的三线合一线,将等边三角形分成两个全等的 直角三角形,其中一个锐角等于30o,这它所对的直角边必然等于斜边的一半。 ※有一个角等于60o的等腰三角形是等边三角形。 ※如果知道一个三角形为直角三角形首先要想的定理有: ①勾股定理:2 22c b a =+(注意区分斜边与直角边) ②在直角三角形中,如有一个内角等于30o,那么它所对的直角边等于斜边的一半 ③在直角三角形中,斜边上的中线等于斜边的一半(此定理将在第三章出现) ※垂直平分线.....是垂直于一条线段..并且平分这条线段的直线..。(注意着重号的意义) <直线与射线有垂线,但无垂直平分线> ※线段垂直平分线上的点到这一条线段两个端点距离相等。 ※线段垂直平分线逆定理:到一条线段两端点距离相等的点,在这条线段的垂直平分线上。 ※三角形的三边的垂直平分线交于一点,并且这个点到三个顶点的距离相等。(如图1所示, AO=BO=CO ) ※角平分线上的点到角两边的距离相等。 ※角平分线逆定理:在角内部的,如果一点到角两边的距离相等,则它在该角的平分线上。 角平分线是到角的两边距离相等的所有点的集合。 ※三角形三条角平分线交于一点,并且交点到三边距离相等,交点即为三角形的内心。 (如图2所示,OD=OE=OF) 第二章 一元二次方程 ※只含有一个未知数的整式方程,且都可以化为02 =++c bx ax (a 、b 、c 为 常数,a ≠0)的形式,这样的方程叫一元二次方程...... 。 ※把02 =++c bx ax (a 、b 、c 为常数,a ≠0)称为一元二次方程的一般形式,a 为二次项系数;b 为一次项系数;c 为常数项。 ※解一元二次方程的方法:①配方法 <即将其变为0)(2 =+m x 的形式> ②公式法 a ac b b x 242-±-= (注意在找ab c 时须先把方程化为一般形式) ③分解因式法 把方程的一边变成0,另一边变成两个一次因式的乘积来求解。 (主要包括“提公因式”和“十字相乘”) A C B O 图1 图2 O A C B D E F

舞蹈机器人步进电机驱动电路和程序设计

舞蹈机器人步进电机驱动电路和程序设计 摘要:介绍了舞蹈机器人步进电机驱动电路和程序设计。电路采用74373锁存,74LS244和ULN2003作电压和电流驱动,单片机AT89C52作工作脉冲序列信号发生器。程序设计基于中断服务和总线分时复用方式,实时更新各个电机的速度和方向。 关键词:单片机,中断服务,速度累加计数器,归一化速度 在机器人舞蹈时,我们用一个单片机控制多个步进电机指挥跳舞机器人的双肩、双肘和双脚伴着音乐做出各种协调舒缓充满感情的动作。电路采用74373锁存,74LS244和ULN2003作电压和电流驱动,单片机(Atc52)作脉冲序列信号发生器。程序设计基于中断服务和总线分时利用方式,实时更新各个电机的速度、方向。整个舞蹈由运动数据所决定的一截截动作无缝连接而成。 1 步进电机简介 步进电机根据内部线圈个数不同分为二相制、三相制、四相制等。本文以四相制为例介绍其内部结构。图1为四相五线制步进电机内部结构示意图。 2 四相五线制步进电机的驱动电路 电路主要由单片机工作外围电路、信号锁存和放大电路组成。我们利用了单片机的I/O端口,通过74373锁存,由74LS244驱动,ULN2003对信号进行放大。8个电机共用4bit I/O端口作为数据总线,向电机传送步进脉冲。每个电机分配1bit的I/O端口用作74373锁存信号,锁存步进电机四相脉冲,经ULN2003放大到12V驱动电机运转。

电路原理图(部分)如图2所示。 (1)Intel 8051系列单片机是一种8位的嵌入式控制器,可寻址64K字节,共有32个可编程双向I/O口,分别称为P0~P3。该系列单片机上集成8K的ROM,128字节RAM可供使用。 (2)74LS244为三态控制芯片,目的是使单片机足以驱动ULN2003。ULN2003是常用的达林顿管阵列,工作电压是12V,可以提供足够的电流以驱动步进电机。关于这些芯片的详细介绍可参见它们各自的数据手册。 (3)74373是电平控制锁存器,它可使多个步进电机共用一组数据总线。我们用P1.0~P1.7作为8个电机的锁存信号输出端,见表1。

芯片封装类型图解

集成电路封装形式介绍(图解) BGA BGFP132 CLCC CPGA DIP EBGA 680L FBGA FDIP FQFP 100L JLCC BGA160L LCC

LDCC LGA LQFP LQFP100L Metal Qual100L PBGA217L PCDIP PLCC PPGA PQFP QFP SBA 192L TQFP100L TSBGA217L TSOP

CSP SIP:单列直插式封装.该类型的引脚在芯片单侧排列,引脚节距等特征和DIP基本相同.ZIP:Z型引脚直插式封装.该类型的引脚也在芯片单侧排列,只是引脚比SIP粗短些,节距等特征也和DIP基本相同. S-DIP:收缩双列直插式封装.该类型的引脚在芯片两侧排列,引脚节距为1.778mm,芯片集成度高于DIP. SK-DIP:窄型双列直插式封装.除了芯片的宽度是DIP的1/2以外,其它特征和DIP相同.PGA:针栅阵列插入式封装.封装底面垂直阵列布置引脚插脚,如同针栅.插脚节距为2.54mm或1.27mm,插脚数可多达数百脚. 用于高速的且大规模和超大规模集成电路. SOP:小外型封装.表面贴装型封装的一种,引脚端子从封装的两个侧面引出,字母L状.引脚节距为 1.27mm. MSP:微方型封装.表面贴装型封装的一种,又叫QFI等,引脚端子从封装的四个侧面引出,呈I字形向下方延伸,没有向外突出的部分,实装占用面积小,引脚节距为1.27mm. QFP:四方扁平封装.表面贴装型封装的一种,引脚端子从封装的两个侧面引出,呈L字形,引脚节距为 1.0mm,0.8mm,0.65mm,0.5mm,0.4mm,0.3mm,引脚可达300脚以上. SVP:表面安装型垂直封装.表面贴装型封装的一种,引脚端子从封装的一个侧面引出,引脚在中间部位弯成直角,弯曲引脚的端部和PCB键合,为垂直安装的封装.实装占有面积很小.引脚节距为0.65mm,0.5mm. LCCC:无引线陶瓷封装载体.在陶瓷基板的四个侧面都设有电极焊盘而无引脚的表面贴装型封装.用于高 速,高频集成电路封装. PLCC:无引线塑料封装载体.一种塑料封装的LCC.也用于高速,高频集成电路封装. SOJ:小外形J引脚封装.表面贴装型封装的一种,引脚端子从封装的两个侧面引出,呈J字形,引脚节距为 1.27mm. BGA:球栅阵列封装.表面贴装型封装的一种,在PCB的背面布置二维阵列的球形端子,而不采用针脚引脚. 焊球的节距通常为1.5mm,1.0mm,0.8mm,和PGA相比,不会出现针脚变形问题. CSP:芯片级封装.一种超小型表面贴装型封装,其引脚也是球形端子,节距为0.8mm,0.65mm,0.5mm等. TCP:带载封装.在形成布线的绝缘带上搭载裸芯片,并和布线相连接的封装.和其他表面贴装型封装相比,芯片更薄,引脚节距更小,达0.25mm,而引脚数可达500针以上. 介绍:

初中数学九年级知识点大全

初三数学各章节重要知识点梳理 第21章 二次根式 1.二次根式:一般地,式子)0a (,a ≥叫做二次根式. 注意:(1)若0a ≥这个条件不成立,则 a 不是二次根式; (2)a 是一个重要的非负数,即;a ≥0. 2.重要公式:(1))0a (a )a (2≥=,(2)???<-≥==) 0a (a )0a (a a a 2 ; 3.积的算术平方根:)0b ,0a (b a ab ≥≥?= 积的算术平方根等于积中各因式的算术平方根的积; 4.二次根式的乘法法则: )0b ,0a (ab b a ≥≥=?. 5.二次根式比较大小的方法: (1)利用近似值比大小; (2)把二次根式的系数移入二次根号内,然后比大小; (3)分别平方,然后比大小. 6.商的算术平方根: )0b ,0a (b a b a >≥=, 商的算术平方根等于被除式的算术平方根除以除式的算术平方根. 7.二次根式的除法法则: (1) )0b ,0a (b a b a >≥= ;(2))0b ,0a (b a b a >≥÷=÷; (3)分母有理化的方法是:分式的分子与分母同乘分母的有理化因式,使分母变为整式. 8.最简二次根式: (1)满足下列两个条件的二次根式,叫做最简二次根式,① 被开方数的因数是整数,因式是整式,② 被 开方数中不含能开的尽的因数或因式; (2)最简二次根式中,被开方数不能含有小数、分数,字母因式次数低于2,且不含分母; (3)化简二次根式时,往往需要把被开方数先分解因数或分解因式; (4)二次根式计算的最后结果必须化为最简二次根式. 10.同类二次根式:几个二次根式化成最简二次根式后,如果被开方数相同,这几个二次根式叫做同类二次 根式. 12.二次根式的混合运算: (1)二次根式的混合运算包括加、减、乘、除、乘方、开方六种代数运算,以前学过的,在有理数范围内 的一切公式和运算律在二次根式的混合运算中都适用; (2)二次根式的运算一般要先把二次根式进行适当化简,例如:化为同类二次根式才能合并;除法运算有 时转化为分母有理化或约分更为简便;使用乘法公式等. 第22章 一元二次方程 1. 一元二次方程的一般形式: a ≠0时,ax 2 +bx+c=0叫一元二次方程的一般形式,研究一元二次方程的有关 问题时,多数习题要先化为一般形式,目的是确定一般形式中的a 、 b 、 c ; 其中a 、 b,、c 可能是具体数,也可能是含待定字母或特定式子的代数式. 2. 一元二次方程的解法: 一元二次方程的四种解法要求灵活运用, 其中直接开平方法虽然简单,但是适用范围较小;公式法虽然适用范围大,但计算较繁,易发生计算错误;因式分解法适用范围较大,且计算简便,是首选方法;配方法使用较少. 3. 一元二次方程根的判别式: 当ax 2 +bx+c=0 (a ≠0)时,Δ=b 2 -4ac 叫一元二次方程根的判别式.请注意以下等价命题: Δ>0 <=> 有两个不等的实根; Δ=0 <=> 有两个相等的实根;Δ<0 <=> 无实根; 4.平均增长率问题--------应用题的类型题之一 (设增长率为x ): (1) 第一年为 a , 第二年为a(1+x) , 第三年为a(1+x)2 . (2)常利用以下相等关系列方程: 第三年=第三年 或 第一年+第二年+第三年=总和. 第23章 旋转 1、概念: 把一个图形绕着某一点O 转动一个角度的图形变换叫做旋转,点O 叫做旋转中心,转动的角叫做旋转角. 旋转三要素:旋转中心、旋转方面、旋转角 2、旋转的性质: (1) 旋转前后的两个图形是全等形; (2) 两个对应点到旋转中心的距离相等 (3) 两个对应点与旋转中心的连线段的夹角等于旋转角 3、中心对称: 把一个图形绕着某一个点旋转180°,如果它能够与另一个图形重合,那么就说这两个图形关于这个点对称或中心对称,这个点叫做对称中心. 这两个图形中的对应点叫做关于中心的对称点. 4、中心对称的性质: (1)关于中心对称的两个图形,对称点所连线段都经过对称中心,而且被对称中心所平分. (2)关于中心对称的两个图形是全等图形. 5、中心对称图形: 把一个图形绕着某一个点旋转180°,如果旋转后的图形能够与原来的图形重合,那么这个图形叫做中心对称图形,这个点就是它的对称中心. 6、坐标系中的中心对称 第24章 圆 1、(要求深刻理解、熟练运用)

相关文档
最新文档