z.A security embedded system base on TCM and FPGA

z.A security embedded system base on TCM and FPGA
z.A security embedded system base on TCM and FPGA

A Security Embedded System Base on TCM and FPGA

Huaqiang Huang Department of Software Engineering South China University of Technology

Guangzhou,China

08280614@https://www.360docs.net/doc/b315415647.html,

Chen Hu

Department of Software Engineering

South China University of Technology

Guangzhou, China

chenhu@https://www.360docs.net/doc/b315415647.html,

Jianhua He

Computer Science and Engineering

South China University of Technology

Guangzhou, China

zunoka@https://www.360docs.net/doc/b315415647.html,

Abstract—Embedded systems became more and more pervasive in our world,whereas the security problem severely influence its credibility.This paper presented a security solution for embedded systems,which is called TFSES (Security Embedded Systems base on TCM and FPGA). In this solution,a security FPGA checked the integrity of instructions and data in flash chip before running of the embedded processor.The result of the integrity checking was sent to TPM chip.While integrity result indicated that the content in the flash chip was modified,TCM will reject to provide trust computing services invoked from embedded processor. Keywords: Security Embedded System, Security FPGA,TPM

I.I NTRODUCTION

With the development of the computer and telecommunication technology,especially the internet spreading ubiquitously,embedded systems become more and more popular in our world.The embedded systems field is growing rapidly,with devices such as cellular phones,PDA, smart cards,and digital music players permeating society. Those embedded devices are so portable and convenient that people prefer carrying their crucial information,such as bank account password,telephone number and so on,with the devices.As embedded devices are increasingly integrated into personal and commercial infrastructures,security becomes paramount issue.However the traditional software protection mechanism cannot protect the embedded systems safely.Attacker could bypass software-only protection easily. Since embedded systems are resource-constrained in their capacities leading to weak defense,adversaries can facilely access the physical layer and full control the whole operating systems.Therefore the design of security for embedded systems is very important.

The security of embedded systems cannot be solved at a single security abstraction layer,but rather is a system problem spanning multiple abstraction levels.[1]We should concern about not only the protection of systems software but also the defense of systems hardware.Achieving faultless safeguard need more effort and energy,but the embedded device market is extremely cost-sensitive.It should make compromise between security,cost and performance.

In this article,we introduce a low-cost,high-performance hardware platform for the security of the embedded systems which bases on TPM and FPGA technology which is called TFSES.This security platform incorporates mechanisms to protect the integrity and privacy of application from physical attacks as well as software attack.Therefore,physical secure systems can be built using TFSES.

This paper framework is as follows.Chapter2 introduces related solutions.Chapter3elaborates our proposed architecture,chapter4deals with the experiment and benefits of this architecture.At last in chapter5we conclude and suggest further research.

II.R ELATED SOLUTION S

A.Aegis–a single-chip secure processor

Aegis is an application-specific core for systems security.Figure1illustrates the model which is built upon Aegis[4].Aegis integrates security kernel,encryption,and integrity verification into a single processor.Anyone who want to access the systems should be verified by integrity verification firstly,and then show the password,which is only created by the PUF secret,to the encryption module.Go through these two strict checks,and then data could be accepted by the security kernel.Whatever info which wants to communicate with the system should take this rule. Although the stringent rule keeps Aegis almost security,it

Aegis can protect not only software attack but also physical temper due to the congregation of all critical components.It contain a PUF(physical unclonalbe function) which made with ring oscillate(ROS)that can guarantee physical un-imitational.The integrity verification(VI)and memory encryption(ME)techniques of Aegis are devised

_____________________________ 978-1-4244-4520-2/09/$25.00 ?2009 IEEE

for off-ship memory protection.They are the crucial detection of infusion in software defense.Four different system modes,standard(STD),temper evident(TE),private tamper-resistant(PTR)and suspended secure-processing (SSP),make security system flexible and efficient for ensuring program state in integrity and guaranteeing privacy region.

Aegis is good for security protection.However,Aegis needs integrate secure components into a traditional processor.It is a complex and costly project.Adding hardware mechanism in processor increases core’s size and cost which constrains Aegis’s prevalent application severely. Aegis should be redesigned and fabricate when updating its encryption,which fitted for the scalability and flexibility of the embedded systems badly.Whatever if wants to access the systems should encrypt firstly and then decrypt for authentication and encrypt again in the end.It wastes a lot of time and degrades Aegis performance badly.

B.TrustZone–a dual-virtual CPU system

TrustZone a dual-virtual processor which is specially designed for embedded systems security by ARM. Comparing with the conventional two separate cores providing security through isolating,TrustZone combines the two separate cores into one.There is only a single physical processor,but the running software sees the TrustZone processor as two separate virtual processors.

As figure2shows,TrustZone enables the security through isolation as the two-CPU approach.One core supports two operating world:Secure World and Normal World.Support is provided by the memory management unit holding two separate states,the CPU cache separating Secure World and Normal World data and the banking of critical

Integrating two CPU in one core lets TrustZone cost less and perform better than traditional separate processor. Isolating the execution into two world–normal world and security world can keep system far away from malicious attacking efficiently.TrustZone also provides a monitor mode which provides the hypervisor-like functionality and stitches together transition between security system and nonsecurity systems,so it requires significant to change the normal system less and can adapt the world well

Comparing with the Aegis,TrustZone is devised for more flexibility and scalability.The performance of TrustZone is better than Aegis due to its monitor mode which only validated the security data.However,TrustZone should also cost much on the integrity of dual-virtual processor.We can not improve TrustZone trust computing module conveniently and complicatedly because of the fabrication of ASIC.

The embedded systems are cost-sensitive whereas the security is expensive.So the secure embedded systems should make appropriate compromise between security,cost and performance.Taking account of the compromise,we propose a well-security,high-performance,well-scalability and low cost secure embedded systems and is called TFSES

III.TFSES A RCHITECTURE

A.TFSES whole system

As

figure3shows,TFSES contains two modules: FPGA Controller and TPM.FPGA Controller separates the BootROM security is the root of trust computing.When the embedded system power on,the processor is firstly suspended,FPGA Controller read content of the BootROM and check the integrity.The result is sent to TPM chip in encryption format.According to this result,TPM decides whether or not provide trusting computing services invoked from following application software on embedded processor.

There are so different between TFSES and special secure processors such as Aegis and TrustZone which gather general processor and security module together.TFSES is devised as a bridge which is connected the embedded systems processor and BootROM.This solution can support various popular embedded processors,such as DSP,ARM, and8051.And it is transparent to software.So,it is convenient to use this solution for conventional embedded systems.

B.TFSES Trust-Blocks

TCM Architecture

TCM(Trust Computing Module).chips always include RISC processor,DES,internal flash and Random Number Generator,as shown in figure4.In our system,we use a

commercial TCM which is designed by ZTEIC Corporation.DES is used for encryption and decryption,and has the same algorithm and key with FPGA.Random Number Generator is devised to generate random number which is encrypted by DES to send to another,the coordinate DES accepts the

Figure 4TCM architecture

FPGA Architecture

FPGA is a crucial component in TFSES embedded system.As figure 5shows,our design selects a non-volatile secure FPGA which carries an in-systems flash.

There also has DES,SHA-1,PFIFO,SFIFO,UART,serial and parallel FIFOs.This DES is the coordinate one with TCM ’s DES,the application of SHA-1in our TFSES is another advantage.Traditional verification of some messages should compare one by one with the authentic.If these data were very enormous,it will waste so many time that performance would be severely constrained.SHA (Secure Hash Algorithm)can scan the messages rapidly to generate a 160-bit number which is used to verify the message whether to be tampered maliciously.SHA-1is the best established of the existing SHA hash functions and is employed in our TFSES.FIFO (First Input First Output)is data buffer for transferring message.Because TCM and in-system flash are serial transmission,TFESE needs a SFIFO (serial FIFO),TFESE also needs a PFIFO (parallel FIFO)due to DES,flash control and SHA.S2P is a bridge from serial data to parallel data.P2S is just on the contrary.

Security of Trust-Block

When FPGA and flash are manufactured,they would be pressed a unique ID by the factory.FPGA ’s ID is called Device DNA and flash is Factory ID.Every FPGA has its own ID,TESES system ’s key is generated with the unique ID which

can keep the FPGA from being https://www.360docs.net/doc/b315415647.html,bining the flash Factory ID to the key let the security become stronger.As figure 6shows,we get the Device DNA and Factory flash ID at the beginning,and then encrypt them together through a special security algorithm.The security algorithm is customer self-design and is agnostic except the customer himself.So the key from security algorithm generating not only can validate the FPGA authenticity but also make

core

Figure 6 Key generation

The efficacy of in-system flash is not only its factory ID but also its Protection and Lockdown memory.As figure 7shows,Protection feature provides the ability to selectively write-protect individual In-system flash memory,Lockdown function permanently locks a selected memory,essentially converting the Flash memory into read-only ROM.Once the memory is locked down,it cannot be erased or modified.TFESE exactly store the key,DES,SHA and other important bitstream code into this In-system flash which provides a robust,cost-effective solution to help prevent reveres-

C.Operation of the System

There are three phases of system operation:Configuration Phase,Root-Trust Phase,and Application-Trust Phase.

Configuration Phase

Before running the TFSES system,we should firstly

FPGA

TCM

Figure 9 Running the TFSES

When system powers up,FPGA suspends the embedded system processor,lockups the internal flash.

Then DES gets the key,Faddr and Flength from internal protected flash.

Flash controller loads out the external flash data in validation area and sends into SHA to calculate the hash value C.

TCM sends a random number R to the FPGA ’S DES

that is encrypted by its DES with the key.

DES decrypts the random number R.

DES encrypts these R

and C with the

same key with

TCM ’s key,then

sends the encrypted data back to

TCM. TCM receives

the data and decrypts it

to

get the

R

and

C,and then determine whether the R is the same value it just sends and whether the C is equal with C0.If they are exact then TFESE can boot up,else then TFESE would be shut down or some special secure serviced should be rejected.Application-Trust Phase

When the root is trustable,we can also provide OS Application protection.As figure 10shows,TCM Driver is the

being counterfeited,In-System flash can not only protect the hardware being tampered but also store secure information.

TFSES can provide a flexible solution to adapt the embedded system application with its FPGA nature reconfigured feature.FPGA also makes TFSES run fast because of its hardware realizing the entire trust computing module.

TFSES costs less.The proposed architecture can be implemented with commercially available devices.They are devised low-cost,low-power.However,TFSES’s advantage is not in these high-performance devices,but in its thought in its creativity and combine those to make a good secure solution for embedded system.

V.C ONCLUSION S AND F UTURE R ESEARCH The embedded system is so source-restricted and security is so expensive that we should make a appropriate balance between security,cost and performance.TFESE has enough security,low cost and high performance.This apparatus can inset into embedded system,needs system change hardly and can be easy updated.TFESE can be applied fully in embedded security system.

TCM’s separating with FPGA may nourish insecurity. TFSES mainly focuses on root-trust integrity and less cares about OS secure application.In the future,we are going to integrate TCM into FPGA,do more effort on the software application security and let TFSES take good care of our whole system.

A CKNOWLEDGMENT

This work was performed under the auspices of Guangdong Laboratory of Fundamental Software and Application Constructions..We acknowledge the support of Science and Technology Planning Project of Guangdong Province(2006B80407001 and2008A010100011-03).

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Manual, v1.2, https://www.360docs.net/doc/b315415647.html,, 2003

中国姓氏英文翻译大全S-Z

A: 艾--Ai 安--Ann/An 敖--Ao B: 巴--Pa 白--Pai 包/鲍--Paul/Pao 班--Pan 贝--Pei 毕--Pih 卞--Bein 卜/薄--Po/Pu 步--Poo 百里--Pai-li C: 蔡/柴--Tsia/Choi/Tsai 曹/晁/巢--Chao/Chiao/Tsao 岑--Cheng 崔--Tsui 查--Cha 常--Chiong 车--Che 陈--Chen/Chan/Tan 成/程--Cheng 池--Chi 褚/楚--Chu 淳于--Chwen-yu D: 戴/代--Day/Tai 邓--Teng/Tang/Tung 狄--Ti 刁--Tiao 丁--Ting/T 董/东--Tung/Tong 窦--Tou 杜--To/Du/Too 段--Tuan 端木--Duan-mu 东郭--Tung-kuo 东方--Tung-fang E: F:

范/樊--Fan/Van 房/方--Fang 费--Fei 冯/凤/封--Fung/Fong 符/傅--Fu/Foo G: 盖--Kai 甘--Kan 高/郜--Gao/Kao 葛--Keh 耿--Keng 弓/宫/龚/恭--Kung 勾--Kou 古/谷/顾--Ku/Koo 桂--Kwei 管/关--Kuan/Kwan 郭/国--Kwok/Kuo 公孙--Kung-sun 公羊--Kung-yang 公冶--Kung-yeh 谷梁--Ku-liang H: 海--Hay 韩--Hon/Han 杭--Hang 郝--Hoa/Howe 何/贺--Ho 桓--Won 侯--Hou 洪--Hung 胡/扈--Hu/Hoo 花/华--Hua 宦--Huan 黄--Wong/Hwang 霍--Huo 皇甫--Hwang-fu 呼延--Hu-yen I: J: 纪/翼/季/吉/嵇/汲/籍/姬--Chi 居--Chu 贾--Chia 翦/简--Jen/Jane/Chieh 蒋/姜/江/--Chiang/Kwong 焦--Chiao 金/靳--Jin/King 景/荆--King/Ching

预埋件施工方案

川威钒资源综合利用项目 转炉一次除尘工程预埋件(螺栓) 施 工 方 案 二零一二年三月

一、编制说明 本转炉一次除尘工程;包括3个电除尘基础、2个切换站、水泵房、电气室,放散烟囱基础,风机及消音器基础,煤气冷却器基础等。有直埋和预留孔型。由于该工程需预埋大量的设备和钢构地脚螺栓,是施工现场的重点工作项目,特编制此方案补充施工组织设计。 二、掌握施工图纸与现场施工条件: 1.在施工准备阶段,首先要熟悉幕墙施工图与预埋件施工图纸,结合现场土建施工状况,了解本工程的幕墙的分布、形式以及依据本工程的施工特点制定预埋件施工方案、技术交底等。 2.在这个阶段要全面的消化图纸的内容,现场的实际施工情况,如发现问题要及时向设计师反映;找出预埋的难点、易混淆的部位,在交底中进行专项说明,并召集工人开专门的工作重点交底会议,要让操作人员掌握操作要领和技术要求。 三、制定预埋施工方案: 针对本工程的具体情况,积极与总包单位技术部门交流,掌握施工重点、难点的处理,在结合我司的施工组织计划,制定出合理的预埋件施工计划,包括材料计划、劳动力组织、机械设备计划、施工工序安排、施工段划分、进度与跟踪、质量保证措施等。, 1、质量要求 1、材料要求 地脚螺栓的品种、规格、性能等应符合现行国家产品标准和设计要求。

2、安装允许偏差 地脚螺栓位臵允许偏差(MM) 项目允许偏差 支承面标高±3.0 水平度 L/1000 地脚螺栓螺栓中心偏移 5.0 垂直度 H/1000 四、在施工段找出定位轴线: 根据图纸,在现场找出预埋部位附近的建筑定位轴线与水平层高标高线(50线或1m线)的位臵并进行复核,尽可能按照多的轴线来划分水平分布尺寸。 找出各轴线后,测量建筑物外轮廓线,并绘制测量出的建筑物图,与建筑施工图对比,及时将测量结果传递至设计师,由设计师对误差进行分析并作出修改。 五、按照图纸核对现场尺寸: 现场各施工段支模的实际尺寸往往与设计图纸有偏差,所以要核对,尤其是立面、平面外轮廓变化较多的地方、转角处、突出的部位等,将实际测量尺寸标注在施工图纸上。根据现场的尺寸,结合幕墙的分格,求出偏差每分格内平均值,如未超出规范允许范围内的偏差,则根据现场尺寸分格埋设,如超出规范允许偏差,则必须及时组织包括设计师、业主工程师在内的小组,进行修正方案讨论和确定。 六、定出垂直、水平分布位臵:

钢结构工程预埋件埋设工程施工工艺标准Word

ICS Q/ZXJZ 钢结构工程预埋件埋设工程施工工艺标准 中国新兴建设开发总公司 发布

目次 1 适用范围 (1) 2 引用标准 (1) 3 术语 (1) 4 材料要求 (1) 5 施工准备 (1) 6 操作工艺 (1) 7 质量控制 (1) 8 质量标准 (1) 9 成品保护 (1)

钢结构工程预埋件埋设工程施工工艺标准 1 适用范围 本标准适用于钢结构工程的预埋件和预埋螺栓的埋设施工。 2 引用标准 钢结构工程施工质量验收规范(GB50205—2001) 钢结构设计规范(GB50017—2002) 建筑工程施工质量验收统一标准(GB50300—2001) 工程测量规范(GB50026—1993) 建筑钢结构施工手册 3 术语 预埋件——为便于钢结构构件与混凝土结构连接,在混凝土结构施工时预先埋设的钢板连接件。 预埋螺栓——为便于钢结构构件与混凝土结构连接或为便于钢构件的安装定位,在混凝土结构施工时预先埋设的螺栓。 螺栓群——由两个或两个以上螺栓组成用于连接固定同一柱(梁)构件的预埋螺栓的总称。 锚筋——与预埋件焊接连接用于锚固预埋钢板的钢筋。 4 材料要求 4.1 预埋件及预埋螺栓材料的品种、规格必须符合设计要求,并有产品质量证明书。当设计有复验要求时,尚应按规定进行复验并在合格后方准使用。 4.2 当由于采购等原因不能满足设计要求需要代换时,应征得设计工程师的认可并办理相应的设计变更文件。 4.3 预埋钢板的平整度及预埋螺杆的顺直度影响使用时应进行校平和矫直处理,并在运输时进行必要的保护,预埋螺杆的丝扣部位应采用塑料套管加以保护,防止丝扣破坏。 5 施工准备 5.1 施工前应根据工程特点编制详细的操作工艺方案,对操作工人进行统一交底。 5.2 电焊工、测量员等工种应经考试合格并取得上岗资格证。 5.3 预埋件(预埋螺栓)进场时应附带质量证明文件和产品合格证,进场后应组织相关人员进行检查验收。 5.4 安装前与土建技术人员办理测量控制线交接手续,复核土建单位给定的测量控制线,根据该控制线引测预埋件(预埋螺栓)的平面及高程控制线。 5.5 根据工艺方案要求加工辅助用支架,准备辅助用料,并存放到指定位置,由专人妥善保管。 5.6 与土建单位混凝土及钢筋工序进行统一协调,合理安排好各工序间的穿插施工。 5.7 施工用电焊机、气割、测量仪器等进行统一检查调试。 6 操作工艺

图像处理中值滤波器中英文对照外文翻译文献

中英文资料对照外文翻译 一、英文原文 A NEW CONTENT BASED MEDIAN FILTER ABSTRACT In this paper the hardware implementation of a contentbased median filter suitabl e for real-time impulse noise suppression is presented. The function of the proposed ci rcuitry is adaptive; it detects the existence of impulse noise in an image neighborhood and applies the median filter operator only when necessary. In this way, the blurring o f the imagein process is avoided and the integrity of edge and detail information is pre served. The proposed digital hardware structure is capable of processing gray-scale im ages of 8-bit resolution and is fully pipelined, whereas parallel processing is used to m inimize computational time. The architecturepresented was implemented in FPGA an d it can be used in industrial imaging applications, where fast processing is of the utm ost importance. The typical system clock frequency is 55 MHz. 1. INTRODUCTION Two applications of great importance in the area of image processing are noise filtering and image enhancement [1].These tasks are an essential part of any image pro cessor,whether the final image is utilized for visual interpretation or for automatic an alysis. The aim of noise filtering is to eliminate noise and its effects on the original im age, while corrupting the image as little as possible. To this end, nonlinear techniques (like the median and, in general, order statistics filters) have been found to provide mo re satisfactory results in comparison to linear methods. Impulse noise exists in many p ractical applications and can be generated by various sources, including a number of man made phenomena, such as unprotected switches, industrial machines and car ign ition systems. Images are often corrupted by impulse noise due to a noisy sensor or ch annel transmission errors. The most common method used for impulse noise suppressi on n forgray-scale and color images is the median filter (MF) [2].The basic drawback o f the application of the MF is the blurringof the image in process. In the general case,t he filter is applied uniformly across an image, modifying pixels that arenot contamina ted by noise. In this way, the effective elimination of impulse noise is often at the exp ense of an overalldegradation of the image and blurred or distorted features[3].In this paper an intelligent hardware structure of a content based median filter (CBMF) suita ble for impulse noise suppression is presented. The function of the proposed circuit is to detect the existence of noise in the image window and apply the corresponding MF

中国姓氏英语翻译大全

中国姓氏英语翻译大全 A: 艾--Ai 安--Ann/An 敖--Ao B: 巴--Pa 白--Pai 包/鲍--Paul/Pao 班--Pan 贝--Pei 毕--Pih 卞--Bein 卜/薄--Po/Pu 步--Poo 百里--Pai-li C: 蔡/柴--Tsia/Choi/Tsai 曹/晁/巢--Chao/Chiao/Tsao 岑--Cheng 崔--Tsui 查--Cha

常--Chiong 车--Che 陈--Chen/Chan/Tan 成/程--Cheng 池--Chi 褚/楚--Chu 淳于--Chwen-yu D: 戴/代--Day/Tai 邓--Teng/Tang/Tung 狄--Ti 刁--Tiao 丁--Ting/T 董/东--Tung/Tong 窦--Tou 杜--To/Du/Too 段--Tuan 端木--Duan-mu 东郭--Tung-kuo 东方--Tung-fang E: F:

范/樊--Fan/Van 房/方--Fang 费--Fei 冯/凤/封--Fung/Fong 符/傅--Fu/Foo G: 盖--Kai 甘--Kan 高/郜--Gao/Kao 葛--Keh 耿--Keng 弓/宫/龚/恭--Kung 勾--Kou 古/谷/顾--Ku/Koo 桂--Kwei 管/关--Kuan/Kwan 郭/国--Kwok/Kuo 公孙--Kung-sun 公羊--Kung-yang 公冶--Kung-yeh 谷梁--Ku-liang H:

韩--Hon/Han 杭--Hang 郝--Hoa/Howe 何/贺--Ho 桓--Won 侯--Hou 洪--Hung 胡/扈--Hu/Hoo 花/华--Hua 宦--Huan 黄--Wong/Hwang 霍--Huo 皇甫--Hwang-fu 呼延--Hu-yen I: J: 纪/翼/季/吉/嵇/汲/籍/姬--Chi 居--Chu 贾--Chia 翦/简--Jen/Jane/Chieh 蒋/姜/江/--Chiang/Kwong

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城市中坚工程 施 工 方 案 编制: 审核: 审批: 河北卓尔建筑装饰有限公司 2012年10月25日

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不小于50mm。 4.3 预埋件的定位偏差应符合下列要求: 预埋件的标高偏差不大于10.0mm,预埋件的轴线与幕墙轴线的偏差前后不大于10.0mm,左右偏差不大于20.0mm。 4.4 在楼层边板预埋时,由于楼板钢筋较少,应按照该工程的预埋工艺要求,增设附加筋进行加强并进行预埋。 5. 预埋件的固定(关键工序、质量控制点) 5.1 预埋件定位后,用钢丝把预埋件上锚筋与主体结构的钢筋捆绑牢固(或焊接牢固)。定位后埋件表面与模板表面应紧密贴合。 5.2 焊接 A.每个预埋件的锚筋中应有 1~2 根与主体结构的钢筋焊接。(允许加钢筋进行搭接,搭接长度不小于50mm。) B.在建筑高度 30M 以上的预埋件,每三层中应有一层的预埋件锚筋和均压环梁的纵向钢筋焊接接通(幕墙防雷需要)。预埋件焊接接通的楼层,检验员应做好记录并在幕墙转接件安装时通知安装人员。 6. 检查 按4.2,4.3 条检查预埋件的安放位置和焊接质量。 7. 混凝土浇灌 混凝土浇灌、捣固时,注意防止预埋件的位移和与模板分离。 8. 拆模板 9. 清理预埋件 清理粘附在预埋件外表面上混凝土,露出其表面。

图像处理外文翻译 (2)

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双语:中国姓氏英文翻译对照大合集

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步Poo 百里Pai-li C: 蔡/柴Tsia/Choi/Tsai 曹/晁/巢Chao/Chiao/Tsao 岑Cheng 崔Tsui 查Cha 常Chiong 车Che 陈Chen/Chan/Tan 成/程Cheng 池Chi 褚/楚Chu 淳于Chwen-yu

D: 戴/代Day/Tai 邓Teng/Tang/Tung 狄Ti 刁Tiao 丁Ting/T 董/东Tung/Tong 窦Tou 杜To/Du/Too 段Tuan 端木Duan-mu 东郭Tung-kuo 东方Tung-fang F: 范/樊Fan/Van

房/方Fang 费Fei 冯/凤/封Fung/Fong 符/傅Fu/Foo G: 盖Kai 甘Kan 高/郜Gao/Kao 葛Keh 耿Keng 弓/宫/龚/恭Kung 勾Kou 古/谷/顾Ku/Koo 桂Kwei 管/关Kuan/Kwan

郭/国Kwok/Kuo 公孙Kung-sun 公羊Kung-yang 公冶Kung-yeh 谷梁Ku-liang H: 海Hay 韩Hon/Han 杭Hang 郝Hoa/Howe 何/贺Ho 桓Won 侯Hou 洪Hung 胡/扈Hu/Hoo

花/华Hua 宦Huan 黄Wong/Hwang 霍Huo 皇甫Hwang-fu 呼延Hu-yen J: 纪/翼/季/吉/嵇/汲/籍/姬Chi 居Chu 贾Chia 翦/简Jen/Jane/Chieh 蒋/姜/江/ Chiang/Kwong 焦Chiao 金/靳Jin/King 景/荆King/Ching

图像处理中常用英文词解释

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