54ACT174中文资料
54AC174?54ACT174
Hex D Flip-Flop with Master Reset
General Description
The ’AC/’ACT174is a high-speed hex D flip-flop.The device is used primarily as a 6-bit edge-triggered storage register.The information on the D inputs is transferred to storage dur-ing the LOW-to-HIGH clock transition.The device has a Master Reset to simultaneously clear all flip-flops.
Features
n I CC reduced by 50%
n Outputs source/sink 24mA
n ’ACT174has TTL-compatible inputs n Standard Microcircuit Drawing (SMD)—’AC174:5962-87626—’ACT174:5962-87757
Logic Symbols
Pin Names Description D 0–D 5Data Inputs CP Clock Pulse Input MR Master Reset Input Q 0–Q 5
Outputs
FACT ?is a trademark of Fairchild Semiconductor Corporation.
DS100277-1
IEEE/IEC
DS100277-2
July 1998
54AC174?54ACT174Hex D Flip-Flop with Master Reset
?1998National Semiconductor Corporation https://www.360docs.net/doc/d110135626.html,
Connection Diagrams
Functional Description
The ’AC/’ACT174consists of six edge-triggered D flip-flops with individual D inputs and Q outputs.The Clock (CP)and Master Reset (MR)are common to all flip-flops.Each D in-put’s state is transferred to the corresponding flip-flop’s out-put following the LOW-to-HIGH Clock (CP)transition.A LOW input to the Master Reset (MR)will force all outputs LOW in-dependent of Clock or Data inputs.The ’AC/’ACT174is use-ful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
Truth Table
Inputs
Output
MR CP D Q L X
X L H N H H H N
L L H
L
X
Q
H =HIGH Voltage Level L =LOW Voltage Level
N =LOW-to-HIGH Transition X =Immaterial
Logic Diagram
Pin Assignment for DIP and Flatpak
DS100277-3
Pin Assignment
for LCC
DS100277-4
DS100277-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings(Note1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage(V CC)?0.5V to+7.0V DC Input Diode Current(I IK)
V I=?0.5V?20mA V I=V CC+0.5V+20mA DC Input Voltage(V I)?0.5V to V CC+0.5V DC Output Diode Current(I OK)
V O=?0.5V?20mA V O=V CC+0.5V+20mA DC Output Voltage(V O)?0.5V to V CC+0.5V DC Output Source
or Sink Current(I O)±50mA DC V CC or Ground Current
per Output Pin(I CC or I GND)±50mA Storage Temperature(T STG)?65?C to+150?C Junction Temperature(T J)
CDIP175?C Recommended Operating Conditions
Supply Voltage(V CC)
’AC 2.0V to6.0V ’ACT 4.5V to5.5V Input Voltage(V I)0V to V CC Output Voltage(V O)0V to V CC Operating Temperature(T A)
54AC/ACT?55?C to+125?C Minimum Input Edge Rate(?V/?t)
’AC Devices
V IN from30%to70%of V CC
V CC@3.3V,4.5V,5.5V125mV/ns Minimum Input Edge Rate(?V/?t)
’ACT Devices
V IN from0.8V to2.0V
V CC@4.5V,5.5V125mV/ns Note1:Absolute maximum ratings are those values beyond which damage to the device may occur.The databook specifications should be met,without exception,to ensure that the system design is reliable over its power supply, temperature,and output/input loading variables.National does not recom-mend operation of FACT?circuits outside databook specifications.
DC Characteristics for’AC Family Devices
54AC
Symbol Parameter V CC T A=Units Conditions
(V)?55?C to+125?C
Guaranteed Limits
V IH Minimum High Level 3.0 2.1V OUT=0.1V Input Voltage 4.5 3.15V or V CC?0.1V
5.5 3.85
V IL Maximum Low Level 3.00.9V OUT=0.1V Input Voltage 4.5 1.35V or V CC?0.1V
5.5 1.65
V OH Minimum High Level 3.0 2.9I OUT=?50μA Output Voltage 4.5 4.4V
5.5 5.4
(Note2)
V IN=V IL or V IH
3.0 2.4I OH=?12mA
4.5 3.7V I OH=?24mA
5.5 4.7I OH=?24mA
V OL Maximum Low Level 3.00.1I OUT=50μA Output Voltage 4.50.1V
5.50.1
(Note2)
V IN=V IL or V IH
3.00.50I OL=12mA
4.50.50V I OL=24mA
5.50.50I OL=24mA
I IN Maximum Input 5.5±1.0μA V I=V CC,GND
Leakage Current
I OLD Minimum Dynamic
Output Current(Note3)5.550mA V OLD=1.65V Max
I OHD 5.5?50mA V OHD=3.85V Min
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DC Characteristics for’AC Family Devices(Continued)
54AC
Symbol Parameter V CC T A=Units Conditions
(V)?55?C to+125?C
Guaranteed Limits
I CC Maximum Quiescent 5.580.0μA V IN=V CC
Supply Current or GND
Note2:All outputs loaded;thresholds on input associated with output under test.
Note3:Maximum test duration2.0ms,one output loaded at a time.
Note4:I IN and I CC@3.0V are guaranteed to be less than or equal to the respective limit@5.5V V CC.
I CC for54AC@25?C is identical to74AC@25?C.
DC Characteristics for’ACT Family Devices
54ACT
Symbol Parameter V CC T A=Units Conditions
(V)?55?C to+125?C
Guaranteed Limits
V IH Minimum High Level 4.5 2.0V V OUT=0.1V Input Voltage 5.5 2.0or V CC?0.1V V IL Maximum Low Level 4.50.8V V OUT=0.1V Input Voltage 5.50.8or V CC?0.1V V OH Minimum High Level 4.5 4.4V I OUT=?50μA Output Voltage 5.5 5.4
(Note5)
V IN=V IL or V IH
4.5 3.70V I OH=?24mA
5.5 4.70I OH=?24mA
V OL Maximum Low Level 4.50.1V I OUT=50μA Output Voltage 5.50.1
(Note5)
V IN=V IL or V IH
4.50.50V I OL=24mA
5.50.50I OL=24mA
I IN Maximum Input 5.5±1.0μA V I=V CC,GND
Leakage Current
I CCT Maximum 5.5 1.6mA V I=V CC?2.1V
I CC/Input
I OLD Minimum Dynamic
Output Current(Note6)5.550mA V OLD=1.65V Max
I OHD 5.5?50mA V OHD=3.85V Min
I CC Maximum Quiescent 5.580.0μA V IN=V CC
Supply Current or GND Note5:All outputs loaded;thresholds on input associated with output under test.
Note6:Maximum test duration2.0ms,one output loaded at a time.
Note7:I CC for54ACT@25?C is identical to74ACT@25?C.
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AC Electrical Characteristics
Symbol Parameter
V CC54AC
Units (V)T A=?55?C to+125?C Fig.
(Note8)C L=50pF No.
Min Max
f max Maximum Clock 3.365MHz
Frequency 5.090
t PLH Propagation Delay 3.3 1.014.0ns
CP to Q n 5.0 1.510.5
t PHL Propagation Delay 3.3 1.013.0ns
CP to Q n 5.0 1.510.0
t PHL Propagation Delay 3.3 1.013.5ns
MR to Q n 5.0 1.511.0
Note8:Voltage Range3.3is3.3V±0.3V
Voltage Range5.0is5.0V±0.5V
AC Operating Requirements
54AC
V CC T A=?55?C Fig. Symbol Parameter(V)to+125?C Units No.
(Note9)C L=50pF
Guaranteed Minimum
t s Setup Time,HIGH or LOW 3.37.5ns
D n to CP 5.0 5.5
t h Hold Time,HIGH or LOW 3.3 3.0ns
D n to CP 5.0 3.0
t w MR Pulse Width,LOW 3.37.0ns
5.0 5.0
t w CP Pulse Width 3.37.0ns
5.0 5.0
t rec Recovery Time 3.3 3.0ns
MR to CP 5.0 2.0
Note9:Voltage Range3.3is3.3V±0.3V
Voltage Range5.0is5.0V±0.5V
AC Electrical Characteristics
Symbol Parameter
V CC
(V)
(Note10)
54ACT
Units
Fig.
No.
T A=?55?C to+125?C
C L=50pF
Min Max
f max Maximum Clock 5.095MHz
Frequency
t PLH Propagation Delay 5.0 1.512.5ns
CP to Q n
t PHL Propagation Delay 5.0 1.513.0ns
CP to Q n
t PHL Propagation Delay 5.0 1.512.0ns
MR to Q n
Note10:Voltage Range5.0is5.0V±0.5V
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AC Operating Requirements
54ACT
V CC T A=?55?C Fig.
Symbol Parameter(V)to+125?C Units No.
(Note11)C L=50pF
Guaranteed
Minimum
t s Setup Time,HIGH or LOW 5.0 3.0ns
D n to CP
t h Hold Time,HIGH or LOW 5.0 2.0ns
D n to CP
t w MR Pulse Width,LOW 5.0 5.0ns
t w CP Pulse Width,HIGH OR
5.0 5.0ns
LOW
t rec Recovery Time 5.0 1.0ns
MR to CP
Note11:Voltage Range5.0is5.0V±0.5V
Capacitance
Symbol Parameter Typ Units Conditions
C IN Input Capacitance 4.5pF V CC=OPEN
C P
D Power Dissipation85.0pF V CC=5.0V
Capacitance
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Physical Dimensions inches(millimeters)unless otherwise noted
20-Terminal Ceramic Leadless Chip Carrier(L)
NS Package Number E20A
16-Lead Ceramic Dual-In-Line Package(D)
NS Package Number J16A
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Physical Dimensions inches(millimeters)unless otherwise noted(Continued)
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1.Life support devices or systems are devices or sys-
tems which,(a)are intended for surgical implant into
the body,or(b)support or sustain life,and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling,can
be reasonably expected to result in a significant injury
to the user.
2.A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system,or to affect its safety or effectiveness.
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16-Lead Ceramic Flatpak(F)
NS Package Number W16A
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National does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.