IC datasheet pdf-TRF2443,pdf(TRF2443 IF Transceiver for Broadband Wireless Application)

FEATURES

DESCRIPTION APPLICATIONS

TX_PWD

TRF2443

?Integrated TX Chain(165–175MHz/330–350

MHz)The TRF2443is a highly integrated full-duplex

intermediate frequency(IF)transceiver designed for –Baseband Amplifiers

broadband point-to-point wireless communications –Quadrature Modulator

applications.The receiver chain integrates a –Digitally Controlled VGA quadrature(IQ)demodulator and provides more than –TX Output IP3:29.5dBm90dB of gain range,obtained via a combination of

analog-and digital-controlled VGAs.The integrated –TX Output Noise:–166dBc/Hz

programmable baseband low-pass filter gives the ?Integrated RX Chain(140–165MHz/280–330TRF2443the flexibility to receive signals with different MHz)bandwidths,while also helping to remove interferer

signals before they reach the ADC.Additionally,the –IF Amplifiers

TRF2443gives the flexibility to add an external IF –Analog and Digital VGA

filter to further remove unwanted signals.The –Quadrature Demodulator TRF2443transmitter chain integrates a quadrature

–Baseband Filters(IQ)modulator driving a highly linear IF DVGA that

provides35dB of gain range controlled via a serial –ADC Buffers

programming interface(SPI).The TRF2443includes –IF SAW Filter Bypass the two synthesizers for the receiver and transmitter

–RX Noise Figure:4.3dB chains,removing the need for external LO generation

circuitry and simplifying the implementation of a –RX Input IP3:9.5dBm

frequency-division duplexing(FDD)transceiver ?Integrated TX and RX Synthesizers design.The TRF2443also provides

?Integrated Cross-Polarization Interference cross-polarization interference cancellation(XPIC) Cancellation(XPIC)Support support via an integrated XPIC output amplifier and

receiver chain.The TRF2443is an ideal building ?Auxiliary RX Chain

block for implementing the IF transceiver function in

the indoor unit(IDU),which is connected via a coaxial

cable interface to the outdoor unit(ODU),of a ?Wireless Microwave Backhaul point-to-point microwave backhaul split-architecture

?Point-to-Point Microwave system.

?Broadband Wireless Applications

?WiMAX IF Transceiver

Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.Copyright?2009,Texas Instruments Incorporated Products conform to specifications per the terms of the Texas

Instruments standard warranty.Production processing does not

necessarily include testing of all parameters.

TXQ_IN

TXI_IN

XPIC_BBI

XPIC_BBQ

TX_PWD

CLKSPI DATASPI LESPI

RXBBI

RXBBQ

RECEIVER DESCRIPTION

RX_IN

TRF2443

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These devices have limited built-in ESD protection.The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Figure 1.TRF2443Functional Block Diagram

Figure 2.Receiver Chain Block Diagram

The TRF2443features a highly linear low-noise receiver chain with over 60dB of analog-controlled gain range and more than 40dB of gain range programmable via the serial programming interface (SPI)in 1-dB steps.Moreover,the TRF2443gives the flexibility to add an external IF filter to further remove unwanted signals.Such an external filter can be bypassed using an internal path that can be enabled via SPI.The first block of the

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TRANSMITTER DESCRIPTION

SYNTHESIZERS DESCRIPTION TRF2443

https://www.360docs.net/doc/d710935818.html,...................................................................................................................................SLWS217A–SEPTEMBER2009–REVISED SEPTEMBER2009 receiver chain is a low-noise,highly linear IF amplifier(LNA).Its input is differential and internally matched to50?.The TRF2443LNA attenuation is programmable from0dB to–19dB,corresponding to an LNA gain of17dB to–2dB(1-dB steps).The LNA is followed by three analog-controlled VGAs that provide more than60dB of gain range.The IFVGA1output and IFVGA2input can be connected externally(pins IFOUT and IFIN)through an external IF filter.An internal switch gives the flexibility to bypass the external filter.The VGAs provide a gain slope of51dB/V.The IFVGA3drives the demodulator,which downconverts the IF input signal directly to baseband in-phase and quadrature.The demodulator block includes the local oscillator in-phase and quadrature generation circuitry followed by the LO buffer.The TRF2443baseband section integrates a programmable-gain amplifier(PGA)and programmable low-pass filter.The baseband PGA minimum gain is9dB,and the maximum gain is33dB.The TRF2443baseband low-pass filter cutoff frequency can be programmed from2MHz to11 MHz by setting the cutoff-frequency control bits appropriately.The baseband output buffers(ADC drivers)are designed to drive directly an analog-to-digital converter(ADC),either dc-or ac-coupled.The output common mode of the ADC drivers is set externally via the RXBBCM pin(pin40).When the TRF2443is dc-connected to the ADC,the same dc common mode can be used for both the ADC and the TRF2443baseband output.

Figure3.Transmitter Chain Block Diagram

The transmitter chain integrates an IQ modulator followed by a variable attenuator and the final transmitter amplification stage.The last two blocks provide over35dB of gain range.A power-alarm circuit monitors the level at the modulator output,and its digital output goes low if the signal level falls below the user-specified threshold level relative to the expected level.The first block of the transmitter chain is the IQ modulator,which upconverts the incoming in-phase and quadrature signals to the TX IF frequency.The TRF2443can be either ac-or dc-coupled to the digital-to-analog converter(DAC).The IQ modulator drives a variable attenuator.This block provides5.5dB of total attenuation range in0.5-dB steps.The output amplifier integrates five attenuation steps of6dB each for total of30dB.The output amplifier in combination with the variable attenuator provides over 35.5dB of monotonic output power control(0.5-dB steps).

TRF2443integrates two complete integer synthesizers for the receiver and transmitter chain.The RXVCO operates at16times the typical RX input frequency,and the TXVCO operates at8times the typical TX output frequency.

Each synthesizer is composed of:

?High-frequency VCO(around2720MHz for the TX VCO and2240MHz for the RX VCO)

?N-divider(driven by the high-frequency VCO)done by an8/9prescaler followed by an A-B counter that drives the phase-frequency detector

?Phase-frequency detector(PFD)(driven by the N-divider)that compares the VCO divided by N to the reference clock divided by R signals

?Charge pump(driven by the PFD)which creates up and down current pulses,based on the incoming signals from the PFD.Its output is filtered and transformed to voltage by the external loop filter and applied to the VCO input control voltage.

?An external reference clock must be applied to the REFIN(pin16).The incoming signal is buffered and goes through a programmable divider(R-divider).

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XPIC DESCRIPTION

PINOUT DIAGRAM

GNDIFIN T X B B I N

GNDIFIN T X B B I P

IFINN G N D X P I C

IFINP X P I C B B C M

VCCIFIN X P I C B B Q N

XPICOUTP X P I C B B Q P

XPICOUTN X P I C B B I N

RXLOTEST X P I C B B I P

VCCVCORX V C C X P I C

GNDVCORX X P I C A G C

VTUNERX G N D

CPOUTRX G N D

GNDPLLRX V C C X P I C 2

VCCPLLRX X P I C I N N

VCCDIGRX X P I C I N P

GDNDIGRX G N D

RXBBIP T E M P O U T

RXBBIN L D C A P

RXBBQP G N D R X 2

RXBBQN

R X B B C M

TXPWD G N D T X

MIXINDN G N D T X MIXINDP T X O U T N

PWRDET T X O U T P LOCKDET V C C T X

TXLOTEST V C C S P I VCCVCOTX D A T A S P I

GNDVCOTX C L K S P I VTUNETX L E S P I

CPOUTX G N D R X GNDPLLTX G N D R X

VCCPLLTX R X I N N VCCDIGTX R X I N P

GNDDIGTX V C C R X VCCREF G N D

REFIN R X A G C

GNDREFIN

R D B K S P I

GND I F O U T P TXBBQN I F O U T N

TXBBQP

G N D R X

PFP Package (Top View)

P0027-04

TRF2443

SLWS217A–SEPTEMBER 2009–REVISED SEPTEMBER https://www.360docs.net/doc/d710935818.html,

The VCO output is then routed through a programmable divider by 8or 16to create the TX and RX LO signals.The TRF2443features a lock-detect output pin (LOCKDET,pin 5).This is a digital output that is high when both RX and TX synthesizers are locked,and it is low if one or both synthesizers are unlocked (or lose lock).The TRF2443provides cross-polarization interference cancellation (XPIC)support via an integrated XPIC output amplifier and receiver chain.The XPIC output amplifier transmits the signal taken at the receiver demodulator input.The XPIC receiver section downconverts the input signal to baseband I and Q.It includes an IF VGA followed by a demodulator and a baseband amplifier.4Submit Documentation Feedback

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PIN FUNCTIONS

I/O DESCRIPTION

NAME NO.

CLKSPI73I SPI clock

CPOUTRX49O RX PLL charge-pump output

CPOUTX10O TX PLL charge-pump output

DATASPI74I SPI data

GND18,31,–Ground

32,36,

GNDDIGRX45–RX PLL digital ground

GNDDIGTX14–TX PLL digital ground

GNDIFIN59,60–RX chain ground

GNDPLLRX48–RX PLL ground

GNDPLLTX11–TX PLL ground

GNDREFIN17–Reference clock ground

GNDRX61,70,–RX chain ground

GNDRX239–RX chain ground

GNDTX79,80–TX chain ground

GNDVCORX51–RX VCO ground

GNDVCOTX8–TX VCO ground

GNDXPIC23–XPIC ground

IFINN58I IFVGA2input:negative terminal

IFINP57I IFVGA2input:positive terminal

IFOUTN62O IFVGA1output:negative terminal

IFOUTP63O IFVGA1output:positive terminal

LDCAP38I/O PLL lock detector decoupling capacitor pin

LESPI72I SPI latch enable

LOCKDET5O PLL lock detect output(digital HIGH=locked,LOW=unlocked)

MIXINDN2O TX mixer output collector:negative terminal

MIXINDP3O TX mixer output collector:positive terminal

PWRDET4O Power alarm output(digital HIGH=output power above threshold;LOW=output power below

threshold)

RDBKSPI64O SPI data readback

REFIN16I PLL reference clock input

RXAGC65I RX AGC control input

RXBBCM40I RX chain common-mode input

RXBBIN43O RX baseband output I:negative terminal

RXBBIP44O RX baseband output I:positive terminal

RXBBQN41O RX baseband output Q:negative terminal

RXBBQP42O RX baseband output Q:positive terminal

RXINN69I RX input:negative terminal

RXINP68I RX input:positive terminal

RXLOTEST53O RX LO test pin

TEMPOUT37O Temperature sensor output

TXBBIN21I TX baseband I input:negative input

TXBBIP22I TX baseband I input:positive input

TXBBQN19I TX baseband Q input:negative input

TXBBQP20I TX baseband Q input:positive input

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PIN FUNCTIONS(continued)

I/O DESCRIPTION

NAME NO.

TXLOTEST6O TX LO test pin

TXOUTN78O TX IF output:negative terminal

TXOUTP77O TX IF output:positive terminal

TXPWD1I TX power down

VCCDIGRX46–RX PLL digital power supply

VCCDIGTX13–TX PLL digital power supply

VCCIFIN56–RX chain power supply

VCCPLLTX12–TX PLL power supply

VCCPLLRX47–RX PLL power supply

VCCREF15–Reference clock power supply

VCCRX67–RX chain power supply

VCCSPI75–SPI power supply

VCCTX76–TX power supply

VCCVCORX52–RX VCO power supply

VCCVCOTX7–TX VCO power supply

VCCXPIC29–XPIC power supply

VCCXPIC233–XPIC power supply

VTUNERX50I RX VCO input control voltage

VTUNETX9I VCO tune voltage input

XPICAGC30I XPIC AGC control input

XPICBBCM24I XPIC common-mode input

XPICBBIN27O XPIC baseband I output:negative terminal

XPICBBIP28O XPIC baseband I output:positive terminal

XPICBBQN25O XPIC baseband Q output:negative terminal

XPICBBQP26O XPIC baseband Q output:positive terminal

XPICINN34I XPIC input

XPICINP35I XPIC input

XPICOUTN54O XPIC output

XPICOUTP55O XPIC output

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ABSOLUTE MAXIMUM RATINGS(1)

THERMAL CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS DC CHARACTERISTICS

DIGITAL INTERFACE CHARACTERISTICS TRF2443

VALUE UNIT Input voltage range(2)–0.3to5V

ESD rating,HBM2000V

ESD rating,CDM500V

T J Junction temperature range–40to150°C

T stg Storage temperature range–65to150°C (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings

only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)All voltage values are with respect to network ground terminal.

Over recommended operating free-air temperature(unless otherwise noted)

PARAMETER MIN TYP MAX UNIT

θJA Thermal derating,junction-to-ambient High-K board,still air8.5°C/W

Over operating free-air temperature range(unless otherwise noted)

MIN TYP MAX UNIT

V CC_3V 3.3-V power-supply voltage3 3.3 3.6V

V_RXAGC Analog AGC voltage(pin65)02V

V_XPICAGC Analog AGC voltage(pin30)01V

T J Operating junction temperature065125°C

T A Operating ambient temperature–4085°C

V CC=3.3V;T J=65°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TX on;RX on(SAW off);XPIC off947

I CC Total supply current TX on;RX on(SAW on);XPIC off965mA

TX on;RX on(SAW on);XPIC on1085

V CC=3.3V;T J=65°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V IH High-level input voltage2V CC V

V IL Low-level input voltage00.8V

V OH High-level output voltage0.8V CC V

V OL Low-level output voltage0.2V CC V

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RECEIVER CHARACTERISTICS

TRF2443

SLWS217A–SEPTEMBER 2009–REVISED SEPTEMBER https://www.360docs.net/doc/d710935818.html,

V CC_3V =3.3V ±5%,T J =65°C ,IF SAW filter insertion loss =10dB (1)(unless otherwise noted)

PARAMETER

TEST CONDITIONS MIN TYP MAX UNIT f IF

Input IF frequency

140

MHz

From RX_IN to RX_BBI/RX_BBQ

LNA_ATT =0;RXAGC =2V (3)

7686

LNA_ATT =0;RXAGC =2V (4)69G max (2)

Maximum voltage gain

LNA_ATT =17;RXAGC =2V (3)5968LNA_ATT =17;RXAGC =2V (4)52

LNA_ATT =0;RXAGC =0V

(3)1225LNA_ATT =0;RXAGC =0V

(4)12

27G min (2)

Minimum voltage gain

LNA_ATT =17;RXAGC =0V (3)

8LNA_ATT =17;RXAGC =0V (4)

LNA attenuation step

LNA_ATT =17(5)

16.917.918.9

dB ΔG step Digital gain step LNA attenuation setting through SPI 1.05dB ΔG range

Analog gain range RXAGC from 0V to 2V (6)54

62dB Gain flatness From 110MHz to 170MHz

1.5dB Gain control slope

dB/V LNA_ATT =0(8)(9) 4.56NF Noise figure (7)

dB LNA_ATT =17(10)(11)18.523LNA_ATT =0(12)(13)-9.5IP3Input IP3dBm LNA_ATT =17(14)(15)3

6.5Γin Input return loss Z 0=50?,differential

–25–12dB FROM RX_IN TO IF_OUT

G max Maximum voltage gain 33

dB ΔG dig Digital gain range Programmed by SPI

20dB ΔG step Digital gain step 1.05dB ΔG analog Analog gain range 34

dB LNA_ATT =0,RXAGC =2V 3.5NF Noise figure dB LNA_ATT =17,RXAGC =2V 19.5IP3Input IP3LNA_ATT =0,RXAGC =2V –13

dBm Γin Input return loss

Z 0=50?,differential

–12dB (1)10dB includes SAW filter insertion loss plus matching/board loss

(2)Gain measured from transformer input to RXBBI/Q output.External transformer insertion loss =0.5dB (3)SAW filter path enabled;baseband amplifier gain setting set to 9(4)SAW filter path disabled;baseband amplifier gain setting set to 0(5)Attenuation measured from LNA_ATT =0state.

(6)Monotonicity of RX gain versus VAGC is specified up to the maximum voltage gain spec and not the maximum VAGC voltage.(7)Automated test equipment 1-sigma measurement uncertainty of 0.15dB.

(8)SAW filter path disabled;baseband amplifier gain setting set to 0;total gain =55dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(9)SAW filter path enabled;baseband amplifier gain setting set to 3;total gain =66dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(10)SAW filter path disabled;baseband amplifier gain setting set to 0;total gain =38dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(11)SAW filter path enabled;baseband amplifier gain setting set to 3;total gain =49dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(12)SAW filter path enabled;baseband amplifier gain setting set to 9;total gain =33dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(13)SAW filter path disabled;baseband amplifier gain setting set to 0;total gain =35dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(14)SAW filter path enabled;baseband amplifier gain setting set to 9;total gain =16dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

(15)

SAW filter path disabled;baseband amplifier gain setting set to 0;total gain =18dB (gain measured from transformer input to RXBBI/Q output;external transformer insertion loss =0.5dB)

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RECEIVER CHARACTERISTICS(continued)

V CC_3V=3.3V±5%,T J=65°C,IF SAW filter insertion loss=10dB(unless otherwise noted)

(16)After room-temperature cutoff-frequency calibration

(17)Baseband filter3-dB corner frequency control step via SPI around f C=2.3MHz

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TRF2443

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TRANSMITTER CHARACTERISTICS

V CC_3V=3.3V±5%,T J=65°C(unless otherwise noted)

(1)Measured after the transformer(0.7-dB insertion loss)and with a TXBBI(or TXBBQ)input level of–23dBVrms

(2)No signal applied to TRF2443.This parameter is assured by characterization and is not production tested.

(3)Two tones of–26dBVrms each at TXBBI and TXBBQ inputs at5MHz and8MHz;measured at transformer output(0.7-dB insertion

loss).

(4)Using internal common and dc offset control

(5)TXIQ_PHASE set to8;SPI-3,register1,B<17,13>

(6)See the TX Output Power Ramp-Down section.

(7)Attenuation of output level from TX on.

(8)Common mode input is set internally.It is possible to disable internal bias through SPI and apply external common mode.

(9)Single-ended,measured at transformer output

(10)Delta output power level at TX fixed gain that forces detector output low(power alarm).

(11)Detector threshold and response time are fully programmable by the user.(See the Power Alarm Detector section.)

(12)If output power is lower than threshold for more than user-specified value,low.

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RF SYNTHESIZER CHARACTERISTICS TRF2443

V CC_3V=3.3V±5%,T J=65°C(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TXVCO

f txvco TXVCO frequency range See(1)26402800MHz

Divide-by-8mode330350

f txlo TXLO frequency range MHz

Divide-by-16mode165175

f out=340MHz;offset=10kHz–92.5

f out=340MHz;offset=100kHz–117.5

TXLO free-running phase noise dBc/Hz

f out=340MHz;offset=1MHz–140

f out=340MHz;offset=20MHz–150

Kv TX TXVCO gain45MHz/V TXPLL

f PFD PFD frequency20MHz

f out=340MHz;offset=20kHz–117

f out=340MHz;offset=100kHz–116

TXLO closed-loop phase noise dBc/Hz

f out=340MHz;offset=1MHz–140

f out=340MHz;offset=20MHz–150

Integrated TXLO noise Integrated from1kHz to12MHz;f out=340MHz(2)–56.5dB

Reference spur Measured at TXLOTEST(2720MHz)–70dBc

From unlocked state to locked state(includes

Lock time300μs

digital-calibration time)(3)

f out=165MHz;offset=20kHz–121

f out=165MHz;offset=100kHz–120

TXLO closed-loop phase noise dBc/Hz

f out=165MHz;offset=1MHz–141

f out=165MHz;offset=20MHz–147

Vcc min PLL-lock minimum power supply T J=65°C 2.8V RXVCO

f rxvco RXVCO frequency range See(1)22402640MHz

Divide-by-8mode280330

f rxlo RXLO frequency range MHz

Divide-by-16mode140165

f out=140MHz;offset=10kHz–97.5

f out=140MHz;offset=100kHz–122.5

RXLO free-running phase noise dBc/Hz

f out=140MHz;offset=1MHz–146

f out=140MHz;offset=20MHz–150

Kv RX RXVCO gain45MHz/V RXPLL

f PFD PFD frequency20MHz

Integrated from1kHz to12MHz;f out=140MHz(2)–62 Integrated RXLO noise dB

Integrated from1kHz to12MHz;f out=160MHz(2)–60

f out=140MHz;offset=20kHz–122

f out=140MHz;offset=100kHz–121

RXLO closed-loop phase noise dBc/Hz

f out=140MHz;offset=1MHz–146

f out=140MHz;offset=20MHz–150

Reference spur Measured at RXLOTEST(2240MHz)–65dBc

From unlock state to lock state(includes

Lock time300μs

digital-calibration time)(3)

(1)Frequency range proven locked with PFD frequency=20MHz

(2)Optimized for lowest integrated noise;see the Reference-Clock Characteristics table for recommended reference clock performance.

(3)Charge-pump current=1mA,PFD frequency Application Schematic section)

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REFERENCE-CLOCK CHARACTERISTICS

XPIC CHARACTERISTICS

TRF2443

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V CC =3.3V

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT f ref

Reference frequency 20MHz 1kHz –135Phase noise

dBc/Hz Floor

–160

REFIN pin,ac-coupled on board (internally Reference-clock input level

0.8

3V PP

dc-coupled)

V CC_3V =3.3V ±5%,T J =65°C (unless otherwise noted)

(1)RXAGC voltage to have RXBBI (or RXBBQ)output level =–17dBVrms (2)LNA ATT set to 0;total power gain =20dB

(3)Measured at XPIC_OUT balun output (75-?characteristic impedance)

(4)

Measured from differential output (XPICBBIP/N or XPICBBQP/N)to XPICINN input balun

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RECEIVER TYPICAL CHARACTERISTICS

RX AGC Voltage (mV)01020304050607080900

200

400

600

80010001200140016001800

R X G a i n (d B )

G001

01020304050607080900

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)

G002

?90

?80?70?60?50?40?30?20?100100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)G003

?90

?80?70?60?50?40?30?20?100100

708090

R X I n p u t I P 3 (d B m

)

RX Gain (dB)

G004

051015202530354045500

R X N o i s e F i g u r e (d B

)

RX Gain (dB)G005

051015202530354045500

R X N o i s e F i g u r e (d B

)

RX Gain (dB)

G006

TRF2443

f in =140MHz,SAW_EN =0,LNA_ATT =0,baseband gain settin

g =0,3-dB pad enabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RX GAIN

RX AGC VOLTAGE

Figure 4.Figure 5.RX INPUT IP3

RX INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 6.Figure 7.RX NOISE FIGURE

RX NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 8.

Figure 9.

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RECEIVER TYPICAL CHARACTERISTICS

01020304050607080900

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)G007

01020304050607080900

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)

G008

?90

?80?70?60?50?40?30?20?100100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)G009

?90

?80?70?60?50?40?30?20?100100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)

G010

051015202530354045500

R X N o i s e F i g u r e (d B

)

RX Gain (dB)G011

051015202530354045500

708090

R X N o i s e F i g u r e (d B

)

RX Gain (dB)

G012

TRF2443

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f in =140MHz,SAW_EN =1,LNA_ATT =0,baseband gain settin

g =3,3-dB pad disabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RX GAIN

RX AGC VOLTAGE

Figure 10.Figure 11.RX INPUT IP3

RX INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 12.Figure 13.RX NOISE FIGURE

RX NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 14.

Figure 15.

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RECEIVER TYPICAL CHARACTERISTICS

01020304050607080901000

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)G013

01020304050607080901000

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)

G014

?90

?80?70?60?50?40?30?20?100100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)G015

?90

?80?70?60?50?40?30?20?100100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)

G016

051015202530354045500

R X N o i s e F i g u r e (d B

)

RX Gain (dB)G017

051015202530354045500

708090

R X N o i s e F i g u r e (d B

)

RX Gain (dB)

G018

TRF2443

f in =140MHz,SAW_EN =1,LNA_ATT =0,baseband gain settin

g =6,3-dB pad disabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RX GAIN

RX AGC VOLTAGE

Figure 16.Figure 17.RX INPUT IP3

RX INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 18.Figure 19.RX NOISE FIGURE

RX NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 20.

Figure 21.

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RECEIVER TYPICAL CHARACTERISTICS

01020304050607080901000

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)G019

01020304050607080901000

200

400

600

80010001200140016001800

R X G a i n (d B

)

RX AGC Voltage (mV)

G020

?90

?80?70?60?50?40?30?20?100100

100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)G021

?90

?80?70?60?50?40?30?20?100100

8090100

R X I n p u t I P 3 (d B m

)

RX Gain (dB)

G022

051015202530354045500

100

R X N o i s e F i g u r e (d B

)

RX Gain (dB)G023

051015202530354045500

100

R X N o i s e F i g u r e (d B

)

RX Gain (dB)

G024

TRF2443

SLWS217A–SEPTEMBER 2009–REVISED SEPTEMBER https://www.360docs.net/doc/d710935818.html,

f in =140MHz,SAW_EN =1,LNA_ATT =0,baseband gain settin

g =9,3-dB pad disabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RX GAIN

RX AGC VOLTAGE

Figure 22.Figure 23.RX INPUT IP3

RX INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 24.Figure 25.RX NOISE FIGURE

RX NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 26.

Figure 27.

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RECEIVER TYPICAL CHARACTERISTICS

LNA Attenuation Setting (SPI-3, REG2<9,6>)?20

?18?16?14?12?10?8?6?4?200

R X L N A A t t e n u a t i o n (d B )

G037

?20

?18?16?14?12?10?8?6?4?200

R X L N A A t t e n u a t i o n (d B

)

LNA Attenuation Setting (SPI-3, REG2<9,6>)

G038

?2.0

?1.5?1.0?0.50.00.51.01.52.0

012345678910111213141516171819

R X L N A C u m u l a t i v e A t t e n u a t i o n E r r o r (d B

)

LNA Attenuation Setting (SPI-3, REG2<9,6>)

G086

?2.0

?1.5?1.0?0.50.00.51.01.52.0012345678910111213141516171819

R X L N A C u m u l a t i v e A t t e n u a t i o n E r r o r (d B

)

LNA Attenuation Setting (SPI-3, REG2<9,6>)

G087

RXBB Gain Setting (SPI-3, REG2<15,11>)8

1012141618202224262830320

R X B a s e b a n d G a i n (d B )

G039

1012141618202224262830320

R X B a s e b a n d G a i n (d B

)

RXBB Gain Setting (SPI-3, REG2<15,11>)

G040

TRF2443

f in =140MHz (T J =65°C,V CC =3.3V,unless otherwise noted)

RX LNA ATTENUATION

LNA ATTENUATION SETTING

Figure 28.

Figure 29.

RX LNA CUMULATIVE ATTENUATION ERROR

LNA ATTENUATION SETTING

Figure 30.Figure 31.RX BASEBAND GAIN

RX BASEBAND GAIN

RXBB GAIN SETTING

Figure 32.Figure 33.

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?3.0

?2.5?2.0?1.5?1.0?0.50.00.51.01.52.02.53.00

R X B a s e b a n d C u m u l a t i v e G a i n E r r o r (d B

)

RXBB Gain Setting (SPI-3, REG2<15,11>)G088

?3.0

?2.5?2.0?1.5?1.0?0.50.00.51.01.52.02.53.00

R X B a s e b a n d C u m u l a t i v e G a i n E r r o r (d B

)

RXBB Gain Setting (SPI-3, REG2<15,11>)

G089

TRF2443

SLWS217A–SEPTEMBER 2009–REVISED SEPTEMBER https://www.360docs.net/doc/d710935818.html,

RECEIVER TYPICAL CHARACTERISTICS (continued)

f in =140MHz (T J =65°C,V CC =3.3V,unless otherwise noted)

RX BASEBAND CUMULATIVE GAIN ERROR

RXBB GAIN SETTING

Figure 34.Figure 35.

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RECEIVER TYPICAL CHARACTERISTICS

01020304050607080900

200

400

600

80010001200140016001800

R X B B I G a i n (d B

)

RX AGC Voltage (mV)G074

01020304050607080900

200

400

600

80010001200140016001800

R X B B I G a i n (d B

)

RX AGC Voltage (mV)

G075

?80

?70?60?50?40?30?20?10010200

R X B B I I n p u t I P 3 (d B m

)

RX Gain (dB)G076

?80

?70?60?50?40?30?20?10010200

R X B B I I n p u t I P 3 (d B m

)

RX Gain (dB)

G077

051015202530354045500

R X B B I N o i s e F i g u r e (d B

)

RX Gain (dB)G078

051015202530354045500

R X B B I N o i s e F i g u r e (d B

)

RX Gain (dB)

G079

TRF2443

f in =280MHz,SAW_EN =0,LNA_ATT =0,baseband gain settin

g =0,3-dB pad enabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RXBBI GAIN

RX AGC VOLTAGE

Figure 36.Figure 37.RXBBI INPUT IP3

RXBBI INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 38.

Figure 39.

RXBBI NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 40.

Figure 41.

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RECEIVER TYPICAL CHARACTERISTICS

01020304050607080900

200

400

600

80010001200140016001800

R X B B I G a i n (d B

)

RX AGC Voltage (mV)G080

01020304050607080900

200

400

600

80010001200140016001800

R X B B I G a i n (d B

)

RX AGC Voltage (mV)

G081

?80

?70?60?50?40?30?20?1001020

R X B B I I n p u t I P 3 (d B m )

RX Gain (dB)G082

?80

?70?60?50?40?30?20?10010

200

R X B B I I n p u t I P 3 (d B m )

RX Gain (dB)

G083

051015202530354045500

R X B B I N o i s e F i g u r e (d B )

RX Gain (dB)G084

051015202530354045500

R X B B I N o i s e F i g u r e (d B )

RX Gain (dB)

G085

TRF2443

SLWS217A–SEPTEMBER 2009–REVISED SEPTEMBER https://www.360docs.net/doc/d710935818.html,

f in =280MHz,SAW_EN =1,LNA_ATT =0,baseband gain settin

g =9,3-dB pad disabled (T J =65°C,V CC =3.3V,unless

otherwise noted)

RXBBI GAIN

RX AGC VOLTAGE

Figure 42.Figure 43.RXBBI INPUT IP3

RXBBI INPUT IP3

vs vs RX GAIN

RX GAIN

Figure 44.

Figure 45.

RXBBI NOISE FIGURE

vs vs RX GAIN

RX GAIN

Figure 46.

Figure 47.

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