A comparative study of two SC-CMFB networks used in fully differential OTA

GBmfb-= - (b) gm4
Cload
This well-known circuit [2] is composed of two capacitors ( C l ) sensing the output common mode level, and two others (C2) refreshing this network with non-overlapping clock phases 41 and 42 (figure 2). Sources V r ef and Vpolar represent respectively the desired output common mode voltage (typically zero) and a close voltage value to be applied at node Vcmfb.
GB 70Mhz CMR Max
Ao
I
1
>
75dB SR 150pV/s
I
I
MP >80" PSRR High
1
I
Dvout Max CL lpf
Table 1: Performances required for the OTA GB is the gain-bandwitdh product, Ao the static gain, MP the phase margin, Dvout the output voltage swing, CMR the input common mode voltage, SR the slew rate and PSRR the power supply rejection ratio. The amplifier has been designed with an automatic tool which generates the amplifier netlist file [5].The symetrical architecture is chosen to achieve a high PSRR. All transistors in the amplifier have been designed with Vgs - Vt equal to 0.2 V. The current polarisation in the branches is equally distributed ( I 1 = 12) and I m l l = 170pA. The dimension values W and L corresponding to the transistors are summarized in Table 2. Mpl 115:l
Vrrf
L T Y T S (s
Vpok
> e . +
"rmrn
vn*
3 L I l 3 L
Figure 2: Unbuffered cmfb
s
The system tends t o keep V c m f b - V ( S ) or V ( S ' ) constant and equal to VpoEar - V r ef thanks t o the refreshments through C2 capacitors. The value of a (ratio beetween C2 and C l ) influences the steps magnitude between the two moments n+ 1 and n which leads t o different speed convergence (it increases with a ) . Consequently, the choice of this ratio is a compromize between the speed of the cmfb (steps magnitude) and the amplifier peformances (increase of the output capacitance Cload). As far as we are concerned the following considerations lead t o choose a equal t o two with a capacitor C1 of 0.1 pf. First the circuit is supposed to be purely differential with small common mode levels. Second, the parasitic capacitors at nodes S and S' degrade the amplifer frequency performances, C1 has t o be as small as possible. Finally, the time constant RC of the common mode feedback network has t o be inferior to FTamp and FTfb (band-pass of the amplifier and of the common mode feedback loop). The second step of the design concerns the frequency behaviours of the cmfb. From [l]the following requirements have t o be respected :
ABSTRACT A fully differential folded cascode OTA, integrated in an analog Bicmos 0.5pm process, is presented with the use of two switch capacitor common mode feedbacks. Their study is presented in details and the performances are compared t o put forward their drawbacks and advantages. Experimental results gives more than 70dB of DC gain for the OTA, a gain-bandwidth around 50Mhz and a phase margin greater than 80 degrees.
3.1 CMFB1: UNBUFFERED CMFB
a. A high cmfb open loop gain Aocmfb for a good accuracy b. G B m f b 2 GB in order to refresh the common mode level as frequently as possible c. A good phase margin for the stabilization of the network The small signal study must be applied between node Vcmf b and S or S'. From the transfert function in Laplace we deduce an approximation of the cmfb static gain (1.a) and gain-bandwidth product (1.b). gm4 Aocmfb = - ( a ) 9mt
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0-7803-5008-1/98/$10.00@1998 IEEE.
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output. Indeed, the common mode level of the circuit can not be well defined and it is impossible to respect the Kirschov laws at node A if Vcmfb is a fixed voltage source. Currents I1 and I2 are fixed by Vp2 and I T results from the sums of these two currents (figure 1). From this assumption, Vcmfb must be a voltage source controlled by the output common mode level and must ensure Vref a t node S and S'. One of the most important problem in the design of such circuit is to garantee that it is not degrading the OTA performances. In this paper the amplifier is controlled by applying the switch capacitor method. Two cmfb circuits are designed in order t o compare their performances when associated with the OTA.
I Mn4 I
Mp8
I7:l I 1 1 O : l I 188:1.5 I 375:1.5
Table 2: Devices dimensions
3. SWITCH CAPACITORS COMMON MODE FEEDBACK STUDIES
Figure 1: Transconductance amplifier It is clear that a symetrical architecture of an op. amp. imposes a common mode feedback loop at the