电气专业英语翻译

Foundation of PLC

1. The central processing unit

Although referred to as the brain of the system, the Central Processing Unit in a normal installation is the unsung hero, buried in a control cabinet, all but forgotten.

2. Basic Functionality

In a programmable controller system, the central processing unit(CPU) provides both the heart and the brain required for successful and timely control execution. It rapidly and efficiently scans all of the system inputs, examines and solves the application logic, and updates all of the system outputs. In addition, it also gives itself a checkup each scan to ensure that its structure is still intact. In this chapter we will examine the central processing unit as it relates to the entire system. Included will be the various functional blocks in the CPU, typical scan techniques, I/O interface and memory users, power supplies, and system diagnostics.

3. Typical Function Block Interactions

In practice, the central processing unit can vary in its architecture, but consists of the basic building block structure illustrated in Fig.1.1.The processing section consists of one or more microprocessors and their associated circuitry. While it is true that some of the luxury of using microprocessors, most modern systems use either a single microprocessors such as the AMD 2903, usedin a bit slice architecture. This multiple microprocessor system to break the control system tasks into many small components which can be executed in parallel. The result of this approach is to achieve execution speeds that are orders of magnitude faster than their single-tasking counterparts. In addition to efficiently processing direct I/O control information and being programmable, the real advantage that microprocessor-based system have over their hardwired relay counterparts is the ability to acquire and manipulate numerical data easily. It is this attribute that makes programmable controllers the powerhouses that they are today in solving tough factory automation problems. The factory of tomorrow will run efficiently only if quality information about process needs and status of the process equipment are known on a realtimes basis. This can and will come about only if the unit level controllers, including programmable controllers, are empowered with the ability to collect, analyze, concentrate, and deliver data about the process. As the

market continues to exhibit this demand, manufactures are likely to outfit their controllers with more and more variable memory, and enhanced instruction sets to perform these tasks.

4. Scan Techniques

By definition and design, the programmable controller is dedicated to the continuous, repetitive task of examining the system inputs, solving the continuous, repetitive task of examining the system inputs, solving the current control logic ，and updating the system outputs. This task is referred to as scanning (sometimes called sweeping), and is accomplished in slightly different ways in each manufacturer?s programmable controller. Since many of the variations are not material to the basic functionality of the system, we will only examine the basic varieties.

You?ll notice that the I/O servicing is at the end of the scan cycle, and is also an integral part of the scan timing. This type of scan is referred to as synchronous scan and is used with very fast machines that can update all of the I/O without lengthening the scan time materially. A typical scan time in a modern programmable controller ranges from 10~100 ms (milliseconds). Most controllers have a mechanism, watchdog timer, to measure the scan length each cycle and normally 150~250 ms. Referring to Fig.1.1 again, the synchronous scan contains four other actives in addition to the I/O scan. Housekeeping refers to a small number of routine chores performed by the programmable controller to ensure that its internal structure is still healthy and functioning properly. Next comes the communication windows to allow structured communications to other devices in the system, or externally. Included in this group would be the programming device, special microprocessor-based communications modules to allow ultimate communication of the programmable controller system to another intelligent device. Next in line comes the executive routine, in which the actual base intelligence of the system is used to interpret the current control program. This interpretation is then used in the next step to solve the current control logic program. The last step of this basic scan process is to integrate the currently interpreted control logic program with the most current input statuses from the I/O scan, and to update the output statuses with the current results.

The primary variation of this basic scanning technique comes from architectures that service and update I/O with a separate processor, asynchronous to the main logic solution scan. This alternative is common in systems where serial communication is used to control and update racks of remotely mounted I/O. It is also used where all of the I/O is serial, and run in multiple asynchronous scanning technique has the advantage that it allows extensive flexibility in configuring a programmable controller system for a particular application need. It has the disadvantage that while the basis scan rate maybe fast enough to suit an application, the I/O scan(s) actually be longer than the primary CPU scan. This can cause problems in a fast acting system in that the logic solution can occur with relatively “old” input data from the remote I/O channel. While this is at times bothersome, the more dramatic case involves a peculiarity of some programmable controllers in that they may allow input and output data to be updated on separate time bases, providing the possibility of “bad” logic solutions and unpredictable machine actions.

As part of the basic CPU structure, a number of error checking procedures are used to maintain a high level of integrity in the communications between itself and its subsystems. This can involve both the internal subsystems, such as the memory, and so-called external subsystems, for example the I/O system. The more common error-checking schemes are outlined below. The first and most is parity. This is used on many communication link subsystems to detect errors by examining the number of “ones” in each byte of information received, and comparing the total number in any one byte to a predetermined choice of even or odd parity. This corresponds to the total of ones in the byte summing to an even or odd number. This has the advantage of being able to detect a single-bit error, that is where a zero or one has changed state during some operation; but cannot detect two single but opposing bit changes in a byte of memory that cancel each other out and method for error checking, involves the examination of a block of memory for errors as compared to an individual word as done in parity checking. The procedure involves the adding of a single word of memory to a block that is unique to that block. Common varieties of the checksum are the Cyclic Redundancy Check(CRC) and the parity check is that it more efficiently uses memory. The third error checking method that we will consider is Error

Detection and Correction (EDC). It is used in the more sophisticated programmable controllers provided by a few manufacturers today. In essence it involves a number of complex error correcting codes implemented in the hardware. The Error Detecting and Correcting method has the added advantage that it can sense and correct single-bit error, while only sensing double bit errors.

5. I/O Control

Today?s modern programmable controller includes a sophisticated method to control the CPU?s execution of the Input/Output chain. This is referred to as I/O control, or sometimes Bus control. This is actually handled in different ways, depending on the type and style of controller involved. In the small programmable controller, the I/O servicing is performed as an integral part of the primary microprocessor used to control all of the major functions. In medium and large-sized systems, it is common to include a microprocessor board or subsystem to handle the execution of the I/O updating. This is especially important in the systems that update I/O separately, or synchronously from the main scan.

Regardless of the way it is achieved, the I/O control, or updating, is performed for the same reasons. For a successful scan sequence, an accurate execution of the signal level communication to the physical Input and Output modules is required. It is then, and only then, that any changes in the I/O status can be physically updated to actuators or from the sensors.

6. Memory-uses and Structure

It is memory, along with a microprocessor to exercise it, that separates today?s programmable controller from its predecessor. Current advances in memory allows both the rapid creation and efficient editing of control programs used to run the manufacturing processes. Different types of memory are used in a variety of programmable controllers for different application or design reasons. Let?s examine some of them in detail.

There are two basic memory categories used by programmable controllers, or for that matter, any microprocessor-base system. They are volatile and nonvolatile. V olatile means that the contents of the memory have no means to remain intact

without an external power source connected to maintain the data integrity. Nonvolatile means of the memory remain intact without an external power supply.

The segments of memory in a programmable controller system are straightforward.

Application Memory. Also called logic memory, it is the section of memory used to store the actual control program that the controller uses to control the manufacturing process. This control program is usually created by the system user.

Data Table Memory. This term collectively refers to the variable (register) memory, and the input /output status or image tables. The variable memory contains timer and counter values, along with any data used in mathematical calculations performed by the application program. The I/O image tables contain, as the name suggests, a representation of the actual input/output point status, either on or off.

Executive. Also called firmware (or just firmware), this section of memory contains the base intelligence of the system. The executive program supervises the basis chores of the programmable controller system including communications with subsystems, control program interpretation and execution, CPU diagnostics, and other housekeeping tasks included in every scan.

Scratch Pad. This is a temporary memory area used by the system to store the step-by-step and interim results obtained through some calculations. In some systems, the scratch pad memory contains the programmable controller statistics, such as memory size, amount used, and any active diagnostic flags set. Various segments of the programmable controller use different memory types to accomplish different design or application purposes. Below .we shall examine a sample of memory types, and contrast their use in programmable controllers.

Read Only Memory (ROM). This memory was one of the first commercially variable nonvolatile memory types used in microprocessor-based system. ROM get its name from the fact that the memory can be read from (information extracted), but cannot be written into (information placed in). A number of manufacturers of programmable controllers use ROM memory to store the executive programs. This is because it normally to store the executive programs. This is because it normally requires no adjustment or editing once the system is shipped from the manufacturer.

ROM is rarely, if ever, used as application memory, and cannot be used as data table or scratch pad memory because it cannot be updated with data from the operation of the programmable controller execution.

Random Access Memory (RAM). This is a volatile memory, but has the advantage over ROM of being capable of being written to as well as read from. It is for this reason that it is sometimes called read/write memory. Any location within the memory can be accessible. Because it is volatile, the memory contents will be lost if power is lost. With a properly designed battery backup system, RAM can retain its current contents during large controllers are normally expandable from one memory size to their maximum size. Small controllers are normally are normally fixed in their memory size. Size of the memory capacity must be examined relative to the word size (8 bit or 16 bit) and utilization. While it is clear that twice the information can be stored in a 16 bit word than in an 8 bit byte, it may not be immediately clear that some controllers utilize memory more efficiently than others. For example, a normally open contact and its associated reference address (e.g. Input 1), may use in 8 bit each for storage. Combined, they consume one 16 bit word. Some controllers may use more memory than this for these instructions or others. In a large program, these inefficiencies can build on each other to cause a poor utilization of the system memory.

A careful analysis of the various programmable controller models is required to 20%~40% of memory size to be specified to allow for modifications and later expansion. This analysis, combined with knowledge of the application needs, will allow for an intelligent choice of programmable controller.

The memory of a programmable controller is organized in what is called a memory map. This segments, through a process known as partitioning, the memory into functional units. All manufactures use a slightly different technique in designing their controller?s memory map. Some have variable partitions while others are fixed. All, however, are designed to segment the following functional areas:

Executive program(s)

Scratch pad

Input/output image tables

Data tables

Application program

We will now elaborate, in overview fashion on each of the memory map segments. As noted earlier, some controllers offer the user the flexibility (sometimes considered a constraint) of being able to vary the partitions within the memory map. This, in essence, allows the user or system builder to customize the sizes of the application, data table, and other memory segments to suit the particular application. Other controllers offer a preconfigured system, making assumptions about appropriate sizes for the various memory segments and their associated partitions. This eliminates the need for the user to deal with this sometimes confusing operation. As the architecture of programmable controllers continues to evolve, it is likely that the variable partition method will gain favorable momentum. This is likely because it accommodates a wider variety of operating systems and application programs since it can be tailored more effectively. This more flexible future may manufactures with special application software to accomplish an industry specific solution.

Executive. This is the basic intelligence of the programmable controller. It allows any application program instructions to be interpreted and acted upon. It is transparent to the user and is almost never considered to be included in the manufacturers rated memory sizes.

Scratch Pad. Also transparent to the user, this memory allows interim computations and some system configuration parameters to be established.

Input/output Image Tables. This is one of the most basic and straightforward segments in the memory map. This section of memory contains a stored representation of both the internal and external I/O …points.? An internal point is an input or output that is used only in an internal control logic process, and is not directly associated with the physical I/O modules. An external point is one that is directly associated or mapped to a physical I/O module, which in turn is physically connected to a sensor or actuator. These tables of the I/O are accessible and viewed by the programming device and some other programmable controller peripherals. They can then be observed or manipulated directly for program creation, editing, or later troubleshooting after the system has been installed. This memory segment is normally partitioned to some default value corresponding to the maximum I/O capacity of the

programmable controller. The view seen on the programming device screen is the most current information on the status of the I/O, as it changes the application program instructions and real world environment.

Application Program. This segment contains the actual ladder logic control program. Hence it is sometimes called the logic memory section. Again variable in size for some systems, it is created, edited, and later viewed during operation with the help of the programming device using contacts, coils, and other references, and then is converted to machine level code for use by the central processing unit. There are many techniques and devices to accomplish this task.

可编程序控制器(PLC)的基础

1. 中央处理单元

虽然被称为大脑的系统、中央处理单元在一个正常的安装是无名英雄，被埋在一个控制柜,几乎被忘记了。

2. 基本的功能

在可编程控制器系统、中央处理单元(CPU)提供了两个心脏和大脑控制所需的成功并及时地执行。它快速、高效地扫描所有的系统输入，研究和解决应用逻辑，并更新所有系统输出。此外，它也给予本身就是一个检查每个扫描,以确保其结构仍然完好无损在。这一章中，我们将探讨中央处理单元,因为它涉及到整个系统。内容包括如何使用的各种功能块的CPU,典型的扫描技术，I / O接口和用户记忆，电力供应,和系统诊断。

3. 典型的功能块间的相互作用

在实践中，中央处理单元可以跟随结构变化，但是由基本组成部分结构在图1.1中说明。处理部门由一个或多个微处理器与它们相关的电路。虽然这是事实,有些奢侈的使用微处理器，大多数现代系统使用一个单独的微处理器，如AMD2903，是个简单的模块。这多个微处理器系统打破了控制系统的工作分成许多小的组分，可并行执行。这样比单通道执行要快很多。除了直接有效地处理I / O控制信息和可编程的，真正的优点是基于微处理器的系统对信息的获取和处理实验数据有着得天独厚的能力。他们解决的复杂的工厂自动化为题的能力使得可编程控制器更受欢迎。众所周知，质量信息工程和工艺过程符合发展要求是工厂有效发展的动力。只有单位等级控制器，包括可编程控制器、被授权的能力,以收集、分析、集中注意力、并交付有关数据的过程，这也才会出现。随着市场继续展示这种需求，制造商正在可能装载越来越多变量控制和存储能力，以及增强指令集来完成这些任务。

4.扫描技术

根据定义和设计，可编程控制器是专门为连续的、重复任务的检测系统的输入，解决持续的、重复任务的检测系统，解决当前输入控制逻辑，并即时更新系统输出。这个任务是被称为扫描（有时叫做扫），各厂家的可编程控制完成的方法不同。因为许多变化并非是物质的基本功能的系统，我们将只检查基本功能系统。

你会注意到I / O维修是在扫描周期的结束，也是该扫描时间不可分割的一部分。这种类型的扫描是被称作同步扫描和是用非常快的机器，可以在没有延长扫描时间的准备的情况下更新所有的I/O。一个典型的扫描时间，在一个现代可编程控制器的范围很广，从10 ~ 100个毫秒。大多数控制器有一种机制，看门狗定时器，测量扫描的每一个周期，一般长度150 ~ 250毫秒。按照图1.1，同步扫描包含激活I/O扫描的其他四项。家务是指少数杂活儿由可编程控制器，以确保其内部结构仍然健康并工作正常。接下来的交流窗口允许结构化的通讯系统，其他的装置或在外部。包括在本集团的编程设备、特种以微处理器为基础的允许终极沟通的可编程控制器系统通信模块的另一种智能设备。下一批来执行例行程序，在实际智力底线的系统是用于解释电流控制程序。这个解释，然后用在接下来的步骤来解决当前的控制逻辑程序。这些基本的最后一步是整合扫描程序控制逻辑程序当前解释和最新的输入状态从I/O扫描,并更新输出状态与当前的结果。

这个基本的主要变化的扫描技术的体系结构，这种结构的服务来自和更新I/O模块的一个独立的处理器所作出的异步的主要逻辑解扫描。这种灵活的地方是常见的串行通信系统是用来控制和更新系统的远程安装的I/O。它也被用于I/O 串列的情况，以及运行在多个异步扫描技术中，其优点是它允许广泛的弹性系统配置一个可编程控制器为特定的应用需要。它有其弊端，在不同的应用领域扫描速度不是很快，实际上I/O扫描比主CPU扫描需要更长的时间。这在快速反应系统中可能会导致问题，即I/O传送数据滞后。当出现问题时，可编程控制器会出现一些富有戏剧性的特点，在差的解决方案和不可预知的机器运行情况，可编程控制器的输入输出数据将分通道传输。

作为部分的基本结构，大量的CPU进行错误检查程序是用来保持高水准的正直的本身及其子系统之间的通信。这可能包括石墨的内部子系统，例如记忆，以及所谓的外部的子系统，例如I / O系统。更常见的查错的方案略述如下。第一步，奇偶校验位。这是用在许多通信链路子系统检测错误通过检查数目的“归属”在每个字节的信息得到认可，并且比较了在任何一个字节总数甚至到预定的选择与奇奇偶校验位。这相当于总字节总结的一个奇偶校验。这样做的好处是可以探测到一个值的错误，那就是在一串数据中改变的某个状态，但在一串数据中无法探测到两处单独的可能互相抵消的错误，找不到正确的方法进行错误检查，在块存储器中所涉及的错误检查，再对一个个位进行偶校验。这个程序包括添加一个字的记忆体区独一无二的存储区。常见品种校验、循环冗余校验(CRC)和一

致校验是使它更有效地使用内存。第三个错误检查方法，我们将考虑的是错误检测和校正(EDC)。它被广泛应用在更为复杂的可编程控制器由少数制造商提供的今天。本质上,这涉及到许多复杂的错误更正码在硬件实现。误差检测与校正方法具有优势，可以感受到和正确的single-bit误差，而只有传感双位误差。

5.I / O控制

今天的现代可编程控制器使用一个复杂的方法来控制CPU的执行的输入/输出链。这是被称为I/O控制，或总线控制。这实际上是不同处理方式，这与类型和款式的控制器有关。在小可编程序控制器中，I/O服务是不可分割的一部分，中央微处理器用来控制所有的主要功能。在大中型系统，它是常见的，包括一个微处理器板或子系统处理执行的I/O更新。无论是在I/O分列更新，还在主要扫描的同步中，这都是十分重要的。

虽然实现的方式不同，但I/O控制和进行更新的目的是相同的。作为一个成功的扫描序列，准确执行信号电平输入和输出信息模块是必需的。它是这样,也只有这样,有I/O状态任何变更，都可以更新到执行机构或其传感器。

6 .Memory-uses和结构

可编程控制器的记忆功能是现代微处理器和先前的微处理器的区别。记忆中的先进的功能有利于编辑迅速建立并有效控制用来运行的生产工艺的程序。不同类型的记忆存储功能被广泛应用于不同的应用或设计领域的可编程控制器。让我们详细分析一下其中的区别。

有两种基本的存储范畴所使用的可编程控制器，或者是任何以微处理器为基础的系统。他们有易失性和非易失性。易失性意味着内容的记忆在缺外部电源的情况下也没有办法保持数据的完整性。非易失性存储器的方式是在没有一个外部电源情况下也是保持不变的。

存储的片段性在一个可编程控制器系统中是显而易见的。

应用程序存储器。也被称为内存，它是逻辑的一段记忆，用来存储控制器用来控制制造的过程实际控制程序。该控制程序通常是由系统建立的用户。

数据存储器。这个术语是指变量的集体(注册)存储记忆，和输入/输出状态或图像表。这个变量的内存包含定时器和计数器值，随着任何数据用于计算应用程序。顾名思义，I/O图像表包含一种对实际输入/输出点的状态，开或关。

系统存储器。也被称为固件(或者是固件)，此部分的内存包含基地智能系统。系统存储器在每个扫描周期中监督可编程控制器系统的基本工作，包括交换信息、子系统、控制程序解释和执行、CPU的诊断和其他的程序工作。

便笺式存储器。这是一个系统存储逐步和一些计算方法中的临时结果的一个临时存储器。在某些系统中，存储器的便笺簿包含了可编程序控制器统计数据，例如内存大小、用量和任何有效诊断旗帜设置。各阶层的可编程控制器使用不同的记忆来完成不同设计类型或应用目的。下面，我们将对比在可编程控制器中的一个样本的记忆类型。

只读存储器(ROM)。这个存储器是第一批用于基于微处理器的系统的商业变量非易失性存储器存储类型。ROM地名字来源从存储器中可以读取信息（信息提取），但不能被写进(信息存放)。许多可编程控制器的制造商使用ROM存储执行程序。这是由于它通常存储执行程序。这是因为一旦该系统厂家在发运ROM 是很少——假如有过，作为应用程序存储器，并不能作为数据表或便笺簿存储器，它通常不需要调整或编辑，因为它不能从可编程控制器的操作的执行更新数据。

随机存储器(RAM)。这是一种挥发性的存储器，而且优于ROM，可以写入及读取。正是因为这一原因，它有时被称为读/写存储器。此存储器的任何位都是可读写的。因为它是挥发性，如果指令丢失了，内存内容也将会丢失。如果有正确设计的电池备份系统，RAM在大型控制器正常的扩大范围使用情况下能维持它的当前内容。小控制器通常是固定大小的内存。存储容量的大小与存储器本身的位数和已利用内存有关。然而很显然，两倍的信息存储在一个16位字节比在一个8位字节中可能不会快速算出存储器的利用效率。例如，一个正常开启接触和与其有关的参考地址(例如输入1)，可用于每一个8比特的存放。结合之后,他们消耗一个16位字节。一些控制器可以为这些指令或其他内容使用比这更多的内存。在一个较大的程序中，这些效率低下的存储器相互依存会导致整个系统内存利用率低下。各个模型的详细分析要求可编程控制器20% ~ 40%的内存大小被指定允许修改和后期扩展。这一分析，结合知识的应用需求，将需要产生一个更智能的可编程控制器。

一个可编程控制器的存储的组织方式是所谓的存储地图。这一过程，通过这一过程被称之为分区，存储功能单元。所有控制存储图的设计时都使用了一些不同的技术手段。当一些有变量分区是固定的时，另外的一些是可变的。然而所有的都可呗划分为以下几个功能区：

执行程序)

便笺簿

输入/输出图像表

数据表

应用程序

我们现在将精心制作内存存储地图上的每一个部分。如前面所提到的,一些控制器为用户提供了灵活性(有时被看作是一种约束)是能够带来更多不同的分区在内存地图。这实质上也允许用户或系统建造者能够定制尺寸的应用、数据表、和适合特定的应用的其他的记忆片段。其它控制器提供了一种预先假定合适的尺寸和它们相关的各种记忆片段的分区。这并不需要用户来处理这个有时混乱的操作。由于可编程控制器结构的持续发展，很可能可变分区方法将获得有利的发展势头。这可能是因为它容纳更多种类的操作系统和应用程序,因为它可以剪裁更有效率。这更灵活的未来可能会制造出应用于特殊领域的特殊软件。

系统存储器。这是基本智能的可编程控制器。它允许任何应用程序的指令的解释和执行。它对用户是透明的，几乎从来没有考虑出厂时存储器的大小。

便笺簿。它对用户也是透明的，这存储器，让临时计算和某些系统配置参数可以暂时存储。

输入/输出图像表。这是其中最基本和简单的节段的内存地图。此部分的内存包含一个存储器，表示双方的内部和外部的I/O口.的状态是输入或输出。它是只用于内部控制的逻辑过程，与物理模块没有直接的联系。外部端口是一个直接映射I/O模块的一个量，依次是传送到传感器或执行机构。这些图表的I/O口是可改变的，也就是可编程控制器外围设备是可改写的。然后系统安装好后就可以观察到项目操作、编辑或后期故障处理了。这种内存段通常是分割到一些对应于最大的I/O能力的可编程控制器的默认值。观察到的编程设备屏幕上的信息是当前操作的I/O状态。

应用程序。这段包含逻辑控制程序的实际结构。因此它是有时被称为“逻辑记忆的部分”。它在一些系统中随时变化，在被创建、编辑和后来的观察运行过程中，运行中的编程设备使用触体、线圈及其它参考资料，然后使用水平中央处理单元转换成机器代码。这需要有很多技术和设备来完成这项任务。