基于单片机数字时钟设计开题报告

基于单片机数字时钟设计开题报告
基于单片机数字时钟设计开题报告

基于单片机数字时钟设计开题报告

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毕业设计(论文)材料之二(2)

本科毕业设计(论文)开题报告

题目: 基于单片机数字时钟设计

The Design of Digital Clock Based On

A Singlechip

课题类型:设计□实验研究□论文□

学生姓名:

专业班级:

学号:

教学单位:

指导教师:

开题时间:2013年月日

2013年月日

一、毕业设计(论文)内容及研究意义(价值)

1.设计(论文)内容

本论文主要研究基于单片机的数字时钟设计。当程序执行后,显示计时时间。设置4个操作键:K1:设置键;K2:上调键;K3:下调键;K4:确定键。

电子钟的格式为:XX.XX.XX ,由左向右分别为:时、分、秒。完成显示由秒01一直加1至59,再恢复为00;分加1,由00至01,一直加1至59,再恢复00;时加1,时由00加至23之后秒、分、时全部清清零。该钟使用T0作250us的定时中断。

走时调整:走时过程中直接调整且不影响走时准确性,按下时间选择键对“时、分、秒”显示进行调整,每按一下时间加,即加1,时间减,即减1。

附加功能:星期,年、月、日,温度检测。

本设计的主要内容:1、了解单片机技术的背景及发展现状,熟悉数字时钟各模块的工作原理;2、选择适当的芯片和元器件,确定系统电路,绘制电路原理图,尤其是各接口电路;3、熟悉单片机使用方法和C语言的编程规则,编写出相应模块的应用程序;4、分别在各自的模块中调试出对应的功能,在Proteu s软件上进行仿真。

2.研究意义及价值

20世纪末,电子技术获得了飞速的发展,在其推动下,现代电子产品几乎渗透了社会的各个领域,有力地推动了社会生产力的发展和社会信息化程度的提高,同时也使现代电子产品性能进一步提高,产品更新换代的节奏也越来越快。时间对人们来说总是那么宝贵,工作的忙碌性和繁杂性容易使人忘记当前的时间。忘记了要做的事情,当事情不是很重要的时候,这种遗忘无伤大雅。但是,一旦重要事情,一时的耽误可能酿成大祸。目前,单片机正朝着高性能和多品种方向发展趋势将是进一步向着CMOS化、低功耗、小体积、大容量、高性能、低价格和外围电路内装化等几个方面发展。下面是单片机的主要发展趋势。单片机应用的重要意义还在于,它从根本上改变了传统的控制系统设计思想和设计方法。从前必须由模拟电路或数字电路实现的大部分功能,现在已能用单片机通过软件方法来实现了。这种软件代替硬件的控制技术也称为微控制技术,是传统控制技术的一次革命。

单片机模块中最常见的是数字钟,数字钟是一种用数字电路技术实现时、分、秒计时的装置,与机械式时钟相比具有更高的准确性和直观性,且无机械装置,具有更更长的使用寿命,因此得到了广泛的使用数字钟是采用数字电路实现对.时,分,秒.数字显示的计时装置,广泛用于个人家庭,车站,码头办公室等公共场所,成为人们日常生活中不可少的必需品,由于数字集成电路的发展和石英晶体振荡器的广泛应用,使得数字钟的精度,远远超过老式钟表, 钟表的数字化给人们生产生活带来了极大的方便,而且大大地扩展了钟表原先的报时功能。诸如定时自动报警、按时自动打铃、时间程序自动控制、定时广播、自动起闭路灯、定时开关烘箱、通断动力设备甚至各种定时电气的自动启用等,所有这些,都是以钟表数字化为基础的。因此,研究数字钟及扩大其应用,有着非常现实的意义。

二、毕业设计(论文)研究现状和发展趋势(文献综述)

目前单片机渗透到我们生活的各个领域,几乎很难找到哪个领域没有单片机的踪迹。导弹的导航装置,飞机上各种仪表的控制,计算机的网络通讯与数据传输,工业自动化过程的实时控制和数据处理,广泛使用的各种智能IC卡,录像机、摄像机,以及程控玩具、电子宠物等等,这些都离不开单片机。更不

用说自动控制领域的机器人、智能仪表、医疗器械了。因此,单片机的学习、开发与应用将造就一批计算机应用与智能化控制的科学家、工程师。单片机在多功能数字钟中的应用已是非常普遍的,人们对数字钟的功能及工作顺序都非常熟悉。但是却很少知道它的内部结构以及工作原理。由单片机作为数字钟的核心控制器,可以通过它的时钟信号进行时实现计时功能,将其时间数据经单片机输出,利用显示器显示出来。通过键盘可以进行定时、校时功能。输出设备显示器可以用液晶显示技术和数码管显示技术。

三、毕业设计(论文)研究方案及工作计划(含工作重点与难点及拟采用的途径)

1、研究方案

本设计采用型号为AT89C52的单片机。器件采用ATMEL公司的高密度、非易失性存储技术生产,兼容标准MCS-52指令系统,片内置通用8位中央处理器和Flash存储单元,采用7段LED 数码管显示时、分、秒,以24小时计时方式,根据数码管动态显示原理来进行显示,用12MHz 的晶振产生振荡脉冲,定时器计数。

2、工作重点与难点

本次设计的单片机数字时钟系统中,其难点主要来源包括晶体频率误差,定时器溢出误差,延迟误差的降低。晶体频率产生震荡,容易产生走时误差;定时器溢出的时间误差,本应这一秒溢出,但却在下一秒溢出,造成走时误差;延迟时间过长或过短,都会造成与基准时间产生偏差,造成走时误差。因此,在选用芯片、器件、硬件时注意它们的性能优劣;烧入程序后,LED液晶显示屏不显示或者亮度不好。不显示时首先使用万用表对电路进行测试,观察是否存在漏焊,虚焊,或者元件损坏的现象。若无此问题查看烧写的程序是否正确无误,对程序进行认真修改。当显示亮度不好时一遍旋转10K欧的滑动变阻器,一遍观看LED显示屏,直到看到合适的亮度为止。

经过多次的反复调试试与分析,可以对电路的原理及功能更加熟悉,同时提高了设计能力与及对电路的分析能力。

3、工作计划

起止日期(日/月)周

内容进程

1.7-

2.24 接受设计的课题,查找相关参考文献和资料熟悉设计的课题,查阅、整理参考文献和资料。学习相关参考文献和资料。

2.25—3.101-2 撰写开题报告,开题答辩,对设计课题的方案作初步论证

3.11—

4.73-6 方案论证,软件编程及仿真

4.8—5.57-1

熟悉毕业论文格式,撰写论文初稿

5.6—5.19 11

-12

完成论文初稿,提交论文初稿

5.20—

6.16 13-

16

修改毕业论文,总体完善

6.17—6.23 17完成论文终稿,提交论文终稿,参加论文答辩

四、主要参考文献(不少于10篇,期刊类文献不少于7篇,应有一定数量的外文文献,至少附一篇引用的外文文献(3个页面以上)及其译文)

[1]王法能. 单片机原理及应用[M]. 科学出版社,2004

[2]陈宁. 单片机技术应用基础[M]. 南京:南京信息职业技术学院, 2005 [3]刘勇. 数字电路[M]. 电子工业出版社, 2005

[4] 杨子文. 单片机原理及应用[M].西安电子科技大学出版社2006

[5]岂兴明,唐杰等 .51单片机编程基础与开发实例详解[M]. 人民邮电出版社,2008

[6]张毅刚.新编MCS-51单片机应用设计[M]. 哈尔滨: 哈尔滨工业大学出版社, 2003

[7] 朱定华,等. 单片微机原理与应用[M]. 北京: 北京清华大学出版社, 北京:北京交通大学出版,2003

[8] Ling Zhenbao, Wang Jun, QiuChunling. Study of Measurement for the Anomalous Solid Matter[C]. The Sixth Int ernational Conference on Measurement and Control of Granular Materials.2003:181-184.

[9]8-bit Microcontroller With8K Bytes in-system programble Flash AT89S52. ATMEL, 2001.

[10] 8-bit MicrocontrollerWith20K Bytes Flash AT89C55WD.ATMEL,2000.

[11] 期刊:[ISSN 1009-623X] .单片机与嵌入式系统应用北京:北京航空航天大学,2001

附英文文献及译文

8-bitMicrocontroller With 8KByte

Flash AT89C52

Features

Compatiblewith MCS-51? Products

8KBytes of In-SystemReprogrammableFlash Memory

Endurance: 1,000 Write/Erase Cycles

FullyStaticOperation:0Hz to 24 MHz

Three-levelProgramMemory Lock

256 x 8-bitInternalRAM

32Programmable I/O Lines

Three16-bit Timer/Counters

EightInterrupt Sources

Programmable Serial Channel

Low-powerIdle andPower-down Modes

Description

TheAT89C52 is alow-power, high-performance CMOS 8-bit mic rocomputer with8K bytesof Flash programmable and erasable read onlymemory(PEROM). The device ismanufacturedusingAtmel’s high-density nonvolatilememorytechnology andiscompatible with the industry-standard 80C51and 80C52instruction set and pin out. The on-chip Flash allows the program memory tobe reprogrammed in-system or by aconventio nal nonvolatile memory programmer. Bycombining a versatile 8-bit CPU with Flashon a monolithic chip,the AtmelAT89C52 i sa powerful microcomputerwhichprovides a highly-flexible and c ost-effective solution to many embedded control applications.PinConfigurations

BlockDiagram

Pin DescriptionVCC

Supply voltage.

GND

Ground.

Port 0

Port 0isan8-bitopen drain bi-directionalI/O port. As anoutput port, each pincan sink eightTTLinputs. When 1s ar ewritten toport0pins, thepinscanbe used as high-imped anceinputs. Port 0can also beconfigured to bethe multiplexedlow-orderaddress/databusduringaccesses toexternal program and data memory. In thismode, P0has internal pull-ups.Port 0alsoreceivesthe code bytes during Flash programming andoutputs the code bytes during programverification.External pull-ups arerequired duringprogramverification.

Port 1

Port 1 is an 8-bit bi-directional I/O port with internalpull -ups. The Port 1 output bufferscansink/source fourTTLinputs.When 1sare written to Port 1pins, they are pull edhigh bythe internal pull-upsand canbe used as inputs. As inputs, Port 1 pinsthat areexternallybeing pulled low will source current(IIL) because of theinternal pull-ups.In addition,P1.0and P1.1 canbe configuredto be the timer/counter 2 externalcountinput(P1.0/T2)and thetimer/counter 2trigger input(P1.1/T2EX), respectively,as shownin thefol lowing table.Port 1 also receives the low-orderaddressbytes during Flash programming and verification.

Port 2

Port 2is an 8-bit bi-directionalI/Oport with internal pull-ups. The Port 2 output bufferscan sink/sourcefourTTL inputs.Wh en 1s are written to Port 2 pins,they arepulled highby theint ernal pull-ups andcan beused as inputs. As inputs,Port 2pins thatare externally being pulled low will source current(IIL) because oftheinternal pull-ups.Port 2 emits thehigh-order ad dress byte during fetchesfrom external program memoryand during accesses to external data memories that use 16-bit addresses (MOVX @DPTR).In this application,Port 2 usesstronginternalpull-ups whenemitting1s.Duringaccesses to e xternal data memoriesthat use 8-bit addresses(MOVX @ RI), Port 2emits thecontentsof the P2 Special Function Register. Por

t2 also receives the high-orderaddress bitsand some con trol signals duringFlash programming and verification.

Port 3

Port 3 is an8-bit bi-directionalI/O port with internal pull-ups.ThePort 3outputbuffers cansink/sourcefourTTL inputs. When 1s are written toPort 3pins, they are pulledhigh bythe internal pull-ups and can be used asinputs. Asinputs,Port 3 pins thatare externally beingpulled low willsourcecurrent(IIL) because of the pull-ups.

Port3alsoserves the functions of various specialfeatures of theAT89C51, as shownin the following table. Port 3 also receives some control signals for Flash programming andverification.

RST

Resetinput.A high on this pin for two machinecycleswhile the oscillator is runningresets thedevice.

ALE/错误!

Address LatchEnableis an outputpulse for latching the low byte oftheaddress duringaccesses to externalmemory.This pinisalsotheprogram pulse input(PROG) duri

ng Flash programming. In normaloperation,ALEisemitted at a constant rate of1/6 the oscillatorfrequencyand may be used for external timing or clocking purposes. Note, however, that oneALE pulse is skippedduring each access toexternal data memory. If desired, ALE operation can be disabled bysetting bi t0 of SFR location 8EH.Withthe bit set, ALE is active only during a MOVX or MOVCinstruction.Otherwise, thepin is wea kly pulled high. Setting theALE-disable bit has no effectif the microcontroller is in external execution mode.

错误!

ProgramStore Enable isthe readstrobeto external program memory. When theAT89C52is executing codefrom externalprogr am memory, PSEN is activatedtwice each machine cycle,exceptt

hat twoPSEN activationsare skippedduringeach access toexternal data memory.

错误!/VPP

External AccessEnable.EA must bestrapped to GNDin order to enablethe device tofetch codefromexternal program memorylocations starting at0000Hup to FFFFH.Note,however,that if lockbit 1 is programmed,EA will beinternallylatchedon reset. EA should be strapped to VCC for internal program executions. This pin alsoreceivesthe 12-volt prog rammingenable voltage (VPP ) during Flash programming when 12-volt programmingisselected.

XTAL1

Inputtothe inverting oscillator amplifier and input tothe internal clock operatingcircuit.

XTAL2

Output from theinverting oscillatoramplifier.

Special Function Registers

Amap of the on-chip memory area called the Special FunctionRegister (SFR)space isshown in theTable 1.Note that not all oftheaddresses areoccupied, and unoccupied addre ssesmay notbe implemented on the chip.Read accessesto these addresses will in general returnrandomdata, and write accesses will have anindeterminate effect. User software should not wri te1s to theseunlisted locations, since they may be usedin fut ure products toinvoke new features.In that case,the reset ori nactivevalues ofthenew bits willalwaysbe 0.

Timer 2 Registers

Control and status bits are contained in registers T2CONand T 2MOD forTimer 2. The registerpair (RCAP2H,RCAP2L) are the Capture/Reload registersforTimer2in 16-bit capture mode or 16-bitauto-reload mode.

Interrupt Registers

The individual interruptenablebits areinthe IE register. Two priorities canbe set for eachof the sixinterrupt sources inthe IP register.

Data Memory

TheAT89C52 implements 256 bytes of on-chipRAM. Theupper 128 bytesoccupy a parallel address space to the Special Function Registers. Thatmeanstheupper 128 bytes have thesame addresses as the SFR space but are physically separate from SFR space.

When an instruction accessesan internallocation aboveaddress7FH, the address modeused in theinstruction specifieswhether the CPU accessesthe upper128 bytes of RAM or the SFR space.Instructions that usedirectaddressing accessSFR space.Forexample, thefollowingdirectaddressing instruction accesses the SFR at location0A0H.

MOV 0A0H,#data

Instructions thatuse indirect addressingaccesstheupper128 bytes of RAM.For example, thefollowingindire ct addressinginstruction,where R0contains0A0H, accesses thedata byte at address 0A0H,rather thanP2 (whoseaddress is 0A0H).

MOV@R0, #data

Notethat stack operations areexamplesof indirect addressing, so the upper128 bytes ofdata RAM areavailable as stack space.

Timer0 and 1

Timer 0 andTimer1in theAT89C52 operate thesa meway asTimer0andTimer 1in the AT89C51.

Timer 2

Timer 2 is a 16-bit Timer/Counter thatcanoperateas either a timer or anevent counter. The typeof operationisselect ed by bit C/T2 intheSFR T2CON.Timer 2 has three operating modes: capture,auto-reload (up ordowncounting),and baudrate generator.The modesare selected by bits in T2CON,a sshown in Table 3.Timer2consistsof two8-bit registers, TH2 and TL2. In the Timer function, theTL2registerisincremented every machinecycle. Sinceamachine cycle consistsof 12 o scillatorperiods, the countrate is1/12 ofthe oscillat or frequency.

In the Counter function,theregister is incrementedinresponse to a 1-to-0 transitionat its corresponding externalinputpin, T2.In this function,theexternal input is sampled during S5P2ofevery machinecycle. When thesamples show a high inone cycle and a low in the next cycle, the countis increment ed.The new count value appears in the registerduring S3P1 of the cycle following the one in which the transitionwas detected. Since two machine cycles(24 oscillator periods)are required to recognize a 1-to-0 transition,themaximum count rate i s1/24 of theoscillator frequency. To ensure that a givenlevel is sampled at leastonce before itchanges,the level should be held for at least onefull machine cycle.

Capture Mode

In the capturemode,two options are selectedbybit EXEN2 in T2CON. If EXEN2 =0,Timer2is a16-bit timer or counter which upon overflowsets bitTF2 in T2CON.Thisbitcan then be usedto generate an interrupt.If EXEN2= 1, Timer 2 performs the same operation,buta1-to-0 transitionatexte rnal input T2EX alsocauses the current value in TH2and TL2to be captured intoRCAP2H and RCAP2L,respectively.In addition,thetransition at T2EX causes bitEXF2inT2CONto be set.TheEXF2bit,likeTF2can generatean interrupt. The capture modeisillustrated in Figure 1.

Auto-reload (Up or DownCounter)

Timer 2 can beprogrammedtocount up ordownwhenconfigured in its16-bit auto-reload mode.This feature is i nvokedbythe DCEN(Down CounterEnable)bit locatedin the SFR T2MOD. Uponreset, theDCEN bit is set to 0 so that timer 2will default to countup. When DCENis set,Timer 2 can count upor down, dependingon the value oftheT2EX pin.

Figure 2shows Timer2 automatically counting up when DC EN = 0.Inthis mode,two options are selected by bit EXEN2 in T2CON. If EXEN2=0,Timer 2 countsup to 0FFFFH and then sets the TF2 bit uponoverflow.The overflow also causes the

timerregisters to be reloadedwith the 16-bit value inRCAP2H and RCAP2L.The valuesin TimerinCaptureModeR CAP2Hand RCAP2L arepresetby software. IfEXEN2=1,a16-bitreloadcan betriggered either by anoverflow or by a 1-to-0 transition atexternalinput T2EX. This transitionalsosets theEXF2bit. Both the TF2andEXF2 bits can gener ate an interrupt if enabled.

Settingthe DCENbitenables Timer 2 to count up or down, asshown in Figure 3. In thismode,the T2EX pin controls thedirection of the count. Alogic 1at T2EX makes Timer 2 co unt up. Thetimer will overflow at0FFFFHandsetthe TF2bit. This overflow also causesthe 16-bit value in RCAP2Hand RCAP2L to be reloadedinto thetimerregisters,TH2 andTL2,respectively.

Alogic0at T2EX makesTimer2count down.The timer underflows when TH2and TL2equalthe valuesstored inRCAP2H andRCAP2L.Theunderflowsetsthe TF2bit andcauses0FFFFH to be reloaded into the timer registers. The E XF2 bit toggles wheneverTimer 2overflowsor underflowsandcan be used as a 17thbitof resolution. In this operatingmode,EXF2doesnot flag an interrupt.

文献译文:

8位8字节闪存单片机AT89C52

主要性能

●与MCS-51单片机产品兼容

●8K字节在系统可编程Flash存储器

●1000次擦写周期?

●全静态操作:0Hz~24Hz

●三级加密程序存储器

●256×8位内部存储器

●32个可编程I/O口线

●三个16位定时器/计数器

●八个中断源

●可编程串行通道

●低功耗空闲和掉电模式

功能特性描述

AT89S52是一种低功耗、高性能CMOS8位微控制器,具有8K内置可编程闪存。产品使用了Atmel公司高密度非易失性存储器技术制造,与工业80C51和80C52产品指令和引脚完全兼容。片上Flash允许程序存储器在系统可编程,亦适于常规编程器。在单芯片上,拥有灵巧的8位CPU和在系统可编程Flash,使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。

引脚结构

方框图

VCC : 电源

GND :地

P0口:P0口是一个8位漏极开路的双向I/O口。作为输出口,每位能驱

动8个TTL逻辑电平。对P0端口写“1”时,引脚用作高阻抗输入。当访问外部程序和数据存储器时,P0口也被作为低8位地址/数据复用。在这种模式下,P 0具有内部上拉电阻。在flash编程时,P0口也用来接收指令字节;在程序校验时,输出指令字节。程序校验时,需要外部上拉电阻。

P1口:P1 口是一个具有内部上拉电阻的8位双向I/O 口,P1 输出缓冲器能驱动4个TTL逻辑电平。对P1端口写“1”时,内部上拉电阻把端口拉高,此时可以作为输入口使用。作为输入使用时,被外部拉低的引脚由于内部电阻的原因,将输出电流(IIL)。此外,P1.0和P1.2分别作定时器/计数器2的外部计数输入(P1.0/T2)和时器/计数器2的触发输入(P1.1/T2EX),具体如下表所示。在flash编程和校验时,P1口接收低8位地址字节。

P2 口:P2 口是一个具有内部上拉电阻的8位双向I/O口,P2输出缓冲器能驱动4个TTL 逻辑电平。对P2端口写“1”时,内部上拉电阻把端口拉高,此时可以作为输入口使用。作为输入使用时,被外部拉低的引脚由于内部电阻的原因,将输出电流(IIL)。在访问外部程序存储器或用16位地址读取外部数据存储器(例如执行MOVX @DPTR)时,P2口送出高八位地址。在这种应用中,P2口使用很强的内部上拉发送1。在使用8位地址(如MOVX @RI)访问外部数据存储器时,P2口输出P2锁存器的内容。在flash编程和校验时,P2口也接收高8位地址字节和一些控制信号。

P3口:P3口是一个具有内部上拉电阻的8 位双向I/O 口,p2输出缓冲器能驱动4个TTL 逻辑电平。对P3端口写“1”时,内部上拉电阻把端口拉高,此时可以作为输入口使用。作为输入使用时,被外部拉低的引脚由于内部电阻的原因,将输出电流(IIL)。P3口亦作为AT89S52特殊功能(第二功能)使用,如下表所示。在flash编程和校验时,P3口也接收一些控制信号。

RST: 复位输入。晶振工作时,RST脚持续2个机器周期高电平将使单片机复位。看门狗计时完成后,RST脚输出96个晶振周期的高电平。特殊寄存器AUXR(地址8EH)上的DISRTO位可以使此功能无效。DISRTO默认状态下,复位高电平有效。

ALE/错误!:地址锁存控制信号(ALE)是访问外部程序存储器时,锁存低8位地址的输出脉冲。在flash编程时,此引脚(错误!)也用作编程输入脉冲。

在一般情况下,ALE 以晶振六分之一的固定频率输出脉冲,可用来作为外部定时器或时钟使用。然而,特别强调,在每次访问外部数据存储器时,ALE脉冲将会跳过。如果需要,通过将地址为8EH的SFR的第0位置“1”,ALE操作将无效。这一位置“1”,ALE仅在执行MOVX或MOVC指令时有效。否则,ALE 将被微弱拉高。这个ALE 使能标志位(地址为8EH的SFR的第0位)的设置对微控制器处于外部执行模式下无效。

错误!:外部程序存储器选通信号(错误!)是外部程序存储器选通信

号。

当AT89S52从外部程序存储器执行外部代码时,错误!在每个机器周期被激活两次,而在访问外部数据存储器时,错误!将不被激活。

错误!/VPP:访问外部程序存储器控制信号。为使能从0000H到FFFFH的外部程序存储器读取指令,错误!必须接GND。为了执行内部程序指令,错误!应该接VCC。

在flash编程期间,EA也接收12伏VPP电压。

XTAL1:振荡器反相放大器和内部时钟发生电路的输入端。

XTAL2:振荡器反相放大器的输出端。

特殊功能寄存器

如图1中所示的存储器区域称为特殊功能寄存器。应该注意到,并不是所有的地址都会被定义,单片机中那些没有被定义的地址是无效的。读访问这些地址一般会返回随机数据,写访问这些地址则会产生一个不确定的影响。用户软件不应将那些没有被列举出来的地址置1。在这种情况下,复位后这些单元数值总是0。

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