ADI AN-347屏蔽与接地--连接真实和虚拟的世界

ADI AN-347屏蔽与接地--连接真实和虚拟的世界

ADI AN-347屏蔽与接地

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作者：Alan Rich

译者：https://www.360docs.net/doc/a518835605.html, akaer

屏蔽与接地

对干扰型噪声的处理方法及其原理正文：

[001]

This is the second of two articles dealing with interference noise. In the last issue of Analog Dialogue (Vol. 16, No. 3, pp. 16-19), we discussed the nature of interference, described the relationship between sources, coupling channels, and receivers, and considered means of combating interference in systems by reducing or eliminating one of those three elements.

本文是关于干扰型噪声处理方法的两篇论文的第2篇。第一

篇已发表在《Analog Dialogue》上（见该杂志第16卷第3部分16至19页），该文剖析了干扰源、干扰耦合路径以及干扰接收方三个环节间的关系，并从选择三个环节中的某一个加以治理的角度，介绍了对付干扰型噪声的方法。[002] One of the means of reducing noise coupling is shielding. Our purpose in this article is to describe the correct uses of shielding to reduce noise. The major topics we will discuss include noise due to capacitive coupling, noise due to magnetic coupling, and driven shields and guards. A set of guidelines will be included, with do’s and

don’ts.

屏蔽技术可以降低信号传输时耦合进来的噪声。本文的主体是介绍如何正确地利用屏蔽来降低噪声，接下来将从电容耦合噪声、磁耦合噪声和有源屏蔽与防护罩三个方面分别展开论述，同时将给出几套设计准则，指明哪些该做，哪些不该做。[003]

From the outset, it should be noted that shielding problems are always rational and do not involve the occult; but they are not always straightforward. Each problem must be analyzed carefully. It is important first to identify the noise source, the receiver, and the coupling medium. Improper shielding and grounding, based on faulty identification of

any of these elements, may only make matters worse or create a new problem.

首先需要明确：虽然屏蔽设计总是可以借助理论来进行，并不神秘，但是，在处理实际问题时不能生搬硬套，而要注意具体问题要具体分析。分析的第一步最重要，即确定噪声源、接收方和耦合介质。这一步如果判断错误，屏蔽和接地设计就会出错，最后的效果可能适得其反，甚至节外生枝。[004] You can think of shielding as serving two purposes. First, shielding can be used to confine noise to a small region; this will prevent noise from extending its reach and getting into a nearby critical circuit. However, the problem with such shields is that noise captured by the shield can still cause problems if the return path the noise takes is not carefully planned and implemented by understanding of the ground system and making the connections correctly. 屏蔽的作用可以从两方面来理解。第一，对于系统外的噪声，屏蔽体可以将其限制在一个有限的区域内，从而避免其扩散并影响其周围的重要电路。不过，如果噪声信号的泄放路径设计不当、接地错误、或者电气连接不可靠，屏蔽体上的噪声仍然会对系统产生不利影响。[005]

Second, if noise is present in a system, shields can be placed around critical circuits to prevent the noise from

getting into sensitive portions of the circuits. These shields can consist of metal boxes around circuit regions or cables with shields around the center conductors. Again, where and how the shields are connected is important.

第二，对于系统内的噪声，可以对敏感电路实施局部屏蔽，以避免噪声的侵入。用金属盒子把电路包起来，以及电缆芯线的金属包层都是这方面的实例。同理，屏蔽层的电气连接也是至关重要的。[006]

If the noise results from an electric field, a shield works because a charge, Q2, resulting from an external potential, V1, cannot exist on the interior of a closed conducting surface (Figure 1).

电场理论指出：外部电荷源V1在封闭导体内感应出电荷Q2，Q2的电量为0。这就是屏蔽的原理（如图1）。Figure 1. Charge Q1 cannot create charge inside a closed metal shell

图1 电荷Q1无法在封闭导体内感应电荷[007]

Coupling by mutual, or stray, capacitance can be modeled by the circuit of Figure 2. Here, Vn is a noise source (switching transistor, TTL gate, etc.), Cs is the stray capacitance, Z is the impedance of a receiver (for example, a bypass resistor connected between the input of a

high-gain amplifier and ground), and Vno is the output noise developed across Z.

由于介质之间的相互作用也就是寄生效应，电容性介质可以等效为图2所示的电路模型。图中Vn表示噪声源（如开关模式工作的晶体管、TTL门电路等），Cs表示寄生电容，Z 表示负载阻抗（如高增益放大器输入端与地之间的旁路电阻），Von表示加在Z上的输出噪声电压。Figure 2. Equivalent circuit of capacitive coupling between a source and a nearby impedance

图2 干扰源与负载间电容耦合干扰的等效电路[008]

A noise current, In = Vn/(Z + Zcs,), will result, producing a noise voltage, Vno = Vn/(1 + Zcs/Z). For example, if Cs = 2.5 pF, Z = 10k (resistive), and Vn = l00mV at 1.3 MHz, the output noise will be 20mV (0.2% of 10V, i.e., 8 LSBs of 12 bits).

该回路中的噪声电流In=Vn/(Z+Zcs)，在负载Z上产生的噪声电压Vno=Vn/(1+Zcs/Z)。如果Cs=2.5pF，Z=10k欧，频率1.3MHz时的噪声电压Vn=100mV，则输出噪声为20mV （等于10V满摆幅的0.2%，对于12位模数变换器而言，相当于8LSB的误差）。[009]

It is important to recognize the effect that very small amounts of stray capacitance will have on sensitive circuits.

This becomes increasingly critical as systems are being designed to combine circuits operating at lower power (implying higher impedance levels), higher speed (implying lower nodal stray capacitance, faster edges, and higher frequencies), and higher resolution (much less output

noise permitted).

一定要记住：即使是很小的寄生电容，也会对敏感电路产生影响。当今的电子系统常常包含着低功耗（意味着阻抗更高）、高速度（节点寄生电容更小、信号边沿更陡峭、信号频率更高）和高分辨力（噪声容限更小）等电路，因此这个问题尤其应该引起重视。

[译者疑虑]什么是nodal stray capacitance？是指PCB过孔的分布参数，还是另有所指？[010]

When a shield is added, the change to the situation of Figure 2 is exemplified by the circuit model of Figure 3. With the assumption that the shield has zero impedance, the noise current in loop A-B-D-A will be Vn/Zcs1, but the noise current in loop D-B-C-D will be zero, since there is no driving source in that loop. And, since no current flows, there will be no voltage developed across Z. The sensitive circuit has thus been shielded from the noise source, Vn.

对图2的电路实施屏蔽后，其等效电路变为图3所示的样子。

设屏蔽体阻抗为零，则在环路A-B-D-A内流动的噪声电流为Vn/Zcs1，而在环路D-B-C-D内的噪声电流为0，这是因为该环路中没有信号源。因为噪声电流为0，所以负载Z上的噪声电压为0。这样一来，这部分电路就被屏蔽体保护了起来，不会受到噪声源Vn的影响。Figure 3. Equivalent circuit of the situation of Figure 2, with a shield interposed between the source and the impedance.

图3 图2的等效电路，干扰源与负载之间加入了屏蔽体Guidelines for Applying Electrostatic Shields

针对电场干扰实施屏蔽的准则[011]

◎An electrostatic shield, to be effective, should be connected to the reference potential of any circuitry contained within the shield. If the signal is earthed or grounded (i.e., connected to a metal chassis or frame, and/or to earth), the shield must be earthed or grounded. But grounding the shield is useless If the signal is not grounded.

要发挥静电屏蔽体的作用，必须将其连接到所有被屏蔽电路的参考电位上。如果某电路的参考电位是机壳或（和）大地——也就是说电路以金属支架或外壳的电位为电压的参考

零点，该点可以接大地，也可以不接——则屏蔽体就必须连接机壳或（和）大地。如果电路的参考电位不是大地，那么

即便将屏蔽体接大地，也起不到屏蔽效果。[译者注]本段中earthed译为“接机壳”（俗称搭铁、搭壳）、grounded译为“接大地”（就是地球）。在不引起混淆的情况下，后文earthed译作“接地”。[012]

◎The shield conductor of a shielded cable should be connected to the reference potential at the

signal-reference node (Figure 4).

电缆的屏蔽层必须单点连接到参考电位，连接点应尽量靠近信号源的参考电位。

[译者注]根据后文的论述，这里增加了“单点”的限定。>>>>这个“限定”很精彩：单点接地的原则很重要，有人想“好心”搞成电缆两头屏蔽层接地，结果会适得其反，务必留意。

----IC921Figure 4. Grounding a cable shield

图4 电缆屏蔽层的接地方法[013]

◎If the shield is split into sections, as might occur if connectors Ro2 is the 13-ohm output impedance of the logic gate, Cws is the are used, the shield for each segment must be tied to those for the adjoining segments, and ultimately connected (only) to the signal-reference node (Figure 5).

如果屏蔽体被隔断成多个部分——比如使用连接器的情况，那么应该将各部分首尾相接，然后单点连接到信号源的参考电位。Figure 5. Shields must be interconnected if interrupted

图5 隔断的屏蔽体必须连接起来[014]

◎The number of separate shields required i n a system is equal to the number of independent signals that are being measured. Each signal should have its own shield, with no connections to other shields in the system, unless they share a common reference potential (signal "ground"). If there is more than one signal ground (Figure 6), each shield should be connected to its own reference potential. 系统中需要测量的独立信号有多少，屏蔽体就要有多少，二者要一一对应。每路信号都要有其专用的屏蔽体，除非多个信号源采用相同的参考电位（信号地），否则任何一个屏蔽体都不要与其他屏蔽体连接。如果系统中有2个以上的信号地（如图6），那么各路信号的屏蔽体必须分别连接到相应信号的参考电位。Figure 6. Each signal should have its own shield connected to its own reference potential

图6 多路信号应该使用各自的屏蔽体，各屏蔽体应连接到相应信号的参考电位[015]

◎Don't connect both ends of the shield to "ground". The

potential difference between the two "grounds" will cause a shield current to flow (Figure 7). The shield current will induce a noise voltage into the center conductor via magnetic coupling. An example of this can be found in Part 1 of this series, Analog Dialogue 16-3, page 18, Figure 10. 屏蔽体一定不要多点接“地”。否则，由于多个“地”之间可能存在电位差，屏蔽体上将可能产生电流（如图7），由该电流激发的磁场会在屏蔽体内部感应出噪声电压。在上一篇论文中就此举过一个例子（详见《Analog Dialogue》卷16第3部分第18页图10）。Figure 7. Don’t connect the shield to ground at more than one point

图7 屏蔽体决不能多点接地

[译者疑虑]此处的ground是如前文特指“大地

”？还是指参考电位？或者有更广泛的含义？[016]

◎Don't allow shield current to exist (except as noted later in this article). The shield current will induce a voltage in the center

conductor.

屏蔽体内决不能有电流（后文所述情况除外），因为该电流会在被屏蔽体保护的电路中激发感应电压。[017]

◎Don't allow the shield to be at a voltage with respect to the reference potential (except in the case of a guard shield, to be described). The shield voltage will couple capacitively to the center conductor (or conductors in a multiple-conductor shield). With a noise voltage, Vs, on the shield, the situation is as shown in Figure 8.

屏蔽体与参考电位之间一定不能有电位差（本文后面所述的防护罩的情况除外）。屏蔽体与参考电位之间的电位差通过电容性耦合，将在被屏蔽电路中形成干扰。若屏蔽层对信号地的电压为Vs，此时的电路如图8所示。Figure 8.

Don’t permit the shield to be at a potential with respect to the signal

图8 屏蔽体与参考电位之间一定不能有电位差[018]

The fraction of Vs appearing at the output will be where V1 is the open-circuit signal voltage, Ro is the signal's source impedance, Csc is the cable's shield-to-conductor capacitance, and Req is the equivalent parallel resistance of Ro and RL. For example, if Vs = 1V at 1.5MHz, Csc = 200pF (10 feet of cable), Ro = 1000 ohms, and RL = 10k, the output noise voltage will be 0.86 volts. This is an

often-ignored guideline; serious noise problems can be created by inadvertently applying undesired potentials to

the shield.

因Vs产生的输出噪声电压Vo可由下式（1）得到：其中V1表示信号源开路电压，Ro是信号源的输出阻抗，Csc表示屏蔽体与被屏蔽电路间的容抗，Req表示Ro与负载RL的等效并联电阻。假设频率为1.5MHz时Vs=1V，Csc=200pF （与10英尺长的电缆等效），Ro=1k欧，RL=10k欧，则由（1）式计算得输出噪声电压为0.86V。这条准则经常被忽视，而屏蔽体上的电压将会带来不小的麻烦。[019]

◎Know by careful study how the noise current that bas been captured by the shield returns to "ground". An improperly returned shield can cause shield voltages, can couple into other circuits, or couple into other shields. The shield return should be as short as possible to minimize inductance.

干扰源会在屏蔽体上感应出电荷，因此一定要深入研究并掌握电荷的泄放路径。如果屏蔽体的泄放路径设计不当，屏蔽体上就会产生电压，继而通过耦合干扰被屏蔽的电路，或者影响其它的屏蔽体。为了减小感抗，屏蔽体的泄放路径必须尽可能地短。[020]

Here is an example that illustrates the problems that can arise in relation to these last two guidelines: Consider the improperly configured shield system shown in Figure 9, in

which a precision voltage source, V1, and a digital logic gate share a common shield connection. This situation can occur in a large system where analog and digital signals are cabled together.

下面举例说明违反最后两条准则的后果。图9所示的屏蔽设计存在缺陷——精密电压源V1的屏蔽体与逻辑门信号的屏蔽体直接相连。这种情况常见于模拟信号和数字信号用同一根电缆传输的场合。Figure 9. A situation that generates transient shield voltages

图9 一种会导致屏蔽体出现瞬变电压的错误设计[021]

A step voltage change in the output of the logic circuit couples capacitively to its shield, creating a current in the common 2-foot shield return. This, in turn, develops a shield voltage common to both the analog and digital shields. An equivalent circuit is shown in Figure 10, in which V(t) is a 5-volt step from a TTL logic gate, 470-pF capacitance from the shield to the center conductor of the shielded cable, and Rs and Ls are the 0.1-ohm resistance and 1-microhenry inductance of the 2-foot wire connecting the shield to the system ground.

逻辑电路的输出端会产生阶跃变化的电压信号，该信号将以电容耦合的方式进入屏蔽层，随即在2英尺长的屏蔽体泄放

路径中产生电流，这个电流又会对模拟信号屏蔽层和数字信号屏蔽层形成共模电压。图10给出了本例的等效电路，其

中V(t)表示TTL逻辑门输出的阶跃信号，摆幅为5V；Ro2

表示逻辑门的输出电阻，大小为13欧；Cws表示电缆屏蔽层与芯线间的寄生电容，大小为470pF；Rs和Ls表示连接屏蔽层与系统参考电位（[译者]系统地）之间导线的电阻和

电感，对于2英尺长的导线，这两个参数分别为0.1欧和1

毫亨。

[译者疑虑]“形成共模电压”的译法是否确切？Figure 10. Equivalent circuit for generating shield voltage.

图10 图9的等效电路[022]

The shield voltage, Vs(t), can be solved for by conventional circuit analysis techniques, or simulated by actually building and carefully making measurements on a circuit with the given parameters. For the purpose of demonstration, the calculated response waveform, illustrated in Figure 11, with a 5-volt initial spike, resonant frequency of 7.3 MHz, and damping time constant of

0.15us, is sufficient to illustrate the nature of the voltage that-appears on the shield and is capacitively coupled to

the analog input. If the voltage is looked at with a wideband oscilloscope, it will look like a noise "spike." We can see

that this transient will couple a fast damped waveform of significant peak amplitude to the analog system input.

屏蔽层的电压Vs(t)既可以根据电路理论计算，也可以按照所给出的参数先搭电路，再精确测量来获得。经理论计算，图11绘出了本例中屏蔽层电压的响应曲线，初始是一个幅值

5V的尖峰，谐振频率7.3MHz，衰减时间常数0.15us。该曲线可以充分反映屏蔽体上的电压信号的特征，以及对模拟信号输入端的耦合情况。用宽带示波器观察这个信号，会以为这不过是普通的“尖峰”干扰，殊不知这种瞬变信号会耦合到模拟电路中，形成快速衰减的、高幅值的噪声。Figure 11. Computed response of circuit of Figure 10.

图11 图10电路的理论响应曲线[023]

Even in a purely digital system, noise glitches can be caused to appear in apparently remote portions of a system having the kind of situation shown. This can often explain some otherwise inexplicable system bugs.

即使是纯数字电路，如果存在上例的错误，那么在相距较远的部件之间同样会出现因噪声引起的假信号，常常让电路出现莫名其妙的故障。[024]

In quite a few cases, the proper choice of shield connection among the many possibilities may not be immediately obvious, and the guidelines may not provide

us with a clear choice. There is no alternative but to analyze the various possibilities and choose the approach for which the lowest noise may be calculated.

当屏蔽体与参考电位的连接有多种可能，而且上文给出的准则不能直接套用的时候，要选出正确的方案，常常让人左右为难。这种情况相当常见，此时应当全面分析各种可能，选择一种令噪声影响最小的方案，除此之外别无他法。[译者语]每次看到这里，心都凉半截儿……----IC921：接地的学问和难度由此可心略见一斑[025]

For example, consider the case illustrated in Figure 12, in which the measurement system and the source have differing ground potentials. Should we connect the shield to A: the low side at the measurement-system input, B: ground at the system input, C: source, or D: the low side at the source?

以图12所示系统为例，图中测试电路和信号源的参考电位不一样。这时，屏蔽层应该连接到紧靠测试电路入口的低端A点、或是系统输入地B点、信号源附近的地C点还是信号源的低端D点呢？

[译者注]感谢IC921对ABCD译法的指点Figure 12. Possible grounds where system and source have differing ground potentials.

图12 系统与信号源的参考电位不同时，有四种可能的接地方案[026]

A is a poor choice, since noise current is allowed to flow in a signal through C4, is shown in Figure 13a.

A点是错误的。因为噪声电流将会通过C4直接进入信号传输线，等效电路如图13a所示。[027]

B is also a poor choice, since the 2 noise sources in series, VG1 and VG2, produce a component across the two signal wires, developed by the source impedance in parallel with C2, in series with C1, as shown in Figure 13b.

B点也不正确。如图13b所示，两个干扰源VG1和VG2串联起来，在两条信号线之间形成一个干扰源，信号源输出阻抗与C2并联，然后与C1串联。[028]

C is poor, too, since VG1 produces a voltage across the two signal wires, by the same mechanism as (B), as Figure 13c shows

C点同样不理想。VG1加在两条信号线之间，对电路的干扰模式与选择B点时差不多。[029]

D is the best choice, under the given assumptions, as can be seen connect the shield at the signal's reference potential

D点是最佳选择，等效电路如图13d所示。这不仅是因为本

例中别无选择，而且选择D点也符合上文给出的准则——将屏蔽层连接到信号源的参考电位。Figure 13. Equlvalent circuits.

图13 四种接法的等效电路NOISE RESULTING FROM A MAGNETIC FIELD

磁场感应噪声[030]

Noise in the form of a magnetic field induces voltage in a conductor or circuit; it is much more difficult to shield against than electric fields because it can penetrate conducting materials. A typical shield placed around a conductor and grounded at one end has little if any effect on the magnetically induced voltage in that conductor.

磁场形式的噪声会在导体或电路中感生出电压。因为磁场能够穿透导磁介质，所以与电场相比，磁屏蔽的难度要大得多。对于磁感应噪声，前文所述的那种用屏蔽体包裹导体，然后将屏蔽体单点接地的典型办法几乎无济于事。[031]

As a magnetic field, B, penetrates a shield, its amplitude decreases exponentially (Figure 14). The skin depth,

δ, of the shield material, is defined as the depth of penetration required for the field to be attenuated to 37% (exp (-1)) of its value in free air. Table 1[1] lists typical values of δ for several materials at various

frequencies. You can see that any of the materials will be more effective as a shield at high frequency, because

δ decreases with frequency, and that steel provides at least an order of magnitude more effective shielding at any frequency than copper or aluminum.

磁场在屏蔽介质中传播时，磁场强度将按照指数规律衰减（如图14）。如果磁场穿透某屏蔽体后，其强度衰减为自由辐射条件下（同样空间位置）的37%（exp-1），那么就将此屏蔽体的厚度定义为“表层厚度（skin depth）

”，用符号δ表示。表1[注1]列出了几种材料在不同频率条件下的δ典型值。表格数据表明，几种材料的δ值均随频率升高而降低，这说明用这些材料制成的屏蔽体在高频条件下的效果会更好。此外还可以看出，在所有频率点，钢的δ值都比铜和铝低一个数量级，这说明钢更适合用作磁屏蔽材料。Figure 14. Magnetic field in a shield as a function of penetration depth

图14 磁场在屏蔽体内传播时，其强度与屏蔽体厚度的函数关系[032]

Figure 15 compares absorption loss as a function of frequency for two thicknesses of copper and steel. 1/8-inch steel becomes quite effective for frequencies above 200 Hz, and even a 20-mil (0.5 mm) thickness of copper is

effective at frequencies above 1 MHz. However, all show a glaring weakness at lower frequencies, including 50-60-Hz line frequencies--the principal source of magnetically coupled noise at low frequency.

取相同厚度的钢和铜，并选择两种厚度进行不同频率下的磁场衰减特性测试，结果如图15所示。测试表明，当频率高于200Hz时，1/8英寸厚的钢就足以有效地衰减磁场；当频率高于1MHz时，只要20mil（0.5mm）厚的铜就能获得很好的屏蔽效果。不过，在低频条件下，包括50~60Hz的电力频段——这是低频磁耦合噪声的主要来源，这些材料的性能显然很差。Figure 15. Absorption loss vs. frequency for two thicknesses of copper and steel.

图15 两种厚度的铜和钢在不同频率下对磁场的衰减特性表1 不同频率下的δ值[1] Table 1 and Figures 15 and 16 are from Ott, H.W., Noise Reduction Techniques in Electronic Systems (New York: John Wiley & Sons, ©1976).

[注1] 表1、图15及图16摘自Ott, H.W. 《Noise Reduction Techniques in Electronic Systems》(New York: John Wiley & Sons, ©1976)。[033]

For improved low-frequency magnetic shielding, a shield consisting of a high-permeability magnetic material (e.g.,