数字设计答案

3.27

Conclusion:

a) Due to the load, the output current will exceed the 4 mA limit if output voltage lower than

0.33V is required. The operating range is exceeded.

b) Due to the load, the output current will exceed the 4 mA limit if output voltage lower than

0.33 V is required; Moreover, the output current exceeds the -4 mA limit if output voltage higher than 3.84 V is required. The operating range is exceeded.

c) Due to the load, the output current will exceeds the -4 mA limit if output voltage higher than 3.84 V is required. The operating range is exceeded.

Conclusion:

5% increase in power supply voltage results in 10% increase in power while 5% increase in internal and load capacitance results in only 5% increase in power. Therefore, the former has the bigger effect on the power consumption than the later does.

3.51

The CMOS AND-OR-INVERT gate has single level transistor while the CMOS AND gate has three level transistors. It takes more time for signal to propagate through three level transistors than single level transistors. Therefore, A CMOS AND-OR-INVERT gate is faster than a CMOS AND gate.

3.59

Static behavior

In problem 3.68:

Slightly short than the case without RL and VL.

3.72

Or

Solution of homework# 3

4.5

The priority of the calculation should be kept during the complementation us ing DeMorgan’s theorem. The conversion is wrong because the calculation priority has been changed.

4.6

a)

b)

c)

4.21

4.23

4.24

(T6‘)

(T8)

(T5‘)

(T6‘)

(T6)

(T11)

4.31

Using perfect induction for X1

T15 [X1 = 0]:

(T1)

(T6)

(T2‘)

(T6‘)

(T2)

(T6‘)

T15 [X1 = 1]:

(T1)

(T2‘)

(T6‘)

(T2)

(T6‘) T15‘ [X1 = 0]:

(T1‘)

(T1)

(T6)

(T2)

(T6) T15‘ [X1 = 1]:

(T1‘)

(T6‘)

(T1)

(T6)

(T2)

(T6)

Conclusion:

Shannon’s expansion theorem s are in any case true. Therefore, they are true.

4.34

Equation 1

Equation 2

(Equation 1) + (T1)

(Equation 2) + (T1‘)

(T8) + (T6‘)

(T3‘) + (T6‘)

(T6) + (T3‘)

(T3) + (T1)

(T6‘)

(T8)

(T5)

(T1‘)

(T4)

Equation 1

Equation 2

(Equation 1) + (T1)

(Equation 2) + (T1‘)

(T8) + (T6‘)

(T3‘) + (T6‘)

(T6) + (T3‘)

(T3) + (T1)

(T6‘)

(T8)

(T5)

(T1‘)

(T4)

Conclusion:

Equations and imply .

Equations and imply .

4.49

Original function:

Dual function (Swap ‘·‘ and ‘＋‘):

Dual of the dual function (Swap ‘·‘ and ‘＋‘):

Therefore:

Equation 1

Operator

Swap

(G D)D=G

(T8) + (T6‘)

(T5‘)

(T11)

Conclusion:

Function is self dual.

Solution of Homework # 4

4.9

a)

b)

c)

d)

e)

f)

XOR 4.36

XNOR

Yes, because 2-input AND gates, 2-input OR gates and the inverter gates, which form a complete set of logic gate, can be constructed with 2-input NAND gates as following:

AND

X ·

Y =((X ·Y)‘·(X ·Y)‘)‘

OR

X + Y = ((X ·X)‘·(Y ·Y )‘)’

Inverter X‘ = (X ·X)‘

4.45

Two intrinsic functions may be equivalent if their input range is limited.

The required functions have following properties:

P1 They are functions of three inputs: X, Y , Z;

P2 The outputs of two different functions are different

P2.1 for one or more input combinations, while P2.2 at least two inputs equal to 1

From property P1, each of those function is a sum of products of X, Y, Z:

, where coefficient can take the value of 0 or 1. Each collection of presents a function.

Therefore, the problem is converted into: how to select to construct the required functions. According to property P2, the selection criteria are: those functions should be still different from each other, even the range of the input combinations is restricted to where at least two of the inputs are 1. Let

1. BK be the binary representation of k;

2. {RK} be the range of k where k is no larger than 7 and at least two bits of BK equal to 1;

3. BIN be the corresponding binary number of an input combination;

4. {RIN} be the range of input combination where at least two bits of BIN equal to 1.

We obtain

Since

Therefore

The Minterm table of X, Y, Z is

1

2 0 1 0 X‘·Y·Z‘MinT2

3 0 1 1 X‘·Y·Z MinT3

4 1 0 0 X·Y‘·Z‘MinT4

5 1 0 1 X·Y‘·Z MinT5

6 1 1 0 X·Y·Z‘MinT6

7 1 1 1 X·Y·Z MinT7 Therefore,

[Equation 4.45]

Supposing two functions Fn and Fm written in the form [Equation 4.45] have different values, there is at least one coefficient, say , takes two different values in two functions. Those two functions can be expressed as:

At the input combination where BIN=BK,

Because is different from , is different from . Thus, any two functions written in form [Equation 4.45] with different values are different functions. Therefore functions expressed in [Equation 4.45] are the functions being looked for.

Since each can take value 1 or 0, each combination forms a function,

therefore 24 = 16 different functions: 4.50

Homework # 5

4.19

a)

Hazard condition:

Solution to eliminate hazard:

c)

Hazard condition:

Solution to eliminate hazard:

f)

Hazard condition:

Solution to eliminate hazard:

The sum of minterms of set {k} can be expressed as:

The product term contains two parts {m} and {i}, where variables in {m} have the same value. Therefore

Since variable in {i} take on all 2i possible combinations in {k},

We obtain:

A product term with reduced number of variables, which corresponds to a group of combined cells on Karnaugh map, appears.

4.52

2 x 0 x 1 1 x 1

3 x 0 0 1 x 1 1

4 0 x x 1 x x 1

5 0 x 0 x 1 1 1

6 0 0 x x 1 x 1

7 0 0 0 x x 1 1 others 0

4.56

4.60

4.61