UG832S3286KSG-PL中文资料

r e l i m i n a r y

N C O N F I D E N T I A L

SYNCHRONOUS DRAM MODULE

128M Bytes (32M x 32 bits)

PC100 SDRAM Unbuffered 100 Pin DIMM

based on 4 pcs 16M x 16 SDRAM with LVTTL, 4 banks & 8K Refresh

1 V SS 26 V SS 51 V SS 76 V SS

2 DQ0 27 CKE0 52 DQ8 77 CKE1

3 DQ1 28 /WE 53 DQ9 78 NC

4 DQ2 29 /CS0 54 DQ10 79 /CS1

5 DQ3 30 /CS2 55 DQ11 80 /CS3

6 V CC 31 V CC 56 V CC 81 V CC

7 DQ4 32 NC 57 DQ12 82 NC

8 DQ5 33 NC 58 DQ13 83 NC

9 DQ6 34 NC 59 DQ14 84 NC

10 DQ7 35 NC 60 DQ15 85 NC PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL

FEATURES

ABSOLUTE MAXIMUM RATINGS

? Voltage Relative to GND -0.3 to + 4.6V ? Operating Temperature 0 to + 70°C ? Storage Temperature -55°C to + 125°C ? Short circuit Output Current 50mA ? Power Dissipation 4W

Single 3.3V ± 10% power supply

Utilizes 100 MHz SDRAM components Burst Mode Operation

Data scramble (Sequential & Interleave)All inputs are sampled at the positive going edge of the system clock Two Clocks System

Auto & self refresh capability (8192 Cycles/64ms)LVTTL compatible inputs and output Serial PD with EEPROM

PCB:Height (1000mil),Double sided component

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? The UG832S3286KSG-PL/PH is a 32Mbits x 32 Sync DRAM module. The UG832S3286KSG-PL/PH is assembled using 4 pcs of 16M x 16 with 4 Banks Sync DRAMs in 54 pin TSOP packages mounted on 100 pin unbuffered printed circuit board.

GENERAL DESCRIPTION

Rev - A Product brief released.

Sept 26 , 2001

REVISION HISTORY

ORDERING INFORMATION

l i y

C O N F I

D N T I A L

Functional Block Diagram

Physical Dimension

V DD Vss

Two 0.33uF per each SDRAM

To all SDRAMs

A0 ~ A12, BA0 & BA1CKE0RAS CAS WE SDRAM U0 ~ U3SDRAM U0 ~ U3SDRAM U0 ~ U3SDRAM U0 ~ U3SDRAM U0 , U1Capacitors Note : ALL RESISTOR VALUES ARE 10 OHMS

0.050

0.150Max

0.050±0.0039

Detail C

0.250

Detail A

0.250

Detail B

0.200 M i n

( Front view )

( Back view )

Serial PD

SDA

SCL

A1A2

A0SA1SA2

SA0U0U2

1010W

CLK0

CLK1

CKE1

SDRAM U2 , U3

Tolerances : ± 0.005 unless otherwise specified Units : Inches