BL1532--Low-Power,Two-Port,High-Speed,USB2.0(480Mbps)DPDT Analog Switch(EN,V1.1)

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MOTOTRBO 专业数字两路无线电重复器 2 加速性能说明书

MOTOTRBO™PROFESSIONAL DIGITAL TWO-WAY RADIO REPEATERS2ACCELERATE PERFORMANCEMOTOTRBO ™ pROfESSIOnAl DIgITAl TWO-WAy RADIO SySTEM ThE fuTuRE Of TWO-WAy RADIO,employees and lower operating costs for your business.Motorola is a company of fi rsts with a rich heritage of innovation. We continue to invent what’s next connecting people, delivering mobility and making technology personal. Versatile and powerful,MOTOTRBO combines the best in two-way radio functionality with digital technology, making it the ideal communication solution for your business. You get enhanced features, increased capacity, integrated data applications, exceptional voice quality and extended battery performance. This means more productiveThE DIgITAl DIffEREncETwo-way radio has been a successful analogue communication solution for generations, and it proves itself every day in countless deployments around the world.But in today’s technologically advanced environment, a new platform is possible, a digital platform that breaks through to new levels of performance and productivity.In the same way digital technology has transformed other media, it is now revolutionising the way mobile professionals communicate. The time to take advantage of digital two-way radio technology is now.TAkE ADvAnTAgE Of DIgITAlDigital two-way radios offer several advantages over analogue solutions, to name a few:• C learer audio to help assure messages are understood without background noise and static• I ntegrated data applications such as text messaging, GPS-based location tracking, work order ticket management and much more • 40% longer battery life for extended work shifts• I ncreased capacity – twice the number of users for the price of one frequency licenseTDMA – ThE BEST chOIcEThere are two primary digital radio technologies: Time-Division Multiple-Access (TDMA) and Frequency-DivisionMultiple-Access (FDMA).While both digital technologies provide significant benefits over analogue, TDMA is the best choice.TDMA technology delivers advantages over fDMA• D ouble your capacity per channel with less than half the infrastructure per channelT DMA divides your existing channels into two time slots enabling you to double the number of users on your system or utilise data applications. A second call does not require a second repeater, resulting in lower costs for you, as you do not need to purchase, install and maintain additional infrastructure equipment.• D ouble your capacity without the hassleTDMA provides two time slots on your existing licensed channels, doubling your capacity. There is no increased risk of interference, and there is no need for new licenses, simply amend your existing licenses to specify digital. Compatibility with all legacy radios working in 12.5 kHz analogue channels is also maintained by TDMA.• L onger battery lifeTDMA uses only half of the transmitter’s capacity, resulting in longer battery life. During long work shifts or where productivity enhancing data applications place an increased power demand on the radio, this extended battery life is invaluable.• A dvanced featuresT DMA enables smart control features like “transmit interrupt” that makes it possible to interrupt lower priority communication so critical instructions can be delivered exactly when they’re needed. And to help you maximise your infrastructure investment, TDMA can transmit voice and data on the same channel.34MOTOTRBO offers a robust, standards-based solution that can be tailored to meet your unique coverage and feature needs. This versatile portfolio provides a complete system of portable radios, mobile radios, repeaters, accessories, data applications, and services, a comprehensive communication solution for your business. MOTOTRBO: unIQuE MOTOTRBO™SySTEM BEnEfITS fOR EnhAncED pRODucTIvITy• I ntegrates voice and data into one device to increase your operational effi ciency and support integrated applications including MOTOTRBO Text Messaging Services. Also features an integrated GPS module for use with third-party location-tracking applications.• U ses Time-Division Multiple-Access (TDMA) digital technology to provide twice the calling capacity (as compared to analogue or FDMA radios) for the price of one frequency license. A second call doesn’t require a second repeater, saving you equipment costs.• In digital mode, provides clearer voice communications throughout the coverage area, as compared to analogue radios, rejecting static and noise.• O ffers enhanced battery life. MOTOTRBO digital two-way portable radios can operate up to 40 percent longer between recharges compared to typical analogue radios.• P rovides easy migration from analogue to digital with the ability to operate in both analogue and digital modes.• E nables additional functionality including dispatch data, enhanced call signaling, basic and enhanced privacy-scrambling and option board expandability.• F eatures the transmit interrupt suite - voice interrupt, remote voice dekey, emergency voice interrupt or data over voice interrupt - to help prioritise critical communication exactly when needed.5MOTOTRBO InTEgRATED DATA EnABlES ADvAncED ApplIcATIOnSOnE DEvIcE fOR vOIcE AnD DATAIn addition to voice, MOTOTRBO supports text messaging, GPS location tracking capability, and custom applications from Motorola’s Professional Radio Application Partner Programme such as telephony, dispatch, work order ticket solutions and much more. MOTOTRBO keeps your employees connected to the information they need to be more effi cient, with the convenience of one device.cOnvEnIEnT AnD DIScRETE MOTOTRBO TEXT MESSAgIngText messaging enables your employees to quickly and easily share information when voice communication isn’t practical. It is ideal in loud environments, for delivering messages that don’t need an immediate response, or when voice communication could be disrupting to guests, students, customers, or patients.MOTOTRBO text messaging communicates between radios, radios and dispatch systems, and even radios to any email capable device.TRAck vEhIclES AnD pEOplE WITh InTEgRATED gpSEvery MOTOTRBO radio has an integrated GPS module to use for tracking people outside your facility, vehicles or other remote assets operating in your coverage area. Unlike other GPS capable radios, MOTOTRBO’s module is integrated into the handset so there is no clumsy additional equipment to attach, carry or maintain.This enables you to better manage your mobile work force and quickly respond to incidents by locating the nearest employee and dispatching them to the scene. It also makes it easier to manage your ﬂ eet so you can make deliveries and drive routes more effi ciently. For utility crews, taxi services, the hospitality industry, and countless other industries, the ability to see where your vehicles and employees are located with just a glance is invaluable. Your employees will be far more effi cient and your customer service can improve signifi cantly.cuSTOM DATA ApplIcATIOnS WITh MOTOROlA’S pROfESSIOnAl RADIOApplIcATIOn pARTnER pROgRAMMEMOTOTRBO which can accommodate custom data applications that adapt the radios to support your specifi c business tasks. You can, for example, work with third-party developers or your own IT staff to extend the functionality of MOTOTRBO using Motorola’s Professional Radio Application Partner Programme.With this development tool you can create unique applications such as a program to help you manage your work order tickets,to integrate your dispatch and billing systems, to link your MOTOTRBO radios to your telephone system, or to connect to email. MOTOTRBO is a powerful tool for communication with the ﬂ exibility to adapt to your work force, your customers and your business.678ADDITIOnAl fEATuRES• A utomated battery back-up capability• Expanded coverage across multiple sites with IP Site Connect*• I ncreased voice and data capacity with Capacity Plus single-site trunking*• D ynamic mixed mode capability allows for automatic switching between analogue and digital mode• R epeater diagnostic and control software provides remote or local site monitoringMOTOTRBO ™ SySTEM cOMpOnEnTS AnD BEnEfITSREpEATER STAnDARD pAckAgE• Repeater • AC Power Cord• Two-year Standard Warranty12561 1.2 S3 I4O 5l both channel slots.6R ack- or wall-mountable, compatible with desktop housing as well.7Sturdy handles make installation and handling easier.*Digital mode only9vhf/uhfDR 3000MOTOTRBO REpEATER SpEcIfIcATIOnSSpecifi cations subject to change without notice. All specifi cations shown are typical. Repeater meets applicable regulatory requirements.Channel Capacity16Typical RF OutputLow Power UHF1 and VHFHigh Power UHF2 (450-512 MHz)High Power UHF2 (512-527 MHz)High Power UHF1High Power VHF 1-25 W 1-40 W 1-25 W 25-40 W 25-45 WFrequency136-174 MHz (VHF)403-470 MHz (UHF1)450-527 MHz (UHF2)Dimensions (HxWxL)132.6 x 482.6 x 296.5 mm Weight14 kgVoltage Requirements 100-240 V AC (13.6 V DC)Current Drain:Standby>0.2A (100 V AC)>0.1A (240 V AC)>1.5A (typical) (13.4 V DC)Transmit Low Power High Power>2.0A (100 VAC)>1.0A (240 VAC)>9.0A (typical) (13.4 VDC)>2.5A (100 V AC)>1.25A (240 V AC)>12.0A (typical) (13.4 V DC)Operating Temperature Range -30°C to +60°C Max Duty Cycle 100%Digital ProtocolETSI-TS 102 361-1, 2 & 3Frequency136-174 MHz (VHF)403-470 MHz (UHF1)450-527 MHz (UHF2)Channel Spacing 12.5 kHz / 20 kHz / 25 kHz Frequency Stability( -30° C, +60° C, +25° C) +/- 0.5 ppmAnalogue Sensitivity0.30 uV (12 dB SINAD)0.22 uV (typical) (12 dB SINAD)0.4 uV (20 dB SINAD)Digital Sensitivity 5% BER: 0.3 uV Intermodulation70 dBAdjacent Channel Selectivity ************70 dB @ 20/25 kHz Spurious Rejection70 dB Audio Distortion @ Rated Audio 3% (typical)Hum and Noise *************-45 dB @ 20/25 kHz Audio Response+1, -3 dB Conducted Spurious Emission-57 dBm < 1GHzTransmitterFrequency136-174 MHz (VHF)403-470 MHz (UHF1)450-527 MHz (UHF2)Channel Spacing 12.5 kHz / 20 kHz / 25 kHz Frequency Stability( -30° C, +60° C, +25° C)+/- 0.5 ppmPower OutputLow Power UHF1 and VHFHigh Power UHF2 (450-512 MHz)High Power UHF2 (512-527 MHz) High Power UHF1High Power VHF 1-25 W 1-40 W 1-25 W 25-40 W 25-45 WModulation Limiting+/***************+/- 4 kHz @ 20 kHz +/- 5.0 kHz @ 25 kHz FM Hum and Noise*************-45 dB @ 20/25 kHz Conducted / Radiated Emission -36 dBm < 1 GHz -30 dBm > 1 GHz Adjacent Channel Power *************-70 dB @ 20/25 kHz Audio Response +1, -3 dB Audio Distortion 3%Digital Vocoder TypeAMBE+210ADDITIOnAl fEATuRES• C onvenient access to station ports, shortening installation and maintenance time• 12.5 or 25 kHz programmable channel spacing • 6.25e Compliant• I ntegrated 100W Power Amplifier and AC/DC Power Supply minimises cabling, rack space, expense, and overall complexity • Software based design simplifies feature upgrades • Power supply functions over a wide range of voltages• S upports MOTOTRBO Capacity Plus single site trunking without a separate hardware controller*• Expanded coverage across multiple sites with IP Site Connect*• R epeater diagnostic and control software provides remote or local site monitoring• Automated battery back up (charger sold separately)• Restriction of Hazardous Substances (RoHS) compliantMOTOTRBO ™ SySTEM cOMpOnEnTS AnD BEnEfITSBASE STATIOn / REpEATER STAnDARD pAckAgE• MTR3000 Base Station / Repeater • AC Power Cord• MOTOTRBO Repeater Installation Guide • Two-year Standard Warranty379854/ REpEATER1 12 345 lEDs clearly indicate transmit and receive modes and overall station status 6 Rack-or-cabinet mountable7 front access speaker port for serviceability ease 8 front access microphone port for routine service 9Standard uSB port for station configuration*Digital mode onlyMTR3000 BASE STATIOn / REpEATER SpEcIfIcATIOnSSpecifications subject to change without notice. All specifications shown are typical.Repeater meets applicable regulatory requirements.11MOTOROLA and the Stylised M Logo are registered in the U.S. Patent and Trademark Office. All other product or service names are the property of their registered owners. © Motorola, Inc. 2010Repeater-BROCH_UK (04/10)Motorola, Ltd. Jays Close, Viables Industrial Estate,Basingstoke, Hampshire, RG22 4PD, UK/mototrboFor more information please contact your local Motorola Authorised Dealer or DistributorSuBScRIBER REpAIRManaging the in-house repair and maintenance of your subscriber radios takes a dedicated staff of technicians, as well as anongoing investment in diagnostic equipment, repair tools, and the technical training to keep up to speed on the latest technology. Motorola has made that investment and can help you easily and cost effectively keep your radios in top operating condition to ensure optimal efficiency and productivity.Our subscriber repair service offering allows you to budget for your repairs, preventing unexpected service and maintenance costs. Extended Care Option repairs receive priority service and meet committed cycle times from our European Radio Service Centre.• Extended care Option (EcO):Extended Care Option is a post-warranty service offering that extends the service coverage of Motorola portable or mobile subscriber radios. ECO can be purchased as an option to new radio purchases and is available to extend service coverage for up to five years.• EcO Service Benefits:With our proven repair capability, you can be sure your equipment is expertly repaired and back in your end users’ hands quickly. Using the latest tools and with strict adherence to Motorola engineering procedures, our European Radio Support Center’s expert technicians diagnose and repair units to original manufacturing specifications. With the Extended Care Option, you receive:- Fast and committed turnaround times - Predictable budgets - Cost effective repairs - Peace of mindMOTOTRBO ™ SERvIcE OffERIngS。

APL5320

Copyright © ANPEC Electronics 1ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.•Wide Operating Voltage: 2.5~6V•Low Dropout Voltage: 290mV@3V/300mA •Fixed Output Voltages: 1.2~3.6V with Step 100mV,and 2.85V•Guaranteed 300mA Output Current •High PSRR: 70dB •Current-Limit Protection•Controlled Short Circuit Current: 50mA •Over-Temperature Protection•Stable with 1µF Capacitor for Any Load •Excellent Load/Line Transient•SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages•Lead Free and Green Devices Available (RoHS Compliant)The APL5320 is a P-channel low dropout linear regulator which needs only one input voltage from 2.5 to 6V, and delivers current up to 300mA to set output voltage. It also can work with low ESR ceramic capacitors and is ideal for using in the battery-powered applications such as note-book computers and cellular phones. Typical dropout volt-age is only 290mV at 300mA loading.The APL5320 provides several versions of fixed output voltages ranging from 1.2 to 3.6V with step 100mV and 2.85V. Current limit with current foldback and thermal shut-down functions protects the device against current over-loads and over temperature. The APL5320 is available in SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages.FeaturesGeneral DescriptionApplications•Cellular Phones•Portable and Battery-Powered Equipments •Laptops, Palmtops, Notebook Computers •Wireless LANs•Portable Information Appliances •GPSesPin ConfigurationSimplified Application CircuitGND 2 5 VOUT SHDN 34 NCVIN 1SOT23-5/SC-70-5(Top View)V OUTTDFN1.6x1.6-6(Top View)VTDFN1.2x1.6-4(Top View)VOUT = Exposed Pad(connected to ground plane for better heat dissipation)Copyright ©ANPEC Electronics 2Ordering and Marking InformationNote : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).SOT-23-5Note: X - Code.SC-70-5TDFN1.6x1.6-6APL5320Package CodeB : SOT-23-5 S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4Operating Ambient Temperature Range I : -40 to 85 o C Handling CodeTR : Tape & Reel Voltage Code12 : 1.2V 3.6 : 3.6V Assembly MaterialG : Halogen and Lead Free DeviceHandling Code Temperature Range Package CodeAssembly Material Voltage CodeCopyright ©ANPEC Electronics 3Ordering and Marking Information (Cont.)TDFN1.6x1.6-6 (Cont.)Note: X - Code.VTDFN1.2x1.6-4Note : X - Code.Absolute Maximum Ratings (Note 1)N ote 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Thermal CharacteristicsNote 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.Copyright © ANPEC Electronics Corp.4Recommended Operating Conditions (Note 3)Note 3 : Refer to the typical application circuit Electrical CharacteristicsUnless otherwise specified, these specifications apply over V IN =V OUT +1V, C IN =C OUT =1µF and T A =-40~85 o C. Typical values are at T A =25o C.Copyright © ANPEC Electronics Corp.5Electrical Characteristics (Cont.)Unless otherwise specified, these specifications apply over V IN =V OUT +1V, C IN =C OUT =1µF and T A =-40~85 o C. Typical values are at T A =25o C.Copyright ©ANPEC Electronics 6Typical Operating CharacteristicsQuiescent Current vs. TemperatureQ u i e s c e n t C u r r e n t (µA )343536373839404142Temperature (oC)PSRR vs. FrequencyDropout Voltage vs. Output CurrentP S R R (d B )Frequency (Hz)-80-60-40-200D r o p o u t V o l t a g e (m V )Output Current (mA)50100150200250300350400Output NoiseCurrent Limit Threshold vs. Input Voltage-200-100100200Time (ms)O u t p u t N o i s e (µV )Quiescent Current vs. Supply VoltageSupply Voltage (V)123456050100150200250300350Q u i e s c e n t C u r r e n t (µA )2.533.544.555.5400450500550600650700C u r r e n t L i m i t (m A )Input Voltage (V)6Copyright ©ANPEC Electronics 7Typical Operating Characteristics (Cont.)Current Limit Threshold vs. TemperatureQuiescent Current vs. Output CurrentOutput Current (mA)Q u i e s c e n t C u r r e n t (µA)4242.54343.54444.545C u r r e n t L i m i t (m A )Temperature (o C)300350400450500550600650700-40-25255075100125SHDN Pin Threshold Voltage vs.Supply VoltageE N P i n T h r e s h o l d (V )Supply Voltage (V)0.40.50.60.70.80.91.01.11.21.31.41.5Copyright © ANPEC Electronics Corp.8Operating WaveformsThe test condition is V IN =4.2V, T A = 25o C unless otherwise specified.Load Transient Response CH1: V OUT , 50mV/Div, DC, Offset=1.2V TIME: 20µs/DivV IN =4.2V, V OUT =1.2V, C IN =C OUT =1µF,I OUT =10mA to 300mA to 10mA (Rise/Fall time=1µσ)CH2: I OUT , 200mA/Div, DC Load Transient ResponseV OUTCH1: V OUT , 50mV/Div, DC, Offset=1.2V TIME: 20µs/DivV IN =4.2V, V OUT =1.2V, C IN =C OUT =1µF,I OUT =10mA to 150mA to 10mA (Rise/Fall time=1µσ)CH2: I OUT , 100mA/Div, DCLoad Transient Response I OUTV OUTI OUTCH1: V OUT , 20mV/Div, DC, Offset=1.2V TIME: 20µs/DivV IN =4.2V, V OUT =1.2V, C IN =C OUT =1µF,I OUT =10mA to 50mA to 10mA (Rise/Fall time=1µσ)CH2: I OUT , 50mA/Div, DCLine Transient ResponseV INV OUTCH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20µs/DivV IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µσ),V OUT =1.2V, C IN =C OUT =1µF, I OUT =100mA CH2: V OUT , 20mV/Div, DC, Offset=1.2VCopyright ©ANPEC Electronics 9Operating Waveforms (Cont.)The test condition is V IN =4.2V, T A = 25o C unless otherwise specified.Line Transient Response Line Transient ResponseV INV OUTV INV OUTExiting Shutdown Entering ShutdownV SHDNV OUTV SHDNV OUTCH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20µs/DivV IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µσ),V OUT =1.2V, C IN =C OUT =1µF, I OUT =50mA CH2: V OUT , 20mV/Div, DC, Offset=1.2V CH1: V IN , 500mV/Div, DC, Offset=3.8V TIME: 20µs/DivV IN =3.8V to 4.8V to 3.8V (Rise/Fall time=4µσ),V OUT =1.2V, C IN =C OUT =1µF, I OUT =10mA CH2: V OUT , 20mV/Div, DC, Offset=1.2V CH1: V SHDN , 2V/Div, DC TIME: 20µs/DivV IN =4.2V, V OUT =1.2V, C IN =C OUT =1µF,I OUT =10mACH2: V OUT , 500mV/Div, DC TIME: 10µs/DivCH2: V OUT , 500mV/Div, DC CH1: V SHDN , 2V/Div, DC V IN =4.2V, V OUT =1.2V, C IN =C OUT =1µF,I OUT =10mACopyright © ANPEC Electronics Corp.10Pin DescriptionBlock DiagramTypical Application CircuitShutdownAPL5320GNDSHDN VOUTVINCopyright © ANPEC Electronics Corp.11Function DescriptionInternal Soft-StartAn internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 60µs.Thermal ShutdownA thermal shutdown circuit limits the junction tempera-ture of APL5320. When the junction temperature exceeds +160o C, a thermal sensor turns off the output PMOS, al-lowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 40o C.The thermal shutdown is designed with a 40o C hysteresis to lower the average junction temperature during continuous ther-mal overload conditions, extending lifetime of the device.For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 125o C.Current-Limit with Current FoldbackThe APL5320 monitors the current via the output PMOS and limits the maximum current. When the output current reaches the current limit threshold, current limit with cur-rent foldback circuit starts to work to prevent load and APL5320 from damages during overload or short-circuit conditions. Typical foldback current is about 50mA.Shutdown ControlThe APL5320 has an active-low shutdown function. Forc-ing SHDN high (>1.5V) enables the V OUT low (<0.4V) disables the V OUT . The SHDN can not be left floating. If it is not used, connect it to VIN for normal operation.Under-Voltage Lock Out (UVLO)The APL5320 monitors the input voltage to prevent wrong logic control. The UVLO function initiates a soft-start pro-cess after input voltage exceeds its rising UVLO thresh-old during power on. The UVLO function also shuts off the output when the input voltage falls below it’s falling threshold.Copyright ©ANPEC Electronics 12Application InformationThe APL5320 requires proper input capacitors to supply surge current during stepping load transients to prevent the input rail from dropping. Because the parasitic induc-tor from the voltage sources or other bulk capacitors to the VIN limit the slew rate of the surge current, place the Input capacitors near VIN as close as possible. Input capacitors should be larger than 1µF and a minimum ceramic capacitor of 1µF is necessary.Output CapacitorThe APL5320 needs a proper output capacitor to main-tain circuit stability and improve transient response over temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger than 1µF. With X5R and X7R dielectrics, 1µF is sufficient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient re-sponse and PSRR, Figure 1 shows the curves of allow-able ESR range as the function of load current for various output capacitor values.Output Current (mA)R e g i o n o f S t a b l e C O U T E S R (Ω)Region of Stable C OUT ESR vs. Output Current0501001502002503000.0010.010.110Figure1. Stable C OUT ESR RangeOperation Region and Power DissipationThe APL5320 maximum power dissipation depends on the thermal resistance and temperature difference be-tween the die junction and ambient air. The TDFN1.6x1.6-6package power dissipation P D across the device is:P D = (T J - T A ) / θJAwhere (T J - T A ) is the temperature difference between the junction and ambient air. θJA is the thermal resistance between Junction and ambient air. Assuming the T A =25o C and maximum T J =160o C (typical thermal limit threshold),the maximum power dissipation is calculated as:P D (max)=(160-25)/165=0.81(W)For normal operation, do not exceed the maximum junc-tion temperature rating of T J =125o C. The calculated power dissipation should be less than:P D =(125-25)/165=0.6(W)The GND provides an electrical connection to the ground and channels heat away. Connect the GND to the ground by using a large pad or a ground yout ConsiderationFigure 2 illustrates the layout. Below is a checklist for your layout:1. Please place the input capacitors close to the VIN.2. Ceramic capacitors for load must be placed near the load as close as possible.3. To place APL5320 and output capacitors near the load is good for performance.4. Large current paths, the bold lines in figure 2, must have wide tracks.Figure2. Large Current Paths Shown as Bold LinesV OUTInput capacitorCopyright ©ANPEC Electronics 13Package InformationSOT-23-5MAX.0.0570.0510.0240.0060.0090.0200.012L 0.300e e1E1E D c b 0.080.300.600.0120.95 BSC 1.90 BSC 0.220.500.037 BSC 0.075 BSC0.003MIN.MILLIMETERS S Y M B O L A1A2A 0.000.90SOT-23-5MAX.1.450.151.30MIN.0.0000.035INCHES°8°0°8°VIEW AGAUGE PLANE SEATING PLANESEE VIEW A1.402.60 1.803.002.70 3.100.1220.0710.1180.1020.0550.106Note : 1. Follow JEDEC TO-178 AA.2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.Copyright © ANPEC Electronics Corp.14Package InformationSC-70-5S Y M B O L MIN.MAX.1.100.000.080.250.10A A1c D E E1e e1L MILLIMETERSb 0.150.300.65 BSC SC-70-50.150.450.026 BSC MIN.MAX.INCHES0.0430.0000.0310.0400.0030.0100.0060.01800o 8o0o8o0.004A20.80 1.000.0060.0121.30 BSC0.051 BSC1.902.200.0750.0872.00 2.401.151.350.0790.0950.0450.0530.800.031Note : 1. Followed from JEDEC MO-223 AB.2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.VIEW AGAUGE PLANESEATING PLANESEE VIEW ACopyright © ANPEC Electronics Corp.15Package InformationTDFN1.6x1.6-6MIN.MAX.0.800.000.200.300.95 1.050.050.55A A1b D D2E E2e K MILLIMETERS A30.20 REFTDFN1.6x1.6-60.20-0.650.008 REFMIN.MAX.INCHES0.0310.0000.0080.0120.0370.0410.0220.008-0.700.0260.0280.0020.50 BSC0.020 BSCS Y M B O L 1.55 1.650.0610.0651.55 1.650.0610.065L0.190.290.0070.011Copyright ©ANPEC Electronics 16Package InformationVTDFN1.2x1.6-40.500.0410.0200.60 BSC 0.024 BSC1.55 1.650.0610.0651.15 1.250.0450.049L0.100.300.0040.012S Y M B O L MIN.MAX.0.600.250.350.650.750.95A b D D2E E2e MILLIMETERS VTDFN1.2x1.6-41.05MIN.MAX.INCHES0.0240.0100.0140.0260.0300.037Copyright ©ANPEC Electronics Corp.17Carrier Tape & Reel DimensionsSECTION B-BSECTION A-A(mm)Copyright © ANPEC Electronics Corp.18(mm)Carrier Tape & Reel Dimensions (Cont.)Devices Per UnitTaping Direction InformationSOT-23-5SC-70-5USER DIRECTION OF FEEDUSER DIRECTION OF FEEDCopyright © ANPEC Electronics Corp.19Taping Direction Information (Cont.)TDFN1.6x1.6-6VTDFN1.2x1.6-4USER DIRECTION OF FEEDUSER DIRECTION OF FEEDCopyright ©ANPEC Electronics Corp.20Classification ProfileClassification Reflow ProfilesCopyright ©ANPEC Electronics Corp.Rev. A.4 - May., 2010APL532021Classification Reflow Profiles (Cont.)Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)Reliability Test ProgramCustomer ServiceAnpec Electronics Corp.Head Office :No.6, Dusing 1st Road, SBIP,Hsin-Chu, Taiwan, R.O.C.Tel : 886-3-5642000Fax : 886-3-5642050Taipei Branch :2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838Fax : 886-2-2917-3838。

lbp3500维修手册

Indicates an item requiring care to avoid electric shocks.
Indicates an item requiring care to avoid combustion (fire).
Indicates an item prohibiting disassembly to avoid electric shocks or problems.
1.3 Product Specifications ................................................................................................................................1- 1 1.3.1 Specifications .......................................................................................................................................................... 1- 1
1.4 Name of Parts.............................................................................................................................................1- 3 1.4.1 External View........................................................................................................................................................... 1- 3 1.4.2 Cross Section .......................................................................................................................................................... 1- 4

INTERSIL ISL1535 说明书

®ISL1535Dual Channel Central Office ADSL2+ Line DriverThe ISL1535 is a very low power dual channel differentiated amplifier designed for central office line driving for DMT ADSL2+ solutions. This device features a high drive capability of 600mA while consuming 5.2mA of supply current per amplifier from ±12V supplies. This driver achieves a typical distortion of less than -75dBc, at 1MHz into a 50Ω load. The ISL1535 is available in 28Ld HTSSOP package. This device is specified for operation over the full -40°C to +85°C temperature range.The ISL1535 has two control pins, C0 and C1, per channel. With the selection of C0 and C1, the device can be set into full-I S power, 3/4-I S power, 1/2-I S power, and power-down disable modes. The ISL1535 maintains excellent distortion and load driving capabilities even in the lowest power settings. The ISL1535 has extended bandwidth, low THD and high slew rate for ADSL2+ applications.Features•Drives 400mA at 16V P-P on ±12V supplies•21.4V P-P differential output drive into 100Ω•20.6V P-P minimum differential output drive into 60Ω•-75dBc typical driver output distortion driving 50Ω at 1MHz and 1/2-I S bias current•Quiescent current of 5.2mA per amplifier in 1/2-I S mode •100MHz BW at A V = 10•Current control pins to select power modes•Pin-to-pin replacement for EL1527 and EL1537•Pb-free plus anneal available (RoHS compliant) Applications•ADSL, ADSL2, ADSL2+ line drivers•G.SHDSL, HDSL2 line drivers•VDSL line drivers•Video distribution amplifiers•Video twisted-pair line driversOrdering Information PARTNUMBER (Note)PARTMARKINGTAPE&REELPACKAGE(Pb-free)PKG.DWG. #ISL1535IVEZ ISL1535 IVEZ-28 Ld HTSSOP MDP0048 ISL1535IVEZ-T13ISL1535 IVEZ13”28 Ld HTSSOP MDP0048 ISL1535IRZ1535 IRZ-24 Ld QFN MDP0046 ISL1535IRZ-T131535 IRZ13”24 Ld QFN MDP0046 NOTE:Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free ruirements of IPC/JEDEC J STD-020.PinoutsISL1535IRZ (24 LD QFN) TOP VIEWISL1535IVEZ (28 LD HTSSOP)TOP VIEWPin Descriptions28 LD HTSSOP24 LD QFN PIN NAME FUNCTION1, 1510, 22VS-Negative supply223C0AB (Note 1)DSL Channel 1 current control pin324C1AB (Note 1)DSL Channel 1 current control pin41VINB+Amplifier B non-inverting input52VINB-Amplifier B inverting input63VOUTB Amplifier B output7, 214, 16VS+Positive supply 8, 12, 13, 22, 26, 279, 21NC Not connected95VOUTC Amplifier C output106VINC-Amplifier C inverting input117VINC+Amplifier C non-inverting input14, 288, 20GND Ground connection1611C0CD (Note 2)DSL Channel 2 current control pin1712C1CD (Note 2)DSL Channel 2 current control pin1813VIND+Amplifier D non-inverting input1914VIND-Amplifier D inverting input2015VOUTD Amplifier D output2317VOUTA Amplifier A output2418VINA-Amplifier A inverting input2519VINA+Amplifier A non-inverting input NOTES:1.Amplifiers A and B comprise DSL Channel 1. C0AB and C1AB control I S settings for DSL Channel 1.2.Amplifiers C and D comprise DSL Channel 2. C0CD and C1CD control I S settings for DSL Channel 2.IMPORTANT NOTE:All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T J = T C = T AAbsolute Maximum Ratings (T A = +25°C)Thermal InformationV S + to V S - Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V V S + Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +33V V S - Voltage to Ground. . . . . . . . . . . . . . . . . . . . . . . . . .-33V to 0.3V Input C 0/C 1 to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V V IN + Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V S - to V S +Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA ESD RatingHuman Body Model (Per MIL-STD-883 Method 3015.7). . . . .3kV Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .100VContinuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-60°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+150°C Power Dissipation . . . .See Power Supplies and Dissipation section Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below /pbfree/Pb-FreeReflow.aspCAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.Electrical SpecificationsV S = ±12V, R F = 1.5k Ω, R L = 50Ω to GND, T A = +25°C, unless otherwise specified.PARAMETER DESCRIPTIONCONDITIONSMINTYPMAXUNITAC PERFORMANCE BW -3dB BandwidthA V = 10100MHz HD Total Harmonic Distortion f = 1MHz, V O = 16V P-P , R L = 50Ω-75dBc HD33rd Harmonic Distortion f = 2.2MHz, V O = 5.5V P-P , R L = 50Ω-58-55dBc dG Differential Gain A V = +2, R L = 37.5Ω0.11%d θDifferential PhaseA V = +2, R L = 37.5Ω0.1°SRSlew Rate, Single-Ended SignalV OUT from -4.5V to +4.5V270500V/µsDC PERFORMANCE V OS Offset Voltage -10+10mV ΔV OS V OS Mismatch -2.5+2.5mV R OLTransimpedanceV OUT from -9V to +9V1410M ΩINPUT CHARACTERISTICS I B +Non-Inverting Input Bias Current -25+25µA I B -Inverting Input Bias Current -10070µA ΔI B -I B - Mismatch -2020µA e N Input Noise Voltage 3.9nV √Hz i N ++Input Noise Current 4.7pA/√Hz i N --Input Noise Current 10pA/√Hz V IH Input High Voltage C 0 and C 1 inputs 2.0V V IL Input Low VoltageC 0 and C 1 inputs 0.8V I IH Input High Current for C 1or C 0C 1 = 5V, C 0 = 5V 50100200µA I ILInput Low Current for C 1or C 0C 1 = 0V, C 0 = 0V-11µAOUTPUT CHARACTERISTICS V OUT Loaded Output Swing Single-Ended R L = 100Ω to GND ±10.5±10.8V V OUT P Loaded Output Swing Single-Ended R L = 30Ω to GND 1010.4V V OUT N Loaded Output Swing Single-Ended R L = 30Ω to GND -10.4-10V I OUTOutput CurrentR L = 0Ω500mASUPPLY V SSupply VoltageSingle supply530V I S + (Full Power)Positive Supply Current per Amplifier All outputs at 0V, C 0 = C 1 = 0V 13.3mA I S - (Full Power)Negative Supply Current per Amplifier All outputs at 0V, C 0 = C 1 = 0V -13.0mA I S + (3/4 Power)Positive Supply Current per Amplifier All outputs at 0V, C 0 = 5V, C 1 = 0V 10.5mA I S - (3/4 Power)Negative Supply Current per Amplifier All outputs at 0V, C 0 = 5V, C 1 = 0V -10.2mA I S + (1/2 Power)Positive Supply Current per Amplifier All outputs at 0V, C 0 = 0V, C 1 = 5V 5.25 6.2mA I S - (1/2 Power)Negative Supply Current per AmplifierAll outputs at 0V, C 0 = 0V, C 1 = 5V -6.0-5.0mA I S + (Power Down) Positive Supply Current per Amplifier All outputs at 0V, C 0 = C 1 = 5V 0.50.75mA I S - (Power Down)Negative Supply Current per Amplifier All outputs at 0V, C 0 = C 1 = 5V -0.5-0.2mA I GNDGND Supply Current per AmplifierAll outputs at 0V0.25mAElectrical SpecificationsV S = ±12V, R F = 1.5k Ω, R L = 50Ω to GND, T A = +25°C, unless otherwise specified. (Continued)PARAMETER DESCRIPTIONCONDITIONSMINTYPMAXUNITVARIOUS R F (3/4-POWER MODE)VARIOUS R F (3/4-POWER MODE)VARIOUS R F (1/2-POWER MODE)VARIOUS R F (1/2-POWER MODE)VARIOUS C LOAD (1/2-POWER MODE)VOLTAGEDIFFERENTIAL OUTPUT AMPLITUDE (FULL POWER MODE)DIFFERENTIAL OUTPUT AMPLITUDE (FULL POWER MODE)DIFFERENTIAL OUTPUT AMPLITUDE (1/2-POWER MODE)DIFFERENTIAL OUTPUT AMPLITUDE (1/2-POWER MODE)FIGURE 22.DISABLE RESPONSE FIGURE 23.ENABLE RESPONSEFIGURE 24.SMALL STEP RESPONSE FIGURE RGE STEP RESPONSEFIGURE 26.PACKAGE POWER DISSIPATION vs AMBIENTTEMPERATURE FIGURE 27.PACKAGE POWER DISSIPATION vs AMBIENTTEMPERATUREJEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD1.136W1.20.40P O W E R D I S S I P A T I O N (W )1.004AMBIENT TEMPERATURE (°C)230.80.20.62521θJA = +110°C/WHTSSOP28θJA = +140°C/WQFN24893mWJEDEC JESD51-7 HIGH EFFECTIVE THERMALCONDUCTIVITY TEST BOARD - HTSSOP EXPOSED DIEPAD SOLDERED TO PCB PER JESD51-54.51.00P O W E R D I S S I P A T I O N (W )4.00150AMBIENT TEMPERATURE (°C)751253.00.52.025100503.52.51.54.167W85θJA = +30°C/WHTSSOP28θJA = +37°C/WQFN243.378WApplications InformationThe ISL1535 consists of two sets of high-power line driver amplifiers that can be connected for full duplex differential line transmission. The amplifiers are designed to be used with signals up to 4MHz and produce low distortion levels. A typical interface circuit is shown in Figure 28.The driver takes a differential signal and generate adifferential output. Each amplifier has identical positive gain connections for optimum common-mode rejection to occur. Further, DC input errors are duplicated, creating common-mode rather than differential line errors.Feedback Resistor ValueThe bandwidth and peaking of the amplifiers varies with feedback and gain settings. The feedback resistor values can be adjusted to produce an optimal frequency response.Table 1 lists the recommended resistor values which produce an optimal driver frequency response.Power Control FunctionThe ISL1535 contains two forms of power control operation. Two digital inputs (C 0 and C 1) can be used to control the supply current of the ISL1535 drive amplifiers. As the supply current is reduced, the ISL1535 will start to exhibit slightly higher levels of distortion and the frequency response will be limited. The four power modes of the ISL1535 are set up as shown in Table 2.See ISL1535 Application Notes for further information.FIGURE 28.TYPICAL LINE INTERFACE CONNECTION-+-+TXFR 1:250Ω50ΩR FR F 332Ω100R B R B V S -V S +V S -V S +1.5k Ω1.5k Ω2R GT X +T X -FROM AFE0.22µF0.22µFTABLE 1.OPTIMUM DRIVER FEEDBACK RESISTOR FORVARIOUS GAINSSUPPLY VOLTAGE DRIVER VOLTAGE GAIN510±12V @ Full Power 1.5k 1.5k ±12V @ 1/2 Power3k2kTABLE 2.POWER MODES OF THE ISL1535C 1C 0OPERATION00I S Full Power Mode 013/4-I S Power Mode 101/2-I S Power Mode 11Power DownAll Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.Intersil Corporation’s quality certifications can be viewed at /design/qualityIntersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.For information regarding Intersil Corporation and its products, see HTSSOP (Heat-Sink TSSOP) FamilyEND VIEWDETAIL XA20° - 8°GAUGE PLANE0.25LA1A L1QFN (Quad Flat No-Lead) Package FamilyPIN #1I.D. MARK213(N -2)(N -1)N (N /2)2X 0.075TOP VIEW (N /2)NE 231PIN #1 I.D.(N -2)(N -1)NbLN L E A D SBOTTOM VIEWDETAIL XPLANESEATING N LEADSCSEE DETAIL "X"A1(L)N LEADS& EXPOSED PAD0.10SIDE VIEW0.10BA M C CBAE2X 0.075CD357(E2)(D2)e0.08C C (c)A2CMDP0046QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY (COMPLIANT TO JEDEC MO-220)SYMBOL MILLIMETERSTOLERANCENOTESQFN44QFN3QFN32A 0.900.900.900.90±0.10-A10.020.020.020.02+0.03/-0.02-b0.250.250.230.22±0.02-c 0.200.200.200.20Reference -D 7.00 5.008.00 5.00Basic -D2 5.10 3.80 5.80 3.60/2.48Reference 8E7.007.008.00 6.00Basic -E25.10 5.80 5.80 4.60/3.40Reference 8e 0.500.500.800.50Basic -L 0.550.400.530.50±0.05-N 44383232Reference 4ND 11787Reference 6NE111289Reference5SYMBOL MILLIMETERSTOLER-ANCE NOTES QFN28QFN2QFN20QFN16A 0.900.900.900.900.90±0.10-A10.020.020.020.020.02+0.03/-0.02-b 0.250.250.300.250.33±0.02-c0.200.200.200.200.20Reference -D 4.00 4.00 5.00 4.00 4.00Basic -D2 2.65 2.80 3.70 2.70 2.40Reference -E 5.00 5.00 5.00 4.00 4.00Basic -E2 3.65 3.80 3.70 2.70 2.40Reference -e 0.500.500.650.500.65Basic -L 0.400.400.400.400.60±0.05-N 2824202016Reference 4ND 65554Reference 6NE87554Reference5Rev 11 2/07NOTES:1.Dimensioning and tolerancing per ASME Y14.5M-1994.2.Tiebar view shown is a non-functional feature.3.Bottom-side pin #1 I.D. is a diepad chamfer as shown.4.N is the total number of terminals on the device.5.NE is the number of terminals on the “E” side of the package (or Y-direction).6.ND is the number of terminals on the “D” side of the package (or X-direction). ND = (N/2)-NE.7.Inward end of terminal may be square or circular in shape with radius (b/2) as shown.8.If two values are listed, multiple exposed pad options are available. Refer to device-specific datasheet.。

BL1551

圳 DC Supply Voltage (VCC) …………………………………………….1.8V to 5.5V
Switch Input Voltage (VS) ………………………………………………...0V to VCC
深 Control Input Voltage (VENB)……………………………………………. 0V to VCC
SSS: production id
Pin Description
Pin Name
Type
VCC
PWR
GND
Ground
B
Input/Output
A1
Input/Output
A2
Input/Output
ENB
Input
Description Power Supply
Ground Data Port Data Port Data Port Logic Control Signal
公15.0
ns
NC OFF Capacitance NO OFF Capacitance
COFF(A1) COFF(A2)
f = 1MHz f = 1MHz
限5.5 5.5
pF pF
NC ON Capacitance NO ON Capacitance
CON(A1) CON(A2)
f = 1MHz f = 1MHz
RL = 50Ω, CL = 5pF,
f = 1MHz
安 Signal = 0dBm
f =10MHz
达 Vcc
300
MHz
-84
dB
-51
dB
1.8
5.5 V
Note:

HiBoost SLW Mobile Signal Booster User Manual

User Manual HiBoost S LW Mobile Signal BoosterWHAT IS INCLUDEDHiBoostSLWPro 25-5S -BTW 令12V/3A AC/DC Power S u ppl y 仁Booste 「Mount Ha 「dware We provide all accessories needed for the signal booster. For more information please visit WV 叩.Warning: Unauthorized antennas, cables, and/or coup l ing devices are prohibited by new FCC rules. Please contact FCC for details: 1-888-CALL-FCC.HOW IT WORKSThe HiBoost SL W signal booster is designed to help mobile users improve signal in homes, offices, and other areas where cellular signal is weak or unreliable. The outdoor antenna receives the signal from the nearest cellular tower, amplifies it, and transmits to the signal booster. Then the indoor antenna will receive the signal and retransmit it to your mobile device. The signals produced by your phone are also amplified by the indoor antenna via the booster and outdoor antenna.This manual provides simple installation instructions.HOW TO INSTALL YOUR SIGNAL BOOSTER1 . 1 OverviewThis manual will help you properly install your signal booster. It is important to read through all of the installation steps before installing your equipment. Thoroughly read through the instructions, visualize where all the equipment will need to be installed and do a soft installation by placing the devices where they need to be before mounting any equipment.H"1oosT ，0 HiBoost S LW Signal Booster 0 Indoor Antenna0 12V/3A, AC/DC Power Supply 8 Outdoor Antenna OCable1.2 Installation PreparationBefore you install•Make sure you have sufficient cable length between the proposed outdoor/indoor antenna location and booster connector.•Make sure the position you install the booster is near to an existing electrical outlet, well ventilated, and away from excessive heat, moisture, and direct sunlight.Tools RequiredI、·DPhillips Screwd「iver Drill Mobile Phone Before you get started, you will need to plan the layout of your system. This involves finding the location with the strongest received signal from the cellular tower, as well as antenna, booster, and cable placement.General installation steps:1.Find the strongest received signal for the location of the outdoor antenna.2.Install the outdoor antenna on the roof to obtain the strongest downlinkH"1oosTgain and power, and there are not any alarms (no ISO, ALC, OFF legend flashing and no quick flashing green or red in LED), it means the present location is the best for ensuring that the booster has maximized performance.The maximum downlink power for HiBoost SL W is 15dBm, and the maximum downlink gain is 72dB.Note: These showed values may vary dynamically at times between 1-3 dB which is normal due to outdoor signal conditions.•Mobile Phone MethodYou can use a telephone to test signal strength on the top of the building. The number of bars on the network indicator will define approximate strength of the received signal. Normally the roof of the building is the best place to receive the strongest signal. As shown on the drawing below, you need to test the signal in the points from A to E, and select the location with the best signal strength for outdoor installation. It is recommended to use a mobile app that can display in a test mode the signal level in dBm units. It is more accurate than checking the signal bars. For more details refer to /signal-strengthmeasure-1nstruct1ons/.＠Note: Please try to receive a signal from cell towers that are not overloaded with multiple users. This can be estimated by the population density in the area served by the tower. For example, it is recommended to avoid cell towers near supermarkets, shopping malls, stadiums or any other public places visited by many people regularly. This will help maintain reliable phone call connections and higher speed data services.Mark the strongest received signal as the installation location and direction for the outdoor antenna.1.4 Install Outdoor AntennaInstall the outdoor antenna at the the location with the strongest received signal. IMPORTANT: Testing the signal 3 times in the desired location before installing the outdoor antenna will help ensure the most smooth and stable phone calls and data transmission.“沿OOSTSPECIFICATION700MHz Band 12/17 698-716MHz728-746MHz700MHz Band 13 776-787MHz746-757MHz Frequen勺Range800MHz Band 5 824-849MHz 869-894MHzPCS1900 Band 25/2 1850-1915MHz 1930-1995MHzAWS2100 Band 4 1710-1755MHz 2110-2155MHz700MHz Band 12/17 18MHz700MHz Band 13 11MHzBand width 800MHz Band 5 25MHzPCS1900 Band 25/2 65MHzAWS2100 Band 4 45MHzMax. Gain 72dBMax. output power 17-24dBm15dBmMGC (Step Attenuation) ;;a, 25dB / 1dB stepPower Suppl yInput & Output Impedance Input AC 100-240 V, 50-60 Hz, Output DC 12 V / 3 A SO ohm1/0 Port Dimensions Weight N-Female8.7*7.3*2.2 inch/ 220*185*55 mm < 8.8 lbs/ 4 kgPRODUCT WARRANTY30-Day Money-Back: All HiBoost products are protected by a 30-day moneyback guarantee. If for any reason the performance of any product is not acceptable, the product may be returned to the reseller with a dated proof of purchase.3-Year Warranty HiBoost Signal Boosters and kits are warranted for 3 years.Customers can choose to return the Signal Boosters and kits directly to the manufacturer at the purchaser's expense with a dated proof of purchase and a Returned Material Authorization (RMA) number supplied by HiBoost.HiBoost will supply two options: repair or replace. Hi B oost will cover the cost of delivery for the consumers located within the continental U.S. This warranty does not apply to any Signal Boosters or kits determined by HiBoost to have been subjected to misuse, abuse, neglect, or mishandling that alters or damages physical or electronic properties. Failure to use a surge protected AC Power Strip with at least a 1000 Joule rating will void your warranty. Damage caused by lightning is not covered by this warranty. All HiBoost products that are packaged with other HiBoost accessory products are intended for resale and used as a single integrated system. Such product kits are required to be sold to the end users or subsequent reseller as packaged. RMA numbers may be obtained by contacting Technical Support at 972-870-5666.e＠。

DS_BL8551--CMOSLDO,150mA,24VInput（EN,V2.2）

DS_BL8551--CMOSLDO,150mA,24VInput（EN,V2.2）150mA CMOS High Input Voltage Low Consumption Regulator BL8551General Description ：BL8551 series is a group of positivevoltage output, high voltage input ,low power consumption, low dropout voltage regulator. It can affords 150mA output current when input- output voltage differential drops to 900mV 。

BL8551 can provide output value in the range of 2.5V~12V every 0.1V step. It also can customized on command.BL8551 includes high accuracy voltage reference, error amplifier, current limit circuit and output driver module.BL8551 has well load transient response and good temperature characteristic, which can assure the stability of chip and power system. And it uses trimming technique to guarantee output voltage accuracy within ±5%.BL8551 is available in SOT-89-5 with EN Pin and SOT-23-5 、TO-92、SOT-89 –3、SOT-23-3 without EN Pin.packages which is lead free.Features ： ? Low Power Consumption ：9uA （Typ.） ? High Output Current ： 150mASmall Input-Output Differential ： 900mV@150mA (Vout=3.3V) ? High input voltage (up to 24V) ? Highly Accuracy ：±5% Output Current Limit Applications ： ? Battery Powered equipment ? Communication equipment ? Audio/Video equipment Block Diagram ：Pin Description ：PIN NUMBERPIN NAME FUNCTION SOT-23SOT-25SOT-89-3SOT-89-5TO-921 1 12 1 Vss Ground3 2 2 5 2 Vin Supply voltage input 2 3 3 1 3 Vout Output Voltage －－－ 3 － CE Enable pin －－－4 －NCNo connectionSelection Guide ： BL8551-XX X X Pin Assignment ：Product Classification Pin ConfigurationBL8551-□□PRMBL8551-□□PTProduct Classification ：Product Name Output VoltagePackage TypePackage MarkingBL8551-25PRM 2.5V SOT-23BL8551-30PRM 3.0V SOT-23 BL8551-33PRM 3.3V SOT-23 BL8551-50PRM5.0V SOT-23 ---------- ---------- ---------- BL8551-12PRM 12V SOT-23 BL8551-25PRN 2.5V SOT-25BL8551-30PRN 3.0V SOT-25 BL8551-33PRN 3.3V SOT-25 BL8551-50PRN5.0V SOT-25 ---------- ---------- ---------- BL8551-12PRN 12V SOT-25 BL8551-25PSM 2.5V SOT-89-3BL8551-30PSM 3.0V SOT-89-3 BL8551-33PSM 3.3V SOT-89-3 BL8551-50PSM5.0V SOT-89-3 ---------- ---------- ---------- BL8551-12PSM 12V SOT-89-3 BL8551-25PSN 2.5V SOT-89-5BL8551-30PSN 3.0V SOT-89-5 BL8551-33PSN 3.3V SOT-89-5 BL8551-50PSN5.0V SOT-89-5 ---------- ---------- ---------- BL8551-12PSN 12V SOT-89-5 BL8551-25PT 2.5V TO-92BL8551-30PT 3.0V TO-92 BL8551-33PT 3.3V TO-92 BL8551-50PT 5.0V TO-92 ---------- ---------- ---------- BL8551-12PT12VTO-92Absolute Maximum Ratings ：Max input voltage ---------------------------------------------------------------------------------- 26V Junction Temperature (T J ) ----------------------------------------------------------------------- 125°C Ambient Temperature(T A ) ------------------------------------------------------------------------ -40°C ～85°C Power Dissipation SOT-23-3 ------------------------------------------------------------------------------------------ 0.25W SOT-23-5 ------------------------------------------------------------------------------------------ 0.25W SOT-89-3 ------------------------------------------------------------------------------------------ 0.5W SOT-89-5 ------------------------------------------------------------------------------------------ 0.5W TO-92 ---------------------------------------------------------------------------------------------- 0.2W Storage Temperature(Ts) ------------------------------------------------------------------------ -45°C ～150°C Lead Temperature and Time --------------------------------------------------------------------260°C,10SRecommended Work Conditions ：ItemMin RecommendedMax unit Input Voltage Range 24 V Ambient Temperature-40+125°CElectrical Characteristics ：（Test Conditions ：Cin=1uF,Cout=1uF,T A =25°C, Unless otherwise specified. ） Typical Application Circuit ：BL8551 is a series of low dropout voltage and low power consumption regulator. Its application circuit is very simple, which only needs two outside capacitors. It is composed of these modules: high accuracy voltage reference, current limit circuit, error amplifier, output driver and power transistor.Current Limit module can keep chip and power system away from danger when load current is more than 150mA.BL8551 uses trimming technique to assure the accuracy of output value within±5%.20mA1mAOutput CurrentOutput VoltageCout=0.1uF Vin=5.3VIout=20mA Cout=0.1uFInput Voltage5V10VOutput VoltageInput Transient ResponsePackage Outline：SOT-23-3:3000 Unit mm Package SOT-23-3 Devices perreelPackage dimension：Taping Specification：Taping reel dimension：SOT-23-5:3000 Unit mm Package SOT-23-5 Devices per reelPackage dimension：Taping Specification：Taping reel dimension：1000 Unit mm Package SOT-89-3 Devices per reelPackage dimension：Taping Specification：Taping reel dimension：Taping Specification：Taping reel dimension：TO-921000 Unit mm Package TO-92 Devices per BagPackage dimension：。

C55XCSL-LOWPOWER-2.01.00.00_Release_Notes_20100329

C55XCSL-LOWPOWER-2.01.00.00Release NotesTexas Instruments29 MAR 2010Table of Contents1.Purpose of Release (5)2.What’s New? (6)3.What is Being Released (7)4.Scope of this Release (7)5.Bug Fixes (7)6.Known Issues and Caveats (8)7.Installation Guide (8)8.Target Requirements for Testing (18)9.CSL Overview (19)9.1Introduction to CSL (19)9.1.1Benefits of CSL (19)9.1.2CSL Architecture (20)9.2Naming Conventions (21)9.3CSL Data Types (21)9.4CSL Functions (22)9.4.1Peripheral Initialization and Programming via Function Level CSL (23)9.4.2Example of DMA Control via Function Level CSL (24)9.5CSL Macros (27)9.6CSL Symbolic Constant Values (27)9.7Resource Management and the Use of CSL Handles (28)9.7.1Using CSL Handles (28)Figure 7-1 Opening and Building the CCS v3.3 Project (9)Figure 7-2 Connecting to Target and Loading CCS v3.3 Project Program (10)Figure 7-3 Running the CCS v3.3 Project Program (11)Figure 7-4 Selecting the CCS v4 Workspace (12)Figure 7-5 Starting the CCS v4 Workbench (12)Figure 7-6 Browsing for the CCS v4 Projects (13)Figure 7-7 Setting Active CCS v4 Project (14)Figure 7-8 Setting Active CCS v4 Build Configuration (15)Figure 7-9 Debugging the Active CCS v4 Project (16)Figure 7-10 Selecting the CCS v4 PLL Frequency (17)Figure 7-11 Running the CCS v4 Project’s Program on the Target (18)Figure 9-1 CSL Architecture (20)Table 9-1 CSL Modules and Include Files (20)Table 9-2 CSL Naming Conventions (21)Table 9-3 CSL Data Types (22)Table 9-4 Generic CSL Functions (22)Table 9-5 Using PER_init() (23)Table 9-6 Using PER_config (24)Table 9-7 Generic CSL Macros (27)Table 9-8 Generic CSL Symbolic Constants (28)1. Purpose of ReleaseThe purpose of this release is to add support in the Chip Support Library (CSL) software package forthe new TMS320C5504/05/14/15 DSPs now available as part of TI’s 55xx family of low power DSPs.This software is a modified version of that previously released for just the TMS320VC5504/05 DSPs. Thus, this version of CSL now supports all of the TMS320VC5504/05 and TMS320C5504/05/14/15DSPs. This version has been tested on both Code Composer Studio TM Ver3.3 and Code Composer Studio TM Ver4.0.This CSL release package contains the following modules. Beside the related CSL functions, each module also contains one or more “example” mini-applications that use and illustrate basic capabilities of the related CSL. These “examples” are listed under each module below.o DAT – Data Buffer Operations -- creating, filling, copying memory buffersCSL_DAT_Exampleo DMA – DMA Operations -- polled and interrupt-driven modes, even ping-pong buffers CSL_DMA_IntcExampleCSL_DMA_PingPongExampleCSL_DMA_PollExampleCSL_DMA_StopAPIExampleo drivers/SDIO – Secure Data IO Command and Data Functionssdio_drv_example.co GPIO – Control of General Purpose IOsCSL_GPIO_InputPinExampleCSL_GPIO_OutputPinExampleo GPT – Control of General Purpose TimersCSL_GPTExampleo I2C – Control of I2C PortsCSL_I2C_DmaExampleCSL_I2C_DmaWordSwapExampleCSL_I2C_IntcExampleCSL_I2C_LoopbackExampleCSL_I2C_PollExampleo I2S – Control of I2S PortsCSL_I2S_DMAExampaleCSL_I2S_INTCExampleCSL_I2S_PollExamplesyo INTC – Interrupt Control FunctionsCSL_INTC_Exampleo LCD - LCD Controller Setup & Control – initialize, write, and read LCD display via controllerCSL_LCDC_262kColorModeExampleCSL_LCDC_65kColorModeExampleCSL_LCDC_DiagramExampleCSL_LCDC_DmaIntcExampleCSL_LCDC_DmaPolledExampleCSL_LCDC_TextDisplayExampleo MEMORY – Basic Memory Control and ModesCSL_MEMORY_DARAM_PartialRetentionExampleCSL_MEMORY_DARAM_RetentionExampleCSL_MEMORY_SARAM_PartialRetentionExampleCSL_MEMORY_SARAM_RetentionExampleCSL_MSDRAM_ClockSwitchExampleo MMC_SD – Multi Media Card & Secure Data Card Interface ControlCSL_MMCSD_MmcCardExampleCSL_MMCSD_SdCardExampleCSL_MMCSD_SdCardFSExampleCSL_MMCSD_dmaExampleo NAND - Control of EMIF for Interfacing with NAND FlashCSL_NAND_DmaExampleCSL_NAND_DmaWordSwapExampleCSL_NAND_IntrExampleCSL_NAND_PollExampleo PLL – PLL Initialization and ControlCSL_PLL_Exampleo RTC – Real Time Clock ControlCSL_RTC_Compensation_ExampleCSL_RTC_Exampleo SAR – Initialization and Control of SAR AtoD IntpusCSL_SAR_DmaExampleCSL_SAR_IntcExampleCSL_SAR_PollExampleo SPI – Initialization and Control of SPI Serial PortsCSL_SPI_Exampleo UART – Initialization and Control of UART Serial PortsCSL_UART_IntExampleCSL_UART_dmaExampleCSL_UART_pollExampleo USB – USB Port Control – Basic USB operations plus Mass Storage Class (MSC) support CSL_USB_DmaExampleCSL_USB_ISO_fullSpeedExampleCSL_USB_ISO_highSpeedExampleCSL_USB_IntcExampleCSL_USB_MSC_dmaExampletCSL_USB_MSC_pollExampleCSL_USB_PollExamplesyo WDTIM – WatchDog Timer ControlCSL_WDT_Example2. What’s New?a.This release supports both VC5504/05 silicon (PG 1.4) and C5504/05/14/15 silicon (PG2.0). To generate a VC5504/5 build, in file c55x_csl\inc\csl_general.h near the top,simply uncomment “//#define CHIP_5505”. (Once done, the #define logic there ensuresthat CHIP_5505 is the only CHIP_xxxx macro defined.) On the other hand, to generate aC5504/05/14/15 build, comment out this same “#define CHIP_5505” near the top of filec55xx_csl\inc\csl_general.h. (e.g., with a beginning “//”). (Once done, the #define logicthere ensures that CHIP_5515 is the only CHIP_xxxx macro defined.) Note:csl_general.h is released in this latter state, with the #define CHIP_5505 commented out.Therefore, the default build target is the newer C5504/05/14/15 silicon.b. A new Secure Data IO (SDIO) driver has been added in this release within pathc55xx_csl\drivers\sdio. One SDIO Example application is also provided designed to workwith the SpecTec SDG-810 SDIO GPS Receiver ( /sdg810.htm).c.CSL 2.0 has added example functionality not found in CSL 1.0•DMAi.Extra/new example illustrating “ping pong” mode•LCDi.Extra/new example illustrating 56k color modeii.Extra/new example illustrating 252k color mode•Memoryi.Extra/new example illustrating DARAM partial* retention modeii.Extra/new example illustrating SARAM partial* retention modeiii.Extra/new example illustrating MSDRAM clock switchingd.CSL 2.0 has some new functions not found in CSL 1.0•MMCSDi.MMC_setEndianMode – sets endianess mode of MMCSD controller to little or big* “Partial” retention mode, new with C5504/05/14/15 (PG 2.0) silicon, allows finer-grained retention mode control than possible with VC5504/05 (PG 1.4) silicon. Specifically, any specific subset of the available memory banks can be placed in retention mode, not just all of them or none of them. More information is available in the C5504/05/14/15 data sheet.3. What is Being Released•Source code of all CSL Modules (as listed above in “Purpose of Release”). Source code is available in the path c55xx_csl\src and c55xx_csl\inc.•Sample applications, or “Examples,” which demonstrate basic CSL module functionalities. Examples for CCSv3.3 are available in the pathc55xx_csl\ccs_v3.3_examples. Examples for CCSv4.n are available in the pathc55xx_csl\ccs_v4.0_examples.•CSL API reference documentation. This documentation is available in the path c55xx_csl\doc\html_csl\. To begin, open file index.html with a browser.•Example application reference documentation. This documentation is available in the path c55xx_csl\doc\html_examples\. To begin, open file index.html with a browser.•Documentation on the new SDIO driver. This documentation is available in the path c55xx_csl\drivers\sdio\doc\html_sdio\.4. Scope of this ReleaseThis release provides the Chip Support Library (CSL), and related sample application Examples, forall the CSL modules listed in section 1 for both the TMS320VC5504/05 (PG 1.4) andTMS320C5504/05/14/15 (PG 2.0) DSPs.5. Bug FixesIn this release, the performance and robustness of the USB Mass Storage Class examples are improved. Within the CCS 3.3 projects, these are located under …/usb/example4/ as thecsl_usb_msc_dma_example and csl_usb_msc_poll_example. Within the CCS v4 projects, these are located within …/usb/CSL_USB_MSC_dmaExample and …/usb/CSL_USB_MSC_pollExample.6. Known Issues and Caveatsa.All LCD Examples for PG 2.0 silicon (C5504/05/14/15) are currently failingbecause of differences in the new C5515 EVM board’s LCD device versus that onthe older VC5505 EVM board.b.All NAND Examples for PG 2.0 silicon are currently failing because of differences inNAND chip selects used on the new C5515 EVM board versus the older VC5505EVM. This issue will be fixed in the next incremental release. Also, all NANDExamples, even for PG 1.4, currently are sensitive to NAND block size and willonly work for “big block” NAND devices. An example “small block” NAND devicewhich will not currently work is the Samsung K9F 1208 R0B.c.Even though now faster and more robust, some intermittent. enumerationproblems may occur with the USB MSC (Mass Storage Class) Examples. Weexpect this to be fixed completely by the next incremental release in mid April2010.d.As a whole, the set of Examples provided are currently designed to illustrate basicfunctionality of the related CSL functions upon which they call. As such, thecurrently provided Examples are, in general, not yet rigorously refined todemonstrate maximum system performance or robustness. In future releases, weplan to evolve these examples and/or add others that are specifically engineeredto showcase optimal power-and-performance behavior and high robustness.7. Installation GuideImportant Notes:For Running the Projects on VC5504/05 DSP:•Uncomment #define CHIP_5505 near the top of file c55xx_csl\inc\csl_general.h. (Once done, the #define logic there ensures that CHIP_5505 is the only CHIP_xxxx macro defined, which will cause your build to be tailored for VC5504/05 silicon.)•To run CCSv3.3 examples, configure your emulator target to use the gel filec55xx_csl\build\c5505evm.gel.•To run CCS v4 examples, first copy the contents of c55xx_csl\build\c5505evm.gel into c55xx_csl\ccs_v4.0_examples\c55xxevm.gel. Then, use this file c55xxevm.gel as yoursource of gel commands. (In your CCS v4 Example directories, your *.ccxml emulator target file is prebuilt to point to this gel file name.)For Running the Projects on C5504/05/14/15 DSP:•Make sure that #define CHIP_5505 near the top of file c55xx_csl\inc\csl_general.h. is commented out (e.g., with a beginning “//”). csl_general.h is released this way by default.With this line commented out, the #ifndef logic in csl_general.h #define’s the macroCHIP_5515 instead. This, in turn, causes your build, by default, to be tailored forC5504/05/14/15 silicon.•To run CCSv3.3 examples, configure your emulator target to use the gel filec55xx_csl\build\c5505evm_pg20.gel.• To run CCS v4 examples, first copy the contents of c55xx_csl\build\c5505evm_pg20.gel into c55xx_csl\ccs_v4.0_examples\c55xxevm.gel. Then, use this file c55xxevm.gel as your source of gel commands. (In your CCS v4 Example directories, your *.ccxml emulator target file is prebuilt to point to this gel file name.)Building and Running the CCSv3.3 Projects• For running the CCSv3.3 example projects, connect your 5505/5515 EVM, via a suitable emulator such as the “XDS510” or the EVM’s “Onboard” emulator, to CCS and load the .pjt file from c55xx_csl/ccs_v3.3_examples/<module>/<example#>. Build the project and load the program to the target. Run the program and observe the test result. Repeat the test at different PLL clock values. We recommend that you use CCS3.3.80.11 or newer on the host machine to build and run CSL examples. The “Update Advisor” in CCS v3.3 can help you update your version if needed.• The following figures illustrate the CCS v3.3 build and run process for the CCS v3.3 DMA “example1”. Begin by starting the CCSv3.3 IDE and browse to, select, and open, and build the project found in directory c55xx_csl\ccs_v3.3_examples\dma\example1\ .Figure 7-1 Opening and Building the CCS v3.3 Project The main DMA projectThe CSL library project.It is a dependent project of the main projectOpen the DMA project byProject Æ Open …• Connect to the target and load the project executable just built.Figure 7-2 Connecting to Target and Loading CCS v3.3 Project Program•Run the project executable and check the displayed results.Figure 7-3 Running the CCS v3.3 Project ProgramBuilding and Running the CCS v4 Projects• For running CCS v4 example projects connect your 5505/5515 EVM, via a suitable emulatorsuch as the “XDS510” or the EVM’s “Onboard” emulator, to CCS. To use the Onboardemulator, connect a USB A/B cable from your host PC’s USB port to port 'EMU USB'(J201) on the EVM. As released, all CCS v4 projects include at least an Onboard_xml file for using the Onboard emulator. (Other emulators, such as the XDS510, can also be used well but each requires a *.ccxml file specific to that emulator.)• Start the CCS4.0 IDE and select the c55xx_csl folder as the CCS work space while openingthen CCS v4 application.Execution result displayed hereExecute the DMA project byDebug Æ RunFigure 7-4 Selecting the CCS v4 Workspace•Click on the CCS logo (looks like a small Rubik’s cube) to start the CCS work benchFigure 7-5 Starting the CCS v4 Workbench•Select the menu Project/Import Existing CCS/CCE Eclipse Project. Browse for the c55xx_csl folder and click ok. All the CCS v4 projects will be displayed in the list of projects.Leave the “Copy projects into workspace” box unchecked. Click on “Finish”. Projects will be loaded to the CCS.Figure 7-6 Browsing for the CCS v4 Projects•Right click on the project that you want to test and select Set as Active Project.Figure 7-7 Setting Active CCS v4 Project•Right click on your active project and set the Active Build Configuration as either Debug or Release.(Both CCS v3.3 and CCS v4 support building programs in two distinct modes. Debug mode is used for building programs with little/no compiler optimization enabled. Resultantexecutables still retain full symbolic debugging information on variables and also linkage information between most points in the executable and the line(s) of source code from which each came. This information generally makes the code easier to debug but also makes it bigger and slower. Release mode, on the other hand, is used for building programs with high degrees of compiler optimization enabled. This eliminates much of the debug-supportive information described above from the executable but makes it smaller and faster.)Figure 7-8 Setting Active CCS v4 Build Configuration•Select the menu Target/Debug Active Project. Project will be built (if needed) and debugger will be opened.(The project will be (re)built here only if needed, as when a piece of involved source code has changed. If a (re)build does occur, you can monitor its progress in a special console sub-window that will open during the build. Any build errors will be reported there for your information. If the build completes without any issues, Figure 7-10, with the Debug view opened and the debugger ready to use, will appear next.)(Note that the menu Target/Debug Active Project recommended above includes an automatic project pre/re-build if needed before debug can commence. If you prefer, you can instead build the project in a separate step first by using menu Project/Build Active Project.)Figure 7-9 Debugging the Active CCS v4 Project•Select Scripts menu to set the PLL to the desired frequency. Note that, for VC5504/5 silicon, only speeds up to and including 100 MHz give reliable operation. For C5504/05/14/15 silicon, however, 120 MHz is also a reliable choice. (Also, under certain circumstances, we have noticed that the CCS v4 “Scripts” menu may remain unavailable until after you initially run the program once at the default PLL setting. Thereafter, it will be available for PLLadjustment.)Figure 7-10 Selecting the CCS v4 PLL Frequency•Select menu Target/Run to run the project.Figure 7-11 Running the CCS v4 Project’s Program on the Target8. Target Requirements for TestingOne important target specific requirement is to use a CSL build that is compatible with your silicon. For VC5504/05 silicon, uncomment #define CHIP_5505 near the top of filec55xx_csl\inc\csl_general.h. (Once done, the #define logic there ensures that CHIP_5505 is the only CHIP_xxxx macro defined, which will cause your build to be tailored for VC5504/05 silicon.) On the other hand, for C5504/05/14/15 silicon, make sure that #define CHIP_5505 near the top of filec55xx_csl\inc\csl_general.h. is commented out (e.g., with a beginning “//”). csl_general.h is, in fact,released this way by default. With this line commented out, the #ifndef logic in csl_general.h#define’s the macro CHIP_5515 instead. This, in turn, causes your build, by default, to be tailored for C5504/05/14/15 silicon.Additionally, it is recommended that you use versions of code gen tools and BIOS that are compatible with those used by us to test the CSL and Examples in this release. In general, we recommend that you use the following, or newer, versions. (If the comments in a particular example cite special tool version requirements, abide by those.)•CCS 3.3.80.11 “Platinum” using code generation tool v3.3.2 and DSP BIOS 5.33.05. The XDS510 USB Emulator is used to interact with the target to load and run the CCSv3.3 projects thereon.•CCS v4.0.2.01003 using code generation tool v4.3.2 and DSP BIOS 5.41.00.06. The EVM’s “Onboard” Emulator is used to interact with the target to load and run the CCS v4 projects thereon.9. CSL OverviewThis section introduces the Chip Support Library, describes its architecture, and provides an overview of the collection of functions, macros, and constants that help you program DSP peripherals.9.1 Introduction to CSLCSL is a collection of functions, macros, and symbols used to configure and control on-chip peripherals. It is fully scalable and functions much like a peripheral-specific layer of DSP/BIOS but does not require the use of specific DSP/BIOS components to operate.9.1.1 Benefits of CSLThe benefits of CSL include peripheral ease of use, shortened development time, portability, hardware abstraction, and a level of standardization and compatibility among devices. CSLcan be viewed as offering two fundamental levels of peripheral interface to users, a moreabstract function-level layer 1 offering a fairly high level of interfaces and protocols, and alower hardware-detailed register-level layer 2. offering direct symbolic access to allhardware control registers. These two layers are described below.1.Function Level CSL -- Higher level interfaces and protocols•Standard Protocol to Program Peripherals: CSL provides developers with a standard protocol to program on-chip peripherals. This protocol includes data types and macros todefine peripheral configurations, and functions to implement various operations of eachperipheral.•Basic Resource Management: Basic resource management is provided through the use of open and close functions for many of the peripherals. This is especially helpful forperipherals that support multiple channels.2.Register Level CSL -- Lower level register-manipulation interface•Symbolic Peripheral Descriptions: A complete symbolic detailed description of all peripheral registers and register fields has been created. It is suggested that developersuse the higher level protocols (of CSL layers b. and c.), as these are less device-specific,thus making it easier to migrate code to newer versions of DSPs.9.1.2 CSL ArchitectureCSL consists of modules that are built and archived into a library file. Each peripheral is coveredby a single module while additional modules provide general programming support. This architecture allows for future expansion because new modules can be added as new peripheralsemerge.Users have two levels of access to peripherals using CSL, register level access and function level access. All function CSL files have a name of the form csl_PER.c where PER is a placeholder for the specific peripheral. In a similar fashion, all register level files have a name of the form cslr_PER.h. The function level of CSL is implemented based on register level CSL. Users can use either level of CSL to build their applications. The following Figure 9-1 shows the architecture of CSL and its role in interfacing an application to the DSP hardware on which it executes.CSL APIDMA RTC SPI…USBDMAr RTCr SPIr…USBrVC5504/05 or C5504/05/14/15 DSP and peripheralsFigure 9-1 CSL ArchitectureTable 9-1 lists the key modules and related interface defining files within CSL.Table 9-1 CSL Modules and Include FilesPeripheralModule (PER)Description Include FileDAT A data copy/fill module based onthe DMA C5505csl_dat.hDMA DMAperipheral csl_dma.h GPIO General Purpose I/O csl_gpio.hGPT 32-bit General purpose timer csl_gpt.hI2C I2Cperipheral csl_i2c.h I2S I2Speripheral csl_i2s.h INTC InterruptController csl_intc.h LCDC LCDController csl_lcdc.hMEM Enable or Disable the Memorycsl_mem.hRetention Mode for SARAM andDARAMController csl_mmcsd.h MMC/SD MMC/SDMMC/SD ATAFS Interface to MMC/SD driver csl_mmcsd_at aIf.hflash csl_nand.h NAND NANDPLL PLL csl_pll.hRTC Real-timeclock csl_rtc.h SAR 10 bit SAR ADC csl_sar.hSDIO Secure Data I/O driver csl_sdio.hSPI SPI csl_spi.hUART UART csl_uart.hUSB USB core driver csl_usb.hUSB MSC USB MSC driver csl_msc.hUSB Audio USB Audio driver csl_audioClass.hTimer csl_wdt.hDogWDT Watch9.2 Naming ConventionsThe following conventions are used when naming CSL functions, macros, and data types. Note thatPER is used a placeholder for any of the specific module / peripheral names from Table 9-1 above.Table 9-2 CSL Naming ConventionsObject Type Naming ConventionFunction PER_funcName() Variable PER_varNameMacro PER_MACRO_NAMETypedef PER_TypenameFunction Argument funcArgStructure Member memberName•All functions, macros, and data types start with PER_ (where PER is the peripheral module name listed in Table 9-1) in uppercase letters.•Function names use all lowercase letters. Uppercase letters are used only if the function name consists of two separate words. For example, PER_getConfig().•Macro names use all uppercase letters; for example, DMA_DMPREC_RMK.•Data types start with an uppercase letter followed by lowercase letters, e.g., DMA_Handle.9.3 CSL Data TypesCSL provides its own set of data types that all begin with an uppercase letter. Table 9-3 lists CSLdata types as defined in the file …/c55xx_csl/inc/tistdtypes.h.Table 9-3 CSL Data TypesData Type DescriptionBool ShortInt ShortChar CharPtr void *String char *Uint32 unsigned longUint16 unsigned shortUint8 unsigned charInt32 LongInt16 ShortInt8 Char9.4 CSL FunctionsTable 9-4 provides a description of the most common CSL functions where PER indicates a peripheral module as listed in Table 9-1. Note that not all of the peripheral functions listed in the table are available for all modules / peripherals. Furthermore, some peripheral modules may offer additional peripheral-specific functions not listed in the table. Refer to the documentation in path c55xx_csl\doc\html_csl\index.html for a list of CSL functions offered for each module / peripheral.The following conventions are used in Table 9-4:•Italics indicate variable names.•Brackets [...] indicate optional parameters.o[handle] is required only for handle-based peripherals: such as DAT, DMA, SPI, MMC/SD and USB.CSL offers two fundamental ways to program peripherals•Directly write to hardware control registers using the lower CSLR layer• Use the more abstract functions (Table 9-4) of the higher CSL layer. For example, you can use PER_config() plus any other needed peripheral specific functions. See section 9.4.1 for more detail.Table 9-4 Generic CSL FunctionsFunction DescriptionPER_init(void) This function initializes and activates the SPImodule. It has to be called before any functioncallhandle = PER_open(…) Opens a peripheral channel and then performsthe operation indicated by the parameters;must be called before using a channel. Thereturn value is a unique device handle to use insubsequent API calls.PER_config([handle,] *configStructure) Initializes the peripheral based on thefunctional parameters included in theinitialization structure. Functional parametersare peripheral specific. This function may notbe supported in all peripherals. Please consultthe CSL API document for specific details.PER_start([handle,] … ) Starts the peripheral after it has beenconfigured using PER_config().PER_stop([handle,] …) Stops the peripheral after it has been startedusing PER_start().PER_reset([handle]) Resets the peripheral to its power-on defaultvalues.PER_close(handle) Closes a peripheral channel previously openedwith PER_open(). The registers for the channelare set to their power-on defaults, and anypending interrupt is cleared.PER_read(handle …) Read from the peripheral.PER_write(handle …) Write to the peripheral.9.4.1 Peripheral Initialization and Programming via Function Level CSLOn top of the register-level CSLR, CSL also provides higher level functions (Table 9-4) to initialize and to control peripherals. Using the CSL functional layer, relatively few function calls, each with appropriate parameters, can be used to control peripherals. This method provides a higher levelof abstraction than the direct register manipulation method of CSLR but generally at a cost oflarger code size and higher execution cycle count.Even though each CSL module may offer different parameter-based functions, PER_init() is the most commonly used. PER_init() initializes the parameters in the peripheral that are typically initialized only once in the application. PER_init() can then be followed by other module functions implementing other common run-time peripheral operations as shown in Table 9-5. Other parameter-based functions include module-specific functions such as the PER_config() function shown in Table 9-6.Table 9-5 Using PER_init()main() {...PER_init();...}Table 9-6 Using PER_configPER_config myConfig = {param_1, ..., param_n};main() {...PER_config (&myConfig);...}9.4.2 Example of DMA Control via Function Level CSLThe following example illustrates the use of CSL to initialize and use DMA channel 0 to copy a table from address 0x3000 to address 0x2000. Addresses and size of data to be moved are as follows.Source address: 2000h in data spaceDestination address: 3000h in data spaceTransfer size: Sixteen 16-bit single wordsThe example uses CSL functions DMA_init(), DMA_open(…), DMA_config(…), DMA_start(…),DMA_getStatus(…), and DMA_close(…). The next 9 steps illustrate the preparation and use of these functions in exercising control of the DMA operation.Step 1: Include the header file of the module/peripheral, use <csl_dma.h>. The different header files are shown in Table 2-1.#include "csl_dma.h"#include <stdio.h>Step 2: Define a DMA_Handle pointer and buffers. DMA_open will initialize this handle when a DMA channel is opened.#define CSL_DMA_BUFFER_SIZE 1024/* Declaration of the buffer */Uint16 dmaSRCBuff[CSL_DMA_BUFFER_SIZE];Uint16 dmaDESTBuff[CSL_DMA_BUFFER_SIZE];CSL_DMA_Handle dmaHandle;CSL_DMA_Config dmaConfig;CSL_DMA_Config getdmaConfig;CSL_DMA_ChannelObj dmaObj;status;CSL_StatusStep 3: Define and initialize the DMA channel configuration structure.dmaConfig.autoMode = CSL_DMA_AUTORELOAD_DISABLE;dmaConfig.burstLen = CSL_DMA_TXBURST_8WORD;dmaConfig.trigger = CSL_DMA_SOFTWARE_TRIGGER;。

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Low-Power, Two-Port, High-Speed, USB2.0 (480Mbps)DPDT Analog Switch BL1532DescriptionThe BL1532 is a Low-Power, Two-Port, High-Speed, USB2.0 (480Mbps) double –pole double-throw (DPDT) Analog Switch featuring an On-Resistance of 4.5 ohm at VCC=3V and a Low On Capacitance 3.7pf Typical.The BL1532 is compatible with the requirements of USB2.0 and the wide bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. Superior channel-to channel crosstalk also minimizes interference. Break-before-make function for both parts eliminates signal disruption during switching from preventing both switches being enabled simultaneously.The BL1532 contains special circuitry on the switch I/O pins for applications where the VCC supply is powered-off (VCC=0), which allows the device to withstand an over-voltage condition. This device is designed to minimize current consumption even when the control voltage applied to the Sel pin is lower than the supply voltage (VCC). This feature is especially valuable to ultra-portable applications, such as cell phones, allowing for direct interface with the general purpose I/Os of the baseband processor. Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers.Pin ConfigurationDp Dn GND Dn1 Dp1OEbVCCSelUTQFN1.8×1.4-10L MSOP10FeaturesWide Power Supply Range: 2.3V to 5VLow On Capacitance 3.7pf TypicalLow On Resistance 4.5Ω (typ) at 3V VDD when V SW=0.4VHigh Bandwidth (-3db): >720MHz without C L and >550MHz with C L=5pFLow Power Consumption: 1uA MaximumESD: pass 8kV HBM testOver voltage tolerance (OVT) on all USB ports up to 5.25V without external components TTL/CMOS CompatibleBreak-Before-Make SwitchingOperation Temperature Range: -40℃ to 85℃UTQFN1.8×1.4-10L and MSOP10 PackageApplicationsCell phone, PDAs, Digital camera, Notebook, LCD Monitor, TV, SET-TOP BOXBlock DiagramDpDn1DnDn2Function TableOEb Sel Function1 X Disconnect0 0 Dp, Dn=Dp1, Dn10 1 Dp, Dn=Dp2, Dn2Pin DescriptionPIN numPin Name Type DescriptionUTQFN10L MSOP101 3 Dp Input/Output USB Data BUS2 4 Dn Input/Output USB Data BUS3 5 GND Ground Ground4 6 Dn1 Input/Output Data Port5 7 Dp1 Input/Output Data Port6 8 Dn2 Input/Output Data Port7 9 Dp2 Input/Output Data Port8 10 OEb Input Switch enable9 1 VCC PWR Power Supply10 2 Sel Input Switch select ABSOLUTE MAXIMUM RATINGSParameter Symbol Min Max Units DC Supply Voltage VCC -0.5 5.5 VDC Switch Voltage Dpn / Dnn / Dp / Dn -0.5 VCC+ 0.3 VDC Input Voltage V Oeb / V Sel-0.5 VCC VContinuous Current I(Dpn/Dnn/Dp/Dn)-50 +50 mAPeak Current(1)I PEAK(Dpn/Dnn/Dp/Dn)-100 +100 mA Operating Temperature Range T A-40 85 ℃Notes:(1) Pulsed at 1ms, 50% duty circle(2) Stress beyond above listed “Absolute Maximum Ratings” may lead permanent damage to the device. These are stress ratings only and operations of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ORDERING INFORMATIONMODEL PIN- PACKAGESPECIFIEDTEMPERATURERANGEPACKAGEMARKINGPACKAGE OPTIONBL1532QN UTQFN1.8×1.4-10L - 40°C to +85°C HYW(1)Tape and Reel,3000BL1532MM MSOP10 - 40°C to +85°CH1GYWW Tape and Reel,3000WHERE(1):“HYW” IS 3 DIGITS PRODUCTION ID COLOUR: LASER MARKING“H” stands for the product BL1532.“Y”stands for the product year, for example, “1” stands for the year 2011.“W” stands for the product week, for example, “a” stands for the first week, “A” stands for the 27th week.DC ELECTRICAL CHARACTERISTICSGuaranteed Limit Parameter Symbol ConditionsMin. Typ.(1)Max.Unit Analog SwitchAnalog Signal Range V Pn/V Nn/V p/V n0 VCC VOn-Resistance(2)R ON VCC = 3V,V SW=0.4V,I ON=-8mA4.5 ΩOn-Resistance Match BetweenChannels(3)R△ONVCC = 3V,V SW=0.4V,I ON=-8mA0.1 ΩCurrentSource Off Leakage Current I Pn / Nn (OFF)VCC=3.6V,V p/V n= 3.6/0.3V,V Pn/V Nn=0.3/3.6V-1 1 uAChannel on Leakage Current I Pn / Nn (ON)VCC=3.6V,V p/V n= 3.6/0.3V,V Pn/V Nn=3.6/0.3V-1 1 uAPOWER OFF leakage current I OFF VCC = 0V,V SW=0V to 3.6V,Vcontrol=0 or VCC-1 1 uAQuiescent supply current I CCVCC=3V,Vcontrol=0 or VCC, Iout=01 uAIncrease in I CC current percontrol voltage and VCCI CCT VCC=3.6V, Vcontrol=2.6V 4 uAInput Leakage Current I OEb /Sel V OEb / Sel = 0 or VCC 1 uA Digital I/OInput Voltage High V IH VCC = 3.0-3.6V 1.6 V Input Voltage Low V IL VCC = 3.0-3.6V 0.5 V Note:(1)Typical characteristics are at +25°C(2)Measured by the voltage drop between Dpn/Dnn and Dp/Dn pins at the indicatedcurrent through the switch. On resistance is determined by the lower of the voltage onthe two (Dpn/Dnn and Dp/Dn ports).(3) R△ON= R ON(MAX) – R ON(MIN), between Dp and Dn .DYNAMIC CHARACTERISTICSGuaranteed Limit Parameter Symbol ConditionsMin. Typ. (1)Max.Unit DRIVER CHARACTERISTICSTurn-On Time t ON VCC=3.3V, R L=50omh，C L=5pF, V SW=0.8V10 30 nsTurn-Off Time t OFF VCC=3.3V, R L=50omh，C L=5pF,V SW=0.8V20 25 nsBreak-Before-Make Time t BBM VCC=3.3V, R L=50omh，C L=5pF,V SW1,2=0.8V2.0 3 6.5 nsPropagation Dalay t PD VCC=3.3V, R L=50omh，C L=5pF0.2 nsCAPACITANCEControl Capacitance C IN VCC=0V 1.5 pFON Capacitance C ON VCC = 3.3V,OE=0V,f=240MHz3.7 pFOFF Capacitance C OFF VCC = 3.3V,OE=3.3V,f=240MHz2.0 pFAPPLICATION CHARACTERISTICSVCC = 3.3V,R L=50omh,C L=0pF 720 MHz 3dB Bandwidth f3dBVCC = 3.3V,R L=50omh,C L=5pF 550 MHzOff Isolation(2)V IsoVCC = 3.3V,R L=50omh,f=250MHz-30 dBChannel crosstalk XTALKVCC = 3.3V,R L=50omh,f=250MHz-35 dBNote:(1) Typical characteristics are at 25°C(2) Off Channel Isolation = 20log10 [(V P1\P2)/V P] or 20log10 [(V N1\N2)/V N]TEST SETUP CIRCUITSFigure1. Test Circuit for On ResisterFigure2. Test Circuit for BandwidthFigure4. Test Circuit for Crosstalk5pFTest Circuit 5. Test Circuit for Switch TimesVSel50%Trise = Tfall = 2.5nsTest Circuit 5. Test Circuit for Break-Before-Make Time Delay, t BBM5pFTest Circuit 6. Test Circuit for Propagation Delay, tPDBL1532—DPDT USB2.0 Analog Switch APPLICATION NOTEMeeting USB 2.0 V BUS Short Requirements(1) Power-Off ProtectionFor a V BUS short circuit the switch is expected to withstand such a condition for at least 24 hours. The BL1532 has the specially designed circuit which prevents unintended signal bleed through as well as guaranteed system reliability during a power-down, over-voltage condition. The protection has been added to the common pins (Dp, Dn).(2) Power-On ProtectionThe USB 2.0 specification also notes that the USB device should be capable of withstanding a V BUS short during transmission of data. This modification works by limiting current flow back into the VCC rail during the over-voltage event so current remains within the safe operating range.PACKAGE OUTLINE DIMENSIONS UTQFN1.8×1.4-10LBY MARKING TOP VIEW0.5。