SN74LVC240ADBRE4中文资料

FEATURESDB, DGV, DW, NS, OR PW PACKAGE(TOP VIEW)1 2 3 4 5 6 7 8 9 1020 19 18 17 16 15 14 13 12 111OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND V CC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1DESCRIPTION/ORDERING INFORMATIONSN74LVC240AOCTAL BUFFER/DRIVERWITH3-STATE OUTPUTS SCAS293K–JANUARY1993–REVISED FEBRUARY2005•Operates From1.65V to3.6V•Inputs Accept Voltages to5.5V•Max t pd of6.5ns at3.3V•Typical V OLP(Output Ground Bounce)<0.8V at V CC=3.3V,T A=25°C•Typical V OHV(Output V OH Undershoot)>2V at V CC=3.3V,T A=25°C•Supports Mixed-Mode Signal Operation on AllPorts(5-V Input/Output Voltage With3.3-V V CC)•I off Supports Partial-Power-Down-ModeOperation•Latch-Up Performance Exceeds250mA PerJESD17•ESD Protection Exceeds JESD22–2000-V Human-Body Model(A114-A)–200-V Machine Model(A115-A)–1000-V Charged-Device Model(C101)This octal buffer/driver is designed for1.65-V to3.6-V V CC operation.The SN74LVC240A is designed specifically to improve the performance and density of3-state memory address drivers,clock drivers,and bus-oriented receivers and transmitters.This device is organized as two4-bit buffers/drivers with separate output-enable(OE)inputs.When OE is low, the device passes data from the A inputs to the Y outputs.When OE is high,the outputs are in the high-impedance state.Inputs can be driven from either3.3-V or5-V devices.This feature allows the use of this device as a translator in a mixed3.3-V/5-V system environment.To ensure the high-impedance state during power up or power down,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using I off.The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKINGTube of25SN74LVC240ADWSOIC–DW LVC240AReel of2000SN74LVC240ADWRSOP–NS Reel of2000SN74LVC240ANSR LVC240ASSOP–DB Reel of2000SN74LVC240ADBR LC240A–40°C to85°CTube of70SN74LVC240APWTSSOP–PW Reel of2000SN74LVC240APWR LC240AReel of250SN74LVC240APWTTVSOP–DGV Reel of2000SN74LVC240ADGVR LC240A(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.1A11A21A31A41Y12A12A22A32A42Y11Y21Y31Y42Y22Y32Y41OE2OESN74LVC240AOCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTSSCAS293K–JANUARY 1993–REVISED FEBRUARY 2005FUNCTION TABLE (EACH 4-BIT BUFFER)INPUTS OUTPUTYOE A L H L L L H HXZLOGIC DIAGRAM (POSITIVE LOGIC)Absolute Maximum Ratings(1) Recommended Operating Conditions(1)SN74LVC240AOCTAL BUFFER/DRIVERWITH3-STATE OUTPUTS SCAS293K–JANUARY1993–REVISED FEBRUARY2005over operating free-air temperature range(unless otherwise noted)MIN MAX UNIT V CC Supply voltage range–0.5 6.5VV I Input voltage range(2)–0.5 6.5VV O Voltage range,applied to any output in the high-impedance or power-off state(2)–0.5 6.5VV O Voltage range,applied to any output in the high or low state(2)(3)–0.5V CC+0.5VI IK Input clamp current V I<0–50mAI OK Output clamp current V O<0–50mAI O Continuous output current±50mAContinuous current through V CC or GND±100mADB package70DGV package92θJA Package thermal impedance(4)DW package58°C/WNS package60PW package83T stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD51-7.MIN MAX UNITOperating 1.65 3.6V CC Supply voltage VData retention only 1.5V CC=1.65V to1.95V0.65×V CCV IH High-level input voltage V CC=2.3V to2.7V 1.7VV CC=2.7V to3.6V2V CC=1.65V to1.95V0.35×V CCV IL Low-level input voltage V CC=2.3V to2.7V0.7VV CC=2.7V to3.6V0.8V I Input voltage0 5.5VHigh or low state0V CCV O Output voltage V3-state0 5.5V CC=1.65V–4V CC=2.3V–8I OH High-level output current mAV CC=2.7V–12V CC=3V–24V CC=1.65V4V CC=2.3V8I OL Low-level output current mAV CC=2.7V12V CC=3V24∆t/∆v Input transition rise or fall rate6ns/V T A Operating free-air temperature–4085°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs,literature number SCBA004.Electrical CharacteristicsSwitching CharacteristicsOperating CharacteristicsSN74LVC240AOCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTSSCAS293K–JANUARY 1993–REVISED FEBRUARY 2005over recommended operating free-air temperature range (unless otherwise noted)PARAMETERTEST CONDITIONSV CCMIN TYP (1)MAXUNITI OH =–100µA 1.65V to 3.6VV CC –0.2I OH =–4mA1.65V 1.2I OH =–8mA2.3V 1.7V OHV2.7V 2.2I OH =–12mA 3V 2.4I OH =–24mA 3V 2.2I OL =100µA 1.65V to 3.6V0.2I OL =4mA1.65V 0.45V OLI OL =8mA 2.3V 0.7V I OL =12mA 2.7V 0.4I OL =24mA3V 0.55I I V I =0to 5.5V 3.6V ±5µA I off V I or V O =5.5V 0±10µA I OZ V O =0to 5.5V 3.6V ±10µA V I =V CC or GND 10I CC I O =03.6V µA 3.6V ≤V I ≤5.5V (2)10∆I CC One input at V CC –0.6V,Other inputs at V CC or GND2.7V to3.6V500µA C i V I =V CC or GND 3.3V 4pF C oV O =V CC or GND3.3V5.5pF (1)All typical values are at V CC =3.3V,T A =25°C.(2)This applies in the disabled state only.over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)V CC =1.8V V CC =2.5V V CC =3.3V V CC =2.7V FROM TO ±0.15V ±0.2V ±0.3V PARAMETERUNIT (INPUT)(OUTPUT)MINMAXMINMAXMINMAX MIN MAX t pd A Y (1)(1)(1)(1)7.5 1.3 6.5ns t en OE Y (1)(1)(1)(1)9 1.18ns t dis OEY(1)(1)(1)(1)81.47ns t sk(o)1ns(1)This information was not available at the time of publication.T A =25°CV CC =1.8VV CC =2.5VV CC =3.3VTEST PARAMETERUNIT CONDITIONS TYPTYPTYP Outputs enabled (1)(1)32C pd Power dissipation capacitancef =10MHzpFOutputs disabled(1)(1)3(1)This information was not available at the time of publication.PARAMETER MEASUREMENT INFORMATIONFrom Output Under TestLOAD CIRCUITOpen Data InputTiming InputV I0 VV I0 V0 VInputVOLTAGE WAVEFORMS SETUP AND HOLD TIMESVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMS PULSE DURATIONV OHV OHV OLV OLV I0 V InputOutput Waveform 1S1 at V LOAD (see Note B)Output Waveform 2S1 at GND (see Note B)V OLV OH V LOAD /20 V≈0 VV IVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLINGOutputOutputt PLH /t PHL t PLZ /t PZL t PHZ /t PZHOpen V LOAD GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 Ω.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.All parameters and waveforms are not applicable to all devices.Output Control V I1.8 V ± 0.15 V2.5 V ± 0.2 V2.7 V3.3 V ± 0.3 V1 k Ω500 Ω500 Ω500 ΩV CC R L 2 × V CC 2 × V CC 6 V 6 VV LOAD C L 30 pF 30 pF 50 pF 50 pF0.15 V 0.15 V 0.3 V 0.3 VV ∆V CC V CC 2.7 V 2.7 VV I V CC /2V CC /21.5 V 1.5 VV M t r /t f ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 nsINPUTS SN74LVC240AOCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTSSCAS293K–JANUARY 1993–REVISED FEBRUARY 2005Figure 1.Load Circuit and Voltage WaveformsPACKAGING INFORMATIONOrderableDevice Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)SN74LVC240ADBLE OBSOLETE SSOP DB 20TBDCall TI Call TISN74LVC240ADBR ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADBRE4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADBRG4ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADGVR ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADGVRE4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADGVRG4ACTIVE TVSOP DGV 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADWE4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADWG4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADWR ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADWRE4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ADWRG4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ANSR ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ANSRE4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240ANSRG4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWE4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWG4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWLE OBSOLETE TSSOP PW 20TBDCall TI Call TISN74LVC240APWR ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWRE4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWRG4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWT ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWTE4ACTIVE TSSOP PW 20250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC240APWTG4ACTIVETSSOPPW20250Green (RoHS &CU NIPDAULevel-1-260C-UNLIM4-Jun-2007Orderable DeviceStatus (1)Package Type Package DrawingPins Package QtyEco Plan (2)Lead/Ball FinishMSL Peak Temp (3)no Sb/Br)(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information maynot be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.4-Jun-2007TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LVC240ADBR DB 20SITE 41330168.27.5 2.51216Q1SN74LVC240ADGVR DGV 20SITE 41330127.0 5.6 1.6812Q1SN74LVC240ADWR DW 20SITE 413302410.813.0 2.71224Q1SN74LVC240ANSR NS 20SITE 41330248.213.0 2.51224Q1SN74LVC240APWRPW20SITE 41330166.957.11.6816Q14-Oct-2007DevicePackage Pins Site Length (mm)Width (mm)Height (mm)SN74LVC240ADBR DB 20SITE 41346.0346.033.0SN74LVC240ADGVR DGV 20SITE 41346.0346.029.0SN74LVC240ADWR DW 20SITE 41346.0346.041.0SN74LVC240ANSR NS 20SITE 41346.0346.041.0SN74LVC240APWRPW20SITE 41346.0346.033.04-Oct-2007IMPORTANT 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