MCS-51单片机_英文全称
物流机电技术知到章节答案智慧树2023年山东交通学院
物流机电技术知到章节测试答案智慧树2023年最新山东交通学院第一章测试1.标有额定值为“220V、100W”和“220V、25W”的白炽灯两盏，将其并联后接入220V工频交流电源上，其亮度为（）。
参考答案:一样亮2.已知空间有a、b两点，电压Uab=8V，a点电位Va=4V，则b点电位Vb为（）。
参考答案:-4V3.一电阻R上的u、i参考方向不一致，令u=-10V，消耗功率为1W，则电阻R为（）。
参考答案:100Ω4.某电阻的额定数据为“1KΩ、250W”，正常使用时允许流过的最大电流为（）。
参考答案:500mA5.电压和电流计算结果得负值，说明它们的参考方向假设反了。
（）对第二章测试1.如图所示电路，二极管D1和D2的工作状态为（）。
参考答案:D1和D2均导通2.半导体二极管加正向电压时，有（）现象。
参考答案:电流大电阻小3.在N型半导体中，电子是多数载流子，空穴是少数载流子。
（）参考答案:对4.PN结具有单向导通特性；稳压二极管的稳压区在其伏安特性曲线的反向击穿区内。
（）对5.在常温下，硅二极管的门槛电压约为0.5V，导通后在较大电流下的正向压降约为0.7V。
（）参考答案:对第三章测试1.十六进制数（8F）16对应的十进制数是（）。
参考答案:1432.与非门输出为低电平时，需满足（）。
参考答案:所有输入端都是高电平3.一个4位二进制计数器的最大模数是（）。
参考答案:164.十进制数（99） = (1100011)二进制数 = (60)十六进制数。
（）错5.数字电路按照其结构和工作原理分为两大类：组合逻辑电路和时序逻辑电路。
（）参考答案:对第四章测试1.以下不属于单片机的行业应用的是（）。
参考答案:个人电脑PC2.单片机全称是单片微型计算机，英文全称是single chip microcomputer。
（）参考答案:对3.单片机将微型计算机的各个功能部件：中央处理器CPU、随机存储器RAM、只读存储器ROM、定时器/计数器，及I/O接口电路集成在一块芯片上，构成的一个完整的微型计算机。
单片机英文缩写的全称
单片机缩写的英文全称英文缩写：MCS-51：Micro Computer System-51PSW（Processor Status Word）中的标志位：CY：CarryAC：Auxiliary CarryF0：Flag 0RS：Register SelectOV：OverflowP：Parity指令：MOV (Move)MOVC (Move Code)MOVX (Move External)XCH (Exchange)XCHD（Exchange low-order Digit）PUSHPOPAJMP (Absolutely Jump)LJMP (Long Jump)SJMP (Short Jump)JMP (Jump)JZ (Jump Zero)JNZ (Jump Not Zero)JC (Jump if Carry)JNC (Jump if Not Carry)JB (Jump if Bit is set)JNB (Jump if Not Bit)JBC (Jump if Bit is set and Clear Bit)CJNE (Compare and Jump if Not Equal)DJNZ (Decrease and Jump if Not Zero)ACALL (Absolutely Call)LCALL (Long Call)RET (Return)NOP (No Operation)ADDADDC (Add with Carry)SUBB (Subtract with Borrow)MUL (Multiply)DIV (Divide)INC (Increase)DEC (Decrease)ANL (Logical AND)ORL (Logical OR)XRL (Logical Exclusive OR)CPL (Complement)CLR (Clear)SETB (Set Bit)RL (Rotate Left)RR (Rotate Right)RLC (Rotate Left with the Carry flag) RRC (Rotate Right with the Carry flag) XCHDSWAPDA (Decimal Adjust)ORG (Origin)DB (Define Byte)DW (Define Word)EQU (Equal)DATAXDATA (External Data)BITEND。
单片机英文缩写全称及中文名称(整理)教学提纲
单片机英文缩写全称及中文名称(整理)单片机英文缩写全称及中文名称一、寄存器部分SFR= special function register //特殊功能寄存器(片内RAM 80H~FFH) ACC= accumulate //累加器PSW= programmer status word //程序状态字SP= stack point //堆栈指针DPL,DPH=DPTR(data point register //数据指针寄存器)的低8位和高8位IE =interrupt enable // 中断使能IP= interrupt priority //中断优先级PCON =power control //电源控制SCON= serial control //串行口控制SBUF= serial buffer //串行数据缓冲TCON =timer control //定时器控制TMOD= timer mode //定时器方式PSW：CY= carry (psw.7) //进位（标志）AC= auxiliary carry (psw.6) //辅助进位F0= (psw.5) //用户自定义标志位RS1,RS0=register selection (psw.4,psw.3)//工作寄存器组选择位OV=overflow (psw.2) //溢出P=parity (psw.0) //奇偶校验位IE：EA=Enable All Interrupt //CPU开/关中断控制位ET=Enable Timer //定时器溢出中断允许位ES=Enable Serial Port //串行口中断允许位EX=Enable External //外部中断的中断允许位IP：PS=Priority Serial //串口优先级PT=Priority Timer //定时器优先级PX=Priority External //外部中断优先级SCON：RI=Receive Interrupt //串行口接收中断请求标志位TI=Transmit Interrupt //串行口发送中断请求标志位REN=receive enable //串行口接收允许控制位SM=serial mode //串行口工作方式选择位TCON：TF=Timer Overflow Flag //定时器溢出中断请求标志TR=Timer Run //定时器启动控制位IE=Interrupt Edge //外部中断请求标志位IT=Interrupt Type //外部中断触发方式选择位二、8051引脚RST=RESET (9)//复位，重启P3:RXD=Received eXchange Data (10,p3.0)//接收串行数据TXD=Transmit eXchange Data (11,p3.1)//发送串行数据INT0=interrupt 0 (12,p3.2)//中断0INT1=interrupt 1 (13,p3.3)//中断1T0=timer 0 (14,p3.4)//定时器0T1=timer 1 (15,p3.5)//定时器1RD=ReaD (16,p3.6)//外部数据存储器(RAM)的读信号WR=WRite (17,p3.7)//外部数据存储器(RAM)的写信号XTAL2,XTAL1=External Crystal Oscillator (18,19) //外部晶体振荡器PSEN=Program Store Enable (29) //程序存储器(ROM)使能ALE=Address Latch Enable (30) //地址锁存EA=External Address Enable (31) //外部程序存储器(ROM)地址允许三、其它PC = program counter //程序计数器OE=output enable //输出使能MSB = most significant bit//最高有效位LSB = last significant bit//最低有效位ORG = originally //起始来源DB = define byte //字节定义EQU = equal //等于DW = define word //字定义CLKOUT=Clock out,时钟输出BUSWDITH=总线宽度Vref=参考电压（带ADC的单片机中有的）HSO=High Speed Output，高速输出HSI=High Speed Input=高速输入INST=Instruction，指令READY就绪，总线中的就绪信号或引脚NMI=No Mask Interrupt （Input）=不可屏蔽的中断请求（输入）BHE=Bank High Enable=存储器的高位允许，如在80286系统中RAM的组织为16位的，分为高8位和低8位数据，分别的控制信号为BHE和BLE四、MCS-51指令数据传送类指令（7种助记符）助记符英文注释功能MOV Move 对内部数据寄存器RAM和特殊功能寄存器SFR的数据进行传送MOVC Move Code 读取程序存储器数据表格的数据传送MOVX Move External RAM 对外部RAM的数据传送XCH Exchange 字节交换XCHD Exchange low-order Digit 低半字节交换PUSH Push onto Stack) 入栈POP Pop from Stack) 出栈算术运算类指令（8种助记符）ADD Addition 加法ADDC Add with Carry 带进位加法SUBB Subtract with Borrow 带借位减法DA Decimal Adjust 十进制调整INC Increment 加1DEC Decrement 减1MUL Multiplication、Multiply 乘法DIV Division、Divide 除法逻辑运算类指令（10种助记符）ANL And Logic 逻辑与ORL OR Logic 逻辑或XRL Exclusive-OR Logic 逻辑异或CLR Clear 清零CPL Complement 取反RL Rotate left 循环左移RLC Rotate Left throught the Carry flag 带进位循环左移RR Rotate Right 循环右移RRC Rotate Right throught the Carry flag 带进位循环右移SWAP Swap 低4位与高4位交换控制转移类指令（17种助记符）ACALL Absolute subroutine Call 子程序绝对调用LCALL Long subroutine Call 子程序长调用RET Return from subroutine 子程序返回RETI Return from Interruption 中断返回JMP Jump IndirectSJMP Short Jump 短转移AJMP Absolute Jump 绝对转移LJMP Long Jump 长转移CJNE Compare and Jump if Not Equal 比较不相等则转移DJNZ Decrement and Jump if Not Zero 减１后不为０则转移JZ Jump if Zero 结果为０则转移JNZ Jump if Not Zero 结果不为０则转移JC Jump if the Carry flag is set 有进位则转移JNC Jump if Not Carry 无进位则转移JB Jump if the Bit is set) B位为１则转移JNB Jump if the Bit is Not set B位为０则转移JBC Jump if the Bit is set and Clear the bit 位为１则转移，并清除该位NOP No Operation 空操作位操作指令（1种助记符）SETB Set Bit 置位伪指令助记符英文注释功能ORG OriginDB Define ByteDW Define Word EQU EqualDATA DataXDATA External Data BIT BitEND End。
第2章MCS--51系列单片机的结构及原理
（4）工作寄存器组选择位RS1、RS0（PSW.4，
PSW.3）： RS1、RS0与工作寄存器组的对应关系
如下：
RS1 RS0 工作寄存器组 片内RAM地址
00
第0组
00H～07H
01
第1组
指令执行后，A=D1H最高位无进位，故Ｃ=0；低半字节有进位，AC=1； OV=0 1=1，发生溢出；A中1的个数为偶数，故P=0。
CPU时序
一．振荡器
CPU执行指令的一系列动作是在时序电路的控制下一拍一拍进行的。 其节拍信号由振荡器产生，MCS--51系列单片机的内部有一个高增益的反 相放大器。外接晶体后可构成自激振荡器产生节拍信号，接法见图2-1, 也可使用片外振荡器，采用不同工艺制造的单片机芯片接法不同：
RST/VPO：双功能引脚，在单片机工作期间， 当此引脚上出现连接2个机器周期的高电平时可 实现复位操作，详见2.4节。
在Vcc掉电期间，若该引脚接备用电源 （+5v），可向片内RAM供电，以保存片内RAM中 的信息。
2.2 MCS—51系列单片机的微处理器与CPU时序
运算器由算逻运算单元ALU、累加器A、B寄存器、暂存器1、 暂存器2、及程序状态字PSW构成。程序状态字PSW是1个8位 的专用寄存器，用于存放程序运行中的各种状态信息，可 进行位寻址，
P
图2—3 程序状态字各位的含义
（1）进位标志C（PSW.7）；很多算术逻辑运算指令执行 后都会影响进位标志C。例如加减运算，若运算结果有进 位或借位，则C=1，若无，则C=0。可用专门的指令或硬件 将C置位或清零，在进行位操作时，C又起着位累加器的作 用，类似于累加器A。
武汉理工大学电气工程及其自动化专业2017-2018第二学期单片机选择题
武汉理工大学电气工程及其自动化专业2017-2018第二学期单片机选择题1. 单片机又称为单片微计算机，最初的英文缩写是 [单选题] *A.MCPB.CPUC.DPJD.SCM(正确答案)2. Intel公司的MCS-51系列单片机是______的单片机 [单选题] *A.1位B.4位C.8位(正确答案)D.16位3. Proteus软件由以下两个设计平台组成 [单选题] *A.ISIS和PPTB.ARES和CADC.ISIS和ARES(正确答案)D.ISIS和CAD4. ISIS模块的主要功能是（） [单选题] *A.电路原理图设计与仿真(正确答案)B.高级布线和编辑C.图像处理D.C51源程序调试5. ARES模块的主要功能是（） [单选题] *A.电路原理图设计与仿真B.高级布线和编辑(正确答案)C.ISIS和ERASD.ISIS和CAD6. 家用电器如冰箱、空调、洗衣机中使用的单片机主要是利用了它的______能力（） [单选题] *A.高速运算B.海量存储C.远程通信D.测量控制(正确答案)7. MCS-51单片机的复位信号是______有效。
（） [单选题] *A.下降沿B.上升沿C.低电平D.高电平(正确答案)8. 单片机中的CPU主要由______两部分组成。
（） [单选题] *A.运算器和寄存器B.运算器和控制器(正确答案)C.运算器和译码器D.运算器和计数器9. 在51单片机的下列特殊功能寄存器中，具有16位字长的是______。
（） [单选题] *A.PCONB.TCONC.SCOND.DPTR(正确答案)10. 在通用I/O方式下，欲从P1口读取引脚电平前应当______。
（） [单选题] *A.先向P1口写0B.先向P1口写1(正确答案)C.先使中断标志清零D.先开中断11. 单片机中的程序计数器PC用来______。
（） [单选题] *A.存放指令B.存放正在执行的指令地址C.存放下一条指令的地址(正确答案)D.存放上一条指令的地址12. PSW中的RS1和RS0用来______。
51单片机英文缩写全称(整理最全)
MCS-51指令英语全简称（1）数据传送类指令（7种助记符）助记符英文注释功能MOV Move 对内部数据寄存器RAM和特殊功能寄存器SFR的数据进行传送MOVC Move Code 读取程序存储器数据表格的数据传送MOVX Move External RAM 对外部RAM的数据传送XCH Exchange 字节交换XCHD Exchange low-order Digit 低半字节交换PUSH Push onto Stack) 入栈POP Pop from Stack) 出栈（2）算术运算类指令（8种助记符）ADD Addition 加法ADDC Add with Carry 带进位加法SUBB Subtract with Borrow 带借位减法DA Decimal Adjust 十进制调整INC Increment 加1DEC Decrement 减1MUL Multiplication、Multiply 乘法DIV Division、Divide 除法(3)逻辑运算类指令（10种助记符）ANL And Logic 逻辑与ORL OR Logic 逻辑或XRL Exclusive-OR Logic 逻辑异或CLR Clear 清零CPL Complement 取反RL Rotate left 循环左移RLC Rotate Left throught the Carry flag 带进位循环左移RR Rotate Right 循环右移RRC Rotate Right throught the Carry flag 带进位循环右移SWAP Swap 低4位与高4位交换(4)控制转移类指令（17种助记符）ACALL Absolute subroutine Call 子程序绝对调用LCALL Long subroutine Call 子程序长调用RET Return from subroutine 子程序返回RETI Return from Interruption 中断返回JMP Jump Indirect 跳转指令SJMP Short Jump 短转移AJMP Absolute Jump 绝对转移LJMP Long Jump 长转移CJNE Compare and Jump if Not Equal 比较不相等则转移DJNZ Decrement and Jump if Not Zero 减１后不为０则转移JZ Jump if Zero 结果为０则转移JNZ Jump if Not Zero 结果不为０则转移JC Jump if the Carry flag is set 有进位则转移JNC Jump if Not Carry 无进位则转移JB Jump if the Bit is set) B 位为１则转移JNB Jump if the Bit is Not set B 位为０则转移JBC Jump if the Bit is set and Clear the bit 位为１则转移，并清除该位NOP No Operation 空操作（5）位操作指令（1种助记符）SETB Set Bit 置位伪指令助记符英文注释功能ORG Origin 起始地址DB Define Byte 定义字节DW Define Word 定义字义EQU Equal 赋值（右赋左）等于DATA Data 数据赋值（右赋左）XDATA External Data 外部数据赋值（右赋左）BIT Bit 位地址赋值END End 汇编结束DS Define storage 定义存储空间51外部引脚缩写英文解释中文解释RST （9）Reset 复位信号引脚RxD (10--P3.0) Receive Data 串口接收端TxD (11--P3.1) Transmit Data 串口发送端INT0(————)（12--P3.2）Interrupt0 外部中断0信号输入引脚INT1(————) （13--P3.3）Interrupt1 外部中断1信号输入引脚T0 (14--P3.4) Timer0 定时/计数器0输入信号引脚T1 (15--P3.5) Timer1 定时/计数器1输入信号引脚WR(———) (16--P3.6) write 存储器的写信号写信号引脚RD(———) (17--P3.7) read 读信号引脚PSEN(—————) （29）progammer saving enable 外部程序存储器读选通信号ALE （30）Address Latch Enable 地址锁存允许信号EA(———) (31) enable 外部ROM选择信号51内部寄存器SFR special funtion register 特殊功能寄存器ACC accumulate 累加器APSW progammer status word 程序状态字CY (PSW.7) carry 进位标志位AC (PSW.6) assistant carry 辅助进位标志位OV (PSW.2) overflow 溢出标志位PC progammer counter 程序计数器DPTR data point register 数据指针寄存器SP stack point 堆栈指针TCON timer control 定时器控制寄存器TF1 （TCON.7）Timer1 flag T1中断标志位TR1 （TCON.6）Timer1 Run T1运行控制位TF0 （TCON.5）Timer0 flag T0中断标志位TR0 （TCON.4）Timer0 Run T0运行控制位IE1 （TCON.3）Interrupt1 exterior 外部中断1中断标志位IT1 （TCON.2）Interrupt1 touch 外部中断1 触发方式选择位IE0 （TCON.1）Interrupt0 exterior 外部中断0中断标志位IT0 （TCON.0）Interrupt0 touch 0-电平触发1-下降沿触发IE （A8H）interrupt enable 中断允许寄存器EA (IE.7) enable all interrupt 中断总允许位ES (IE.4) enable serial 串行口中断允许位ET1 （IE.3）enable timer 1 T1中断允许位EX1 （IE.2）enable exterior 1 外部中断1中断允许位ET0 （IE.1）enable timer 0 T0中断允许位EX0 （IE.0）enable exterior 0 外部中断0中断允许位IP （B8H）interrupt priority 中断优先级寄存器PS (IP.4) priority serial 串口优先级标志位PT1 (IP.3) priority timer 1 定时器1优先级标志位PX1 (IP.2) priority exterior 1 外部中断1优先级标志位PT0 (IP.1) priority timer 0 定时器0优先级标志位PX0 (IP.0) priority exterior 0 外部中断0优先级标志位PCON (87H) power control 电源控制和波特率选择TMOD （89H）timer mode 定时器方式控制寄存器MSB = most significant bit//最高有效位LSB = last significant bit//最低有效位OE = output enable //输出使能PROG progamme 程序XTAL:External Crystal Oscillator,外部晶体振荡器CLKOUT：Clock out,时钟输出BUSWDITH：总线宽度Vref：参考电压（带ADC的单片机中有的）RESET：复位，重启ACH：？？HSO：High Speed Output，高速输出HSI：High Speed Input：高速输入INST：Instruction，指令READY：就绪，总线中的就绪信号或引脚NMI：No Mask Interruput （Input）：不可屏蔽的中断请求（输入）RXD：Receive Data ，接收串行数据，单片机中有UART/USART功能的串行数据输入引脚TXD：Transmit Data，发送串行数据，单片机中有UART/USART功能的串行数据输出引脚BHE：Bank High Enable：存储器的高位允许，如在80286系统中RAM的组织为16位的，分为高8位和低8位数据，分别的控制信号为BHE和BLEALE：Address Latch Enable，地址信号锁定允许，这在早期Intel总线结构中是必不可少的信号，常和锁存器使用来分离地址/数据复用端口的地址和数据信。
MCS-51系列单片机中英文资料对照外文翻译文献综述
MCS-51系列单片机中英文资料对照外文翻译文献综述Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same.8051 daily representatives-51 serial one-chip computers.A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. (3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve theprocedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031, 8032.(4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. (6) Five cut off cutting off the control system of the source. (7) One all duplex serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertz now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporaries of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loop back ACC with another one. Inaddition, ACC is often regarded as the transfer station of data transmission on 8051 inside. The same as general microprocessor, it is the busiest register. Help remembering that agreeing with a express in the order. The controller includes the procedure counter, the order is deposited, the order deciphering, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out. Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded.There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, using for middle result to deposit operation, the data are stored temporarily and the data are buffered. In RAM of this 128B, there is unit of 32 bytes that can be appointed as the jobregister, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH, 0000H of location, in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM orderspend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O ports, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register), one exports the driver and a introduction buffer. Make data can latch when outputting, data can buffer when making introduction, but four function of pass away these self-same. Expand among the system of memory outside having slice, four ports these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing The circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use port correctly and rationally, and will inspire to designing the peripheral logical circuit of one-chip computer to some extent. Load ability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouth, its output grade draws the resistance supremely. When using it as the mouth in common use, output grade is it leak circuit to turn on, is it urge NMOS draw the resistanceon taking to be outer with it while inputting to go out to fail. When being used as introduction, should write"1" to a latch first. Every one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use. Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state, make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate, can draw the pin to the high level fast; when resistance value is very large, P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw electric current load to offer outwards, draw the resistance on needn't answer and thinking. Here when the port is used as introduction, must write into 1 to the corresponding latch first too, make FET end relatively about 20,000 ohms because of load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than P1.P3 mouth one multi-functional port, mouth getting many than P1 it have "3 doors and 4 buffers". Two parts there, make her besides accurate two-way function with P1 mouth just, can also use the second function of every pin, "and" door 3 functions one switch in fact, it determines to be to output data of latch tooutput second signal of function. Act as W=At 1 o'clock, output Q end signal; act as Q=At 1 o'clock, can output W line signal. At the time of programming, it is that the first function is still the second function but needn't have software that set up P3 mouth in advance .It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location to visit to P3 mouth/at not lasting lining, there are inside hardware latch Qs=1. The operation principle of P3 mouth is similar to P1 mouth.Output grade, P3 of mouth, P1 of P1, connect with inside have load resistance of drawing, every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way. Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outer. Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first. As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base, in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially, make the one-chip computer begin to hold the conductprocedure from unit 0000H. Except that the ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective, should sustain 24 shake cycle (namely 2 machine cycles) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal: restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST) hand over to Schmitt's trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal inside. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running, should first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscilloscope tentatively, push and is restored to the throne the key, the wave form that observes andhas enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change.MCS-51系列单片机的功能和结构MSC-51系列单片机具有一个单芯片电脑的结构和功能，它是英特尔公司的系列产品的名称。
MCS-51系列单片机英文全称和简称对照表
A/4
1 1 0
1
A
AC
1
A
AC
0 0
MOV MOVX MOVC PUSH POP XCH XCHD SWAP ADD ADDC SUBB MUL DIV DA INC DEC CLR CPL RL RLC
RR RRC
ANL ORL XRL AJMP
Move Move External RAM Move Code Push onto Stack Pop from Stack Exchange Exchange low-order Digit Swap Add Add with Carry Substract with Borrow Multiply Divide Decimal Adjust Increment Decrement Clear Complement Rotate Left Rotate Left through the Carry flag Rotate Right Rotate Right through the Carry flag Logical AND Logical OR Logical Exclusive OR Absolute Jump
SFR
寄存器符号 ACC ， A PSW CY， C AC OV SP DPTR IP IE TMOD TCON PCON
英文全称 accumulate program status word carry auxiliary carry overflow stack point data point register interrupt priority interrupt enable timer mode timer control power control
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
指令
分类指令功能助记符英文全称
数据传送指令传递类指令片内RAM MOV Move
片外RAM MOVX Move External RAM
ROM MOVC Move Code
堆栈指令压栈PUSH Push onto Stack
出栈POP Pop from Stack
交换类指令整字节XCH Exchange
低半字节XCHD Exchange low-order Digit
A高/低4位SWAP Swap
算术运算指令加法不带进位位ADD Add
带进位位ADDC Add with Carry
减法带借位位SUBB Substract with Borrow
乘法MUL Multiply
除法DIV Divide
十进制调整DA Decimal Adjust
加1 INC Increment
减1 DEC Decrement
逻辑运算指令清0 CLR Clear
取反CPL Complement
循环左移1位 A RL Rotate Left
A，C RLC Rotate Left through the
Carry flag
循环右移1位 A RR Rotate Right
A，C RRC Rotate Right through the
Carry flag
与ANL Logical AND
或ORL Logical OR
异或XRL Logical Exclusive OR
控制转移类指令无条件转移指
令
（短转移）绝对
转移
AJMP Absolute Jump
长转移LJMP Long Jump
短转移（相对转
移）
SJMP Short Jump
间接转移JMP Jump Indirect 条件转移指令为0转移JZ Jump Zero
补位0转移JNZ Jump Not Zero
比较不相等转移CJNE Compare and Jump if Not
Equal
减1不为0转移DJNZ Decrement and Jump if
Not Zero
子程序调用与返回指令长跳转LCALL Long Call
短跳转ACALL Absolute Call
子程序返回RET Return from subroutine 中断返回RETI Return from Interruption
空操作指令NOP No Operation
布尔变量操作类指令传送MOV Move
清0 CLR Clear
置1 SETB Set Bit
取反CPL Complement
与ANL Logical AND
或ORL Logical OR
C为1转移JC Jump if Carry
C为0转移JNC Jump if Not Carry
位地址为1转移JB Jump if Bit is set
位地址为0转移JNB Jump if Not Bit
位地址为0转移，并清0 JBC If Bit is set and Clear Bit
伪指令
伪指令功能助记符英文全称
指定该伪指令下面一条指令
ORG Origin
（或数据块）的起始地址
结束标志END End
定义常数表（字节）DB Define Byte
定义常数表（字，即2字节）DW Define Word 指定预留存储区长度DS Define Storage 定义位地址BIT Bit
定义符号（先定义后使用）EQU Equal
定义符号（定义、使用无顺
DATA Datas
序）
取高字节HIGH High
取低字节LOW Low
SFR
名称寄存器符号英文全称
累加器ACC，A accumulate
程序状态字PSW program status word 进位标志位CY，C carry
辅助进位标志位AC auxiliary carry
溢出标志位OV overflow
堆栈指针SP stack point
数据指针寄存器DPTR data point register 中断优先级控制寄存器IP interrupt priority
中断使能IE interrupt enable
定时器/计数器模式寄存器TMOD timer mode
定时器/计数器控制寄存器TCON timer control
电源控制寄存器PCON power control
微处理器
中文名称简写英文名称
算术逻辑部件ALU Arithmetic Logic Unit 累加器ACC，A accumulate
标志寄存器FR Flag Register
进位标志CY，C Carry Flag
辅助进位标志AF Auxiliary Carry Flag 溢出标志OF Overflow Flag
零标志ZF Zero Flag
符号标志SF Sign Flag
奇偶标志PF Parity Flag
程序计数器PC Program Counter
指令寄存器IR Instruction Register 指令译码器ID Instruction Decoder
中文名称简写英文名称
接地端GND Ground
接外部晶体XTAL External Crystal
复位信号RST Restoration
变更ALE alter
程序PROG program
程序存储器使能(选择外部程
PSEN program saving enable 序存储器)
允许所有中断EA enable all interrupt
中文名称简写英文名称
随机存取数据存储器RAM random access memory 只读程序存储器ROM read only memory
特殊功能寄存器SFR special function register 最高有效位MSB most significant bit
最低有效位LSB last significant bit。