FIN1031MX中文资料

© 2001 Fairchild Semiconductor Corporation DS500507July 2001Revised July 2001FIN1031 3.3V LVDS 4-Bit High Speed Differential DriverFIN10313.3V LVDS 4-Bit High Speed Differential DriverGeneral DescriptionThis quad driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technol-ogy. The driver translates LVTTL signal levels to LVDS lev-els with a typical differential output swing of 350mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans-fer of clock and data.The FIN1031 can be paired with its companion receiver,the FIN1032, or any other Fairchild LVDS receiver.Featuress Greater than 400Mbs data rate s 3.3V power supply operations 0.4ns maximum differential pulse skew s 2.0ns maximum propagation delay s Low power dissipation s Power OFF protections Meets or exceeds the TIA/EIA-644 LVDS standard s Pin compatible with equivalent RS-422 and LVPECL devices s 16-Lead SOIC and TSSOP packages save spaceOrdering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Function TableH = HIGH Logic Level L = LOW Logic Level X = Don’t CareZ = High ImpedanceConnection DiagramPin DescriptionsOrder Number Package NumberPackage DescriptionFIN1031M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1031MTCMTC1616-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WideInputsOutputsEN EN D IN D OUT +D OUT −H X H H L H X L L H H X OPEN L H X L H H L X L L L H X L OPEN L H LHXZZPin Name DescriptionD IN1, D IN2, D IN3, D IN4LVTTL Data InputsD OUT1+, D OUT2+, D OUT3+, D OUT4+Non-Inverting Driver Outputs D OUT1−, D OUT2−, D OUT3−, D OUT4−Inverting Driver OutputsEN Driver Enable PinEN Inverting Driver Enable Pin V CC Power Supply GNDGround 2F I N 1031Absolute Maximum Ratings (Note 1)Recommended Operating ConditionsNote 1: The “Absolute Maximum Ratings ”: are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification.DC Electrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise specifiedNote 2: All typical values are at T A = 25°C and with V CC = 3.3V.Supply Voltage (V CC )−0.5V to +4.6V DC Input Voltage (V IN )@V CC ≥ 3V −0.5V to +6V @V CC = 0V−0.5V to +4.6V DC Output Voltage (V OUT )@V CC = 0V−0.5V to +4.6VDriver Short Circuit Current (I OSD )ContinuousStorage Temperature Range (T STG )−65°C to +150°CMax Junction Temperature (T J )150°CLead Temperature (T L )(Soldering, 10 seconds)260°CESD (Human Body Model)≥ 8000V ESD (Machine Model)≥ 600VSupply Voltage (V CC ) 3.0V to 3.6VInput Voltage (V IN )0 to V CCOperating Temperature (T A )−40°C to +85°CSymbol ParameterTest ConditionsMin Typ MaxUnits (Note 2)V OD Output Differential Voltage 250350450mV ∆V OD V OD Magnitude Change from 25mV Differential LOW-to-HIGH R L = 100Ω, Driver Enabled,V OS Offset VoltageSee Figure 11.1251.251.375V ∆V OS Offset Magnitude Change from 25mV Differential LOW-to-HIGH I OFF Power Off Output Current V CC = 0V, V OUT = 0V or 3.6V ±20µA I OS Short Circuit Output Current V OUT = 0V, Driver Enabled −6mA V OD = 0V, Driver Enabled±6V IH Input HIGH Voltage 2.0V CC V V IL Input LOW Voltage GND0.8V I IN Input CurrentV IN = 0V or V CC ±20µA I OZ Disabled Output Leakage Current EN = 0.8V, EN = 2.0V ±20µA V OUT = 0V or 4.7V I I(OFF)Power-OFF Input Current V CC = 0V, V IN = 0V or 3.6V ±20µA V IK Input Clamp Voltage I IK = −18 mA−1.5VI CCPower Supply CurrentNo Load, V IN = 0V or V CC , Driver Enabled 3.25mAR L = 100 Ω, Driver Disabled3.25R L = 100 Ω, V IN = 0V or V CC , Driver Enabled17.925C IN Input Capacitance 7pF C OUTOutput Capacitance4pFFIN1031AC Electrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise specifiedNote 3: All typical values are at T A = 25°C and with V CC = 3.3V.Note 4: t SK(LH), t SK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-tion.Note 5: t SK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.Note 6: f MAX Criteria: Input t R = t F < 1 ns, 0V to 3V, 50% Duty Cycle; Output V OD > 250 mV, 45% to 55% Duty Cycle; all output channels switching in phase.Note 7: Test Circuits in Figure 2 and Figure 4 are simplified representations of test fixture and DUT loading.Symbol ParameterTest ConditionsMinTyp MaxUnits (Note 3)t PLHD Differential Propagation Delay 0.8 1.4 2.0ns LOW-to-HIGHt PHLD Differential Propagation Delay 0.8 1.4 2.0ns HIGH-to-LOWt TLHD Differential Output Rise Time (20% to 80%)R L = 100 Ω, C L = 10 pF,0.60.85 1.2ns t THLD Differential Output Fall Time (80% to 20%)See Figure 2 and Figure 3 (Note 7)0.60.851.2ns t SK(P)Pulse Skew |t PLH - t PHL |0.4ns t SK(LH)Channel-to-Channel Skew 0.3ns t SK(HL)(Note 4)t SK(PP)Part-to-Part Skew (Note 5) 1.0ns f MAX Maximum Frequency (Note 6)200275MHz t ZHD Differential Output Enable Time from Z to HIGH2.5 5.0ns t ZLD Differential Output Enable Time from Z to LOW R L = 100Ω, C L = 10 pF,2.7 5.0ns t HZD Differential Output Disable Time from HIGH to Z See Figure 4 and Figure 5 (Note 7)3.2 5.0ns t LZDDifferential Output Disable Time from LOW to Z3.45.0ns4F I N 1031FIGURE 1. Differential Driver DC Test CircuitNote A: All input pulses have frequency = 10 MHz, t R or t F = 1 ns Note B: C L includes all fixture and instrumentation capacitancesFIGURE 2. Differential Driver Propagation Delay andTransition Time Test CircuitFIGURE 3. AC WaveformsNote B: All input pulses have the frequency = 10 MHz, t R or t F = 1 ns Note A: C L includes all fixture and instrumentation capacitancesFIGURE 4. Differential Driver Enable andDisable Test CircuitFIGURE 5. Enable and Disable AC Waveforms FIN1031Physical Dimensions inches (millimeters) unless otherwise noted16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage Number M16A6F I N 1031 3.3V L V D S 4-B i t H i g h S p e e d D i f f e r e n t i a l D r i v e rPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC16Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。