74VHC86TTR中文资料

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74VHC08N中文资料

© 2005 Fairchild Semiconductor CorporationDS011514November 1992Revised February 200574VHC08 Quad 2-Input AND Gate74VHC08Quad 2-Input AND GateGeneral DescriptionThe VHC08 is an advanced high speed CMOS 2 Input AND Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable out-put. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply volt-age. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This cir-cuit prevents device destruction due to mismatched supply and input voltages.Featuress High Speed: t PD 4.3 ns (typ) at T A 25q C s High noise immunity: V NIH V NIL 28% V CC (min)s Power down protection is provided on all inputs s Low power dissipation: I CC 2 P A (Max) @ T A 25q C s Low noise: V OLP 0.8V (max)s Pin and function compatible with 74HC08Ordering Code:Surface mount packages are also available on T ape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B.Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.Logic SymbolIEEE/IECPin DescriptionsConnection DiagramTruth TableOrder Number Package Package DescriptionNumber 74VHC08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC08MX_NL (Note 1)M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC08SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide74VHC08MTC MTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC08MTCX_NL (Note 1)MTC14Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide74VHC08NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePin Names Description A n , B n Inputs O nOutputsA B O L L L L H L H L L HHH 274V H C 08Absolute Maximum Ratings (Note 2)Recommended Operating Conditions (Note 3)Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifica-tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari-ables. Fairchild does not recommend operation outside databook specifica-tions.Note 3: Unused inputs must be held HIGH or LOW. They may not float.DC Electrical CharacteristicsNoise CharacteristicsNote 4: Parameter guaranteed by design.Supply Voltage (V CC ) 0.5V to 7.0V DC Input Voltage (V IN ) 0.5V to 7.0V DC Output Voltage (V OUT ) 0.5V to V CC 0.5VInput Diode Current (I IK ) 20 mA Output Diode Current (I OK )r 20 mA DC Output Current (I OUT )r 25 mA DC V CC /GND Current (I CC )r 50 mAStorage Temperature (T STG ) 65q C to 150q CLead Temperature (T L )(Soldering, 10 seconds)260q CSupply Voltage (V CC ) 2.0V to 5.5V Input Voltage (V IN )0V to5.5V Output Voltage (V OUT )0V to V CCOperating Temperature (T OPR ) 40q C to 85q CInput Rise and Fall Time (t r , t f )V CC 3.3V r 0.3V 0 ns/V a 100 ns/V V CC 5.0V r 0.5V0 ns/V a 20 ns/V Symbol ParameterV CC (V)T A 25q CT A 40q C to 85q C Units ConditionsMin TypMaxMin MaxV IH HIGH Level 2.0 1.50 1.50VInput Voltage 3.0 5.50.7 V CC0.7 V CCV IL LOW Level 2.00.500.50VInput Voltage 3.0 - 5.50.3 V CC0.3 V CCV OHHIGH Level 2.0 1.9 2.0 1.9V IN V IH I OH 50 P AOutput Voltage3.0 2.9 3.0 2.9Vor V IL4.5 4.4 4.5 4.43.0 2.58 2.48VI OH 4 mA 4.53.943.80I OH 8 mAV OLLow Level 2.00.00.10.1V IN V IH I OL 50 P A Output Voltage3.00.00.10.1V or V IL4.50.00.10.13.00.360.44V I OL 4 mA 4.50.360.44I OL 8 mAI IN Input Leakage Current 0 - 5.5r 0.1r 1.0P A V IN 5.5V or GND I CCQuiescent Supply Current5.52.020.0P AV IN V CC or GND Symbol ParameterV CC (V)T A 25q C Units ConditionsTyp Limits V OLP(Note 4)Quiet Output Maximum Dynamic V OL 5.00.30.8V C L 50 pF V OLV (Note 4)Quiet Output Minimum Dynamic V OL5.0 0.30.8V C L 50 pF V IHD (Note 4)Minimum HIGH Level Dynamic Input Voltage 5.0 3.5V C L 50 pF V ILD(Note 4)Maximum LOW Level Dynamic Input Voltage5.01.5VC L 50 pF74VHC08AC Electrical CharacteristicsNote 5: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC (opr.) C PD * V CC * f IN I CC /4 (per gate).Symbol ParameterV CC (V)T A 25q CT A 40q C to 85q C Units Conditions MinTyp Max Min Max t PHL Propagation Delay3.3 r 0.36.28.8 1.010.5ns C L 15 pF t PLH8.712.3 1.014.0C L 50 pF 5.0 r 0.54.35.9 1.07.0ns C L 15 pF 5.87.9 1.09.0C L 50 pF C IN Input Capacitance41010pF V CC Open C PDPower Dissipation Capacitance18pF(Note 5) 474V H C 08Physical Dimensions inches (millimeters) unless otherwise noted14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage Number M14A 74VHC08Physical Dimensions inches (millimeters) unless otherwise noted (Continued)Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M14D 674V H C 08Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC14774VHC08 Quad 2-Input AND GatePhysical Dimensions inches (millimeters) unless otherwise noted (Continued)14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePackage Number N14AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

74AHCT86BQ中文资料

1.General descriptionThe 74AHC86;74AHCT86are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are speciﬁed in compliance with JEDEC standard no.7A.The 74AHC86; 74AHCT86 provides a 2-input exclusive-OR function.2.Featuress Balanced propagation delayss All inputs have a Schmitt-trigger action s Inputs accepts voltages higher than V CCs For 74AHC86 only: operates with CMOS input levels s For 74AHCT86 only: operates with TTL input levels sESD protection:x HBM JESD22-A114E exceeds 2000V x MM JESD22-A115-A exceeds 200V x CDM JESD22-C101C exceeds 1000V s Multiple package optionss Speciﬁed from −40°C to +85°C and from −40°C to +125°C3.Ordering information74AHC86; 74AHCT86Quad 2-input EXCLUSIVE-OR gateRev. 02 — 15 November 2007Product data sheetTable 1.Ordering informationType numberPackageTemperature rangeName DescriptionVersion 74AHC86D −40°C to +125°CSO14plastic small outline package; 14leads;body width 3.9mmSOT108-174AHCT86D 74AHC86PW −40°C to +125°CTSSOP14plastic thin shrink small outline package; 14leads;body width 4.4mmSOT402-174AHCT86PW 74AHC86BQ −40°C to +125°CDHVQFN14plastic dual in-line compatible thermal enhanced very thin quad ﬂat package;no leads;14terminals;body 2.5×3×0.85mmSOT762-174AHCT86BQ4.Functional diagramFig 1.Logic symbolmna7871A 1B 1Y 2132A 2B 2Y 5463A 3B 3Y 10984A 4B4Y 131211Fig 2.Logic diagram (one gate)Fig 3.IEC logic symbolmna788YABmna7863=1=1=1=12165481091113125.Pinning information5.1Pinning5.2Pin description6.Functional description[1]H =HIGH voltage level;L =LOW voltage level.(1)The die substrate is attached to this pad usingconductive die attach material.It can not be used as a supply pin or input.Fig 4.Pin conﬁguration SO14, TSSOP14Fig 5.Pin conﬁguration DHVQFN1474AHC8674AHCT861A V CC 1B 4B 1Y 4A2A 4Y 2B 3B 2Y 3A GND3Y001aah0831234567810912111413001aad10586Transparent top view2Y3A2B 3B 2A 4Y 1Y 4A 4B 1BGND (1)G N D3Y 1AV C C6951041131221378114terminal 1index areaTable 2.Pin descriptionSymbol Pin Description 1A to 4A 1, 4, 9, 12data input 1B to 4B 2, 5, 10, 13data input 1Y to 4Y 3, 6, 8, 11data outputs GND 7ground (0V)V CC14supply voltageTable 3.Function table [1]Input nA Input nB Output nY L L L L H H H L H HHL7.Limiting values[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]P tot derates linearly with 8mW/K above 70°C.[3]P tot derates linearly with 5.5mW/K above 60°C.[4]P tot derates linearly with 4.5mW/K above 60°C.8.Recommended operating conditionsTable 4.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Voltages are referenced to GND (ground = 0V).Symbol Parameter Conditions Min Max Unit V CC supply voltage −0.5+7.0V V I input voltage−0.5+7.0V I IK input clamping current V I <−0.5V[1]−20-mA I OK output clamping current V O <−0.5V or V O >V CC +0.5V [1]-±20mA I O output current V O =−0.5V to (V CC +0.5V)-±25mA I CC supply current -75mA I GND ground current −75-mA T stg storage temperature −65+150°C P tottotal power dissipation T amb =−40°C to +125°CSO14 package [2]-500mW TSSOP14 package [3]-500mW DHVQFN14 package[4]-500mWTable 5.Recommended operating conditions Voltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions74AHC8674AHCT86UnitMin Typ Max Min Typ Max V CC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5V V I input voltage 0- 5.50- 5.5V V O output voltage 0-V CC 0-V CC V T amb ambient temperature −40+25+125−40+25+125°C ∆t/∆Vinput transition rise and fall rateV CC = 3.3 V ± 0.3 V --100---ns/V V CC = 5.0 V ± 0.5 V --20--20ns/V9.Static characteristicsTable 6.Static characteristicsVoltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions25°C−40°C to+85°C−40°C to+125°C UnitMin Typ Max Min Max Min MaxFor type 74AHC86V IH HIGH-levelinput voltage V CC= 2.0 V 1.5-- 1.5- 1.5-V V CC = 3.0 V 2.1-- 2.1- 2.1-V V CC = 5.5 V 3.85-- 3.85- 3.85-VV IL LOW-levelinput voltage V CC= 2.0 V--0.5-0.5-0.5V V CC = 3.0 V--0.9-0.9-0.9V V CC = 5.5 V-- 1.65- 1.65- 1.65VV OH HIGH-leveloutput voltage V I= V IH or V ILI O=−50µA; V CC=2.0 V 1.9 2.0- 1.9- 1.9-V I O=−50µA; V CC=3.0 V 2.9 3.0- 2.9- 2.9-V I O=−50µA; V CC=4.5 V 4.4 4.5- 4.4- 4.4-V I O=−4.0mA; V CC=3.0 V 2.58-- 2.48- 2.40-V I O=−8.0mA; V CC=4.5 V 3.94-- 3.8- 3.70-VV OL LOW-leveloutput voltage V I= V IH or V ILI O= 50µA; V CC=2.0 V-00.1-0.1-0.1V I O= 50µA; V CC=3.0 V-00.1-0.1-0.1V I O= 50µA; V CC=4.5 V-00.1-0.1-0.1V I O= 4.0mA; V CC=3.0 V--0.36-0.44-0.55V I O= 8.0mA; V CC=4.5 V--0.36-0.44-0.55VI I input leakagecurrent V I=5.5V or GND;V CC=0Vto 5.5V--0.1- 1.0- 2.0µAI CC supply current V I=V CC or GND; I O = 0 A;V CC=5.5V-- 2.0-20-40µAC I inputcapacitance- 3.010-10-10pFC O outputcapacitance- 4.0-----pF For type 74AHCT86V IH HIGH-levelinput voltageV CC= 4.5 V to 5.5 V 2.0-- 2.0- 2.0-VV IL LOW-levelinput voltageV CC= 4.5 V to 5.5 V--0.8-0.8-0.8VV OH HIGH-leveloutput voltage V I= V IH or V IL; V CC=4.5 VI O=−50µA 4.4 4.5- 4.4- 4.4-V I O=−8.0mA 3.94-- 3.8- 3.70-VV OL LOW-leveloutput voltage V I= V IH or V IL; V CC=4.5 VI O= 50µA-00.1-0.1-0.1V I O= 8.0mA--0.36-0.44-0.55V10.Dynamic characteristicsI I input leakage currentV I =5.5V or GND;V CC =0V to 5.5V--0.1- 1.0- 2.0µA I CC supply current V I =V CC or GND; I O = 0 A;V CC =5.5V -- 2.0-20-40µA ∆I CCadditional supply current per input pin;V I =V CC −2.1V; I O =0 A;other pins at V CC or GND;V CC =4.5V to 5.5V -- 1.35- 1.5- 1.5mAC I inputcapacitance -310-10-10pF C Ooutputcapacitance-4.0-----pFTable 6.Static characteristics …continued Voltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions25°C −40°C to +85°C −40°C to +125°C Unit MinTyp Max Min Max Min Max Table 7.Dynamic characteristics GND = 0 V; For test circuit see Figure 7.Symbol Parameter Conditions25°C −40°C to +85°C −40°C to +125°C Unit MinTyp [1]MaxMinMaxMinMaxFor type 74AHC86t pdpropagation delaynA, nB to nY; see Figure 6[2]V CC = 3.0 V to 3.6 V C L =15pF - 4.811.0 1.013.0 1.014.0ns C L =50pF - 6.814.5 1.016.5 1.018.5ns V CC = 4.5 V to 5.5 V C L =15pF - 3.4 6.8 1.08.0 1.08.5ns C L =50pF4.88.8 1.010.0 1.011.0ns C PDpower dissipation capacitanceC L =50pF; f i = 1 MHz;V I =GND to V CC [3]-10.0-----pF[1]Typical values are measured at nominal supply voltage (V CC = 3.3V and V CC = 5.0V).[2]t pd is the same as t PLH and t PHL .[3]C PD is used to determine the dynamic power dissipation (P D in µW).P D =C PD ×V CC 2×f i ×N +Σ(C L ×V CC 2×f o )where:f i = input frequency in MHz, f o =output frequency in MHz C L =output load capacitance in pF V CC =supply voltage in Volts N =number of inputs switchingΣ(C L ×V CC 2×f o )=sum of the outputs.11.WaveformsFor type 74AHCT86t pdpropagation delaynA, nB to nY; see Figure 6[2]V CC = 4.5 V to 5.5 V C L =15pF - 3.4 6.9 1.08.0 1.09.0ns C L =50pF- 4.98.8 1.010.0 1.011.0ns C PDpower dissipation capacitanceC L =50pF; f i = 1 MHz;V I =GND to V CC [3]-12.0-----pFTable 7.Dynamic characteristics …continued GND = 0 V; For test circuit see Figure 7.Symbol Parameter Conditions25°C −40°C to +85°C −40°C to +125°C Unit MinTyp [1]MaxMinMaxMinMaxMeasurement points are given in Table 8.V OL and V OH are typical voltage output levels that occur with the output load.Fig 6.Propagation delay input (nA, nB) to output (nY)mna224nA, nB inputnY outputt PLHt PHLGNDV IV MV MV OHV OLTable 8.Measurement pointsType Input Output V M V M 74AHC860.5V CC 0.5V CC 74AHCT861.5V0.5V CCTest data is given in T able 9.Deﬁnitions test circuit:R T = Termination resistance should be equal to output impedance Z o of the pulse generator C L = Load capacitance including jig and probe capacitance R L = Load resistor S1 = Test selection switchFig 7.Load circuitry for switching times V M V Mt Wt W10 %90 %0 VV IV I negative pulsepositive pulse0 VV MV M 90 %10 %t ft r t rt f 001aad983DUTV CCV CCV IV OR TR LS1C LopenPULSE GENERATORTable 9.Test dataType Input Load S1 position V I t r , t f C LR L t PHL , t PLH t PZH , t PHZ t PZL , t PLZ 74AHC86V CC 3.0ns 15pF , 50pF 1k Ωopen GND V CC 74AHCT863.0V3.0ns15pF , 50pF1k ΩopenGNDV CC12.Package outlineFig 8.Package outline SOT108-1 (SO14)UNIT Amax.A 1A 2A 3b p c D (1)E (1)(1)e H E L L p Q Z y w v θREFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IEC JEDEC JEITAmminches 1.750.250.101.451.250.250.490.360.250.198.758.554.03.8 1.27 6.25.80.70.60.70.38oo 0.250.1DIMENSIONS (inch dimensions are derived from the original mm dimensions)Note1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.1.00.4SOT108-1Xw MθAA 1A 2b pD H EL pQdetail XE Z ecL v M A(A )3A78114y076E06MS-012pin 1 index0.0690.0100.0040.0570.0490.010.0190.0140.01000.00750.350.340.160.150.051.050.0410.2440.2280.0280.0240.0280.0120.010.250.010.0040.0390.01699-12-2703-02-190 2.5 5 mmscaleSO14: plastic small outline package; 14 leads; body width 3.9 mmSOT108-1Fig 9.Package outline SOT402-1 (TSSOP14)UNIT A 1A 2A 3b p c D (1)E (2)(1)e H E L L p Q Z y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.150.050.950.800.300.190.20.15.14.94.54.30.656.66.20.40.30.720.3880oo 0.130.10.21DIMENSIONS (mm are the original dimensions)Notes1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.0.750.50SOT402-1MO-15399-12-2703-02-18w Mb pD Ze0.2517148θAA 1A 2L p Qdetail XL(A )3H EE cv M AXAy0 2.5 5 mmscaleTSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1Amax.1.1pin 1 indexFig 10.Package outline SOT762-1 (DHVQFN14)terminal 1index area0.51A 1E h b UNIT y e 0.2c REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IEC JEDEC JEITA mm3.12.9D h 1.651.35y 12.62.41.150.85e 120.300.180.050.000.050.1DIMENSIONS (mm are the original dimensions) SOT762-1MO-241- - -- - -0.50.3L 0.1v 0.05w 02.5 5 mmscaleSOT762-1DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;14 terminals; body 2.5 x 3 x 0.85 mmA (1)max.AA 1cdetail Xyy 1Ce LE hD h e e 1b2613987114XD EC B A02-10-1703-01-27terminal 1index areaA C CB v M w M E (1)Note1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.D (1)13.Abbreviations14.Revision historyTable 10.AbbreviationsAcronym DescriptionCDM Charged Device ModelCMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine ModelTTLT ransistor-Transistor LogicTable 11.Revision historyDocument ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT86_220071115Product data sheet-74AHC_AHCT86_1Modiﬁcations:•The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.•Legal texts have been adapted to the new company name where appropriate.•Section 3: DHVQFN14 package added.•Section 7: derating values added for DHVQFN14 package.•Section 12: outline drawing added for DHVQFN14 package.74AHC_AHCT86_119990917Product speciﬁcation--15.Legal information15.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Deﬁnitions”.[3]The product status of device(s)described in this document may have changed since this document was published and may differ in case of multiple devices.The latest product status information is available on the Internet at URL .15.2DeﬁnitionsDraft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s)and title.A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.15.3DisclaimersGeneral —Information in this document is believed to be accurate andreliable.However,NXP Semiconductors does not give any representations or warranties,expressed or implied,as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation speciﬁcations and product descriptions, at any time and without notice.This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use —NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134)may cause permanent damage to the device.Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale,as published at /proﬁle/terms , including those pertaining to warranty,intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant,conveyance or implication of any license under any copyrights,patents or other industrial or intellectual property rights.15.4TrademarksNotice:All referenced brands,product names,service names and trademarks are the property of their respective owners.16.Contact informationFor additional information, please visit:For sales ofﬁce addresses, send an email to:salesaddresses@Document status [1][2]Product status [3]DeﬁnitionObjective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.Product [short] data sheetProductionThis document contains the product speciﬁcation.17.Contents1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Ordering information. . . . . . . . . . . . . . . . . . . . . 14Functional diagram . . . . . . . . . . . . . . . . . . . . . . 25Pinning information. . . . . . . . . . . . . . . . . . . . . . 35.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 36Functional description . . . . . . . . . . . . . . . . . . . 37Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 48Recommended operating conditions. . . . . . . . 49Static characteristics. . . . . . . . . . . . . . . . . . . . . 510Dynamic characteristics . . . . . . . . . . . . . . . . . . 611Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 712Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 913Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 1214Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1215Legal information. . . . . . . . . . . . . . . . . . . . . . . 1315.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1315.2Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1315.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1315.4T rademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1316Contact information. . . . . . . . . . . . . . . . . . . . . 1317Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2007.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@Date of release: 15 November 2007。

KK74HCT86A中文资料

TECHNICAL DATAKK74HCT86AQuad 2-Input Exclusive OR GateHigh-Performance Silicon-Gate CMOSThe KK KK 74HCT86A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. • TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µAPIN ASSIGNMENTLOGIC DIAGRAMPIN 14 =V CC PIN 7 = GNDFUNCTION TABLEInputs OutputA B Y L H L L L H H L H H HLMAXIMUM RATINGS*Symbol Parameter ValueUnit V CC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 VV IN DC Input Voltage (Referenced to GND) -1.5 to V CC +1.5 VV OUT DC Output Voltage (Referenced to GND) -0.5 to V CC +0.5 VI IN DC Input Current, per Pin ±20 mAI OUT DC Output Current, per Pin ±25 mAI CC DC Supply Current, V CC and GND Pins ±50 mAP D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750500mWTstg Storage Temperature -65 to +150 °CT L Lead Temperature, 1 mm from Case for 10 Seconds(Plastic DIP or SOIC Package)260 °C*Maximum Ratings are those values beyond which damage to the device may occur.Functional operation should be restricted to the Recommended Operating Conditions.+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°CSOIC Package: : - 7 mW/°C from 65° to 125°CRECOMMENDED OPERATING CONDITIONSSymbol Parameter MinMaxUnit V CC DC Supply Voltage (Referenced to GND) 4.5 5.5 VV IN, V OUT DC Input Voltage, Output Voltage (Referenced to GND) 0 V CC VT A Operating Temperature, All Package Types -55 +125 °Ct r, t f Input Rise and Fall Time (Figure 1) 0 500 nsThis device contains protection circuitry to guard against damage due to high static voltages or electric fields.However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to thishigh-impedance circuit. For proper operation, V IN and V OUT should be constrained to the range GND≤(V IN orV OUT)≤V CC.Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC). Unusedoutputs must be left open.DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)V CC Guaranteed LimitSymbol Parameter TestConditions V25 °Cto-55°C ≤85°C≤125°CUnitV IH Minimum High-Level Input Voltage V OUT=0.1 V or V CC-0.1 V⎢I OUT⎢≤ 20 µA4.55.52.02.02.02.02.02.0VV IL Maximum Low -Level Input Voltage V OUT=0.1 V or V CC-0.1 V⎢I OUT⎢≤ 20 µA4.55.50.80.80.80.80.80.8VV OH Minimum High-Level Output Voltage V IN= V IH or V IL⎢I OUT⎢≤ 20 µA4.55.54.45.44.45.44.45.4VV IN= V IH or V IL⎢I OUT⎢≤ 4.0 mA 4.5 3.98 3.84 3.7V OL Maximum Low-Level Output Voltage V IN=V IH or V IL⎢I OUT⎢≤ 20 µA4.55.50.10.10.10.10.10.1VV IN=V IH or V IL⎢I OUT⎢≤ 4.0 mA 4.50.26 0.33 0.4I IN Maximum InputLeakage CurrentV IN=V CC or GND 5.5±0.1 ±1.0 ±1.0 µAI CC Maximum QuiescentSupply Current(per Package) V IN=V CC or GNDI OUT=0µA5.5 2.0 20 40 µA∆I CC Additional QuiescentSupply Current V IN = 2.4 V, Any One InputV IN=V CC or GND, OtherInputs≥-55°C 25°C to125°CmA I OUT=0µA 5.5 2.9 2.4AC ELECTRICAL CHARACTERISTICS (V CC=5.0 V ± 10%, C L=50pF,Input t r=t f=6.0 ns)LimitGuaranteed Symbol Parameter 25 °C≤85°C ≤125°C Unitto-55°Ct PLH, t PHL Maximum Propagation Delay, Input A or B to24 30 36 nsOutput Y (Figures 1 and 2)15 19 22 nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 2)C IN Maximum Input Capacitance 10 10 10 pFPower Dissipation Capacitance (Per Gate) Typical @25°C,V CC=5.0 VC PD Used to determine the no-load dynamic power36 pFconsumption:P D=C PD V CC2f+I CC V CCFigure 1. Switching Waveforms Figure 2. Test CircuitEXPANDED LOGIC DIAGRAM(1/4 of the Device)。

74VHC86NX中文资料

© 2005 Fairchild Semiconductor CorporationDS011517November 1992Revised February 200574VHC86 Quad 2-Input Exclusive-OR Gate74VHC86Quad 2-Input Exclusive-OR GateGeneral DescriptionThe VHC86 is an advanced high speed CMOS Quad Exclusive OR Gate fabricated with silicon gate CMOS tech-nology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply volt-age. This device can be used to interface 5V to 3V systems and on two supply systems such as battery back up. This circuit prevents device destruction due to mismatched sup-ply and input voltages.Featuress High Speed: t PD 4.8 ns (typ) at V CC 5Vs Low Power Dissipation: I CC 2 P A (Max.) @ T A 25q C s High Noise Immunity: V NIH V NIL 28% V CC (Min.)s Power down protection is provided on all inputs s Low Noise: V OLP 0.8V (Max.)s Pin and Function Compatible with 74HC86Ordering Code:Surface mount packages are also available on T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Pb-Free package per JEDEC J-STD-020B.Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STS-020B). Device available in Tape and Reel only.Logic SymbolIEEE/IECPin DescriptionsConnection DiagramTruth TableOrder Number Package Package DescriptionNumber 74VHC86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC86SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide74VHC86MTC MTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC86MTCX_NL (Note 1)MTC14Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide74VHC86NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePin Names Description A 0–A 3Inputs B 0–B 3Inputs O 0–O 3OutputsA B O L L L L H H H L H HHL 274V H C 86Absolute Maximum Ratings (Note 2)Recommended Operating Conditions (Note 3)Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifica-tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari-ables. Fairchild does not recommend operation outside databook specifica-tions.Note 3: Unused inputs must be held HIGH or LOW. They may not float.DC Electrical CharacteristicsNoise CharacteristicsNote 4: Parameter guaranteed by design.Supply Voltage (V CC ) 0.5V to 7.0V DC Input Voltage (V IN ) 0.5V to 7.0V DC Output Voltage (V OUT ) 0.5V to V CC 0.5VInput Diode Current (I IK ) 20 mA Output Diode Current (I OK )r 20 mA DC Output Current (I OUT )r 25 mA DC V CC /GND Current (I CC )r 50 mAStorage Temperature (T STG ) 65q C to 150q CLead Temperature (T L )(Soldering, 10 seconds)260q CSupply Voltage (V CC ) 2.0V to 5.5V Input Voltage (V IN )0V to5.5V Output Voltage (V OUT )0V to V CCOperating Temperature (T OPR ) 40q C to 85q CInput Rise and Fall Time (t r , t f )V CC 3.3V r 0.3V 0 ns/V a 100 ns/V V CC 5.0V r 0.5V0 ns/V a 20 ns/V Symbol ParameterV CC (V)T A 25q CT A 40q C to 85q C Units ConditionsMin TypMaxMin MaxV IH HIGH Level 2.0 1.50 1.50V Input Voltage 3.0 5.50.7 V CC0.7 V CCV IL LOW Level 2.00.500.50VInput Voltage 3.0 5.50.3 V CC0.3 V CC V OHHIGH Level 2.0 1.9 2.0 1.9V IN V IH I OH 50 P AOutput Voltage3.0 2.9 3.0 2.9Vor V IL4.5 4.4 4.5 4.43.0 2.58 2.48VI OH 4 mA 4.53.943.80I OH 8 mAV OLLOW Level 2.00.00.10.1V IN V IH I OL 50 P A Output Voltage3.00.00.10.1V or V IL4.50.00.10.13.00.360.44V I OL 4 mA 4.50.360.44I OL 8 mAI IN Input Leakage Current 0 5.5r 0.1r 1.0P A V IN 5.5V or GND I CCQuiescent Supply Current5.52.020.0P AV IN V CC or GND Symbol ParameterV CC (V)T A 25q C Units ConditionsTyp Limit V OLP(Note 4)Quiet Output Maximum Dynamic V OL 5.00.30.8V C L 50 pF V OLV (Note 4)Quiet Output Minimum Dynamic V OL5.0 0.30.8V C L 50 pF V IHD (Note 4)Minimum HIGH Level Dynamic Input Voltage 5.0 3.5V C L 50 pF V ILD (Note 4)Maximum LOW Level Dynamic Input Voltage5.01.5VC L 50 pF74VHC86AC Electrical CharacteristicsNote 5: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC (opr.) C PD * V CC * f IN I CC /4 (per gate).Symbol ParameterV CC (V)T A 25q CT A 40q C to 85q C Units Conditions MinTyp Max Min Max t PHL Propagation Delay3.3 r 0.37.011.0 1.013.0ns C L 15 pF t PLH9.514.5 1.016.5C L 50 pF 5.0 r 0.54.8 6.8 1.08.0ns C L 15 pF 6.38.8 1.010.0C L 50 pF C IN Input Capacitance41010pF V CC Open C PDPower Dissipation Capacitance18pF(Note 5) 474V H C 86Physical Dimensions inches (millimeters) unless otherwise noted14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage Number M14A 74VHC86Physical Dimensions inches (millimeters) unless otherwise noted (Continued)Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M14D 674V H C 86Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC1474VHC86 Quad 2-Input Exclusive-OR GatePhysical Dimensions inches (millimeters) unless otherwise noted (Continued)14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePackage Number N14AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life supportdevice or system whose failure to perform can be rea-sonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.。

74LVTH16244TTR, 规格书,Datasheet 资料

1/13February 2004sHIGH SPEED:t PD =3.2ns (MAX.)at T A =85°C V CC =3.0V sLOW POWER DISSIPATION HIGH LEVEL OUTPUT:I CC =190µA (MAX.)at T A =85°C sOUTPUT IMPEDANCE:|I OH |=32mA,I OL =64mA (MIN at V CC =3.0V)|I OH |=8mA,I OL =24mA (MIN at V CC =2.7V)sBALANCED PROPAGATION DELAYS:t PLH ≅t PHLsPOWER DOWN PROTECTION ON INPUTS AND OUTPUTSsCOMPATIBLE WITH TTL OUTPUTS:V IH =2V (MIN),V IL =0.8V(MAX)at V CC =2.7to 3.6VsPOWER-UP/DOWN 3-STATE:I OZPU =100µA MAX at V CC =0V to 1.5V,V CC =1.5V to 0V,T A =85°Cs BUS HOLD PROVIDED ON DATA INPUTS sOPERATING VOLTAGE RANGE:V CC (OPR)=2.7V to 3.6VsPIN AND FUNCTION COMPATIBLE WITH 74SERIES H16244sLATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)DESCRIPTIONThe 74LVTH16244is a low voltage BiCMOS 16BIT BUS BUFFER (NON-INVERTED)fabricated with sub-micron silicon gate and five-layer metal wiring BiCMOS technology.It is ideal and full specified for hot-insertion and high speed 3.3V ap-plications;the power-up/down 3-state circuitry places the outputs in the high impedance state during power-up/down,which prevents driver con-flict.This function is guaranteed when V CC is be-tween 0and 1.5V.It can be interfaced to 3.3V sig-nal environment for both inputs and outputs.Any nG output control governs four BUS BUFFERS.Output Enable input (nG)tied together gives full 16-bit operation.When nG is LOW,the outputs are on.When nG is HIGH,the output are in high impedance state effectively isolated.Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistors.All inputs and outputs are equipped with protec-tion circuits against static discharge,giving them ESD immunity and transient excess voltage.74LVTH16244LOW VOLTAGE BICMOS 16BIT BUS BUFFER WITH BUS HOLD AND POWER UP 3-STATEORDER CODESPACKAGE T &RTSSOP4874LVTH16244TTR TFBGA5474LVTH16244LBRLOGIC DIAGRAMOb s o l e t e P r o d uc t (s ) - od u c t (s ) O b s o le t e P r o d u c t (s ) - o l e t e P r o dOb s o l e t e P r o d uc t (s ) - O b s o l e t e P r od 74LVTH162442/13INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTFBGA PIN N oTSSOP PIN N oSYMBOLNAME AND FUNCTIONA3,J31,241G,4G Output Enable Inputs A6,B5,B6,C5,C6,D5,D6,E5,E6,F5,F6,G5,G6,H5,H6,J647,46,44,43,41,40,38,37,36,35,33,32,30,29,27,261A1-4,2A1-43A1-4,4A1-4Data Inputs A1,B2,B1,C2,C1,D2,D1,E2,E1,F2,F1,G2,G1,H2,H1,J12,3,5,6,8,9,11,12,13,14,16,17,19,20,22,231Y1-4,2Y1-43Y1-4,4Y1-4Data OutputsJ4,A425,483G,2G Output Enable Inputs D3,D4,E3,E4,F3,F44,10,15,21,28,34,39,45GND Ground (0V)A2,A5,B3,B4,H3,H4,J2,J5-NC No ConnectedC4,G4,C3,G342,31,7,18V CCPositive Supply VoltageO b s o l e t e P r o d u c t (s ) - O b s o lOb s o l e74LVTH162443/13PIN CONNECTION (top view for TSSOP,top through view for BGA)TRUTH TABLEZ =High Impedance;X =Don’t care,n =1..4,x =1..4INPUTSOUTPUT nG xAn xYn L L LL H H HXZOb s o l e t e P r o d uc t (s ) - O b s o l e t e P r od u c t (s ) 74LVTH162444/13ABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these conditions isnot implied(*)500mW:≅ 65°C derated to 300mW by 10mW/°C:65°C to 85°CRECOMMENDED OPERATING CONDITIONS1)V I from 0.8V to 2.0V at V CC =2.7V to 3.6VSymbol ParameterValue Unit V CC Supply Voltage -0.5to +4.6V V I DC Input Voltage-0.5to +4.6V V O DC Output Voltage (Output disabled)-0.5to +4.6V V O DC Output Voltage -0.5to V CC +0.5V I IK DC Input Diode Current −50mA I OK DC Output Diode Current −50mA I O DC Output Current low state 128mA I O DC Output Current high state 64mA I CC DC V CC or Ground Current ±100mA P d Power Dissipation (*)400mWT stgStorage Temperature-65to +150°CT LLead Temperature (10sec)300°CSymbol ParameterValue Unit V CC Supply Voltage 2.7to 3.6V V I Input Voltage (An,nG)0to 3.6VV O Output VoltageV CC VV OOutput Voltage (Output Disabled) 3.6VT op Operating Temperature -40to 85°Cdt/dV CC Minimum Power-up ramp rate200µs/V dt/dvInput Rise and Fall Time (note 1)0to 20ns/VO b s o l e t e P r o d u c t (s ) - O b s o l e t e P r o d u c t (s )Ob s o l e t e P r o d uc t (s ) - O b s o l e t e P r od u c t (s ) 74LVTH162445/13DC SPECIFICATIONS(*)Power Supply Range V CC =3.3±0.3VSymbolParameterTest ConditionValueUnitV CC (V)T A =25°C -40to 85°C Min.Typ.Max.Min.Max.V IK Input Voltage Clamp (An,nG)2.7I IK =-18mA-0.85-1.2V V IH High Level Input Voltage (An,nG)2.7 2.0 2.0V3.3(*) 2.02.0V IL Low Level Input Voltage (An,nG)2.70.80.8V3.3(*)0.80.8I IControl Input Leakage Current3.6V I =GND or V CC ±1µA Data Input Leakage Current3.6V I =GND or V CCnG =GND ±1µA I I(HOLD)Data Input Hold Current3.0V I =0.8V13575µA3.0V I =2.0V -135-753.6V I =0to 3.6V ±500µAV OHHigh Level Output Voltage2.7I O =-100µA 2.5V2.7I O =-8mA 2.43.0I O =-32mA 2.0V OLLow Level Output Voltage2.7I O =100µA0.2V2.7I O =24mA 0.53.0I O =16mA 0.43.0I O =32mA 0.53.0I O =64mA0.55I OZHigh Impedance Output Leakage Current3.6V O =0.5V or 3.0V V I =V IL or V IH nG =V CC±5µAI OZPUHigh Impedance Output Leakage Current0to 1.5V O =0.5V or 3.0V V I =GND or V CC nG =GND or V CC±100µAI OZPDHigh Impedance Output Leakage Current 1.5to 0V O =0.5V or 3.0V V I =GND or V CC nG =GND or V CC±100µAI OFFPower Off Leakage CurrentV I =GND to 3.6V V O =GND to 3.6V ±100µAI CCAQuiescent Supply Current3.6V O =High ,I O =00.19mAV O =Low,I O =05.0nG =V CC,I O =0V O =GND or V CC0.19∆I CCMaximum Quiescent Supply Current /Input (An or nG)3.3(*)V I =V CC -0.6V An,nG =V CC or GND0.2mAO b s o l e t e P r o d u c t (s ) - O b s o l e t e P r o d u c t (s )Ob s o l e t e P r o d uc t (s ) 74LVTH162446/13AC ELECTRICAL CHARACTERISTICS1)Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction,either HIGH or LOW (t OSLH =|t PLHm -t PLHn |,t OSHL =|t PHLm -t PHLn |2)Parameter guaranteed by designCAPACITANCE CHARACTERISTICSTEST CIRCUITC L =50pF or equivalent (includes jig and probe capacitance)R L =R 1=500Ωor equivalentR T =Z OUT of pulse generator (typically 50Ω)SymbolParameterTest ConditionValueUnitV CC =2.7V V CC =3.3± 0.3V Min.Max.Min.Typ.Max.t PLH Propagation Delay Time An to Yn T A =-40to 85°C3.7 1.2 2.5 3.2ns t PHL Propagation Delay Time An to Yn 3.7 1.2 2.5 3.2ns t PZL Output Enable Time nG to Yn 5.0 1.2 2.74.0ns t PZH Output Enable Time nG to Yn5.0 1.2 2.7 4.0ns t PLZ Output Disable Time nG to Yn 4.4 2.0 3.7 4.2ns t PHZOutput Disable Time nG to Yn 5.02.24.45.1ns t OSLHt OSHLOutput To Output Skew Time (note1,2)0.5nsSymbol ParameterTest Condition ValueUnitV CC (V)T A =25°C -40to 85°C Min.Typ.Max.Min.Max.C IControl Input Capacitance open 6pFC OOutput Capacitance3.315pFTEST SWITCH t PLH ,t PHLOpen t PZL ,t PLZ (V CC =3.0to 3.6V)6V t PZL ,t PLZ (V CC =2.7V)6V t PZH ,t PHZGNDt (s ) - O b s o l e t e P r o d u c t (s )Ob s o l e t e P r o d uc t (s74LVTH162447/13WAVEFORM SYMBOL VALUEWAVEFORM 1:PROPAGATION DELAY (f=1MHz;50%duty cycle)SymbolV CC3.0to 3.6V2.7V V IH 2.7V V CC V M 1.5V 1.5V V X V OL +0.3V V OL +0.15V V YV OH -0.3VV OH -0.15VO b s o l e t e POb s o l e t e P r o d uc t (s ) - O b s o l e74LVTH162448/13WAVEFORM 2:OUTPUT ENABLE AND DISABLE TIME (f=1MHz;50%duty cycle)O b s o l e t e P r o d u c t (s )Ob s o l e t e P r o d uc t (s ) - O b s o l e t e P r od u c t (s ) 74LVTH1624413/13Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIESAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.O b s o l e t e P r o d u c t (s ) - O b s o l e t e P r o d u c t (s )。

SN74HC86NSRE4中文资料

PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)84046012A ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC8404601CA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC8404601DA ACTIVE CFP W141TBD Call TI Level-NC-NC-NC JM38510/65202BCA ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SN54HC86J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NCSN74HC86D ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86DE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86DRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86DT ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86DTE4ACTIVE SOIC D14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74HC86NE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCSN74HC86NSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86NSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86PW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86PWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC86PWLE OBSOLETE TSSOP PW14TBD Call TI Call TISN74HC86PWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86PWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86PWT ACTIVE TSSOP PW14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMSN74HC86PWTE4ACTIVE TSSOP PW14250Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SNJ54HC86FK ACTIVE LCCC FK201TBD Call TI Level-NC-NC-NC SNJ54HC86J ACTIVE CDIP J141TBD Call TI Level-NC-NC-NC SNJ54HC86W ACTIVE CFP W141TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third-party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。

CD74HC86中文资料

-55 to 125 -55 to 125 -55 to 125
Wafer Wafer Die
• Adders and Subtractors
NOTE: When ordering, use the entire part number. Add the sufﬁx 96 to obtain the variant in the tape and reel.
Pinout
CD74HC86, CD74HCT86 (PDIP, SOIC) TOP VIEW
1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
The Harris CD74HC86, CD74HCT86 contain four independent EXCLUSIVE OR gates in one package. They provide the system designer with a means for implementation of the EXCLUSIVE OR function. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The 74HCT logic family is functionally pin compatible with the standard 74LS logic family.

74LVX02TTR资料

1/11August 2004sHIGH SPEED:t PD = 4.5ns (TYP.) at V CC = 3.3V s 5V TOLERANT INPUTS sINPUT VOLTAGE LEVEL:V IL =0.8V, V IH =2V at V CC =3V sLOW POWER DISSIPATION:I CC = 2 µA (MAX.) at T A =25°C sLOW NOISE:V OLP = 0.3V (TYP .) at V CC = 3.3VsSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 4mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsOPERATING VOLTAGE RANGE:V CC (OPR) = 2V to 3.6V (1.2V Data Retention)sPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02s IMPROVED LATCH-UP IMMUNITYsPOWER DOWN PROTECTION ON INPUTSDESCRIPTIONThe 74LVX02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output.Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.74LVX02LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATEWITH 5V TOLERANT INPUTSFigure 1: Pin Connection And IEC Logic SymbolsTable 1: Order CodesPACKAGE T & R SOP 74LVX02MTR TSSOP74LVX02TTR74LVX022/11Figure 2: Input Equivalent CircuitTable 2: Pin DescriptionTable 3: Truth TableTable 4: Absolute Maximum RatingsAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions isnot implied.Table 5: Recommended Operating Conditions1) Truth Table guaranteed: 1.2V to 3.6V 2) V INfrom 0.8V to 2.0VPIN N°SYMBOL NAME AND FUNCTION 2, 5, 8, 111A to 4A Data Inputs 3, 6, 9, 121B to 4B Data Inputs 1, 4, 10, 131Y to 4Y Data Outputs 7GND Ground (0V)14V CCPositive Supply VoltageA B Y L L H L H L H L L HHLSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7.0V V I DC Input Voltage -0.5 to +7.0V V O DC Output Voltage -0.5 to V CC + 0.5V I IK DC Input Diode Current - 20mA I OK DC Output Diode Current ± 20mA I ODC Output Current± 25mA I CC or I GND DC V CC or Ground Current± 50mA T stgStorage Temperature -65 to +150°C T LLead Temperature (10 sec)300°CSymbol ParameterValue Unit V CC Supply Voltage (note 1) 2 to 3.6V V I Input Voltage 0 to 5.5V V O Output Voltage 0 to V CC V T op Operating Temperature-55 to 125°C dt/dvInput Rise and Fall Time (note 2) (V CC = 3.3V)0 to 100ns/V74LVX023/11Table 6: DC SpecificationsTable 7: Dynamic Switching Characteristics1) Worst case package.2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V ILD ), 0V to threshold (V IHD ), f=1MHz.SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V IHHigh Level Input Voltage2.0 1.5 1.5 1.5V3.0 2.0 2.0 2.03.6 2.42.42.4V ILLow Level Input Voltage2.00.50.50.5V3.00.80.80.83.60.80.80.8V OHHigh Level Output Voltage2.0I O =-50 µA 1.9 2.0 1.9 1.9V3.0I O =-50 µA 2.9 3.02.9 2.93.0I O =-4 mA 2.582.482.4V OLLow Level Output Voltage2.0I O =50 µA 0.00.10.10.1V3.0I O =50 µA 0.00.10.10.13.0I O =4 mA 0.360.440.55I I Input Leakage Current3.6V I = 5V or GND ± 0.1± 1± 1µA I CCQuiescent Supply Current3.6V I = V CC or GND22020µA SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V OLP Dynamic Low Voltage Quiet Output (note 1, 2) 3.3C L = 50 pF0.30.5VV OLV -0.5-0.3V IHDDynamic HighVoltage Input (note 1, 3)3.32V ILDDynamic LowVoltage Input (note 1, 3)3.30.874LVX024/11Table 8: AC Electrical Characteristics (Input t r = t f = 3ns)1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-ing in the same direction, either HIGH or LOW 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3VTable 9: Capacitive Characteristics1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /4 (per gate)Figure 3: Test CircuitC L =15/50pF or equivalent (includes jig and probe capacitance)R T = Z OUT of pulse generator (typically 50Ω)SymbolParameterTest ConditionValue UnitV CC (V)C L (pF)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.t PLH t PHL Propagation DelayTime2.715 5.910.7 1.013.5 1.015.0ns2.7508.414.2 1.017.0 1.019.03.3(*)15 4.5 6.6 1.08.0 1.010.03.3(*)507.010.1 1.011.5 1.013.0t OSLH t OSHLOutput To Output Skew Time (note1, 2)2.7500.5 1.0 1.5 1.5ns3.3(*)500.51.01.51.5SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.C IN Input Capacitance 3.34101010pF C PDPower Dissipation Capacitance (note 1)3.315pF74LVX02 Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)5/1174LVX02Table 10: Revision HistoryDate Revision Description of Changes 27-Aug-20044Ordering Codes Revision - pag. 1.10/11元器件交易网74LVX02 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is grantedby implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subjectto change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are notauthorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronicsAll other names are the property of their respective owners© 2004 STMicroelectronics - All Rights ReservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America11/11。

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s HIGH SPEED:t PD=4.8ns(TYP.)at V CC=5V s LOW POWER DISSIPATION:I CC=2µA(MAX.)at T A=25°Cs HIGH NOISE IMMUNITY:V NIH=V NIL=28%V CC(MIN.)s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |I OH|=I OL=8mA(MIN)s BALANCED PROPAGATION DELAYS: t PLH≅t PHLs OPERATING VOLTAGE RANGE:V CC(OPR)=2V to5.5Vs PIN AND FUNCTION COMPATIBLE WITH 74SERIES86s IMPROVED LATCH-UP IMMUNITYs LOW NOISE:V OLP=0.8V(MAX.) DESCRIPTIONThe74VHC86is an advanced high-speed CMOS QUAD EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.Power down protection is provided on all inputs and0to7V can be accepted on inputs with no regard to the supply voltage.This device can be used to interface5V to3V.All inputs and outputs are equipped with protection circuits against static discharge,giving them2KV ESD immunity and transient excess voltage.74VHC86 QUAD EXCLUSIVE OR GATEPIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODESPACKAGE TUBE T&R SOP74VHC86M74VHC86MTRTSSOP74VHC86TTRTSSOPSOP1/8June200174VHC862/8INPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTRUTH TABLEABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur.Functional operation under these conditions is not impliedRECOMMENDED OPERATING CONDITIONS1)V IN from 30%to 70%of V CCPIN No SYMBOL NAME AND FUNCTION 1,4,9,121A to 4A Data Inputs 2,5,10,131B to 4B Data Inputs 3,6,8,111Y to 4Y Data Outputs 7GND Ground (0V)14V CCPositive Supply VoltageA B Y L L L L H H H L H HHLSymbol ParameterValue Unit V CC Supply Voltage -0.5to +7.0V V I DC Input Voltage -0.5to +7.0V V O DC Output Voltage -0.5to V CC +0.5V I IK DC Input Diode Current -20mA I OK DC Output Diode Current ±20mA I O DC Output Current ±25mA I CC or I GND DC V CC or Ground Current±50mA T stg Storage Temperature -65to +150°C T LLead Temperature (10sec)300°CSymbol ParameterValue Unit V CC Supply Voltage 2to 5.5V V I Input Voltage 0to 5.5V V O Output Voltage 0to V CC V T op Operating Temperature-55to 125°C dt/dvInput Rise and Fall Time (note 1)(V CC =3.3±0.3V)(V CC =5.0±0.5V)0to 1000to 20ns/V74VHC863/8DC SPECIFICATIONSAC ELECTRICAL CHARACTERISTICS (Input t r =t f =3ns)(*)Voltage range is 3.3V ±0.3V (**)Voltage range is 5.0V ±0.5VCAPACITIVE CHARACTERISTICS1)C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.(Refer to Test Circuit).Average operating current can be obtained by the following equation.I CC(opr)=C PD x V CC x f IN +I CC /4(per gate)SymbolParameterTest ConditionValue UnitV CC (V)T A =25°C -40to 85°C -55to 125°C Min.Typ.Max.Min.Max.Min.Max.V IHHigh Level Input Voltage 2.0 1.51.51.5V3.0to 5.50.7V CC0.7V CC0.7V CCV ILLow Level Input Voltage2.00.50.50.5V3.0to 5.50.3V CC0.3V CC0.3V CCV OHHigh Level Output Voltage2.0I O =-50µA 1.9 2.0 1.9 1.9V3.0I O =-50µA 2.9 3.0 2.9 2.94.5I O =-50µA 4.4 4.54.4 4.43.0I O =-4mA 2.58 2.48 2.44.5I O =-8mA 3.943.83.7V OLLow Level Output Voltage2.0I O =50µA 0.00.10.10.1V3.0I O =50µA 0.00.10.10.14.5I O =50µA 0.00.10.10.13.0I O =4mA 0.360.440.554.5I O =8mA 0.360.440.55I I Input Leakage Current0to 5.5V I =5.5V or GND ±0.1±1±1µA I CCQuiescent Supply Current5.5V I =V CC or GND22020µA SymbolParameterTest ConditionValueUnitV CC (V)C L (pF)T A =25°C -40to 85°C -55to 125°C Min.Typ.Max.Min.Max.Min.Max.t PLH t PHLPropagation Delay Time3.3(*)157.011.0 1.013.0 1.013.0ns 3.3(*)509.514.5 1.016.5 1.016.55.0(**)15 4.86.8 1.08.0 1.08.05.0(**)506.38.81.010.01.010.0SymbolParameterTest ConditionValue UnitT A =25°C -40to 85°C -55to 125°C Min.Typ.Max.Min.Max.Min.Max.C IN Input Capacitance 6101010pF C PDPower Dissipation Capacitance (note 1)18pF74VHC864/8DYNAMIC SWITCHING CHARACTERISTICS1)Worst case package.2)Max number of outputs defined as (n).Data inputs are driven 0V to 5.0V,(n-1)outputs switching and one output at GND.3)Max number of data inputs (n)switching.(n-1)switching 0V to 5.0V.Inputs under test switching:5.0V to threshold (V ILD ),0V to threshold (V IHD ),f=1MHz.TEST CIRCUITC L =15/50pF or equivalent (includes jig and probe capacitance)R T =Z OUT of pulse generator (typically 50Ω)SymbolParameterTest ConditionValue UnitV CC (V)T A =25°C -40to 85°C -55to 125°C Min.Typ.Max.Min.Max.Min.Max.V OLP Dynamic Low Voltage Quiet Output (note 1,2) 5.0C L =50pF0.30.8V V OLV -0.8-0.3V IHD Dynamic High Voltage Input (note 1,3) 5.0 3.5VV ILDDynamic Low Voltage Input (note 1,3)5.0 1.5V74VHC86 WAVEFORM:PROPAGATION DELAYS(f=1MHz;50%duty cycle)5/874VHC866/8DIM.mm.inchMIN.TYP MAX.MIN.TYP.MAX.A 1.750.068 a10.10.20.0030.007 a2 1.650.064 b0.350.460.0130.018 b10.190.250.0070.010 C0.50.019c145°(typ.)D8.558.750.3360.344 E 5.8 6.20.2280.244 e 1.270.050e37.620.300F 3.8 4.00.1490.157G 4.6 5.30.1810.208 L0.5 1.270.0190.050 M0.680.026 S8°(max.)SO-14MECHANICAL DATAPO13G74VHC867/8DIM.mm.inchMIN.TYPMAX.MIN.TYP.MAX.A 1.20.047A10.050.150.0020.0040.006A20.81 1.050.0310.0390.041b 0.190.300.0070.012c 0.090.200.0040.0089D 4.95 5.10.1930.1970.201E 6.2 6.4 6.60.2440.2520.260E1 4.34.4 4.480.1690.1730.176e 0.65BSC0.0256BSCK 0°8°0°8°L0.450.600.750.0180.0240.030TSSOP14MECHANICAL DATAcEbA2AE1D1PIN 1IDENTIFICATIONA1LKe0080337D74VHC86Information furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specifications mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.©The ST logo is a registered trademark of STMicroelectronics©2001STMicroelectronics-Printed in Italy-All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-China-Finland-France-Germany-Hong Kong-India-Italy-Japan-Malaysia-Malta-MoroccoSingapore-Spain-Sweden-Switzerland-United Kingdom©http://w 8/8。