SN74AS151DE4中文资料
SN74AS00中文资料
元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 1998, Texas Instruments Incorporated。
SN74HC151DR中文资料
PACKAGING INFORMATIONOrderable DeviceStatus (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)84128012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 8412801EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN54HC151J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN74HC151D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DT ACTIVE SOIC D 16250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151DTE4ACTIVE SOIC D 16250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74HC151NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74HC151NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PW ACTIVE TSSOP PW 1690Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PWE4ACTIVE TSSOP PW 1690Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PWR ACTIVE TSSOP PW 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PWRE4ACTIVE TSSOP PW 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PWT ACTIVE TSSOP PW 16250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74HC151PWTE4ACTIVE TSSOP PW 16250Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIMSNJ54HC151FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54HC151JACTIVECDIPJ161TBDA42SNPBN /A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.6-Dec-2006(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.6-Dec-2006IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. T o minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetwork Microcontrollers Security /securityLow Power Wireless /lpw Telephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2006, Texas Instruments Incorporated。
sn74lvc1t45设计原理
一、介绍1.1 重点突出sn74lvc1t45的重要性1.2 sn74lvc1t45在数字电路中的应用二、sn74lvc1t45的技术特点2.1 电压范围2.2 输入/输出端口特性2.3 传输速率特性三、sn74lvc1t45的工作原理3.1 输入端口工作原理3.2 输出端口工作原理四、sn74lvc1t45的设计指南4.1 电路设计中的注意事项4.2 确保信号稳定性的设计方法4.3 优化sn74lvc1t45的应用方案五、sn74lvc1t45的性能参数5.1 传输速率测试结果5.2 电压范围测试结果六、sn74lvc1t45在实际项目中的应用案例分析6.1 案例一：数字电路中的应用6.2 案例二：通讯设备中的应用七、结语一、介绍在当今数字电路设计的领域中，sn74lvc1t45作为一种重要的电路元件，具有广泛的应用前景。
sn74lvc1t45作为数字电路中的信号传输器件，在信息传输和处理中具有重要作用。
本文将从sn74lvc1t45的技术特点、工作原理、设计指南、性能参数和实际应用等方面进行详细介绍。
1.1 重点突出sn74lvc1t45的重要性sn74lvc1t45作为数字电路中的重要组成部分，其稳定、可靠的性能对整个电路系统的正常运行具有至关重要的影响。
了解sn74lvc1t45的设计原理对于数字电路设计者来说至关重要。
1.2 sn74lvc1t45在数字电路中的应用sn74lvc1t45主要用于时钟信号的传输、电平转换以及数据总线的缓冲和驱动等方面，在数字系统的设计中扮演着重要的角色。
二、sn74lvc1t45的技术特点2.1 电压范围sn74lvc1t45适用于1.65V至5.5V的电压范围，这使得它可以在多种不同电压级别的数字系统中灵活应用。
2.2 输入/输出端口特性sn74lvc1t45具有高阻态输入和输出端口，能够有效降低电路的功耗，并提高电路的抗干扰能力。
2.3 传输速率特性sn74lvc1t45具有快速的传输速率，从而能够满足数字系统对数据传输速率的高要求。
74HC154中文资料_数据手册_参数
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
HHXXXXHHHHHHHHHH H H H H H H HL XXXXHHHHHHHHHH H H H H H H LHXXXXHHHHHHHHHH H H H H H H L L L L L L LHHHHHHHHH H H H H H H
HL L LHLHHHHHHHH H H H H H H LHL LHHLHHHHHHH H H H H H H HHL LHHHLHHHHHH H H H H H H L LHLHHHHLHHHHH H H H H H H HLHLHHHHHLHHHH H H H H H H LHHLHHHHHHLHHH H H H H H H HHHLHHHHHHHLHH H H H H H H L L LHHHHHHHHHLH H H H H H H HL LHHHHHHHHHHL H H H H H H LHLHHHHHHHHHHH L H H H H H HHLHHHHHHHHHHH H L H H H H L LHHHHHHHHHHHH H H L H H H HLHHHHHHHHHHHH H H H L H H LHHHHHHHHHHHHH H H H H L H HHHHHHHHHHHHHH H H H H H L
notes 1 and 2
TYPICAL
74HC154 74HCT154
11
13
3.5
3.5
SN74LVC1T45DCKRE4中文资料
FEATURESV CCA V CCBBGNDADBV PACKAGE(TOP VIEW)DCK PACKAGE(TOP VIEW)V CCA V CCBBAV CCBDRL PACKAGE(TOP VIEW)See mechanical drawings for dimensions.DIRDIRYZP PACKAGE(BOTTOM VIEW)V CCAAV CCBBGND DIR DESCRIPTION/ORDERING INFORMATIONWITH CONFIGURABLE VOLTAGE TRANSLATION AND3-STATE OUTPUTSSCES515H–DECEMBER2003–REVISED JANUARY2007•Available in the Texas Instruments•Max Data RatesNanoFree™Package–420Mbps(3.3-V to5-V Translation)•Fully Configurable Dual-Rail Design Allows–210Mbps(Translate to3.3V) Each Port to Operate Over the Full1.65-V to–140Mbps(Translate to2.5V)5.5-V Power-Supply Range–75Mbps(Translate to1.8V)•V CC Isolation Feature–If Either V CC Input Is at•Latch-Up Performance Exceeds100mA Per GND,Both Ports Are in the High-ImpedanceJESD78,Class IIState•ESD Protection Exceeds JESD22•DIR Input Circuit Referenced to V CCA–2000-V Human-Body Model(A114-A)•Low Power Consumption,4-µA Max I CC–200-V Machine Model(A115-A)•±24-mA Output Drive at3.3V–1000-V Charged-Device Model(C101)•I off Supports Partial-Power-Down ModeOperationThis single-bit noninverting bus transceiver uses two separate configurable power-supply rails.The A port is designed to track V CCA.V CCA accepts any supply voltage from1.65V to5.5V.The B port is designed to track V CCB.V CCB accepts any supply voltage from1.65V to5.5V.This allows for universal low-voltage bidirectional translation between any of the1.8-V,2.5-V,3.3-V,and5-V voltage nodes.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING(2)NanoFree™–WCSP(DSBGA)Reel of3000SN74LVC1T45YZPR___TA_0.23-mm Large Bump–YZP(Pb-free)Reel of3000SN74LVC1T45DBVRSOT(SOT-23)–DBV CT1_Reel of250SN74LVC1T45DBVT–40°C to85°CReel of3000SN74LVC1T45DCKRSOT(SC-70)–DCKReel of250SN74LVC1T45DCKT TA_SOT(SOT-533)–DRL Reel of4000SN74LVC1T45DRLR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.(2)DBV/DCK/DRL:The actual top-side marking has one additional character that designates the assembly/test site.YZP:The actual top-side marking has three preceding characters to denote year,month,and sequence code,and one following character to designate the assembly/test site.Pin1identifier indicates solder-bump composition(1=SnPb,•=Pb-free).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.NanoFree is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Copyright©2003–2007,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.DESCRIPTION/ORDERING INFORMATION (CONTINUED)BDIRAV CCA V CCBWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007The SN74LVC1T45is designed for asynchronous communication between two data buses.The logic levels of the direction-control (DIR)input activate either the B-port outputs or the A-port outputs.The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated.The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I CC and I CCZ .The SN74LVC1T45is designed so that the DIR input is powered by V CCA .This device is fully specified for partial-power-down applications using I off .The I off circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.The V CC isolation feature ensures that if either V CC input is at GND,then both ports are in the high-impedance state.NanoFree™package technology is a major breakthrough in IC packaging concepts,using the die as the package.FUNCTION TABLE (1)INPUT OPERATION DIR L B data to A bus HA data toB bus(1)Input circuits of the data I/Os always are active.LOGIC DIAGRAM (POSITIVE LOGIC)2Submit Documentation FeedbackAbsolute Maximum Ratings (1)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CCA Supply voltage range –0.5 6.5V V CCB V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V A port –0.5V CCA +0.5V O Voltage range applied to any output in the high or low state (2)(3)V B port –0.5V CCB +0.5I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADBV package165DCK package 259θJAPackage thermal impedance (4)°C/W DRL package 142YZP package123T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.3Submit Documentation FeedbackRecommended Operating Conditions (1)(2)(3)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007V CCIV CCOMIN MAX UNIT V CCA 1.65 5.5Supply voltageVV CCB1.655.51.65V to 1.95VV CCI ×0.652.3V to 2.7V 1.7High-level V IHData inputs (4)Vinput voltage3V to 3.6V 24.5V to5.5V V CCI ×0.71.65V to 1.95VV CCI ×0.352.3V to 2.7V 0.7Low-level V ILData inputs (4)V input voltage3V to 3.6V 0.84.5V to5.5V V CCI ×0.31.65V to 1.95VV CCA ×0.652.3V to 2.7V 1.7High-level DIRV IHVinput voltage(referenced to V CCA )(5)3V to 3.6V 24.5V to5.5V V CCA ×0.71.65V to 1.95VV CCA ×0.352.3V to 2.7V 0.7Low-level DIRV ILV input voltage (referenced to V CCA )(5)3V to 3.6V 0.84.5V to5.5VV CCA ×0.3V I Input voltage 0 5.5V V OOutput voltageV CCOV 1.65V to 1.95V–42.3V to 2.7V –8I OHHigh-level output currentmA 3V to 3.6V –244.5V to 5.5V –321.65V to 1.95V42.3V to 2.7V 8I OLLow-level output currentmA 3V to 3.6V 244.5V to 5.5V321.65V to 1.95V202.3V to 2.7V 20Data inputsInput transition ∆t/∆v3V to 3.6V 10ns/V rise or fall rate4.5V to5.5V5Control inputs1.65V to 5.5V5T A Operating free-air temperature–4085°C (1)V CCI is the V CC associated with the input port.(2)V CCO is the V CC associated with the output port.(3)All unused data inputs of the device must be held at V CCI or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs ,literature number SCBA004.(4)For V CCI values not specified in the data sheet,V IH min =V CCI ×0.7V,V IL max =V CCI ×0.3V.(5)For V CCI values not specified in the data sheet,V IH min =V CCA ×0.7V,V IL max =V CCA ×0.3V.4Submit Documentation FeedbackElectrical Characteristics (1)(2)WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range (unless otherwise noted)T A =25°C –40°C to 85°C PARAMETERTEST CONDITIONS V CCA V CCB UNITMINTYPMAXMIN MAXV CCO I OH =–100µA1.65V to 4.5V1.65V to 4.5V–0.1I OH =–4mA 1.65V 1.65V 1.2V OHV I =V IHVI OH =–8mA 2.3V 2.3V 1.9I OH =–24mA 3V 3V 2.4I OH =–32mA 4.5V 4.5V 3.8I OL =100µA 1.65V to 4.5V1.65V to 4.5V0.1I OL =4mA1.65V 1.65V 0.45V OLI OL =8mA V I =V IL 2.3V 2.3V 0.3V I OL =24mA 3V 3V 0.55I OL =32mA4.5V 4.5V 0.55I I DIR V I =V CCA or GND 1.65V to5.5V1.65V to 5.5V ±1±2µA A port 0V 0to 5.5V ±1±2I off V I or V O =0to 5.5V µA B port 0to 5.5V 0V ±1±2A or B I OZV O =V CCO or GND1.65V to 5.5V 1.65V to 5.5V ±1±2µA port1.65V to 5.5V1.65V to 5.5V3I CCAV I =V CCI or GND,I O =05.5V 0V 2µA 0V 5.5V -21.65V to 5.5V1.65V to 5.5V3I CCBV I =V CCI or GND,I O =05.5V 0V -2µA 0V5.5V 2I CCA +I CCB V I =V CCI or GND,I O =0 1.65V to 5.5V1.65V to 5.5V4µA (see Table 1)A port at V CCA –0.6V,A port50DIR at V CCA ,B port =open ∆I CCA3V to 5.5V3V to 5.5VµA DIR at V CCA –0.6V,DIRB port =open,50A port at V CCA or GNDB port at V CCB –0.6V,∆I CCB B port DIR at GND,3V to 5.5V 3V to 5.5V 50µA A port =openC i DIR V I =V CCA or GND 3.3V 3.3V 2.5pF A or B C io V O =V CCA/B or GND3.3V3.3V6pFport(1)V CCO is the V CC associated with the output port.(2)V CCI is the V CC associated with the input port.5Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =1.8V ±0.15V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 317.7 2.210.3 1.78.3 1.47.2A B ns t PHL 2.814.3 2.28.5 1.87.1 1.77t PLH 317.7 2.316 2.115.5 1.915.1B A ns t PHL 2.814.3 2.112.9212.6 1.812.2t PHZ 5.219.4 4.818.5 4.718.4 5.117.1DIR A ns t PLZ 2.310.5 2.110.5 2.410.7 3.110.9t PHZ 7.421.9 4.911.5 4.610.3 2.88.2DIR B ns t PLZ 4.216 3.79.2 3.38.4 2.46.4t PZH (1)33.725.223.921.5DIR A ns t PZL (1)36.224.422.920.4t PZH (1)28.220.81918.1DIRBns t PZL (1)33.72725.524.1(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =2.5V ±0.2V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 2.316 1.58.5 1.3 6.4 1.1 5.1A B ns t PHL 2.112.9 1.47.5 1.3 5.40.9 4.6t PLH 2.210.3 1.58.5 1.4817.5B A ns t PHL 2.28.5 1.47.5 1.370.9 6.2t PHZ 38.1 3.18.1 2.88.1 3.28.1DIR A ns t PLZ 1.3 5.9 1.3 5.9 1.3 5.91 5.8t PHZ 6.523.7 4.111.4 3.910.2 2.47.1DIR B ns t PLZ 3.918.9 3.29.6 2.88.4 1.85.3t PZH (1)29.218.116.412.8DIR A ns t PZL (1)32.218.917.213.3t PZH (1)21.914.412.310.9DIRBns t PZL (1)2115.613.512.7(1)The enable time is a calculated value,derived using the formula shown in the enable times section.6Submit Documentation FeedbackSwitching CharacteristicsSwitching CharacteristicsOperating CharacteristicsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007over recommended operating free-air temperature range,V CCA =3.3V ±0.3V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAXMIN MAX MIN MAX t PLH 2.115.5 1.480.7 5.80.7 4.4A B ns t PHL 212.6 1.370.850.74t PLH 1.78.3 1.3 6.40.7 5.80.6 5.4B A ns t PHL 1.87.1 1.3 5.40.850.7 4.5t PHZ 2.97.337.3 2.87.3 3.47.3DIR A ns t PLZ 1.8 5.6 1.6 5.6 2.2 5.7 2.2 5.7t PHZ 5.420.5 3.910.1 2.98.8 2.4 6.8DIR B ns t PLZ 3.314.5 2.97.8 2.47.1 1.74.9t PZH (1)22.814.212.910.3DIR A ns t PZL (1)27.615.513.811.3t PZH (1)21.113.611.510.1DIRBns t PZL (1)19.914.312.311.3(1)The enable time is a calculated value,derived using the formula shown in the enable times section.over recommended operating free-air temperature range,V CCA =5V ±0.5V (see Figure 1)V CCB =1.8V V CCB =2.5V V CCB =3.3V V CCB =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAX t PLH 1.915.117.50.6 5.40.5 3.9A B ns t PHL 1.812.20.9 6.20.7 4.50.5 3.5t PLH 1.47.21 5.10.7 4.40.5 3.9B A ns t PHL 1.770.9 4.60.740.5 3.5t PHZ 2.1 5.4 2.2 5.4 2.2 5.5 2.2 5.4DIR A ns t PLZ 0.9 3.81 3.81 3.70.9 3.7t PHZ 4.820.2 2.59.818.5 2.5 6.5DIR B ns t PLZ 4.214.8 2.57.4 2.57 1.64.5t PZH (1)2212.511.48.4DIR A ns t PZL (1)27.214.412.510t PZH (1)18.911.39.17.6DIRBns t PZL (1)17.611.6108.6(1)The enable time is a calculated value,derived using the formula shown in the enable times section.T A =25°CV CCA =V CCA =V CCA =V CCA =TEST V CCB =1.8VV CCB =2.5VV CCB =3.3VV CCB =5VPARAMETERUNITCONDITIONS TYP TYP TYP TYP A-port input,B-port output C L =0pF,3444C pdA(1)f =10MHz,pF B-port input,A-port output 18192021t r =t f =1ns A-port input,B-port output C L =0pF,18192021C pdB (1)f =10MHz,pF B-port input,A-port output3444t r =t f =1ns(1)Power dissipation capacitance per transceiver7Submit Documentation FeedbackPower-Up ConsiderationsWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007A proper power-up sequence always should be followed to avoid excessive supply current,bus contention,oscillations,or other anomalies.To guard against such power-up problems,take the following precautions:1.Connect ground before any supply voltage is applied.2.Power up V CCA .3.V CCB can be ramped up along with or after V CCA .Table 1.Typical Total Static Power Consumption (I CCA +I CCB )V CCAV CCB UNIT0V 1.8V 2.5V 3.3V 5V 0V 0<1<1<1<11.8V <1<2<2<222.5V <1<2<2<2<2µA 3.3V <1<2<2<2<25V<12<2<2<28Submit Documentation FeedbackTYPICAL CHARACTERISTICSt P H L − n sC L − pF105101520253035t P L H− n s C L − pF5101520253035t P H L− n sC L − pF5101520253035t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =1.8VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =1.8V9Submit Documentation Feedback5101520253035t P H L − n sC L − pF5t P L H − n sC L − pFt P H L− n s C L − pF12345678910t P L H − n sC L − pFWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =2.5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =2.5V10Submit Documentation Feedbackt P H L − n sC L − pFt P L H − n sC L − pFt P H L− n s C L − pFt P L H − n s C L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =3.3VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =3.3Vt P H L− n s C L − pFt P L H − n s C L − pFt P H L − n sC L − pFt P L H − n sC L − pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007TYPICAL CHARACTERISTICS (continued)TYPICAL PROPAGATION DELAY (A to B)vs LOAD CAPACITANCET A =25°C,V CCA =5VTYPICAL PROPAGATION DELAY (B to A)vs LOAD CAPACITANCET A =25°C,V CCA =5VPARAMETER MEASUREMENT INFORMATIONV OH V OLLOAD CIRCUIT × V CCOOpenOutput Control (low-level enabling)Output Waveform 1S1 at 2 × V CCO (see Note B)Output Waveform 2S1 at GND (see Note B)0 V0 VV CCI0 VV CCAV CCOVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESVOLTAGE WAVEFORMS PULSE DURATIONVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMESInputt pd t PLZ /t PZL t PHZ /t PZHOpen 2 × V CCO GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, Z O = 50 Ω, dv/dt ≥ 1 V/ns.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.V CCI is the V CC associated with the input port.I.V CCO is the V CC associated with the output port.J.All parameters and waveforms are not applicable to all devices.1.8 V ± 0.15 V2.5 V ± 0.2 V3.3 V ± 0.3 V 5 V ± 0.5 V2 k Ω2 k Ω2 k Ω2 k ΩV CCO R L 0.15 V 0.15 V 0.3 V 0.3 VV TP C L 15 pF 15 pF 15 pF 15 pFSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 1.Load Circuit and Voltage WaveformsAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2SN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 2shows an example of the SN74LVC1T45being used in a unidirectional logic level-shifting application.PIN NAME FUNCTION DESCRIPTION1V CCA V CC1SYSTEM-1supply voltage (1.65V to 5.5V)2GND GND Device GND3A OUT Output level depends on V CC1voltage.4B IN Input threshold value depends on V CC2voltage.5DIR DIR GND (low level)determines B-port to A-port direction.6V CCBV CC2SYSTEM-2supply voltage (1.65V to 5.5V)Figure 2.Unidirectional Logic Level-Shifting ApplicationAPPLICATION INFORMATIONSYSTEM-1SYSTEM-2Enable TimesSN74LVC1T45SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVERWITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTSSCES515H–DECEMBER 2003–REVISED JANUARY 2007Figure 3shows the SN74LVC1T45being used in a bidirectional logic level-shifting application.Since the SN74LVC1T45does not have an output-enable (OE)pin,the system designer should take precautions to avoid bus contention between SYSTEM-1and SYSTEM-2when changing directions.The following table shows data transmission from SYSTEM-1to SYSTEM-2and then from SYSTEM-2to SYSTEM-1.STATE DIR CTRLI/O-1I/O-2DESCRIPTION1H Out In SYSTEM-1data to SYSTEM-2SYSTEM-2is getting ready to send data to SYSTEM-1.I/O-1and I/O-2are disabled.The 2H Hi-Z Hi-Z bus-line state depends on pullup or pulldown.(1)DIR bit is flipped.I/O-1and I/O-2still are disabled.The bus-line state depends on pullup or 3L Hi-Z Hi-Z pulldown.(1)4LOutInSYSTEM-2data to SYSTEM-1(1)SYSTEM-1and SYSTEM-2must use the same conditions,i.e.,both pullup or both pulldown.Figure 3.Bidirectional Logic Level-Shifting ApplicationCalculate the enable times for the SN74LVC1T45using the following formulas:•t PZH (DIR to A)=t PLZ (DIR to B)+t PLH (B to A)•t PZL (DIR to A)=t PHZ (DIR to B)+t PHL (B to A)•t PZH (DIR to B)=t PLZ (DIR to A)+t PLH (A to B)•t PZL (DIR to B)=t PHZ (DIR to A)+t PHL (A to B)In a bidirectional application,these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected.For example,if the SN74LVC1T45initially is transmitting from A to B,then the DIR bit is switched;the B port of the device must be disabled before presenting it with an input.After the B port has been disabled,an input signal applied to it appears on the corresponding A port after the specified propagation delay.PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)SN74LVC1T45DBVR ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVRE4ACTIVE SOT-23DBV 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVT ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DBVTE4ACTIVE SOT-23DBV 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKR ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRE4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKRG4ACTIVE SC70DCK 63000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKT ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTE4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DCKTG4ACTIVE SC70DCK 6250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLR ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45DRLRG4ACTIVE SOT-533DRL 64000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC1T45YZPRACTIVEWCSPYZP63000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device isin production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on6-Feb-2007incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.6-Feb-2007IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and todiscontinue any product or service without notice. Customers should obtain the latest relevant informationbefore placing orders and should verify that such information is current and complete. All products are soldsubject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are used to the extentTI deems necessary to support this warranty. Except where mandated by government requirements, testingof all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsiblefor their products and applications using TI components. To minimize the risks associated with customerproducts and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patentright, copyright, mask work right, or other TI intellectual property right relating to any combination, machine,or process in which TI products or services are used. Information published by TI regarding third-partyproducts or services does not constitute a license from TI to use such products or services or a warranty orendorsement thereof. Use of such information may require a license from a third party under the patents orother intellectual property of the third party, or a license from TI under the patents or other intellectualproperty of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices.Reproduction of this information with alteration is an unfair and deceptive business practice. TI is notresponsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI forthat product or service voids all express and any implied warranties for the associated TI product or serviceand is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotive/broadbandBroadbandDSP DigitalControl /digitalcontrol Interface Military /military Logic Power Mgmt Optical Networking /opticalnetworkSecurity /security Microcontrollers Low Power Wireless /lpw Telephony /telephonyVideo & Imaging /video/wirelessWirelessMailing Address: Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright © 2007, Texas Instruments Incorporated。
74系列芯片功能大全+4000系列的选型说明
74系列芯片功能大全+4000系列的选型说明74与40是所有外围最常用的IC，其中包括SN74HC595 8位移位寄存器/锁存器（即串转并转换）等十分重要的芯片。
7400 TTL 2输入端四与非门7401 TTL 集电极开路2输入端四与非门7402 TTL 2输入端四或非门7403 TTL 集电极开路2输入端四与非门7404 TTL 六反相器7405 TTL 集电极开路六反相器7406 TTL 集电极开路六反相高压驱动器7407 TTL 集电极开路六正相高压驱动器7408 TTL 2输入端四与门7409 TTL 集电极开路2输入端四与门7410 TTL 3输入端3与非门74107 TTL 带清除主从双J-K触发器74109 TTL 带预置清除正触发双J-K触发器7411 TTL 3输入端3与门74112 TTL 带预置清除负触发双J-K触发器7412 TTL 开路输出3输入端三与非门74121 TTL 单稳态多谐振荡器74122 TTL 可再触发单稳态多谐振荡器74123 TTL 双可再触发单稳态多谐振荡器74125 TTL 三态输出高有效四总线缓冲门74126 TTL 三态输出低有效四总线缓冲门7413 TTL 4输入端双与非施密特触发器74132 TTL 2输入端四与非施密特触发器74133 TTL 13输入端与非门74136 TTL 四异或门74138 TTL 3-8线译码器/复工器74139 TTL 双2-4线译码器/复工器7414 TTL 六反相施密特触发器74145 TTL BCD—十进制译码/驱动器7415 TTL 开路输出3输入端三与门74150 TTL 16选1数据选择/多路开关74151 TTL 8选1数据选择器74153 TTL 双4选1数据选择器74154 TTL 4线—16线译码器74155 TTL 图腾柱输出译码器/分配器74156 TTL 开路输出译码器/分配器74157 TTL 同相输出四2选1数据选择器74158 TTL 反相输出四2选1数据选择器7416 TTL 开路输出六反相缓冲/驱动器74160 TTL 可预置BCD异步清除计数器74161 TTL 可予制四位二进制异步清除计数器74162 TTL 可预置BCD同步清除计数器74163 TTL 可予制四位二进制同步清除计数器74164 TTL 八位串行入/并行输出移位寄存器74165 TTL 八位并行入/串行输出移位寄存器74166 TTL 八位并入/串出移位寄存器74169 TTL 二进制四位加/减同步计数器7417 TTL 开路输出六同相缓冲/驱动器74170 TTL 开路输出4×4寄存器堆74173 TTL 三态输出四位D型寄存器74174 TTL 带公共时钟和复位六D触发器74175 TTL 带公共时钟和复位四D触发器74180 TTL 9位奇数/偶数发生器/校验器74181 TTL 算术逻辑单元/函数发生器74185 TTL 二进制—BCD代码转换器74190 TTL BCD同步加/减计数器74191 TTL 二进制同步可逆计数器74192 TTL 可预置BCD双时钟可逆计数器74193 TTL 可预置四位二进制双时钟可逆计数器74194 TTL 四位双向通用移位寄存器74195 TTL 四位并行通道移位寄存器74196 TTL 十进制/二-十进制可预置计数锁存器74197 TTL 二进制可预置锁存器/计数器7420 TTL 4输入端双与非门7421 TTL 4输入端双与门7422 TTL 开路输出4输入端双与非门74221 TTL 双/单稳态多谐振荡器74240 TTL 八反相三态缓冲器/线驱动器74241 TTL 八同相三态缓冲器/线驱动器74243 TTL 四同相三态总线收发器74244 TTL 八同相三态缓冲器/线驱动器74245 TTL 八同相三态总线收发器74247 TTL BCD—7段15V输出译码/驱动器74248 TTL BCD—7段译码/升压输出驱动器74249 TTL BCD—7段译码/开路输出驱动器74251 TTL 三态输出8选1数据选择器/复工器74253 TTL 三态输出双4选1数据选择器/复工器74256 TTL 双四位可寻址锁存器74257 TTL 三态原码四2选1数据选择器/复工器74258 TTL 三态反码四2选1数据选择器/复工器74259 TTL 八位可寻址锁存器/3-8线译码器7426 TTL 2输入端高压接口四与非门74260 TTL 5输入端双或非门74266 TTL 2输入端四异或非门7427 TTL 3输入端三或非门74273 TTL 带公共时钟复位八D驱动器74279 TTL 四图腾柱输出S-R锁存器7428 TTL 2输入端四或非门缓冲器74283 TTL 4位二进制全加器74290 TTL 二/五分频十进制计数器74293 TTL 二/八分频四位二进制计数器74295 TTL 四位双向通用移位寄存器74298 TTL 四2输入多路带存贮开关74299 TTL 三态输出八位通用移位寄存器7430 TTL 8输入端与非门7432 TTL 2输入端四或门74322 TTL 带符号扩展端八位移位寄存器74323 TTL 三态输出八位双向移位/存贮寄存器7433 TTL 开路输出2输入端四或非缓冲器74347 TTL BCD—7段译码器/驱动器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74447 TTL BCD—7段译码器/驱动器7445 TTL BCD—十进制代码转换/驱动器74450 TTL 16:1多路转接复用器多工器74451 TTL 双8:1多路转接复用器多工器74453 TTL 四4:1多路转接复用器多工器7446 TTL BCD—7段低有效译码/驱动器74460 TTL 十位比较器74461 TTL 八进制计数器74465 TTL 三态同相2与使能端八总线缓冲器74466 TTL 三态反相2与使能八总线缓冲器74467 TTL 三态同相2使能端八总线缓冲器74468 TTL 三态反相2使能端八总线缓冲器74469 TTL 八位双向计数器7447 TTL BCD—7段高有效译码/驱动器7448 TTL BCD—7段译码器/内部上拉输出驱动74490 TTL 双十进制计数器74491 TTL 十位计数器74498 TTL 八进制移位寄存器7450 TTL 2-3/2-2输入端双与或非门74502 TTL 八位逐次逼近寄存器74503 TTL 八位逐次逼近寄存器7451 TTL 2-3/2-2输入端双与或非门74533 TTL 三态反相八D锁存器74534 TTL 三态反相八D锁存器7454 TTL 四路输入与或非门74540 TTL 八位三态反相输出总线缓冲器7455 TTL 4输入端二路输入与或非门74563 TTL 八位三态反相输出触发器74564 TTL 八位三态反相输出D触发器74573 TTL 八位三态输出触发器74574 TTL 八位三态输出D触发器74645 TTL 三态输出八同相总线传送接收器7473 TTL 带清除负触发双J-K触发器7474 TTL 带置位复位正触发双D触发器7476 TTL 带预置清除双J-K触发器7483 TTL 四位二进制快速进位全加器7485 TTL 四位数字比较器7486 TTL 2输入端四异或门7490 TTL 可二/五分频十进制计数器7493 TTL 可二/八分频二进制计数器7495 TTL 四位并行输入\输出移位寄存器7497 TTL 6位同步二进制乘法器SN74LSOO 四2输入与非门SN74LSO2 四2输入与非门SN74LS04 六反相器SN74LS06 六反相缓冲器/驱动器SN74LS08 四2输入与非门SN74LS10 三3输入与非门SN74LS12 三3输入与非门SN74LS14 六反相器.斯密特触发SN74LS16 六反相缓冲器/触发器SN74LS20 双4输入与门SN74LS22 双4输入与门SN74LS26 四2输入与非门SN74LS28 四输入端或非缓冲器SN74LS32 四2输入或门SN74LS37 四输入端与非缓冲器SN74LS40 四输入端与非缓冲器SN74LS47 BCD－七段译码驱动器SN74LS49 BCD－七段译码驱动器SN74LS54 四输入与或非门SN74LS63 六电流读出接口门SN74LS74 双D触发器SN74LS76 双J－K触发器SN74LS83 双J－K触发器SN74LS86 四2输入异或门SN74LS90 4位十进制波动计数器SN74LS92 12分频计数器SN74LS96 5位移位寄存器SN74LS109 正沿触发双J－K触发器SN74LS113 双J－K负沿触发器SN74LS121 单稳态多谐振荡器SN74LS123 双稳态多谐振荡器SN74LS125 三态缓冲器SN74LS131 3－8线译码器SN74LS137 地址锁存3－8线译码器SN74LS139 双2－4线译码－转换器SN74LS147 10－4线优先编码器SN74LS153 双4选1数据选择器SN74LS155 双2－4线多路分配器SN74LS157 四2选1数据选择器SN74LS160 同步BDC十进制计数器SN74LS162 同步BDC十进制计数器SN74LS164 8位串入并出移位寄存SN74LS166 8位移位寄存器SN74LS169 4位可逆同步计数器SN74LS172 16位多通道寄存器堆SN74LS174 6D型触发器SN74LS176 可预置十进制计数器SN74LS182 超前进位发生器SN74LS189 64位随机存储器SN74LS191 二进制同步可逆计数器SN74LS193 二进制可逆计数器SN74LS195 并行存取移位寄存器SN74LS197 可预置二进制计数器SN74LS238 3－8线译码/多路转换器SN74LS241 八缓冲/驱动/接收器SN74LS243 四总线收发器SN74LS245 八总线收发器SN74LS248 BCD－七段译码驱动器SN74LS251 三态8－1数据选择器SN74LS256 双四位选址锁存器SN74LS258 四2选1数据选择器SN74LS260 双5输入或非门SN74LS266 四2输入异或非门SN74LS275 七位树型乘法器SN74LS279 四R－S触发器SN74LS283 4位二进制全加器SN74LS293 4位二进制计数器SN74LS365 六缓冲器带公用启动器SN74LS367 六总线三态输出缓冲器SN74LS373 8D锁存器SN74LS375 4位双稳锁存器SN74LS386 四2输入异或门SN74LS393 双4位二进制计数器SN74LS574 8位D型触发器SN74LS684 8位数字比较器SN74LSO1 四2输入与非门SN74LS05 六反相器SN74LS07 六缓冲器/驱动器SN74LS09 四2输入与非门SN74LS11 三3输入与非门SN74LS13 三3输入与非门SN74LS15 三3输入与非门SN74LS17 六反相缓冲器/驱动器SN74LS21 双4输入与门SN74LS25 双4输入与门SN74LS27 三3输入与非门SN74LS30 八输入端与非门SN74LS33 四2输入或门SN74LS38 双2输入与非缓冲器SN74LS42 BCD－十进制译码器SN74LS48 BCD－七段译码驱动器SN74LS51 三3输入双与或非门SN74LS55 四4输入与或非门SN74LS73 双J－K触发器SN74LS75 4位双稳锁存器SN74LS78 双J－K触发器SN74LS85 4位幅度比较器SN74LS88 4位全加器SN74LS91 8位移位寄存器SN74LS93 二进制计数器SN74LS95 4位并入并出寄存器SN74LS107 双J－K触发器SN74LS112 双J－K负沿触发器SN74LS114 双J－K负沿触发器SN74LS122 单稳态多谐振荡器SN74LS124 双压控振荡器SN74LS126 四3态总线缓冲器SN74LS132 二输入与非触发器SN74LS136 四异或门SN74LS138 3－8线译码/转换器SN74LS145 BCD十进制译码/驱动器SN74LS148 8－3线优先编码器SN74LS151 8选1数据选择器SN74LS154 4－16线多路分配器SN74LS156 双2－4线多路分配器SN74LS158 四2选1数据选择器SN74LS161 4位二进制计数器SN74LS163 4位二进制计数器SN74LS165 8位移位寄存器SN74LS168 4位可逆同步计数器SN74LS170 4x4位寄存器堆SN74LS173 4D型寄存器SN74LS175 4D烯触发器SN74LS181 运算器/函数发生器SN74LS183 双进位保存全价器SN74LS190 同步BCD十进制计数器SN74LS192 BCD－同步可逆计数器SN74LS194 双向通用移位寄存器SN74LS196 可预置十进制计数器SN74LS221 双单稳态多谐振荡器SN74LS240 八缓冲/驱动/接收器SN74LS242 四总线收发器SN74LS244 八缓冲/驱动/接收器SN74LS247 BCD－七段译码驱动器SN74LS249 BCD－七段译码驱动器SN74LS253 双三态4－1数据选择器SN74LS257 四3态2－1数据选择器SN74LS259 8位可寻址锁存器SN74LS261 2x4位二进制乘发器SN74LS273 八进制D型触发器SN74LS276 四J－K触发器SN74LS280 9位奇偶数发生校检器SN74LS290 十进制计数器SN74LS295 4位双向通用移位寄存器SN74LS366 六缓冲器带公用启动器SN74LS368 六总线三态输出反相器SN74LS374 8D触发器SN74LS377 8位单输出D型触发器SN74LS390 双十进制计数器SN74LS573 8位三态输出D型锁存器SN74LS670 8位数字比较器SN74HC00 四2输入与非门SN74HC02 四2输入或非门SN74HC03 四2输入或非门SN74HC04 六反相器SN74HC05 六反相器SN74HC08 四2输入与门SN74HC10 三3输入与非门SN74HC11 三3输入与门SN74HC14 六反相器/斯密特触发器SN74HC20 双四输入与门SN74HC21 双四输入与非门SN74HC27 三3输入与非门SN74HC30 八输入端与非门SN74HC32 四2输入或门SN74HC42 BCD十进制译码器SN74HC73 双J－K触发器SN74HC74 双D型触发器SN74HC76 双J－K触发器SN74HC86 四2输入异或门SN74HC107 双J－K触发器SN74HC113 双J－K负沿触发器SN74HC123 双稳态多谐振荡器SN74HC125 三态缓冲器SN74HC126 四三态总线缓冲器SN74HC132 二输入与非缓冲器SN74HC137 二输入与非缓冲器SN74HC138 3－8线译码/解调器SN74HC139 双2－4线译码/解调器SN74HC148 8选1数据选择器SN74HC151 双4选1数据选择器SN74HC154 4－16线多路分配器SN74HC157 四2选1数据选择器SN74HC161 4位二进制计数器SN74HC163 4位二进制计数器SN74HC164 8位串入并出移位寄存器SN74HC165 8位移位寄存器SN74HC173 4D型触发器SN74HC174 6D触发器SN74HC175 4D型触发器SN74HC191 二进制同步可逆计数器SN74HC221 双单稳态多谐振荡器SN74HC238 3－8线译码器SN74HC240 八缓冲器SN74HC244 八总线3态输出缓冲器SN74HC245 八总线收发器SN74HC251 三态8－1数据选择器SN74HC259 8位可寻址锁存器SN74HC266 四2输入异或非门SN74HC273 8D型触发器SN74HC367 六缓冲器/总线驱动器SN74HC368 六缓冲器/总线驱动器SN74HC373 8D锁存器SN74HC374 8D触发器SN74HC393 双4位二进制计数器SN74HC541 8位三态输出缓冲器SN74HC573 8位三态输出D型锁存器SN74HC574 8D型触发器SN74HC595 8位移位寄存器/锁存器SN74HC4028 7级二进制串行加数器SN74HC4046 锁相环SN74HC4050 六同相缓冲器SN74HC4051 8选1模拟开关SN74HC4053 三2选1模拟开关SN74HC4060 14位计数/分频/振荡器SN74HC4066 四双相模拟开关SN74HC4078 3输入端三或门SN74HC4511 7段锁存/译码驱动器SN74HC4520 双二进制加法计数器74F00 高速四2输入与非门74F02 高速四2输入或非门74F04 高速六反相器74F08 高速四2输入与门74F10 高速三3输入与门74F14 高速六反相斯密特触发74F32 高速四2输入或门74F38 高速四2输入或门74F74 高速双D型触发器74F86 高速四2输入异或门74F139 高速双2－4线译码/驱动器74F151 高速双2－4线译码/驱动器74F153 高速双4选1数据选择器74F157 高速双4选1数据选择器74F161 高速6D型触发器74F174 高速6D型触发器74F175 高速4D型触发器74F244 高速八总线3态缓冲器74F245 高速八总线收发器74F373 高速8D锁存器SN74HCT04 六反相器74系列芯片资料反相器驱动器 LS04 LS05 LS06 LS07 LS125 LS240 LS244 LS245 与门与非门 LS00 LS08 LS10 LS11 LS20 LS21 LS27 LS30 LS38 或门或非门与或非门 LS02 LS32 LS51 LS64 LS65异或门比较器 LS86译码器 LS138 LS139寄存器 LS74 LS175 LS373反相器:Vcc 6A 6Y 5A 5Y 4A 4Y 六非门 74LS04┌┴─┴─┴─┴─┴─┴─┴┐六非门(OC门) 74LS05_ │14 13 12 11 10 9 8│六非门(OC高压输出) 74LS06Y = A ）││ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GND驱动器:Vcc 6A 6Y 5A 5Y 4A 4Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│Y = A ）│六驱动器(OC高压输出) 74L S07│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1Y 2A 2Y 3A 3Y GNDVcc -4C 4A 4Y -3C 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐_ │14 13 12 11 10 9 8│Y =A+C ）│四总线三态门 74LS125 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘-1C 1A 1Y -2C 2A 2Y GNDVcc -G B1 B2 B3 B4 B8 B6 B7 B8┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8位总线驱动器 74LS245│20 19 18 17 16 15 14 13 12 11│）│ DIR= 1 A=>B│ 1 2 3 4 5 6 7 8 9 10│ DIR=0 B=>A└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘DIR A1 A2 A3 A4 A5 A6 A7 A8 GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器正逻辑与门,与非门:Vcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│Y = AB ）│ 2输入四正与门 74LS08 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐__ │14 13 12 11 10 9 8│Y = AB ）│ 2输入四正与非门 74LS0 0│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 1C 1Y 3C 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐___ │14 13 12 11 10 9 8│Y = ABC ）│ 3输入三正与非门 74LS10 │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 2A 2B 2C 2Y GNDVcc H G Y┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│）│ 8输入与非门 74LS30│ 1 2 3 4 5 6 7│ ________└┬─┬─┬─┬─┬─┬─┬┘ Y = ABCDEFGHA B C D E F GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器正逻辑或门,或非门:Vcc 4B 4A 4Y 3B 3A 3Y┌┴─┴─┴─┴─┴─┴─┴┐ 2输入四或门 74LS32│14 13 12 11 10 9 8│）│ Y = A+B│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2A 2B 2Y GNDVcc 4Y 4B 4A 3Y 3B 3A┌┴─┴─┴─┴─┴─┴─┴┐ 2输入四或非门 74LS02│14 13 12 11 10 9 8│ ___）│ Y = A+B│ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1Y 1A 1B 2Y 2A 2B GNDVcc 2Y 2B 2A 2D 2E 1F┌┴─┴─┴─┴─┴─┴─┴┐双与或非门 74S51│14 13 12 11 10 9 8│ _____）│ 2Y = AB+DE│ 1 2 3 4 5 6 7│ _______└┬─┬─┬─┬─┬─┬─┬┘ 1Y = ABC+DEF1Y 1A 1B 1C 1D 1E GNDVcc D C B K J Y┌┴─┴─┴─┴─┴─┴─┴┐ 4-2-3-2与或非门 74S64 74S65(OC门)│14 13 12 11 10 9 8│ ______________ ）│ Y = ABCD+EF+GHI+JK │ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘A E F G H I GND页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器2输入四异或门 74LS86Vcc 4B 4A 4Y 3Y 3B 3A┌┴─┴─┴─┴─┴─┴─┴┐│14 13 12 11 10 9 8│）│ _ _│ 1 2 3 4 5 6 7│ Y=AB+AB└┬─┬─┬─┬─┬─┬─┬┘1A 1B 1Y 2Y 2A 2B GND8*2输入比较器 74LS688_Vcc Y B8 A8 B7 A7 B6 A6 B5 A5┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8*2输入比较器 74LS688│20 19 18 17 16 15 14 13 12 11│）││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘CE A1 B1 A2 B2 A3 B3 A4 B4 GND_Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8页首非门,驱动器与门,与非门或门,或非门异或门,比较器译码器寄存器3-8译码器 74LS138Vcc -Y0 -Y1 -Y2 -Y3 -Y4 -Y5 -Y6 __ _ _ _ __ _ _ __ _ _ __ _ ┌┴─┴─┴─┴─┴─┴─┴─┴┐ Y0=A B C Y1=A B B Y2=A B C Y3=A B C│16 15 14 13 12 11 10 9 │）│ __ _ _ ___ __ _ __│ 1 2 3 4 5 6 7 8│ Y4=A B C Y5=A B C Y6=A B C Y7 =A B C└┬─┬─┬─┬─┬─┬─┬─┬┘A B C -CS0 -CS1 CS2 -Y7 GND双2-4译码器 74LS139Vcc -2G 2A 2B -Y0 -Y1 -Y2 -Y3 __ __ __ __ __ __ __ __ ┌┴─┴─┴─┴─┴─┴─┴─┴┐ Y0=2A 2B Y1=2A 2B Y2=2A 2B Y3=2A 2B│16 15 14 13 12 11 10 9 │）│ __ __ __ __ __ __ __ __│ 1 2 3 4 5 6 7 8│ Y0=1A 1B Y1=1A 1B Y2=1A 1B Y3 =1A 1B└┬─┬─┬─┬─┬─┬─┬─┬┘-1G 1A 1B -Y0 -Y1 -Y2 -Y3 GND8*2输入比较器 74LS688_Vcc Y B8 A8 B7 A7 B6 A6 B5 A5┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8*2输入比较器 74LS688│20 19 18 17 16 15 14 13 12 11│）││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘CE A1 B1 A2 B2 A3 B3 A4 B4 GND_Y=A1⊙B1+A2⊙B2+A3⊙B3+A4⊙B4+A5⊙B5+A6⊙B6+A7⊙B7+A8⊙B8寄存器:Vcc 2CR 2D 2Ck 2St 2Q -2Q┌┴─┴─┴─┴─┴─┴─┴┐双D触发器 74LS74│14 13 12 11 10 9 8 │）││ 1 2 3 4 5 6 7│└┬─┬─┬─┬─┬─┬─┬┘1Cr 1D 1Ck 1St 1Q -1Q GNDVcc 8Q 8D 7D 7Q 6Q 6D 5D 5Q ALE┌┴─┴─┴─┴─┴─┴─┴─┴─┴─┴┐ 8位锁存器 74LS373│20 19 18 17 16 15 14 13 12 11│）││ 1 2 3 4 5 6 7 8 9 10│└┬─┬─┬─┬─┬─┬─┬─┬─┬─┬┘-OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND型号器件名称厂牌[数据表]SN7400四2输入端与非门 TI[DATA]SN740 1四2输入端与非门(OC) SN7402四2输入端或非门 TI[DATA]SN7403四2输入端与非门(OC)TI[DATA]SN7404六反相器 TI[DATA]SN7405六反相器(O C)TI[DATA]SN7406六高压输出反相器 (OC,30V)TI[DATA]SN7407六高压输出缓冲,驱动器(OC,30V)TI[DATA]SN7408四2输入端与门 TI[DATA]SN7409四2输入端与门(OC)TI[DATA]SN7410三3输入端与非门 TI[DATA]SN7412三3输入端与非门(OC)TI[DATA]SN7413双4输入端与非门 TI[DATA]SN7414六反相器TI[DATA]SN7416六高压输出反相缓冲/驱动器 I[DATA]SN7417六高压输出缓冲/驱动器(OC,15V)TI[DATA]SN7420双4输入端与非门 TI[DATA]SN7422双4输入端与非门(OC)TI[DATA]SN7423可扩展双4输入端或非门 TI[DATA]SN7425双4输入端或非门TI[DATA]SN7426四2输入端高压输出与非缓冲器 [DATA]SN7427三3输入端或非门TI[DATA]SN7428四2输入端或非缓冲器 I[DATA]SN74308输入端与非门TI[DATA]SN7432四2输入端或门74756Dual 4-bit open-collector inverting buffer/line driver.+---+--+---+/1OE |1 +--+ 20| VCC1A1 |2 19| /2OE/2Y4 |3 18| /1Y11A2 |4 17| 2A4/2Y3 |5 74 16| /1Y21A3 |6 756 15| 2A3/2Y2 |7 14| /1Y31A4 |8 13| 2A2/2Y1 |9 12| /1Y4GND |10 11| 2A1+----------+74757Dual 4-bit open-collector noninverting buffer/line driver.One active low, one active high output enable.+---+--+---+/1OE |1 +--+ 20| VCC1A4 |2 19| 2OE2Y1 |3 18| 1Y11A3 |4 17| 2A42Y2 |5 74 16| 1Y21A2 |6 757 15| 2A32Y3 |7 14| 1Y31A1 |8 13| 2A22Y4 |9 12| 1Y4GND |10 11| 2A1+----------+747584-bit open-collector inverting bus transceiver.Two enable pins control output enables, one active high and one active low.+---+--+---+/GAB |1 +--+ 14| VCC|2 13| GBAA1 |3 74 12|A2 |4 758 11| B1A3 |5 10| B2A4 |6 9| B3GND |7 8| B4+----------+74760Dual 4-bit open-collector noninverting buffer/line driver.+---+--+---+/1OE |1 +--+ 20| VCC1A1 |2 19| /2OE2Y4 |3 18| 1Y11A2 |4 17| 2A42Y3 |5 74 16| 1Y21A3 |6 760 15| 2A32Y2 |7 14| 1Y31A4 |8 13| 2A22Y1 |9 12| 1Y4GND |10 11| 2A1+----------+* - 本贴最后修改时间：2002-12-9 18:46:59 修改者：autwl* - 修改原因：.autwl 发表于 2002-12-9 18:34 技术交流←返回版面补充1 ZT74804Hex 2-input NAND gates/line drivers.+---+--+---+ +---+---*---+ __1A |1 +--+ 20| VCC | A | B |/Y | /Y = AB1B |2 19| 6B +===+===*===+/1Y |3 18| 6A | 0 | 0 | 1 |2A |4 17| /6Y | 0 | 1 | 1 |2B |5 74 16| 5B | 1 | 0 | 1 |/2Y |6 804 15| 5A | 1 | 1 | 0 |3A |7 14| /5Y +---+---*---+3B |8 13| 4B/3Y |9 12| 4AGND |10 11| /4Y+----------+74805Hex 2-input NOR gates/line drivers.+---+--+---+ +---+---*---+ ___ 1A |1 +--+ 20| VCC | A | B |/Y | /Y = A+B1B |2 19| 6B +===+===*===+/1Y |3 18| 6A | 0 | 0 | 1 |2A |4 17| /6Y | 0 | 1 | 0 |2B |5 74 16| 5B | 1 | 0 | 0 |/2Y |6 805 15| 5A | 1 | 1 | 0 |3A |7 14| /5Y +---+---*---+3B |8 13| 4B/3Y |9 12| 4AGND |10 11| /4Y+----------+74808Hex 2-input AND gates/line drivers.+---+--+---+ +---+---*---+1A |1 +--+ 20| VCC | A | B | Y | Y = AB1B |2 19| 6B +===+===*===+1Y |3 18| 6A | 0 | 0 | 0 |2A |4 17| 6Y | 0 | 1 | 0 |2B |5 74 16| 5B | 1 | 0 | 0 |2Y |6 808 15| 5A | 1 | 1 | 1 |3A |7 14| 5Y +---+---*---+3B |8 13| 4B3Y |9 12| 4AGND |10 11| 4Y+----------+7482110-bit 3-state D flip-flop/bus driver.+---+--+---+ +---+---+---*---+/OE |1 +--+ 24| VCC |/OE|CLK| D | Q |D1 |2 23| Q1 +===+===+===*===+D2 |3 22| Q2 | 1 | X | X | Z |D3 |4 21| Q3 | 0 | / | 0 | 0 |D4 |5 20| Q4 | 0 | / | 1 | 1 |D5 |6 74 19| Q5 | 0 |!/ | X | - |D6 |7 821 18| Q6 +---+---+---*---+D7 |8 17| Q7D8 |9 16| Q8D9 |10 15| Q9D10 |11 14| Q10GND |12 13| CLK+----------+7482210-bit 3-state inverting D flip-flop/bus driver.+---+--+---+ +---+---+---*---+/OE |1 +--+ 24| VCC |/OE|CLK| D |/Q |D1 |2 23| /Q1 +===+===+===*===+D2 |3 22| /Q2 | 1 | X | X | Z |D3 |4 21| /Q3 | 0 | / | 0 | 1 |D4 |5 20| /Q4 | 0 | / | 1 | 0 |D5 |6 74 19| /Q5 | 0 |!/ | X | - |D6 |7 822 18| /Q6 +---+---+---*---+D7 |8 17| /Q7D8 |9 16| /Q8D9 |10 15| /Q9D10 |11 14| /Q10GND |12 13| CLK+----------+748239-bit 3-state D flip-flop/bus driver with clock enable and reset.+---+--+---+/OE |1 +--+ 24| VCCD1 |2 23| Q1D2 |3 22| Q2D3 |4 21| Q3D4 |5 20| Q4D5 |6 74 19| Q5D6 |7 823 18| Q6D7 |8 17| Q7D8 |9 16| Q8D9 |10 15| Q9/RST |11 14| /CLKENGND |12 13| CLK+----------+748258-bit 3-state D flip-flop/bus driver with three output enables, clock enable and reset.+---+--+---+/OE1 |1 +--+ 24| VCC/OE2 |2 23| /OE3D1 |3 22| Q1D2 |4 21| Q2D3 |5 20| Q3D4 |6 74 19| Q4D5 |7 825 18| Q5D6 |8 17| Q6D7 |9 16| Q7D8 |10 15| Q8/RST |11 14| /CLKENGND |12 13| CLK+----------+7482710-bit 3-state noninverting buffer/line driver.+---+--+---+/OE1 |1 +--+ 24| VCCA1 |2 23| Y1A2 |3 22| Y2A3 |4 21| Y3A4 |5 20| Y4A5 |6 742 19| Y5A6 |7 827 18| Y6A7 |8 17| Y7A8 |9 16| Y8A9 |10 15| Y9A10 |11 14| Y10GND |12 13| /OE2+----------+74832Hex 2-input OR gates/line drivers.+---+--+---+ +---+---*---+1A |1 +--+ 20| VCC | A | B | Y | Y = A+B1B |2 19| 6B +===+===*===+1Y |3 18| 6A | 0 | 0 | 0 |2A |4 17| 6Y | 0 | 1 | 1 |2B |5 74 16| 5B | 1 | 0 | 1 |2Y |6 832 15| 5A | 1 | 1 | 1 |3A |7 14| 5Y +---+---*---+3B |8 13| 4B3Y |9 12| 4AGND |10 11| 4Y+----------+748338-bit 3-state noninverting bus transceiver with parity generator/checker and parity register.+---+--+---+/OEA |1 +--+ 24| VCCA1 |2 23| B1A2 |3 22| B2A3 |4 21| B3A4 |5 20| B4A5 |6 74 19| B5A6 |7 833 18| B6A7 |8 17| B7A8 |9 16| B8/ERROR |10 15| PAR/CLR |11 14| /OEBGND |12 13| CLK+----------+7484110-bit 3-state transparent latch/bus driver.+---+--+---+ +---+---+---*---+/OE |1 +--+ 24| VCC |/OE| LE| D | Q |D1 |2 23| Q1 +===+===+===*===+D2 |3 22| Q2 | 1 | X | X | Z |D3 |4 21| Q3 | 0 | 0 | X | - |D4 |5 20| Q4 | 0 | 1 | 0 | 0 |D5 |6 74 19| Q5 | 0 | 1 | 1 | 1 |D6 |7 841 18| Q6 +---+---+---*---+D7 |8 17| Q7D8 |9 16| Q8D9 |10 15| Q9D10 |11 14| Q10GND |12 13| LE+----------+748439-bit 3-state transparent latch/bus driver with set and reset.+---+--+---+ +----+----+---+---+---*---+/OE |1 +--+ 24| VCC |/RST|/SET|/OE| LE| D | Q |D1 |2 23| Q1 +====+====+===+===+===*===+D2 |3 22| Q2 | 0 | 1 | 0 | X | X | 0 |D3 |4 21| Q3 | 1 | 0 | 0 | X | X | 0 |D4 |5 20| Q4 | X | X | 1 | X | X | Z |D5 |6 74 19| Q5 | 1 | 1 | 0 | 0 | X | - |D6 |7 843 18| Q6 | 1 | 1 | 0 | 1 | 0 | 0 |D7 |8 17| Q7 | 1 | 1 | 0 | 1 | 1 | 1 |D8 |9 16| Q8 +----+----+---+---+---*---+D9 |10 15| Q9/RST |11 14| /SETGND |12 13| LE+----------+748458-bit 3-state transparent latch/bus driver with three output enables, set and reset.+---+--+---+/OE1 |1 +--+ 24| VCC/OE2 |2 23| /OE3D1 |3 22| Q1D2 |4 21| Q2D3 |5 20| Q3D4 |6 74 19| Q4D5 |7 845 18| Q5D6 |8 17| Q6D7 |9 16| Q7D8 |10 15| Q8/RST |11 14| /SETGND |12 13| LE+----------+7485712-to-6 line inverting/noninverting data selector/multiplexer with masking and zero detect.+---+--+---+S0 |1 +--+ 24| VCC1A0 |2 23| S11A1 |3 22| 6A01Y |4 21| 6A12A0 |5 20| 6Y2A1 |6 74 19| 5A02Y |7 857 18| 5A13A0 |8 17| 5Y3A1 |9 16| 4A03Y |10 15| 4A1ZD |11 14| 4YGND |12 13| COMP+----------+7486110-bit 3-state noninverting bus transceiver.+---+--+---+/GBA |1 +--+ 24| VCCA1 |2 23| B1A2 |3 22| B2A3 |4 21| B3A4 |5 20| B4A5 |6 74 19| B5A6 |7 861 18| B6A7 |8 17| B7A8 |9 16| B8A9 |10 15| B9A10 |11 14| B10GND |12 13| /GAB+----------+748639-bit 3-state noninverting bus transceiver.+---+--+---+/GBA1 |1 +--+ 24| VCCA1 |2 23| B1A2 |3 22| B2A3 |4 21| B3A4 |5 20| B4A5 |6 74 19| B5A6 |7 863 18| B6A7 |8 17| B7A8 |9 16| B8A9 |10 15| B9/GBA2 |11 14| /GAB2GND |12 13| /GAB1+----------+748678-bit synchronous binary up/down counter with load, asynchronous reset and ripple carry outp ut.+---+--+---+S0 |1 +--+ 24| VCCS1 |2 23| /ENPP0 |3 22| Q0P1 |4 21| Q1P2 |5 20| Q2P3 |6 74 19| Q3P4 |7 867 18| Q4P5 |8 17| Q5P6 |9 16| Q6P7 |10 15| Q7/ENT |11 14| CLKGND |12 13| /RCO+----------+748698-bit synchronous binary up/down counter with load, reset and ripple carry output.+---+--+---+S0 |1 +--+ 24| VCCS1 |2 23| /ENPP0 |3 22| Q0P1 |4 21| Q1P2 |5 20| Q2P3 |6 74 19| Q3P4 |7 869 18| Q4P5 |8 17| Q5P6 |9 16| Q6P7 |10 15| Q7/ENT |11 14| CLKGND |12 13| /RCO+----------+74873Dual 4-bit 3-state transparent latch with reset.+---+--+---+/1RST |1 +--+ 24| VCC/1OE |2 23| 1LE1D1 |3 22| 1Q11D2 |4 21| 1Q21D3 |5 20| 1Q31D4 |6 74 19| 1Q42D1 |7 873 18| 2Q12D2 |8 17| 2Q22D3 |9 16| 2Q32D4 |10 15| 2Q4/2OE |11 14| 2LEGND |12 13| /2RST+----------+74874Dual 4-bit 3-state D flip-flops with reset.+---+--+---+ +----+---+---+---*---+ /1RST |1 +--+ 24| VCC |/RST|/OE|CLK| D | Q |/1OE |2 23| 1CLK +====+===+===+===*===+1D1 |3 22| 1Q1 | 0 | 1 | X | X | Z | 1D2 |4 21| 1Q2 | X | 0 | X | X | 0 | 1D3 |5 20| 1Q3 | 1 | 0 | / | 0 | 0 | 1D4 |6 74 19| 1Q4 | 1 | 0 | / | 1 | 1 |2D1 |7 874 18| 2Q1 | 1 | 0 |!/ | X | - |2D2 |8 17| 2Q2 +----+---+---+---*---+ 2D3 |9 16| 2Q32D4 |10 15| 2Q4/2OE |11 14| 2CLKGND |12 13| /2RST+----------+74878Dual 4-bit 3-state D flip-flops with reset.+---+--+---+ +----+---+---+---*---+ /1RST |1 +--+ 24| VCC |/RST|/OE|CLK| D | Q |/1OE |2 23| 1CLK +====+===+===+===*===+1D1 |3 22| 1Q1 | 0 | 1 | X | X | Z | 1D2 |4 21| 1Q2 | X | 0 | X | X | 0 | 1D3 |5 20| 1Q3 | 1 | 0 | / | 0 | 0 |1D4 |6 74 19| 1Q4 | 1 | 0 | / | 1 | 1 |2D1 |7 878 18| 2Q1 | 1 | 0 |!/ | X | - |2D2 |8 17| 2Q2 +----+---+---+---*---+2D3 |9 16| 2Q32D4 |10 15| 2Q4/2OE |11 14| 2CLKGND |12 13| /2RST+----------+748814-bit 16- arithmetic logic unit (ALU)+---+--+---+/B0 |1 +--+ 24| VCC/A0 |2 23| /A1S3 |3 22| /B1S2 |4 21| /A2S1 |5 20| /B2S0 |6 74 19| /A3CIN |7 881 18| /B3M |8 17| /G/F0 |9 16| COUT/F1 |10 15| /P/F2 |11 14| A=BGND |12 13| /F3+----------+748858-bit noninverting magnitude comparator with cascade inputs and latchable A inputs.+---+--+---+L+/A |1 +--+ 24| VCCIA<B |2 23| ALEIA>B |3 22| A7B7 |4 21| A6B6 |5 20| A5B5 |6 74 19| A4B4 |7 885 18| A3B3 |8 17| A2B2 |9 16| A1B1 |10 15| A0B0 |11 14| OA<BGND |12 13| OA>B+----------+748998-bit 3-state noninverting latchable bus transceiver with parity generator/checker and indep endent latch-enable inputs.+---+--+---+O//E |1 +--+ 28| VCC/ERRA |2 27| /OEABLEAB |3 26| B1A1 |4 25| B2A2 |5 24| B3A3 |6 23| B4A4 |7 74 22| B5A5 |8 899 21| B6A6 |9 20| B7A7 |10 19| B8A8 |11 18| BPARAPAR |12 17| LEBA/OEBA |13 16| /SELGND |14 15| /ERRB+----------+749568-bit 3-state noninverting latched transceiver.+---+--+---+LEAB |1 +--+ 24| VCCSAB |2 23| LEBADIR |3 22| SBAA1 |4 21| /OEA2 |5 20| B1A3 |6 74 19| B2A4 |7 956 18| B3A5 |8 17| B4A6 |9 16| B5A7 |10 15| B6A8 |11 14| B7GND |12 13| B8+----------+749908-bit transparent latch with readback.+---+--+---+/OERB |1 +--+ 20| VCCD1 |2 19| Q1D2 |3 18| Q2D3 |4 17| Q3D4 |5 74 16| Q4D5 |6 990 15| Q5D6 |7 14| Q6D7 |8 13| Q7D8 |9 12| Q8GND |10 11| LE+----------+749929-bit 3-state transparent latch with readback and reset.+---+--+---+/OERB |1 +--+ 24| VCCD1 |2 23| Q1D2 |3 22| Q2D3 |4 21| Q3D4 |5 20| Q4D5 |6 74 19| Q5D6 |7 992 18| Q6D7 |8 17| Q7D8 |9 16| Q8D9 |10 15| Q9/RST |11 14| /OEGND |12 13| LE+----------+7499410-bit transparent latch with readback.+---+--+---+/OERB |1 +--+ 24| VCCD1 |2 23| Q1D2 |3 22| Q2D3 |4 21| Q3D4 |5 20| Q4D5 |6 74 19| Q5D6 |7 994 18| Q6D7 |8 17| Q7D8 |9 16| Q8D9 |10 15| Q9D10 |11 14| Q10GND |12 13| LE+----------+741000Quad 2-input NAND gates with buffered output.+---+--+---+ +---+---*---+ __1A |1 +--+ 14| VCC | A | B |/Y | /Y = AB1B |2 13| 4B +===+===*===+/1Y |3 7410 12| 4A | 0 | 0 | 1 |2A |4 00 11| /4Y | 0 | 1 | 1 |2B |5 10| 3B | 1 | 0 | 1 |/2Y |6 9| 3A | 1 | 1 | 0 |GND |7 8| /3Y +---+---*---++----------+741004Hex inverters with buffered output.+---+--+---+ +---*---+ _ 1A |1 +--+ 14| VCC | A |/Y | /Y = A/1Y |2 13| 6A +===*===+2A |3 7410 12| /6Y | 0 | Z |/2Y |4 04 11| 5A | 1 | 0 |3A |5 10| /5Y +---*---+/3Y |6 9| 4AGND |7 8| /4Y+----------+741005Hex open-collector inverters with buffered output.+---+--+---+ +---*---+ _ 1A |1 +--+ 14| VCC | A |/Y | /Y = A/1Y |2 13| 6A +===*===+2A |3 7410 12| /6Y | 0 | Z |/2Y |4 05 11| 5A | 1 | 0 |3A |5 10| /5Y +---*---+/3Y |6 9| 4AGND |7 8| /4Y+----------+741032Quad 2-input OR gates with buffered output.+---+--+---+ +---+---*---+1A |1 +--+ 14| VCC | A | B | Y | Y = A+B1B |2 13| 4B +===+===*===+1Y |3 7410 12| 4A | 0 | 0 | 0 |2A |4 32 11| 4Y | 0 | 1 | 1 |2B |5 10| 3B | 1 | 0 | 1 |2Y |6 9| 3A | 1 | 1 | 1 |GND |7 8| 3Y +---+---*---++----------+74335110-tap noninverting delay lines (20, 50 or 100ns total delay).+---+--+---+A |1 +--+ 16| VCC|2 15||3 14| Y1Y2 |4 743 13| Y3Y4 |5 351 12| Y5Y6 |6 11| Y7Y8 |7 10| Y9GND |8 9| Y10+----------+7443748-bit 3-state dual-ranking D flip flop.Designed to prevent stable conditions in data synchronization applications in which setup an d hold times may be violated.+---+--+---+Q1 |1 +--+ 20| D1Q2 |2 19| D2Q3 |3 18| D3Q4 |4 17| D4GND |5 744 16| VCCQ5 |6 374 15| D5Q6 |7 14| D6Q7 |8 13| D7Q8 |9 12| D8/OE |10 11| CLK+----------+747001Quad 2-input AND gates with schmitt-trigger inputs.0.8V typical input hysteresis at VCC=+5V.+---+--+---+ +---+---*---+1A |1 +--+ 14| VCC | A | B | Y | Y = AB1B |2 13| 4B +===+===*===+。
74HC154中文资料（功能,真值勤表,引脚图,电气参数）
74HC154中文资料（功能,真值勤表,引脚图,电气参数）
74HC154中文资料(功能,真值勤表,引脚图,电气参数)
74HC154 功能简述:
74HC154 4线-16 线译码器/解调器
·将4个二进制编码输入译成16个彼独立的输出之一
·将数据从一个输入线分配到16个输出的任意一个而实现解调功能·输入箝位二极管简化了系统设计
·与大部分TTL和DTL电路完全兼容
74154这种单片4 线—16 线译码器非常适合用于高性能存储器的译码器。
当两个选通输入G1 和G2 为低时, 它可将4 个二进制编码的输入译成16 个互相独立的输出之一。
实现解调功能的办法是：用4 个输入线写出输出线的地址，使得在一个选通输入为低时数据通过另一个选通输入。
当任何一个选通输入是高时，所有输出都为高。
TRUTH TABLE真值表：
引脚功能表：
图1 引脚图
图2 国际电工委员会逻辑符号
ABSOLUTE MAXIMUM RATINGS绝对最大额定值
RECOMMENDED OPERATING CONDITIONS建议操作条件
DC SPECIFICATIONS直流电气规格：
74HC154
TAG标签：真值勤74H引脚表。
74sl151(详细)
8选1数据选择器74LS151（151 为互补输出的8 选1 数据选择器）74LS151为互补输出的8选1数据选择器，引脚排列如图所示，功能见表。
引脚，又叫管脚，英文叫Pin。
就是从集成电路（芯片）内部电路引出与外围电路的接线，所有的引脚就构成了这块芯片的接口数据选择端（ABC）按二进制译码（译码是编码的逆过程，同时去掉比特流在传播过程中混入的噪声。
利用译码表把文字译成一组组数码或用译码表将代表某一项信息的一系列信号译成文字的过程称之为译码。
），以从8 个数据（D0---D7）中选取1 个所需的数据。
只有在选通端STROBE 为低电平时才可选择数据。
151 有互补输出端（Y、W），Y 输出原码，W 输出反码。
选择控制端（地址端）为C～A，按二进制译码，从8个输入数据D0～D7中，选择一个需要的数据送到输出端Y，G为使能端，低电平有效。
(就是说能使芯片工作的端口，如果使能端开，芯片就能工作，一般你看表示使能端的符号，如果上面有一横就是低电平有效（即如果使能端为低电平，芯片就能工作），反之就是高电平有效。
)又叫使能输入端（enable），它是芯片的一个输入引脚，或者电路的一个输入端口，只有该引脚激活，芯片才能工作，通常情况下为高电平有效，若符号上面有一横，则表示低电平有效。
多路选择器多路选择器是数据选择器的别称。
在多路数据传送过程中，能够根据需要将其中任意一路选出来的电路，叫做数据选择器，也称多路选择器或多路开关。
有4选1数据选择器、8选1数据选择器（型号为74151、74LS151、74251、74LS151）、16选1数据选择器（可以用两片74151连接起来构成）等之分。
多路选择器还包括总线的多路选择,模拟信号的多路选择等,相应的器件也有不同的特性和使用方法.具体可以查找相关网站数据选择器的定义及功能数据选择是指经过选择，把多个通道的数据传送到唯一的公共数据通道上去。
（1）使能端G＝1时，不论C～A状态如何，均无输出（Y＝0，W＝1），多路开关被禁止。
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
PACKAGING INFORMATIONOrderableDeviceStatus (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)84141012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type 8414101EA ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type 8414101FA ACTIVE CFP W 161TBD A42N /A for Pkg Type SN54ALS151J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SN74ALS151D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151DR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74ALS151N3OBSOLETE PDIP N 16TBD Call TI Call TISN74ALS151NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74ALS151NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALS151NSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151D ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151DE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151DG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151DR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151DRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151DRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151N ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74AS151NE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type SN74AS151NSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151NSRE4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74AS151NSRG4ACTIVESONS162000Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM9-Oct-2007Orderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)SNJ54ALS151FK ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type SNJ54ALS151J ACTIVE CDIP J 161TBD A42SNPB N /A for Pkg Type SNJ54ALS151WACTIVECFPW161TBDA42N /A for Pkg Type(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrateinformation from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.9-Oct-2007TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74ALS151DR D 16SITE 2733016 6.510.3 2.1816Q1SN74ALS151NSR NS 16SITE 41330168.210.5 2.51216Q1SN74AS151DR D 16SITE 2733016 6.510.3 2.1816Q1SN74AS151NSRNS16SITE 41330168.210.52.51216Q14-Oct-2007DevicePackagePins Site Length (mm)Width (mm)Height (mm)SN74ALS151DR D 16SITE 27342.9336.628.58SN74ALS151NSR NS 16SITE 41346.0346.033.0SN74AS151DR D 16SITE 27342.9336.628.58SN74AS151NSRNS16SITE 41346.0346.033.04-Oct-2007IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityRFID Telephony /telephonyLow Power /lpw Video&Imaging /videoWirelessWireless /wirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments Incorporated。