80C652 83C652
英孚英语1-16级level 4
lesson 1 Office workSTUART:OK, OK, thank you. Bye. Every day I get a hundrede-mails.好的，好的，谢谢你。
再见。
每天我都收到上百封邮件。
ELIZABETH:Well I need a hundred photocopies of that.我需要100份复印件。
STUART:A hundred photocopies?100份复印件？ELIZABETH:Yep. Thank you.是的。
谢谢你。
lesson 2 Too busy for a breakSTUART:Elizabeth?1/ 57Elizabeth?ELIZABETH:Hi, I have a meeting.嗨，我有个会。
STUART:You always have meetings. I never have meetings.你总是在开会。
我从来没有会。
ELIZABETH:Oh, thank you.哦，谢谢你。
STUART:Lunch?中饭？ELIZABETH:Ah no, I'm really busy. I rarely take a break.不了，我真的很忙。
我很少休息。
Lesson 3 I don’t like my job! STUART:2/ 57My boss, Elizabeth, has meetings. Sometimes, like, four or five meetings a day. I'm never in any of the meetings. I do boring jobs. Stupid jobs.我的老板，Elizabeth，有会。
有时一天有4到5个会。
我从没有会。
我做的工作很无聊。
愚蠢的工作。
STUART:Same stupid jobs every day. Monday is Tuesday, Tuesday is Wednesday, it's all the same to me. Same thing every day.I don't like my job.每天都重复着愚蠢的工作。
宁大附院2010年参加市卫生局统一考试人员成绩排名公布
宁大附院2010年参加市卫生局统一考试人员成绩排名公布各位考生请注意：
我院定于初八（2月21日）上午八点在行政楼五楼举行面试和操作考试。
参加操作考试的护理及助产人员请自备工作服，具体参加面试人员如下：
1.报考电生理前15名（童彦艳 宋磊 杨婧 王坚炯 史丹莹 方吉代 王淼昊 张诚 张彬 钱静静 蒋丹艳 任晓燕 李佳杰 顾黎黎 翁巧琳）
2.报考药剂学前9名（童佩娟 沈薇 孙婷婷 朱婕颖 金铮 孙丹毛一阳胡鸿魏吴亚萍）
3.报考检验学前6名（潘小莉 李霞 陈岚 沈驰斌 孙维杰 朱喆）
4.报考放射技术学前6名（刘妙灵 杜梁伟 华齐鲁 林超琼 金薇 余佳璐）
5.报考病案统计前3名（黄珊 钱星宇 蒋璐璐）
6.报考护理专业前177名（总分第116前含116分，具体名单见下）
7.报考助产专业的前60名（总分第91分前含91分，具体名单见下）
8.如最后一名与下面的考生分数相同都可以进入面试，请考生相互告之，不再另行通知。
参加面试的考生请于2010年2月21日到宁波大学附属医院行政楼五楼会议室报到，不来参加面试考生视作自动放弃，如人数不足按名次往下顺延。
2010.2.11。
8051_assembler
8051 CROSS ASSEMBLER.USER'S MANUALCopyright (c) 1984, 1985, 1986, 1987, 1988, 1989, 1990 MetaLink Corp.1. 8051 OVERVIEW1.1. IntroductionThe 8051 series of microcontrollers are highly integrated single chip microcomputers with an 8-bit C PU, memory, interrupt controller, timers, serial I/O and digital I/O on a single piece of silicon. The current members of the 8051 family of components include:80C152JA/JB/JC/JD, 83C152JA/JC, 80C15780C154, 83C154, 85C1548044, 8344, 874480C451, 83C451, 87C45180C452, 83C452, 87C4528051, 8031, 8751, 80C51, 80C31, 87C5180512, 8053280515, 80535, 80C535, 80C51580C517, 80C53780C51FA, 83C51FA, 87C51FA, 83C51FB, 87C51FB, 83C51FC, 87C51FC 8052, 8032, 875280C321, 80C521, 87C521, 80C541, 87C5418053, 9761, 875380C552, 83C552, 87C55280C652, 83C652, 87C65283C654, 87C65483C751, 87C75183C752, 87C75280C851, 83C851All members of the 8051 series of microcontrollers share a common architecture. They all have the same instruction set, addressing modes, addressing range and memory spaces. The primary differences between different 8051 based products are the amount of memory on chip, the amount and types of I/O and peripheral functions, and the component's technology (see Table 1-1).In the brief summary of the 8051 architecture that follows, the term 8051 is used to mean collectively all available members of the 8051 family. Please refer to reference (1) for a complete description of the 8051 architecture and the specifications for all the currently available 8051 based products.1.2. 8051 ArchitectureThe 8051 is an 8-bit machine. Its memory is organized in bytes and practically all its instruction deal with byte quantities. It uses an Accumulator as the primary register for instruction results. Other operands can be accessed using one of the four different addressing modes available: register implicit, direct,indirect or immediate. Operands reside in one of the five memory spaces of the 8051.The five memory spaces of the 8051 are: Program Memory, External Data Memory, Internal Data Memory, Special Function Registers and Bit Memory.The Program Memory space contains all the instructions, immediate data and constant tables and strings. It is principally addressed by the 16-bit Program C ounter (PC), but it can also be accessed by a few instructions using the 16-bit Data Pointer (DPTR). The maximum size of the Program Memory space is 64Kbytes. Several 8051 family members integrate on-chip some amount of either masked programmed ROM or EPROM as part of this memory space (refer to Table 1-1).The External Data Memory space contains all the variables, buffers and data structures that can't fit on-chip. It is principally addressed by the 16-bit Data Pointer (DPTR), although the first two general purpose register (R0,R1) of the currently selected register bank can access a 256-byte bank of External Data Memory. The maximum size of the External Data Memory space is 64Kbytes. External data memory can only be accessed using the indirect addressing mode with the DPTR, R0 or R1.The Internal Data Memory space is functionally the most important data memory space. In it resides up to four banks of general purpose registers, the program stack, 128 bits of the 256-bit memory, and all the variables and data structures that are operated on directly by the program. The maximum size of the Internal Data Memory space is 256-bytes. However, different 8051 family members integrate different amounts of this memory space on chip (see Amnt of RAM in Table 1-1). The register implicit, indirect and direct addressing modes can be used in different parts of the Internal Data Memory space.The Special Function Register space contains all the on-chip peripheral I/O registers as well as particular registers that need program access. These registers include the Stack Pointer, the PSW and the Accumulator. The maximum number of SpecialFunction Registers (SFRs) is 128, though the actual number on a particular 8051 family member depends on the number and type of peripheral functions integrated on-chip (see Table 1-1). The SFRs all have addresses greater than 127 and overlap the address space of the upper 128 bytes of the Internal Data Memory space. The two memory spaces are differentiated by addressing mode. The SFRs can only be accessed using the Direct addressing mode while the upper 128 bytes of the Internal Data Memory (if integrated on-chip) can only be accessed using the Indirect addressing mode.The Bit Memory space is used for storing bit variables and flags. There are specific instructions in the 8051 that operate only in the Bit Memory space. The maximum size of the Bit Memory space is 256-bits. 128 of the bits overlap with 16-bytes of the Internal Data Memory space and 128 of the bits overlap with 16 Special Function Registers. Bits can only be accessed using the bit instructions and the Direct addressing mode.The 8051 has a fairly complete set of arithmetic and logical instructions. It includes an 8X8multiply and an 8/8 divide. The 8051 is particularly good at processing bits (sometimes called Boolean Processing). Using the Carry Flag in the PSW as a single bit accumulator, the 8051 can move and do logical operations between the Bit Memory space and the Carry Flag. Bits in the Bit Memory space can also be used as general purpose flags for the test bit and jump instructions.Except for the MOVE instruction, the 8051 instructions can only operate on either the Internal Data Memory space or the Special Function Registers. The MOVE instruction operates in all memory spaces, including the External Memory space and Program Memory space.Program control instructions include the usual unconditional calls and jumps as well as conditional relative jumps based on the C arry Flag, the Accumulator's zero state, and the state of any bit in the Bit Memory space. Also available is a Compare and Jump if Not Equal instruction and a Decrement C ounter and Jump if Not Zero loop instruction. See C hapter 4 for a description of the complete 8051 instruction set.1.3. Summary of the 8051 Family of ComponentsComponent Technology ROM Type of ROM RAM No. of SFRs Serial I/O Type 8031HMOS0-128 b21Start/Stop Async 8051HMOS 4 Kb Masked128 b21Start/Stop Async 8751HMOS 4 Kb EPROM128 b21Start/Stop Async 8053HMOS8 Kb Masked128 b21Start/Stop Async 9761HMOS8 Kb EPROM128 b21Start/Stop Async 8751HMOS8 Kb EPROM128 b21Start/Stop Async 80C31CMOS0-128 b21Start/Stop Async 80C51CMOS 4 Kb Masked128 b21Start/Stop Async 87C51CMOS 4 Kb EPROM128 b21Start/Stop Async 8032HMOS0-256 b26Start/Stop Async 8052HMOS8 Kb Masked256 b26Start/Stop Async 8752HMOS8 Kb EPROM256 b26Start/Stop Async 80C32CMOS0-256 b26Start/Stop Async 80C52CMOS8 Kb Masked256 b26Start/Stop Async 87C52CMOS8 Kb EPROM256 b26Start/Stop Async 8044HMOS 4 Kb Masked192 b34HDLC/SDLC 8344HMOS0-192 b34HDLC/SDLC 8744HMOS 4 Kb EPROM192 b34HDLC/SDLC 80535HMOS0-256 b41Start/Stop Async 80515HMOS8 Kb Masked256 b41Start/Stop Async 80C535CHMOS0-256 b41Start/Stop Async 80C515CHMOS8 Kb Masked256 b41Start/Stop Async 80532HMOS0-128 b28Start/Stop Async 80512HMOS 4 Kb Masked128 b28Start/Stop Async 80C152CHMOS0-256 b56CSMA/CD83C152CHMOS8 Kb Masked256 b56CSMA/CD80C154CMOS0-256 b27Start/Stop Async 83C154CMOS16 Kb Masked256 b27Start/Stop Async 85C154CMOS16 Kb EPROM256 b27Start/Stop Async 80C51FA CHMOS0-256 b47Start/Stop Async 83C51FA CHMOS8 Kb Masked256 b47Start/Stop Async 87C51FA CHMOS8 Kb EPROM256 b47Start/Stop Async 83C51FB CHMOS16 Kb Masked256 b47Start/Stop Async 87C51FB CHMOS16 Kb EPROM256 b47Start/Stop Async 83C51FC CHMOS32 Kb Masked256 b47Start/Stop Async 87C51FC CHMOS32 Kb EPROM256 b47Start/Stop Async 80C537CHMOS0-256 b41Start/Stop Async 80C517CHMOS8 Kb Masked256 b82Start/Stop Async 80C451CMOS0-128 b24Parallel I/F 83C451CMOS 4 Kb Masked128 b24Parallel I/F 87C451CMOS 4 Kb EPROM128 b24Parallel I/F 80C452CHMOS0-256 b55U.P.I.83C452CHMOS8 Kb-256 b55U.P.I.87C452CHMOS8 Kb-256 b55U.P.I.80C552CMOS0-256 b54Start/Stop Async 83C552CMOS8 Kb Masked256 b54Start/Stop Async 87C552CMOS8 Kb EPROM256 b54Start/Stop Async 80C652CMOS0-256 b24Start/Stop Async 83C652CMOS8 Kb Masked256 b24Start/Stop Async 87C652CMOS8 Kb EPROM256 b24Start/Stop Async 83C654CMOS16 Kb Masked256 b24Start/Stop Async 87C654CMOS16 Kb EPROM256 b24Start/Stop Async 83C752CMOS 2 Kb Masked64 b25I2C87C752CMOS 2 Kb EPROM64 b25I2C83C751CMOS 2 Kb Masked64 b20I2C87C751CMOS 2 Kb EPROM64 b20I2C80C521CMOS0-256 b26Start/Stop Async 80C321CMOS8 Kb Masked256 b26Start/Stop Async 87C521CMOS8 Kb EPROM256 b26Start/Stop Async 80C541CMOS16 Kb Masked256 b26Start/Stop Async 87C541CMOS16 kb EPROM256 b26Start/Stop Async 80C851CMOS0-128 b21Start/Stop Async 83C851CMOS 4 Kb Masked128 b21Start/Stop Async Table 1-1: 8051 Family of Components1.4. References1) Intel Corp., 8-Bit Embedded Controllers, 1990.2) Siemens Corp., Microcontroller Component 80515, 1985.3) AMD Corp., Eight-Bit 80C51 Embedded Processors, 1990.4) Signetics Corp., Microcontroller Users' Guide, 1989.2. 8051 CROSS ASSEMBLER OVERVIEW2.1. IntroductionThe 8051C ross Assembler takes anassembly language source file created with a text editor and translates it into a machine language object file. This translation process is done in two passes over the source file. During the first pass, the C ross Assembler builds a symbol table from the symbols and labels used in the source file. It's during the second pass that the C ross Assembler actually translates the source file into the machine language object file. It is also during the second pass that the listing is generated.The following is a discussion of the syntax required by the C ross Assembler to generate error free assemblies.2.2. SymbolsSymbols are alphanumeric representations of numeric constants, addresses, macros, etc. The legal character set for symbols is the set of letters, both upper and lower case (A..Z,a..z), the set of decimal numbers (0..9) and the special characters, question mark (?) and underscore (_). To ensure that the CrossAssembler can distinguish between a symbol and a number, all symbols must start with either a letter or special character (? or _). The following are examples of legal symbols:PISerial_Port_BufferLOC_4096?_?_?In using a symbol, the C ross Assembler converts all letters to upper case. As a result, the Cross Assembler makes no distinction between upper and lower case letters. For example, the following two symbols would be seen as the same symbol by the Cross Assembler:Serial_Port_BufferSERIAL_PORT_BUFFERSymbols can be defined only once. Symbols can be up to 255 characters in length, though only the first 32 are significant. Therefore, for symbols to be unique, they must have a unique character pattern within the first 32 characters. In the following example, the first two symbols would be seen by the Cross Assembler as duplicate symbols, while the third and fourth symbols are unique.BEGINNING_ADDRESS_OF_CONSTANT_TABLE_1BEGINNING_ADDRESS_OF_CONSTANT_TABLE_2CONSTANT_TABLE_1_BEGINNING_ADDRESSCONSTANT_TABLE_2_BEGINNING_ADDRESSThere are certain symbols that are reserved and can't be defined by the user. These reserved symbols are listed in Appendix C and include the assembler directives, the 8051 instruction mnemonics, implicit operand symbols, and the following assembly time operators that have alphanumeric symbols: EQ, NE, GT, GE, LT, LE, HIGH, LOW, MOD, SHR, SHL, NOT, AND, OR and XOR.The reserved implicit operands include the symbols A, AB, C, DPTR, PC, R0, R1, R2, R3, R4, R5, R6, R7, AR0, AR1, AR2, AR3, AR4, AR5, AR6 and AR7. These symbols are used primarily as instruction operands. Except for AB, C, DPTR or PC, these symbols can also be used to define other symbols (see EQU directive inChapter 5).The following are examples of illegal symbols with an explanation of why they are illegal: 1ST_VARIABLE (Symbols can not start with a number.)ALPHA# (Illegal character "#" in symbol.)MOV (8051 instruction mnemonic)LOW (Assembly operator)DATA (Assembly directive)2.3. LabelsLabels are special cases of symbols. Labels are used only before statements that have physical addresses associated with them. Examples of such statements are assembly language instructions, data storage directives (DB and DW), and data reservation directives (DS and DBIT). Labels must follow all the rules of symbol creation with the additional requirement that they be followed by a colon. The following are legal examples of label uses:TABLE_OF_CONTROL_CONSTANTS:DB 0,1,2,3,4,5 (Data storage)MESSAGE: DB 'HELP' (Data storage)START: MOV A,#23 (Assembly language instruction)2.4. Assembler ControlsAssembler controls are used to control where the Cross Assembler gets its input source file, where it puts the object file, and how it formats the listing file.Table 2-1 summarizes the assembler controls available. Refer to C hapter 6 for a detailed explanation of the controls.$DATE(date) Places date in page header $EJECT Places a form feed in listing $INCLUDE(file) Inserts file in source program $LIST Allows listing to be output $NOLIST Stops outputting the listing $MOD51 Uses 8051 predefined symbols $MOD52 Uses 8052 predefined symbols $MOD44 Uses 8044 predefined symbols $NOMOD No predefined symbols used $OBJECT(file) Places object output in file $NOOBJECT No object file is generated $PAGING Break output listing into pages $NOPAGING Print listing w/o page breaks $PAGELENGTH(n) No. of lines on a listing page $PAGEWIDTH(n) No. of columns on a listing page $PRINT(file) Places listing output in file $NOPRINT Listing will not be output $SYMBOLS Append symbol table to listing $NOSYMBOLS Symbol table will not be output $TITLE(string) Places string in page header Table 2-1: Summary of Cross Assembler ControlsAs can be seen in Table 2-1, all assembler controls are prefaced with a dollar sign ($). No spaces or tabs are allowed between the dollar sign and the body of the control. Also, only one control per line is permitted. However, comments can be on the same line as a control. The following are examples of assembler controls:$TITLE(8051 Program Ver. 1.0)$LIST$PAGEWIDTH(132)2.5. Assembler DirectivesAssembler directives are used to define symbols, reserve memory space, store values in program memory and switch between different memory spaces. There are also directives that set the location counter for the active segment and identify the end of the source file. Table 2-2 summarizes the assembler directivesavailable. These directives are fully explained in Chapter 5.EQU Define symbolDATA Define internal memory symbolIDATA Define indirectly addressed internal XDATA Define external memory symbolBIT Define internal bit memory symbol CODE Define program memory symbolDS Reserve bytes of data memoryDBIT Reserve bits of bit memoryDB Store byte values in program memory DW Store word values in program memory ORG Set segment location counterEND End of assembly language source file CSEG Select program memory spaceDSEG Select internal memory data space XSEG Select external memory data spaceISEG Select indirectly addressed internal BSEG Select bit addressable memory space USING Select register bankIF Begin conditional assembly blockELSE Alternative conditional assembly block ENDIF End conditional assembly blockTable 2-2: Summary of Cross Assembler DirectivesOnly one directive per line is allowed, however comments may be included. The following are examples of assembler directives:TEN EQU 10 RESET CODE 0 ORG 40962.6. 8051 Instruction MnemonicsThe standard 8051 Assembly Language Instruction mnemonics plus the generic C ALL and JMP instructions are recognized by the C ross Assembler and are summarized in Table 2-3. See hapter 4 for the operation of the individual instructions.ACALL Absolute callADD AddADDC Add with carryAJMP Absolute jumpANL Logical andCJNE Compare & jump if not equal CLR ClearCPL ComplementDA Decimal adjustDEC DecrementDIV DivideDJNZ Decrement&jump if not zero INC IncrementJB Jump if bit setJBC Jump & clear bit if bit set JC Jump if carry setJMP JumpJNB Jump if bit not setJNC Jump if carry not setJNZ Jump if accum. not zeroJZ Jump if accumulator zero LCALL Long callLJMP Long jump MOV MoveMOVC Move codeMOVX Move externalMUL MultiplyNOP No operationORL Inclusive orPOP Pop stackPUSH Push stackRET ReturnRETI Return from interrupt RL Rotate leftRLC Rotate left thru carry RR Rotate rightRRC Rotate right thru carry SETB Set bitSJMP Short jumpSUBB Subtract with borrow SWAP Swap nibblesXCH Exchange bytesXCHD Exchange digitsXRL Exclusive orCALL Generic callTable 2-3: 8051 Instructions and MnemonicsWhen the C ross Assembler sees a generic C ALL or JMP instruction, it will try to translate the instruction into its most byte efficient form. The Cross Assembler will translate a C ALL into one of two instructions (AC ALL or LC ALL) and it will translate a generic JMP into one of three instructions (SJMP, AJMP or LJMP). The choice of instructions is based on which one is most byte efficient. The generic CALL or JMP instructions saves the programmer the trouble of determining which form is best.However, generic C ALLs and JMPs do have their limitations. While the byte efficiency algorithm works well for previously defined locations, when the target location of the C ALL or JMP is a forward location (a location later on in the program), the assembler has no way of determining the best form of the instruction. In this case the C ross Assembler simply puts in the long version (LC ALL or LJMP) of the instruction, which may not be the most byte efficient. NOTE that the generic C ALLs and JMPs must not be used for the 751/752 device as LC ALL and LJMP are not legal instructions for those devices. Instead use ACALL and AJMP explicitly.For instructions that have operands, the operands must be separated from the mnemonic by at least one space or tab. For instructions that have multiple operands, each operand must be separated from the others by a comma.Two addressing modes require the operands to be preceded by special symbols to designate the addressing mode. The AT sign (@) is used to designate the indirect addressing mode. It is used primarily with Register 0 and Register 1 (R0, R1), but is can also be used with the DPTR in the MOVX and the Accumulator in MOVC and JMP @A+DPTR instructions. The POUND sign (#) is used to designate an immediate operand. It can be used to preface either a number or a symbol representing a number.A third symbol used with the operands actually specifies an operation. The SLASH (/) is used to specify that the contents of a particular bit address is to be complemented before the instruction operation. This is used with the ANL and ORL bit instructions.Only one assembly language instruction is allowed per line. Comments are allowed on the same line as an instruction, but only after all operands have been specified. The following are examples of instruction statements:START: LJMP INITMOV @R0,Serial_Port_BufferCJNE R0 , #TEN, INC_TENANL C,/START_FLAGCALL GET_BYTERET2.7. Bit AddressingThe period (.) has special meaning to the Cross Assembler when used in a symbol. It is used to explicitly specify a bit in a bit-addressable symbol. For example, it you wanted to specify the most significant bit in the Accumulator, you could write AC C.7, where AC C was previously defined as the Accumulator address. The same bit can also be selected using the physical address of the byte it's in.For example, the Accumulator's physical address is 224. The most significant bit of the Accumulator can be selected by specifying 224.7. If the symbol ONwas defined to be equal to the value 7, you could also specify the same bit by either ACC.ON or 224.ON.2.8. ASCII LiteralsPrintable characters from the ASCII characterset can be used directly as an immediate operand, or they can used to define symbols or store ASCII bytes in Program Memory. Such use of the ASCII character set is called ASCII literals. ASCII literals are identifiedby the apostrophe (') delimiter. The apostrophe itself can be used as an ASCII literal. In this case, use two apostrophes in a row. Below are examples of using ASCII literals.MOV A,#'m' ;Load A with 06DH (ASCII m)QUOTE EQU '''' ;QUOTE defined as 27H (ASCII single quote)DB '8051' ;Store in Program Memory2.9. CommentsComments are user defined character stringsthat are not processed by the C ross Assembler. A comment begins with a semicolon ( ; ) and ends at the carriage return/line feed pair that terminates theline. A comment can appear anywhere in a line, but it has to be the last field. The following are examples of comment lines:; Begin initialization routine here$TITLE(8051 Program Vers. 1.0) ;Place version number here TEN EQU 10 ;Constant2.10. The Location CounterThe C ross Assembler keeps a locationcounter for each of the five segments (code, internal data, external data, indirect internal data and bit data). Each location counter is initialized to zero and can be modified using Assembler Directives described in Chapter 5.The dollar sign ($) can be used to specify thecurrent value of the location counter of the active segment. The following are examples of how this can be used:JNB FLAG,$ ;Jump on self until flag is reset CPYRGHT: DB 'Copyright, 1983'CPYRGHT_LENGTH EQU $-CPYRGHT-1 ;Calculate length of copyright message2.11. Syntax SummarySince the Cross Assembler essentiallytranslates the source file on a line by line basis,certain rules must be followed to ensure the translation process is done correctly. First of all,since the C ross Assembler's line buffer is 256characters deep, there must always be a carriage return/line feed pair within the first 256 columns of the line.A legal source file line must begin with either acontrol, a symbol, a label, an instruction mnemonic, a directive, a comment or it can be null (just thecarriage return/line feed pair). Any other beginning to a line will be flagged as an error.While a legal source file line must begin withone of the above items, the item doesn't have to begin in the first column of the line. It only must be the first field of the line. Any number (including zero)of spaces or tabs, up to the maximum line size, may precede it.C omments can be placed anywhere, but theymust be the last field in any line.2.12. Numbers and OperatorsThe Cross Assembler accepts numbers in anyone of four radices: binary, octal, decimal and hexadecimal. To specify a number in a specific radix,the number must use the correct digits for the particular radix and immediately following the number with its radix designator. Decimal is the default radixand the use of its designator is optional. An hexadecimal number that would begin with a letter digit must be preceded by a 0 (zero) to distinguish it from a symbol. The internal representation of numbers is 16-bits, which limits the maximum number possible. Table 2-4 summarizes the radices available.Radix DesignatorLegal DigitsMax. Legal Number Binary B 0,11111111111111111BOctal O, Q0,1,2,3,4,5177777Q Decimal D, (default)0,1,2,3,4,5,6,7,8,965535D Hexadecimal H 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F 0FFFFHTable 2-4: Cross Assembler RadicesNo spaces or tabs are allowed between thenumber and the radix designator. The letter digits and radix designators can be in upper or lower case.The following examples list the decimal number 2957in each of the available radices:101110001101B (Binary)5615o or 5615Q (Octal)2957 or 2957D (Decimal)0B8DH, 0b8dh (Hexadecimal)When using radices with explicit bit symbols,the radix designator follows the byte portion of the address as shown in the following examples:0E0H.7 Bit seven of hexadecimal address 0E0200Q.ON Bit ON of octal address 200The C ross Assembler also allows assemblytime evaluation of arithmetic expressions up to thirty-two levels of embedded parentheses. All calculationsuse integer numbers and are done in sixteen bit precision.+ Addition Unary positive- Subtraction Unary negation (2's complement)* Multiplication/ Integer division (no remainder)MOD Modulus (remainder of integer division)SHR Shift right SHL Shift leftNOT Logical negation (1's complement)AND Logical and OR Inclusive or XOR Exclusive orLOW Low order 8-bits HIGH High order 8-bits EQ, = Relational equalNE, <> Relational not equal GT, > Relational greater thanGE, >= Relational greater than or equal LT, < Relational less thanLE, <= Relational less than or equal ( ) Parenthetical statementTable 2-5: Assembly Time OperationsThe relational operators test the specifiedvalues and return either a True or False. False is represented by a zero value, True is represented by a non zero value (the True condition actually returns a 16-bit value with every bit set; i.e., 0FFFFH). The relational operators are used primarily with theC onditional Assembly capability of the Cross Assembler.Table 2-5 lists the operations available whileTable 2-6 lists the operations precedence in descending order. Operations with higher precedence are done first. Operations with equal precedence are evaluated from left to right.(,)HIGH,LOW*,/,MOD,SHR,SHL +,-EQ,LT,GT,LE,GE,NE,=,<,>,<=,>=,<>NOT AND OR,XORTable 2-6: Operators Precedence2.13. Source File ListingThe source file listing displays the results of the C ross Assembler translation. Every line of the listing includes a copy of the original source line as well as a line number and the C ross Assembler translation. For example, in translating the following line taken from the middle of a source file:TRANS: MOV R7,#32 ;Set up pointer 002F 7920 152 TRANS: MOV R1,#32 ;Set up pointerThe '002F' is the current value of the location counter in hexadecimal. The '7920' is the translated instruction, also in hexadecimal. The '152' is the decimal line number of the current assembly. After the line number is a copy of the source file line that was translated.Another example of a line in the listing file is as follows:015B 13 =1 267 +2 RRC AHere we see two additional fields. The '=1' before the line number gives the current nesting of include files. The '+2' after the line number gives the current macro nesting. This line essentially says that this line comes from a second level nesting of a macro that is part of an include file.Another line format that is used in the listing is that of symbol definition. In this case the location counter value and translated instruction fields described above are replaced with the definition of the symbol. The following are examples of this:00FF 67 MAX_NUM EQU 255 REG 68 COUNTER EQU R7The '00FF' is the hexadecimal value of the symbol MAX_NUM. Again, '67'is the decimal line number of the source file and the remainder of the first line is a copy of the source file. In the second line above, the 'REG' shows that the symbol C OUNTER was defined to be a general purpose register.Optionally, a listing can have a page header that includes the name of the file being assembled, title of program, date and page number. The header and its fields are controlled by specific Assembler Controls (see Chapter 6).The default case is for a listing to be output as a file on the default drive with the same name as the entered source file and an extension of .LST. For example, if the source file name was PROGRAM.ASM, the listing file would be called PROGRAM.LST. Or if the source file was called MODULE1, the listing file would be stored as MODULE1.LST. The default can be changed using the $NOPRINT and $PRINT() Assembler C ontrols (see Chapter 6).2.14. Object FileThe 8051 C ross Assembler also creates a machine language object file. The format of the object file is standard Intel Hexadecimal. This Hexadecimal file can be used to either program EPROM’s using standard PROM Programmers for prototyping, or used to pattern masked ROMs for production.The default case is for the object file to be output on the default drive with the same name as the first source file and an extension of .HEX. For example, if the source file name was PROGRAM.ASM, the object file would be called PROGRAM.HEX. Or if the source file was called MODULE1, the object file would be stored as MODULE1.HEX. The default can be changed using the $NOOBJECT and $OBJECT() Assembler Controls (see Chapter 6).。
NDK历史版本下载方法
NDK历史版本下载⽅法NDK 修订历史记录Android NDK r22bandroid {ndkVersion "22.1.7171670"}Platform Package Size (bytes)SHA1 ChecksummacOS App Bundle1212443975ecd9ce035394e227cba741f48732661055caa251 macOS1049337733dc80e8a2cfcb28db74c1931d42c652e9d17ff2c3 Linux11481983689ece64c7f19763dd67320d512794969930fce9dc Windows108230177596ba1a049303cf6bf3ee84cfd64d6bcd43486a50Android NDK r21eandroid {ndkVersion "21.4.7075529"}Platform Package Size (bytes)SHA1 ChecksumLinux1190670072c3ebc83c96a4d7f539bd72c241b2be9dcd29bda9 Mac OS X1258923497d8ab6d1ebb5499a3604db4134372bfbaff96a94e Mac OS X10426171803f15c23a1c247ad17c7c271806848dbd40434738 Windows 64-bit1109665123fc44fea8bb3f5a6789821f40f41dce2d2cd5dc30Android NDK r20bandroid {ndkVersion "20.1.5948944"}平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位81446469271a1ba20475da1d83b0f1a1826813008f628d59b Windows 64 位832473103ead0846608040b8344ad2bc9bc721b88cf13fb8d Mac OS X843201217b51290ab69cb89de1f0ba108702277bc333b38be Linux 64 位 (x86)859780564d903fdf077039ad9331fb6c3bee78aa46d45527bAndroid NDK r19candroid {ndkVersion "19.2.5345600"}平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位778598286132cc0c9e31b9e58ad6505b0816ff9e524422ed2 Windows 64 位796051997c4cd8c0b6e7618ca0a871a5f24102e40c239f6a3 Mac OS X807630656f46b8193109bba8a58e0461c1a48f4534051fb25 Linux 64 位 (x86)823376982fd94d0be6017c6acbd193eb95e09cf4b6f61b834Android NDK r18b（2019 年 1 ⽉）android {ndkVersion "18.1.5063045"}平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位5046053364b8b6a4edc0fa967b429c1d6d25adf69acc28803Windows 64 位5224894706b6d4138aaaad7166679fdfa4780e177f95cee6f Mac OS X54291199698cb9909aa8c2dab32db188bbdc3ac6207e09440 Linux 64 位 (x86)557038702500679655da3a86aecf67007e8ab230ea9b4dd7bandroid {ndkVersion "17.2.4988734"}平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位6083583105bb25bf13fa494ee6c3433474c7aa90009f9f6a9 Windows 64 位6506265013e3b8d1650f9d297d130be2b342db956003f5992 Mac OS X675091485f97e3d7711497e3b4faf9e7b3fa0f0da90bb649c Linux 64 位 (x86)70938770312cacc70c3fd2f40574015631c00f41fb8a39048Android NDK r16b（2017 年 12 ⽉）android {ndkVersion "16.1.4479499"}平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位656720029becaf3d445a4877ca1a9300a62f0934a4838c7fa Windows 64 位723301086f3f1909ed1052e98dda2c79d11c22f3da28daf25 Mac OS X839630771e51e615449b98c716cf912057e2682e75d55e2de Linux 64 位 (x86)852********aa43aae89a50d1c66c3f9fdecd676936da6128Android NDK r15c（2017 年 7 ⽉）平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位784778144f2e47121feb73ec34ced5e947cbf1adc6b56246e Windows 64 位849733996970bb2496de0eada74674bb1b06d79165f725696 Mac OS X960251267ea4b5d76475db84745aa8828000d009625fc1f98 Linux 64 位 (x86)9749767540bf02d4e8b85fd770fd7b9b2cdec57f9441f27a2Android NDK r14b（2017 年 3 ⽉）平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位707533928070443eaa7fa37ed337f91c655e02ca708d37c92 Windows 64 位769151176a625e8c599bccdb9061b61dcf3d1f1a01071613f Mac OS X8247050732bf582c43f6da16416e66203d158a6dfaba4277c Linux 64 位 (x86)840626594becd161da6ed9a823e25be5c02955d9cbca1dbebAndroid NDK r13b（2016 年 10 ⽉）平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位6204615444eb1288b1d4134a9d6474eb247f0448808d52408 Windows 64 位681320123649d306559435c244cec5881b880318bb3dee53a Mac OS X66596799771fe653a7bf5db08c3af154735b6ccbc12f0add5 Linux 64 位 (x86)6873118660600157c4ddf50ec15b8a037cfc474143f718fd0Android NDK r12b（2016 年 6 ⽉）平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位7064539728e6eef0091dac2f3c7a1ecbb7070d4fa22212c04 Windows 64 位749567353337746d8579a1c65e8a69bf9cbdc9849bcacf7f5 Mac OS X734135279e257fe12f8947be9f79c10c3fffe87fb9406118a Linux 64 位 (x86)755551010170a119bfa0f0ce5dc932405eaa3a7cc61b27694Android NDK r11c（2016 年 3 ⽉）平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位728899082ff939bde6cd374eecbd2c3b2ad218697f9a5038c Windows 64 位7714076423d89deb97b3191c7e5555f1313ad35059479f071 Mac OS X7724287924ce8e7ed8dfe08c5fe58aedf7f46be2a97564696 Linux 64 位 (x86)794135138de5ce9bddeee16fb6af2b9117e9566352aa7e279平台软件包⼤⼩（字节）SHA1 校验和Windows 32 位32050434091d0b8f2835be741f3048fb03c0a3e9f71ab7f357 Windows 64 位5006864954a29f3ae41fb02b64ca8ad2b0903f74356f953d9f Mac OS X35304232626be8598e4ed3d9dd42998c8cb666f0ee502b1294 Linux 64 位 (x86)3514714136f692681b007071103277f6edc6f91cb5c5494a32。
各种单元电路图1
3
VCC
DDC CLK DDC DAT
D605 BAV99
DGND2
R629 10K
R630 10K
R627 100
R628 100
R632 10K
D606 BAV99
DGND2
V33
D603 BAV99 DGND2
DGND2
V33
XS607 VGA 输
入
21 43 65 8 87 10 9 12 11 14 13
C1017 0.22
R1018 1K
V1001 BC847
R1016 470
+ C1020
22u
C1019 0.015
R1019 10
R1020 100
SCL SDA
R2008 100
R2000 100
R2042 10K
R2041 10K
+5V-2 R2043 10K
V2001 BC847
L2001 2.2u
C809 1000u
R574 R568 R563 10K 10K 10K
R564 10K RP501
33X4
RP502 33X4
V33
1
20
19
2 3 4
N514
18 17 16 15
5 74LVC 14
6 7
541A 13
输入输
12 11
8 出接口
9
10
GND3
GND3
V33
C508 0.1u
GND3
C333 0.1
C334 22u
AGND1
V33D
C302 C332 C313 C328 C305 C321 C327 C326 C323 C304 C306 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1
菊阳单片机仿真调试系统用户手册(初稿)
1.2 包装
在菊阳单片机仿真调试系统 JY2X00 包装中，包括以下配置： 1 2 3 4 5 6 7 8 9 10 菊阳单片机仿真调试系统JY2X00用户手册 JY-E2X00C仿真器 JY2X00仿真调试软件安装盘 USB通信电缆 仿真排线 DIP-40仿真适配头 PLCC-44仿真适配头 DIP-20仿真转换头 合格证 保修卡 1本 1台 1张 1根 3根 1个 1个 1个 1张 1张
1
第1章 概 述
非常感谢您使用长沙菊阳微电子有限公司的菊阳单片机仿真调试系统 JY2X00。 本系统包括 JY-E2X00C 仿真器和 JY2X00 仿真调试软件。 JY-E2X00C 仿真器是采用新一代仿真专利技术开发的单片机仿真产品。由于采用了新一代仿真专 利技术，它解决了困扰单片机仿真领域的四大问题： 解决了 Bondout 技术不能仿真增强资源的问题 解决了 Hooks 技术仿真频率低、且不能支持非 Philips 芯片的问题 解决了 IAP 功能仿真的问题 解决了单片机厂家开发多引脚、多功能而担心无仿真芯片的问题 从而进入了全面、真实、直接、高速的仿真新时代： 全面：全面支持具有类似 EA、ALE 和 PSEN 引脚的各种单片机 真实：真实仿真所有标准资源和增强资源，零资源占用 直接：用户单片机直接用作仿真芯片，减少用户投资 高速：能以 40M 的频率稳定仿真外部数据存储器 一旦拥有新一代专利技术仿真器： 不再购买昂贵的仿真头 不再使用兼容模式而直接仿真 500 多种芯片 不再存在 Bondout、Hooks 技术作兼容仿真时不真实的问题
1.1 JY-E2X00C 仿真器的特点
● 仿真适配头上的芯片就是用户要仿真的芯片：任何端口（P0、P1、 …、Pn）不需改变定义， 其 2 功能（包括基本的输入输出功能、附加的 A/D、D/A 功能、附加的中断功能、I C 或 SPI 接口等）完全 相同；任何内部资源不需改变定义即可直接仿真，这些资源包括 A/D、D/A、EXTRAM 、EEPROM、 I2C、SPI、PCA、ISP、PWM 、双 UART、双 DPTR、WDT、RTC、CAN 等；仿真调试时产生的目标 文件（*.hex,*.bin）可以直接用来烧写芯片，不需要作任何改变，这是兼容仿真不可能做到的。 ● 能仿真的芯片数量至少增加十倍：凡是具备 EA、ALE 和 PSEN 引脚的单片机，插入仿真适配 头即可。支持 Acer Labs、Aeroflex UTMC、Analog Devices、Atmel、Cypress、Dallas、Domosys、Hynix、 Infineon、Intel、ISSI、NXP（Philips） 、Nuvoton（Winbond）Russia、SST、STC、SyncMOS、TI 等厂 家的 500 余种单片机。 ● 用少量、廉价仿真适配头替代繁多、昂贵的传统仿真头： 彻底摆脱了使用品种繁多的仿真头 的传统设计方法，既省去了购买仿真头的昂贵费用，又解决了仿真真实性问题；相同封装和引脚排列 的芯片共用一种廉价仿真适配头，与时钟周期无关，与芯片资源无关；不同封装或不同引脚排列的芯 片采用不同的仿真适配头；当用户板不使用单片机插座时（如贴片或特殊封装的单片机） ，用户只需按 我们提供的仿真接口原理图在用户板上引出仿真接口即可。 ● 完全不占用用户的任何资源： 不占堆栈空间、引脚、程序空间、数据空间、定时器和中断等 用户的任何资源。 ● 同一个仿真器同时支持 12 clocks、6 clocks、4 clocks 的芯片：对于不同时钟周期的单片机， 您
五年级填写单位练习题
一、长度单位1. 5米等于多少分米？2. 3分米等于多少厘米？3. 2厘米等于多少毫米？4. 1米等于多少千米？5. 4千米等于多少米？6. 6厘米等于多少毫米？7. 8分米等于多少厘米？8. 5千米等于多少米？9. 7米等于多少分米？10. 9分米等于多少厘米？二、面积单位1. 3平方米等于多少平方分米？2. 2平方分米等于多少平方厘米？3. 4平方厘米等于多少平方毫米？4. 1平方米等于多少平方千米？5. 5平方千米等于多少平方米？6. 6平方厘米等于多少平方毫米？7. 8平方分米等于多少平方厘米？8. 5平方米等于多少平方分米？9. 7平方分米等于多少平方厘米？10. 9平方千米等于多少平方米？三、体积单位1. 3立方米等于多少立方分米？2. 2立方分米等于多少立方厘米？3. 4立方厘米等于多少立方毫米？4. 1立方米等于多少立方千米？5. 5立方千米等于多少立方米？6. 6立方厘米等于多少立方毫米？7. 8立方分米等于多少立方厘米？8. 5立方米等于多少立方分米？9. 7立方分米等于多少立方厘米？10. 9立方千米等于多少立方米？四、质量单位1. 3千克等于多少克？2. 2克等于多少毫克？3. 4毫克等于多少微克？4. 1千克等于多少吨？5. 5吨等于多少千克？6. 6毫克等于多少微克？7. 8克等于多少毫克？8. 5千克等于多少克？9. 7克等于多少毫克？10. 9吨等于多少千克？五、时间单位1. 3小时等于多少分钟？2. 2分钟等于多少秒？3. 4秒等于多少毫秒？4. 1小时等于多少天？5. 5天等于多少小时？6. 6秒等于多少毫秒？7. 8分钟等于多少秒？8. 5小时等于多少分钟？9. 7秒等于多少毫秒？10. 9天等于多少小时？一、长度单位11. 10千米等于多少米？12. 15米等于多少分米？13. 7分米等于多少厘米？14. 2千米等于多少米？15. 9厘米等于多少毫米？16. 5米等于多少千米？17. 6厘米等于多少毫米？18. 8千米等于多少米？19. 4米等于多少分米？20. 3分米等于多少厘米？二、面积单位21. 2平方米等于多少平方分米？22. 5平方分米等于多少平方厘米？23. 7平方厘米等于多少平方毫米？24. 3平方米等于多少平方千米？25. 6平方千米等于多少平方米？26. 8平方厘米等于多少平方毫米？27. 9平方分米等于多少平方厘米？28. 4平方米等于多少平方分米？29. 7平方分米等于多少平方厘米？30. 5平方千米等于多少平方米？三、体积单位31. 4立方米等于多少立方分米？32. 8立方分米等于多少立方厘米？33. 6立方厘米等于多少立方毫米？34. 2立方米等于多少立方千米？35. 7立方千米等于多少立方米？36. 9立方厘米等于多少立方毫米？37. 5立方分米等于多少立方厘米？38. 3立方米等于多少立方分米？39. 6立方分米等于多少立方厘米？40. 8立方千米等于多少立方米？四、质量单位41. 6千克等于多少克？42. 9克等于多少毫克？43. 5毫克等于多少微克？44. 4千克等于多少吨？45. 8吨等于多少千克？46. 7毫克等于多少微克？48. 3千克等于多少克？49. 8克等于多少毫克？50. 7吨等于多少千克？五、时间单位51. 4小时等于多少分钟？52. 7分钟等于多少秒？53. 3秒等于多少毫秒？54. 5小时等于多少天？55. 9天等于多少小时？56. 8秒等于多少毫秒？57. 6分钟等于多少秒？58. 2小时等于多少分钟？59. 9秒等于多少毫秒？60. 6天等于多少小时？一、长度单位61. 12千米等于多少米？62. 18米等于多少分米？63. 11分米等于多少厘米？64. 4千米等于多少米？65. 13厘米等于多少毫米？66. 10米等于多少千米？67. 9厘米等于多少毫米？68. 6千米等于多少米？70. 14分米等于多少厘米？二、面积单位71. 5平方米等于多少平方分米？72. 10平方分米等于多少平方厘米？73. 12平方厘米等于多少平方毫米？74. 7平方米等于多少平方千米？75. 4平方千米等于多少平方米？76. 11平方厘米等于多少平方毫米？77. 9平方分米等于多少平方厘米？78. 8平方米等于多少平方分米？79. 6平方分米等于多少平方厘米？80. 3平方千米等于多少平方米？三、体积单位81. 9立方米等于多少立方分米？82. 15立方分米等于多少立方厘米？83. 14立方厘米等于多少立方毫米？84. 8立方米等于多少立方千米？85. 5立方千米等于多少立方米？. 13立方厘米等于多少立方毫米？87. 10立方分米等于多少立方厘米？88. 7立方米等于多少立方分米？89. 5立方分米等于多少立方厘米？90. 6立方千米等于多少立方米？四、质量单位91. 11千克等于多少克？92. 17克等于多少毫克？93. 6毫克等于多少微克？94. 5千克等于多少吨？95. 2吨等于多少千克？96. 8毫克等于多少微克？97. 14克等于多少毫克？98. 9千克等于多少克？99. 16克等于多少毫克？100. 3吨等于多少千克？五、时间单位101. 8小时等于多少分钟？102. 12分钟等于多少秒？103. 5秒等于多少毫秒？104. 6小时等于多少天？105. 10天等于多少小时？106. 7秒等于多少毫秒？107. 9分钟等于多少秒？108. 3小时等于多少分钟？109. 4秒等于多少毫秒？110. 7天等于多少小时？一、长度单位111. 20千米等于多少米？112. 25米等于多少分米？113. 22分米等于多少厘米？114. 6千米等于多少米？115. 15厘米等于多少毫米？116. 8米等于多少千米？117. 10厘米等于多少毫米？118. 7千米等于多少米？119. 6米等于多少分米？120. 18分米等于多少厘米？二、面积单位121. 3平方米等于多少平方分米？122. 8平方分米等于多少平方厘米？123. 16平方厘米等于多少平方毫米？124. 2平方米等于多少平方千米？125. 5平方千米等于多少平方米？126. 9平方厘米等于多少平方毫米？127. 12平方分米等于多少平方厘米？128. 4平方米等于多少平方分米？129. 7平方分米等于多少平方厘米？130. 6平方千米等于多少平方米？三、体积单位131. 10立方米等于多少立方分米？132. 20立方分米等于多少立方厘米？133. 18立方厘米等于多少立方毫米？134. 3立方米等于多少立方千米？135. 7立方千米等于多少立方米？136. 12立方厘米等于多少立方毫米？137. 15立方分米等于多少立方厘米？138. 9立方米等于多少立方分米？139. 8立方分米等于多少立方厘米？140. 5立方千米等于多少立方米？四、质量单位141. 13千克等于多少克？142. 19克等于多少毫克？143. 7毫克等于多少微克？144. 6千克等于多少吨？145. 1吨等于多少千克？146. 10毫克等于多少微克？147. 15克等于多少毫克？148. 11千克等于多少克？149. 20克等于多少毫克？150. 4吨等于多少千克？五、时间单位151. 9小时等于多少分钟？152. 16分钟等于多少秒？153. 8秒等于多少毫秒？154. 7小时等于多少天？155. 8天等于多少小时？156. 9秒等于多少毫秒？157. 10分钟等于多少秒？158. 4小时等于多少分钟？159. 6秒等于多少毫秒？160. 5天等于多少小时？答案一、长度单位1. 50分米2. 30厘米3. 20毫米4. 1000米5. 4000米6. 60毫米7. 80厘米8. 5000米9. 50分米10. 300厘米二、面积单位1. 300平方分米2. 200平方厘米3. 4000平方毫米4. 1000平方千米5. 5000000平方米6. 600平方毫米7. 900平方厘米8. 400平方分米9. 600平方厘米10. 5000000平方米三、体积单位1. 3000立方分米2. 2000立方厘米3. 4000立方毫米4. 1000立方千米5. 7000000立方米6. 1200立方毫米7. 1000立方厘米8. 7000立方分米9. 6000立方厘米10. 7000000立方米四、质量单位1. 3000克2. 2000毫克3. 6000微克4. 1000吨5. 5000千克6. 8000微克7. 1400毫克8. 9000克9. 1600毫克10. 3000千克五、时间单位1. 540分钟2. 960秒3. 8000毫秒4. 168小时5. 240小时6. 9000毫秒7. 600秒8. 240分钟9. 6000毫秒10. 120小时。
螺栓螺母重量表
1883
3080
1976
3173
2070
3267
2164
3361
2258
3455
2352
3549
2446
3643
2541
3738
规格 直 径×长度
M42×280 M42×290 M42×300 M48×250 M48×260 M48×270 M48×280 M48×290 M48×300 M48×310 M48×320 M48×340 M48×360
-18
27
20
30
-22
32
24
36
-27
41
30
46
36
55
42
65
48
75
注：1、括 号内的尺 寸，尽可能 不采用。
-0.36 -0.43 -0.52
-1 -1.2
公称尺寸
5 6 8 10 11 13 14 16 18 19 22 24 28 32 38
H
允差
粗制
半精制
±0.48
±0.38
±0.58
3803
M42×250 3313
3912
M36×220 M36×230 M36×240 M42×150 M42×160 M42×170 M42×180 M42×190 M42×200 M42×210 M42×220 M48×260 M48×300
2126 2206 2286 2223 2332 2441 2550 2659 2768 2877 2986 4574 5142
40
35
46
41
52
47
58
41
57
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PIN CONFIGURATIONS
P1.0 1 P1.1 2 P1.2 3 P1.3 4 P1.4 5 40 V DD 39 P0.0/AD0 38 P0.1/AD1 37 P0.2/AD2 36 P0.3/AD3 35 P0.4/AD4 34 P0.5/AD5 33 P0.6/AD6 PLASTIC DUAL IN-LINE PACKAGE 32 P0.7/AD7 31 EA 30 ALE 29 PSEN 28 P2.7/A15 27 P2.6/A14 26 P2.5/A13 25 P2.4/A12 24 P2.3/A11 23 P2.2/A10 22 P2.1/A9 21 P2.0/A8
FEATURES
P1.5 6 SCL/P1.6 7 SDA/P1.7 8 RST 9 RxD/P3.0 10 TxD/P3.1 11 INT0/P3.2 12 INT1/P3.3 13 T0/P3.4 14 T1/P3.5 15 WR/P3.6 16 RD/P3.7 17 XTAL2 18 XTAL1 19 VSS 20
INTEGRATED CIRCUITS
80C652/83C652 CMOS single-chip 8-bit microcontrollers
Product specification Supersedes data of 1996 Aug 15 IC20 Data Handbook 1997 Dec 05
• 80C51 central processing unit • 8k × 8 ROM expandable externally to
64k bytes
• 256 × 8 RAM, expandable externally to
64k bytes
• Two standard 16-bit timer/counters • Four 8-bit I/O ports • I2C-bus serial I/O port with byte oriented
1997 Dec 05
3
Phlips Semiconductors
Product specification
CMOS single-chip 8-bit microcontrollers
80C652/83C652
ORDER INFORMATION
PHILIPS PART ORDER NUMBER PART MARKING ROMless P80C652EBP P80C652EBA P80C652EBB P80C652EFP P80C652EFA P80C652EFB P80C652EHP P80C652EHA P80C652EHB P80C652IBP P80C652IBA P80C652IBB P80C652IFP P80C652IFA P80C652IFB ROM3 P83C652EBP/xxx P83C652EBA/xxx P83C652EBB/xxx P83C652EFP/xxx P83C652EFA/xxx P83C652EFB/xxx P83C652EHP/xxx P83C652EHA/xxx P83C652EHB/xxx P83C652IBP/xxx P83C652IBA/xxx P83C652IBB/xxx P83C652IFP/xxx P83C652IFA/xxx P83C652IFB/xxx Drawing Number SOT129-1 SOT187-2 SOT307-2 SOT129-1 SOT187-2 SOT307-2 SOT129-1 SOT187-2 SOT307-2 SOT129-1 SOT187-2 SOT307-2 SOT129-1 SOT187-2 SOT307-2 PHILIPS NORTH AMERICA PART ORDER NUMBER ROMless P80C652EBPN P80C652EBAA P80C652EBBB P80C652EFPN P80C652EFAA P80C652EFBB ROM P83C652EBPN P83C652EBAA P83C652EBBB P83C652EFPN P83C652EFAA P83C652EFBB EPROM2 S87C652-4N40 S87C652-4A44 S87C652-4B44 S87C652-5N40 S87C652-5A44 S87C652-5B44 TEMPERATURE RANGE (°C) ) AND PACKAGE FREQ
22 Function P2.5/A13 P2.6/A14 P2.7/A15 PSEN ALE VSS2 EA/VPP P0.7/AD7 P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VDD VSS3 P1.0 P1.1 P1.2 P1.3 P1.4
CMOS single-chip 8-bit microcontrollers
80C652/83C652
PLASTIC LEADED CHIP CARRIER PIN FUNCTIONS
6 1 40
PLASTIC QUAD FLAT PACK PIN FUNCTIONS
44 34
7 PLASTIC LEADED CHIP CARRIER 17
12 Function P1.5 P1.6/SCL P1.7/SDA RST P3.0/RxD VSS4 P3.1/TxD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 VSS1 NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
28 Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 PSEN ALE NC* EA P0.7/AD7 P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VDD Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
ranges: 0 to +70°C –40 to +85°C –40 to +125°C
6
1
40
7 PLASTIC LEADED CHIP CARRIER
39
LOGIC SYMBOL
VDDVSS ADDRESS AND DATA BUS RST XTAL1 XTAL2 EA PSEN ALE 44 ALTERNATE FUNCTIONS PORT 3 PORT 1 PORT 0 17
29
18
28
34
1 SCL SDA PLASTIC QUAD FLAT PACK 11
33
RxD TxD INT0 INT1 T0 T1 WR RD
ADDRESS BUS
ቤተ መጻሕፍቲ ባይዱ
PORT 2
23
12
22
1997 Dec 05
2
Phlips Semiconductors
Product specification
master and slave functions
• Full-duplex UART facilities • Power control modes
– Idle mode – Power-down mode
• ROM code protection • Extended frequency range: 3.5 to 24 MHz • Three operating ambient temperature
39
1 PLASTIC QUAD FLAT PACK
33
29
11
23
18 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function NC* P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6/SCL P1.7/SDA RST P3.0/RxD NC* P3.1/TxD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD XTAL2 XTAL1 VSS
*DO NOT CONNECT
*DO NOT CONNECT
NOTES TO QFP ONLY: 1. Due to EMC improvements, all VSS pins (6, 16, 28, 39) must be connected to VSS on the 80C652/83C652.
Philips Semiconductors
Phlips Semiconductors
Product specification
CMOS single-chip 8-bit microcontrollers
80C652/83C652
DESCRIPTION
The P80C652/83C652 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 80C652/83C652 has the same instruction set as the 80C51. Three versions of the derivative exist: 83C652 — 8k bytes mask programmable ROM 80C652 — ROMless version 87C652 — EPROM version (described in a separate chapter) This device provides architectural enhancements that make it applicable in a variety of applications for general control systems. The 8XC652 contains a non-volatile 8k × 8 read-only program memory, a volatile 256 × 8 read/write data memory, four 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51), a multi-source, two-priority-level, nested interrupt structure, an I2C interface, UART and on-chip oscillator and timing circuits. For systems that require extra capability, the 8XC652 can be expanded using standard TTL compatible memories and logic. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte and 17 three-byte. With a 16(24)MHz crystal, 58% of the instructions are executed in 0.75(0.5)µs and 40% in 1.5(1)µs. Multiply and divide instructions require 3(2)µs.