1000进制以内的任意进制计数器

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY CNTN IS

PORT (CLK,RST,EN:IN STD_LOGIC;

CQ,DATA1:OUT STD_LOGIC_VECTOR(9 DOWNTO 0);

DATA:IN STD_LOGIC_VECTOR(9 DOWNTO 0));

END CNTN;

ARCHITECTURE BEHA V OF CNTN IS

SIGNAL Q: STD_LOGIC_VECTOR(9 DOWNTO 0);

BEGIN

Q<=DATA;

PROCESS(CLK,RST,EN)

V ARIABLE CQI:STD_LOGIC_VECTOR(9 DOWNTO 0); BEGIN

IF RST='1' THEN CQI:=(OTHERS=>'0');

ELSIF CLK'EVENT AND CLK='1' THEN

IF EN='1' THEN

IF CQI< Q-1 AND Q<1000 THEN

CQI:=CQI+1;

ELSE CQI:=(OTHERS=>'0');

END IF;

END IF;

END IF;

CQ<=CQI;

END PROCESS;

DATA1<=DATA;

END BEHA V;