2006-Enhancement-Mode MISHFETs

Enhancement-Mode Si3N4/AlGaN/GaN MISHFETs Ruonan Wang,Yong Cai,Chi-Wai Tang,Kei May Lau,Fellow,IEEE,and Kevin J.Chen,Member,IEEEAbstract—Enhancement-mode Si3N4/AlGaN/GaN metal–insulator–semiconductor HFETs(MISHFETs)with a1-µm gate footprint are demonstrated by combining CF4plasma treatment technique and a two-step Si3N4deposition process.The threshold voltage has been shifted from−4[for depletion-mode HFET] to2V using the techniques.A15-nm Si3N4layer is inserted under the metal gate to provide additional isolation between the gate Schottky contact and AlGaN surface,which can lead to reduced gate leakage current and higher gate turn-on voltage.The two-step Si3N4deposition process is developed to reduce the gate coupling capacitances in the source and drain access region,while assuring the plasma-treated gate region being fully covered by the gate electrode.The forward turn-on gate bias of the MISHFETs is as large as7V,at which a maximum current density of 420mA/mm is obtained.The small-signal RF measurements show that the current gain cutoff frequency(f T)and power gain cutoff frequency(f max)are13.3and23.3GHz,respectively.Index Terms—AlGaN/GaN,enhancement-mode(E-mode) MISHFET,fluoride-based plasma treatment,Si3N4.I.I NTRODUCTIONO WING to the high power handling capacity and excel-lent capability of operating at high temperatures,wide bandgap AlGaN/GaN heterostructurefield effect transistors (HFETs)are attracting interest for applications in RF power amplifiers and high-temperature digital integrated circuits[1]–[7].From the application point of view,enhancement-mode (E-mode)AlGaN/GaN HFETs have many advantages over depletion-mode(D-mode)HFETs.With the E-mode HFETs, the negative-polarity voltage supply can be eliminated,leading to reduced circuit complexity and reduced cost.As for the monolithic integration of E-mode and D-mode HFETs also en-ables the implementation of direct-coupled FET logic(DCFL) that features the simplest circuit configuration for HFET-based logic circuits.Many works about E-mode HFETs and E/D-mode integration have been undertaken by using recess gate [8],fluoride-ride plasma treatment techniques[4],[9],[10],and platinum-based gate electrode[11].At the same time,E-mode metal-insulator-semiconductor HFETs(MISHFETs)are still lacking.The MISHFETs[12]–[15],when E-mode operation is made possible,can provide several benefits in applications. First,MISHFETs are preferred for high-temperature operation, because the additional insulator between the gate electrode and III-nitride semiconductor provides an additional potential barrier between the gate electrode and the channel,whichManuscript received May11,2006;revised July7,2006.This work was supported by the Hong Kong RGC Competitive Earmarked Research Grant 611706.The review of this letter was arranged by T.Mizutani.The authors are with the Department of Electronic and Computer Engineer-ing,Hong Kong University of Science and Technology,Kowloon,Hong Kong (e-mail:reynold@ust.hk;eekjchen@ust.hk).Digital Object Identifier10.1109/LED.2006.882522then suppresses the thermionic emission and tunneling at high temperature and keep the gate voltage swing reasonably large for proper circuit operation.Second,the increased gate turn-on voltage can facilitate the accommodation of a more positive threshold voltage,which is preferred not only for assuring the complete turn-off of the device at zero bias,but also for providing improved device safety for certain circuits such as power switches.In this letter,we report thefirst E-mode Si3N4/AlGaN/GaN MISHFETs with a two-step Si3N4process which features a thin layer of Si3N4(15nm)under the gate and a thick layer of Si3N4(∼125nm)in the access region. Thefluoride-based plasma treatment technique[4],[9]was adopted to convert the device from D-mode to E-mode.The E-mode MISHFETs with1-µm long gate footprint exhibit a threshold voltage of2V,a forward turn-on gate bias of6.8V (compared to∼3V realized in E-mode AlGaN/GaN HEMTs) and a maximum current density of420mA/mm.II.D EVICE S TRUCTURE AND F ABRICATIONThe AlGaN/GaN HFET structure used in this letter is grown on(0001)sapphire substrates in an Aixtron AIX2000HT metal-organic chemical vapor deposition(MOCVD)system. The HFET structure consists of a∼50-nm thick low temper-ature GaN nucleation layer,a2.5-µm thick unintentionally doped GaN buffer layer,and an AlGaN barrier layer with nominal30%Al composition.The barrier layer is composed of a3-nm undoped spacer,a16-nm carrier supplier layer doped at2×1018cm−3,and a2-nm undoped cap layer.The capacitance–voltage(C−V)measurement by mercury probe yields an initial threshold voltage of−4V for this sample. The processflow is illustrated in Fig.1.Atfirst,device mesa is formed using Cl2/He plasma dry etching in an STS inductively coupled plasma reactive ion etching(ICP-RIE)sys-tem followed by the source/drain ohmic contact formation with Ti/Al/Ni/Au(20nm/150nm/50nm/80nm)annealed at850◦C for30s,as shown in Fig.1(a).Then,thefirst Si3N4layer (∼125nm)is deposited on the sample by plasma enhanced chemical vapor deposition(PECVD)[Fig.1(b)].After gate windows with1-µm length are opened by photolithography,the sample was put in an RIE system under CF4plasma treatment, which accomplished two goals:removal of the Si3N4and incorporation offluorine ions in the AlGaN[4],[9].The RF power of the plasma is150W,as shown in Fig.1(c).The gasflow is controlled to be150sccm,and the total etching and treatment time is190s.The incorporation offluorine ions fulfills the task of converting the treated region from D-mode to E-mode HFET[9].After removing the photoresist,the second Si3N4film(∼15nm)is deposited by PECVD to form the insulating layer between gate metal and AlGaN[Fig.1(d)].0741-3106/$20.00©2006IEEEFig. 1.Schematics showing the processflow of E-mode MISHFETs: (a)Active region and ohmic contact.(b)Thefirst Si3N4layer deposition.(c)Gate area definition and plasma treatment.(d)The second Si3N4layer deposition.(e)Si3N4patterned.(f)Schottky contact and interconnection. Subsequently,the Si3N4layer is patterned and etched to open windows in the source and drain ohmic contact regions,as shown in Fig.1(e).Next,the2-µm long gate electrodes are defined by photolithography followed by e-beam evaporation of Ni/Au(∼50nm/300nm)and liftoff[Fig.1(f)].To make sure the gate electrode covers the entire plasma-treated region,the metal gate length(2µm)is chosen to be larger than the treated gate area(1µm),leading to a T-gate configuration.The gate overhang in the source/drain access regions is insulated from the AlGaN layer by the thick Si3N4layer,keeping the gate capacitances at low level.At last,the whole sample is annealed at400◦C for10min to repair the plasma-induced damage in the AlGaN barrier and channel[4],[9].Measured from the foot of gate,the gate–source and gate–drain spacings are both 1.5µm.The E-mode MISHFETs are designed with gate width of10µm for dc testing and100µm for RF characterizations.III.D EVICE C HARACTERISTICSThe dc output characteristics of the E-mode MISHFETs are plotted in Fig.2.The devices exhibit a peak current density of∼420mA/mm,an ON-resistance of∼5.67Ω·mm and a knee voltage of∼3.3V at V GS=7V.Fig.3(a)shows the transfer characteristics of the same device with1×10-µm gate dimension.It can be seen that the threshold voltage V th is about 2V,indicating a6-V shift of V th(compared to a conventional D-mode HFET)achieved by the insertion of the Si3N4insu-lator and plasma treatment.The peak transconductance g m is ∼125mS/mm.Fig.3(b)shows the gate leakage current at both the negative bias and forward bias.The forward biasturn-on Fig.2.DC output characteristics of E-modeMISHFETs.Fig.3.(a)Transfer characteristics and(b)gate leakage current of E-mode MISHFETs.voltage for the gate is∼6.8V,providing a much larger gate bias swing compared to the E-mode HFETs[9].Pulse measurements were taken on the E-mode MISHFETs with1×100-µm gate dimensions with a pulse length of 0.2µS and a pulse separation of1mS.The quiescent bias point is chosen at V GS=0V(below V th)and V DS=20V.Fig.4 shows that the pulsed peak current is higher than the static one,indicating no current collapse in the device.The static maximum current density of the large device with a100-µm gate width is∼330mA/mm,smaller than the device with 10-µm gate width(∼420mA/mm).The lower peak current density in the larger device is due to the self-heating effect that lowers the current density.Since little self-heating occurs dur-ing pulse measurements,the maximum current for the100-µm wide device can reach the same level as the10-µm wide device. On wafer small-signal RF characteristics were performed from 0.1to39.1GHz on the100-µm wide E-mode MISHFETs at V DS=10V.As shown in Fig.5,the maximum current gain cutoff frequency(f T)and power gain cutoff frequency(f max)W ANG et al.:ENHANCEMENT-MODE Si 3N 4/AlGaN/GaN MISHFETs795Fig.4.Pulse measurements of E-modeMISHFETs.Fig.5.Small-signal RF characteristics of E-mode MISHFETs.are 13.3and 23.3GHz,respectively.When the gate bias is 7V ,the small-signal RF performance does not degrade much,with an f T of 13.1GHz and an f max of 20.7GHz,indicating that the Si 3N 4insulator offers an excellent insulation between gate metal and semiconductor.IV .C ONCLUSIONThe fabrication technology for E-mode AlGaN/GaN MISH-FET has been developed.The CF 4plasma treatment is used to convert D-mode devices to E-mode,shifting the threshold voltage from negative to positive.A two-step Si 3N 4deposition process is used to insert a thin layer of Si 3N 4as the gate insulating layer and create a thick layer between the gate electrode and the access region.The gate bias of the E-mode MISHFETs can be applied up to 7V .The E-mode MISHFETsshow no current collapse under pulse operation,and good dc and RF performances are obtained.R EFERENCES[1]V .Kumar,W.Lu,R.Schwindt,A.Kuliev,G.Simin,J.Yang,M.A.Khan,and I.Adesida,“AlGaN/GaN HEMTs on SiC with f T of over 120GHz,”IEEE Electron Device Lett.,vol.23,no.8,pp.455–457,Aug.2002.[2]Y .F.Wu,A.Saxler,M.Moore,R.P.Smith,S.Sheppard,P.M.Chavarkar,T.Wisleder,U.K.Mishra,and P.Parikh,“30-W/mm GaN HEMTs by field plate optimization,”IEEE Electron Device Lett.,vol.25,no.3,pp.117–119,Mar.2004.[3]J.W.Johnson,E.L.Piner,A.Vescan,R.Therrien,P.Rajagopal,J.C.Roberts,J.D.Brown,S.Singhal,and K.J.Linthicum,“12W/mm AlGaN-GaN HFETs on silicon substrates,”IEEE Electron Device Lett.,vol.25,no.7,pp.459–461,Jul.2004.[4]Y .Cai,Z.Q.Cheng,W.C.W.Tang,K.J.Chen,and u,“Mono-lithic integration of enhancement-and depletion-mode AlGaN/GaN HEMTs for GaN digital integrated circuits,”in IEDM Tech.Dig.,Dec.2005,pp.771–774.[5]I.Daumiller,C.Kirchner,M.Kamp,K.J.Ebeling,and E.Kohn,“Evalu-ation of the temperature stability of AlGaN/GaN heterostructure FET’s,”IEEE Electron Device Lett.,vol.20,no.9,pp.448–450,Sep.1999.[6]P.G.Neudeck,R.S.Okojie,and C.Liang-Yu,“High-temperatureelectronics—A role for wide bandgap semiconductors?,”Proc.IEEE ,vol.90,no.6,pp.1065–1076,Jun.2002.[7]T.Egawa,G.Y .Zhao,H.Ishikawa,M.Umeno,and T.Jimbo,“Character-izations of recessed gate AlGaN/GaN HEMTs on sapphire,”IEEE Trans.Electron Devices ,vol.48,no.3,pp.603–608,Mar.2003.[8]M.Micovic,T.Tsen,M.Hu,P.Hashimoto,P.J.Willadsen,osavljevic,A.Schmitz,M.Antcliffe,D.Zhender,J.S.Moon,W.S.Wong,and D.Chow,“GaN enhancement/depletion-mode FET logic for mixed signal applications,”Electron.Lett.,vol.41,no.19,pp.1081–1083,Sep.2005.[9]Y .Cai,Y .G.Zhou,K.J.Chen,and u,“High-performanceenhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment,”IEEE Electron Device Lett.,vol.26,no.7,pp.435–437,Jul.2005.[10]T.Palacios,C.-S.Suh,A.Chakraborty,S.Keller,S.P.DenBaars,andU.K.Mishra,“High-performance E-mode AlGaN/GaN HEMTs,”IEEE Electron Device Lett.,vol.27,no.6,pp.428–430,Jun.2006.[11]A.Endoh,Y .Yamashita,K.Ikeda,M.Higashiwaki,K.Hikosaka,T.Matsui,S.Hiyamizu,and T.Mimura,“Non-recessed-gate enhancement-mode AlGaN/GaN high electron mobility transistors with high RF performance,”Jpn.J.Appl.Phys.,vol.43,no.4B,pp.2255–2258,2004.[12]M.A.Khan,X.Hu,G.Sumin,A.Lunev,J.Yang,R.Gaska,and M.S.Shur,“AlGaN/GaN metal oxide semiconductor heterostructure field effect transistor,”IEEE Electron Device Lett.,vol.21,no.2,pp.63–65,Feb.2000.[13]X.Hu,A.Koudymov,G.Simin,J.Yang,and M.A.Khan,“Si 3N 4/AlGaN/GaN-metal-insulator-semiconductor heterostructure field-effect transistors,”Appl.Phys.Lett.,vol.79,no.17,pp.2832–2834,Oct.2001.[14]A.Chini,J.Wittich,S.Heikman,S.Keller,S.P.DenBaars,and U.K.Mishra,“Power and linearity characteristics of GaN MISFET on sap-phire substrate,”IEEE Electron Device Lett.,vol.25,no.2,pp.55–57,Feb.2004.[15]M.Kanamura,T.Kikkawa,T.Iwai,K.Imanishi,T.Kubo,and K.Joshin,“An over 100W n-GaN/n-AlGaN/GaN MIS-HEMT power amplifier for wireless base station applications,”in IEDM Tech.Dig.,Dec.2005,pp.572–575.。