42819-2212中文资料
REACH法规SVHC205项物质清单（中英日）
REACH法规SVHC205项物质清单（中英日）NO.物质名称(China)Name（English）物質名（Japan）CAS NO 主要用途1蒽Anthraceneアントラセン120-12-7制造有机染料2二氨基二苯基甲烷Diaminodiphenylmethane 4,4'-ジアミノジフェニルメタン101-77-9制造环氧树脂、聚氨酯3邻苯二甲酸二丁酯Dibutyl phthalate フタル酸ジ-n-ブチル(DBP)84-74-2硝化纤维、漆器、橡胶、polyvinyl acetate及polymethylmethacrylate resin及塑胶产品之塑形剂、驱虫剂或香水、墨水之溶剂4二氯化钴Cobalt dichloride 塩化コバルト（II)7646-79-9制造隐显墨水、变色硅胶、干燥剂5五氧化二砷Diarsenic pentaoxide 五酸化二ヒ素1303-28-2玻璃、农药、木材防腐、饲料添加剂、阿散酸、洛克沙生6三氧化二砷Diarsenic trioxide三酸化二ヒ素1327-53-3玻璃、搪瓷、颜料工业和杀虫剂、皮革保存剂7二水合重铬酸钠Sodium dichromate, dihydrate二クロム酸ナトリウム?二水和物7789-12-0处理工业用水、制造染料时的氧化剂及其他许多合成有机物质、漂白脂类、油类、海绵、树脂、精炼石油、制造铬酸及其他铬酸盐、媒染剂、硬化动物胶、杀菌剂（木材防腐剂）8三硝基-3,3-二甲基-5-叔丁基苯（二甲苯麝香）5-tert-butyl-2,4,6-trinitro-m-xylene (musk xylene)2, 4, 6-トリニトロ-5-tert-ブチル-1, 3-キシレン（ムスクキシレン）81-15-2化妆品香精和皂用香精的定香剂、中药膏贴剂的透皮剂，可增加药物的表皮吸收9邻苯二甲酸(2-乙基己基酯)Bis (2-ethyl(hexyl)phthalate) (DEHP)フタル酸ビス(2-エチルヘキシル) （DEHP ）117-81-7泛用可塑剂10六溴环十二烷Hexabromocyclododecane (HBCDD)ヘキサブロモシクロドデカン(HBCDD)25637-99-4高含溴量的阻燃剂11短链型C10-13氯化石蜡Alkanes, C10-13, chloro (Short ChainChlorinated Paraffins)短鎖塩素化パラフィン(炭素数10～13のもの)85535-84-8阻燃剂和聚氯乙烯助增塑剂12氧化三丁锡Bis(tributyltin)oxideビス(トリブチルスズ)＝オキシド (TBTO)56-35-9船舶涂料、木材防腐剂、杀虫剂、灭鼠剂，也可以加入木材、纸张、皮毛、玻璃和纺织品的塑型胶黏剂中起到稳定及防腐作用13砷酸氢铅Lead hydrogen arsenate ヒ酸水素鉛7784-40-9杀虫剂、草皮除草剂，果树、蔬菜、橡胶树、咖啡、可可、葡萄及草皮处理14三乙砷酸酯Triethyl arsenateヒ酸トリエチル15606-95-8集成电路15邻苯二酸丁酯苯酯Benzyl butyl phthalate(BBP)フタル酸n-ブチル＝ベンジル (BBP)85-68-7制造乙烯基地砖、黏着剂、合成皮及其他工业用产品、塑化剂、化妆品16蒽油Anthracene oilアントラセン油90640-80-517蒽油（蒽糊，轻油*1）Anthracene oil (anthracene paste, distn. light)アントラセン油（アントラセンペースト、軽蒸留）91995-17-418蒽油（蒽糊，蒽馏分）Anthracene oil (anthracene paste, anthracene fraction)アントラセン油（アントラセンペースト、アントラセン留分）91995-15-219蒽油（含蒽量少）Anthracene oil (anthracene-low)アントラセン油（アントラセン低含有）90640-82-720蒽油（蒽糊）Anthracene oil (anthracene paste)アントラセン油（アントラセンペースト）90640-81-621高温煤焦油沥青(Coal-tar pitch, high temperature)高温コールタールピッチ65996-93-2工业用电极保护剂，也可用于特殊功能之铺面、涂料、防潮层222,4-二硝基甲苯2,4-Dinitrotoluene 2, 4－ジニトロトルエン121-14-2用于聚胺酯发泡体的制备或做爆炸材料中成分23邻苯二甲酸二异丁酯Diisobutyl phthalate フタル酸ジイソブチル(DIBP)84-69-5塑化剂、胶合剂、涂料、油墨24铬酸铅（俗称铬黄），PbCrO4Lead(II) chromateクロム酸鉛（ＩＩ）7758-97-6颜料、氧化剂和火柴成分等，油性合成树脂涂料、印刷油墨、水彩和油彩的颜料，色纸、橡胶和塑料制品的着色剂25钼铬红（含铬酸铅、钼酸铅、硫酸铅）(C.I. 颜料红104)Lead chromate molybdate sulphate red(C.I.Pigment Red 104)C.I.ピグメントレッド10412656-85-826铅铬黄（含铬酸铅和硫酸铅）(C.I.颜料黄34)Lead sulfochromate yellow (C.I.Pigment Yellow34)C.I.ピグメントイエロー341344-37-2主要用于制造蒽及碳黑，也可用作鼓风炉中还原剂、重油的原料工业漆原料；橡胶、塑料和陶器涂料的颜料第一批 SVHC （15项物质） 2008年10月28日公布第二批 SVHC （13项物质） 2010年1月13日公布，3月30日修订27磷酸三(2-氯乙基)酯Tris(2-chloroethyl)phosphateリン酸トリス（2-クロロエチル）115-96-8压克力树脂或聚胺酯、或其余聚合物中之塑化剂、阻燃剂，也可用于表面处理、涂料。
二级简码表
23 K 中 呈 叶 顺 呆 呀 中 虽 吕 另 员 呼 听 吸 只 史 嘛 啼 吵 喧 叫 啊 哪 吧 哟
24 L 国 车 轩 因 困
25 M 同 同 财 央 朵 曲 四 由 辊 则 加 男 崭 轴 册 力 几 斩 贩 胃 骨 办 内 罗 风 罚 凡 较 赠 〇 峭 辚 边 迪 思 岂 囝 邮 轨 轻 凤 累 嶷
53 V 发 姨 寻 姑 杂 毁 旭 如 舅 妯 九 奶 婚 妨 嫌 录 灵 巡 刀 好 妇 妈 姆
54 C 以 骊 对 参 骠 戏 ○ 骒 台 劝 观 矣 牟 能 难 允 驻 ○ ○ 驼 马 邓 艰 双 ○
55 X 经 线 结 顷 红 引 旨 强 细 纲 张 绵 级 给 约 纺 弱 纱 继 综 纪 弛 绿 经 比
45 P 这 定 守 害 宁 宽 寂 审 宫 军 宙 客 宾 家 空 宛 社 实 宵 灾 之 官 字 安 ○ 它
51 N 民 怀 导 居 民 收 慢 避 惭 届 必 怕 ○ 愉懈 心 习 悄 屡 忱 忆 敢 恨 怪 尼
52 B 了 卫 际 承 阿 陈 耻 阳 职 阵 出 降 孤 阴 队 隐 防 联 孙 耿 辽 也 子 限 取 陛
15 A 工 七 革 基 苛 式 牙 划 或 功 贡 攻 匠 菜 共 区 芳 燕 东 芝 世 节 切 芭 药
21 H 上 睛 睦 盯 虎 止 旧 占 卤 贞 睡 睥 肯 具 餐 眩 瞳 步 眯 瞎 卢 ○ 眼 皮 此
22 J 是 量 时 晨 果 虹 早 昌 蝇 曙 遇 昨 蝗 明 蛤 晚 景 暗 晃 显 晕 电 最 归 紧 昆
# # # # # # # # # # # # # # # # # # # # # # # # #
G F D S A H J K L M T R E W Q Y U I O P N B V C X
海关资料汇总
海关资料汇总HS code Item name净重(kg)中文品名1011_7050.018锁芯固定板1012_2560.017LA门锁连杆3013ZW250.0008LA门锁堵头3130L100.0028衬套L=103130L160.0043衬套L=163130L280.008衬套L=283130L380.01衬套L=3853190.033卡纸6060-NEW0.0003LA门锁防转圈6601FE0.051LA门锁面板6602-E.ASSY0.017LA门锁锁芯固定板66100.0019LA门锁弹簧销钉6610-DH0.004铆紧螺母6611-U30.017门锁连杆U36707-fom0.04BL门锁摇臂6813B0.0007弹片ASSY.ROLTOP-Q40_NEW0.032锁舌1009_913_R1_QF0.235门档板组件3006C0.32门把手1001619 90050.23941门档板黑色1001619 60090.24205门档板深绿色1001619 ALUM0.2376门档板铝原色BAG-MAMMOTH1800.03086螺母配件RESILOCK0.3551户外门锁SA-KL9005QF20.4935门档板把手SKZ-020.5592LSKZ户外门锁DURA-4040-120.069门铰链固定板DRILLVISE-4 4.022钻孔工具套件DIN0912IM8X500.023螺栓DIN7984_A2_M8X350.015螺栓DIN7343IM6X200.0026销LR-M160.049螺母LIN7985IM4X50.0012螺丝SE-E 1.425门锁SA-KLALUMQF20.489门档板SA-KLALUM600.542门档板SA-KLALUM400.528门档板SA-KL6005QF20.492门档板ROLLTOP-400.034门锁舌Resi_handle_L+R0.345把手QFIXSET-USA-10.122螺栓PUSHBAR-L 2.863推杆PUSHBAR1500-L 3.15推杆PKQ600.491门锁PKQ400.568门锁MAGMAG-5000-ZILV 5.087电磁门锁MAGUNIT-2500 1.879电磁门锁NOSEHINGE ROUND OM0.211门铰链1002_2930.059转子1002_3130.006铆接片1002_3150.037圆形锁舌1002_5970.0034转动销1002_6090.0006弹簧1002_6270.001销钉1002_7200.0012销钉66060.004转轴锁钉6605RBD.ASSY0.017锁舌可调螺栓6605BY10.042锁舌连杆6602U.30.016锁芯固定块6005VE800.119锁舌6005VE500.068锁舌6005VE400.063锁舌6005VE300.04锁舌6005RE500.068锁舌6005RE100.0001锁舌6005RE600.067锁舌6005RE400.03锁舌6005RE300.024锁舌6005RE200.033锁舌LIN6912IM8X550.024螺栓LIN6616SM5X200.003螺栓LIN0916IM8X900.029螺栓LIN0916IM8X600.0017螺母LIN0916IM8X300.008螺母LIN0007IO3X360.0016销LIN.QF.S80.008膨胀螺母LAP3001-40.004塑料堵头KIDLOC0.263门锁ISO7380IM3X40.0004螺钉GBM12-140-1500.414门铰链套件GBM12-140-1300.384铰链套件DURA-4040-160.063固定板FORTYLOCK0.515门锁1030_5850.007膨胀螺母1002_6020.0026弹簧1027_1770.015上盖子1028_7850.021下盖802300.285门铰链1035_5810.0004螺丝1035_2880.075活塞堵头1031_1710.632固定板1029_4210.018螺丝1026_5690.031蜗杆1028_5890.181导轨1026_5660.046蜗杆1002_2540.005感觉器支架1006_8690.019活塞塑料盖1031_4270.0289活塞连杆1030_8070.043膨胀螺丝1034_7870.03后壳1034_7890.252壳件3330 SE-Alum-S0.319铝挡板把手660600.021按键保护盖DINO603IM8X120.011螺丝30520.024盖子30540.049支架1028_7850.021下盖1027_1770.015上盖子30500.048支架1000_0920.005冲压件1002_6020.0026弹簧1005_5530.006盖子1005_5570.006盖子1005_6230.0006螺母1005WPU160.544底座1007_2310.045锁舌螺栓套件1009_0500.061面盖1010_4030.02转轴1010_7140.003弹簧1011_3170.012滑动块1018_7150.015垫片1020_6070.058旋转块1020_5620.022盖子1024_1400.016螺杆1025_0230.008分流器1029_093 1.6转轴套1070_20_90050.026塑胶扣3002U3LALUM-010.278锁外壳3002V2ZALUM_B0.516锁外壳3012P.030.044锁芯盖30510.022支架3332.ASSY0.09238040.049锁舌斜头50040.037门档胶壳5115-B0.284门插销5320-600.011门扣55100.011圆盖56060.0001弹片56080.069门挡56090.011垫片57030.114门挡块57040.555门挡57050.036门挡盖板下5708.R0.01卡扣57120.045插销底座5780.C0.01门挡盖58060.005垫片5807-L-A0.034挡扣58120.022销钉6003.ASSY0.036锁转子6005-Y400.112锁舌平头66010.105锁基板6601-DH0.004螺柱66070.0017弹簧67020.058锁盖板6702-ASSY0.161锁基板67050.006锁舌卡6707-OM0.039锁扣67080.0022锁芯卡片6708-OM0.003锁芯转子67090.014锁基座67100.019锁基座67110.015把手盖6714-L0.005把手盖板6714-R0.005把手盖板67150.01267160.0126717-ASSY0.000867200.04367230.00167240.00016 67250.000367270.00196732-OM0.01 67350.0426750-ZILV0.144 67520.00467540.00226755-ZILV0.107 67590.01267600.00867650.000167670.02570130.004 130020.21467001-B0.0968002-ASSY0.217 10001980.032 10010170.036 10011720.047拔杆10011750.21 10013940.027ASSY-6751-67540.01 BAG-IV-RESI-VJS0.198 CIN.QF.E8-24-Z0.011 CIN6004-YM6X120.002 CLUS-601530.061DIN0603IM8X550.024DIN7991IM4X300.0022DIN7991IM4X550.005DIN7991IM8X500.017DIN7991IM12X800.066DIN7991IM8X400.01556070.067胶管50010.114门档勾1V-RESI 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1.419门锁SHKM-ALUM0.454门挡板SSKZ QF0.547门挡板SWING40_NEW-1300.887门挡板VSA-K-9005QF1BL0.573门栓VSF-K7016QF1BL 1.117门栓VSF-K-9005QF1BL 1.116门栓1011_0650.007传感器1005_8220.011连接线1005_5480.081门铰链1009_7210.027铜线圈1011_050 1.193电磁阀1011_0570.023锁杠杆1011_0580.037连接头1016_1990.027密码锁线路板1012_2750.012密码锁线路板1015_7720.047密码锁线路板1017_2020.09电源线1018_8710.017调节阀针1019_1970.008调节阀针1022_994_NEW0.011上盖板1023_0630.004电感1023_817_NEW0.011上盖板1028_323 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DIN7984I5X20DIN7984IM3X8DIN7984IM3X35DIN7984IM3X40DIN7984IM4X6DIN7984IM4X16DIN7984IM8X10DIN7984IM8X25DIN7985IM3X4DIN7985IM3X8DIN7991A4M6X25DIN7991IM3X8DIN7991IM3X16DIN7991IM4X8DIN7991IM4X20DIN7991IM4X25DIN7991IM4X30DIN7991IM5X10DIN7991IM5X12DIN7991IM5X25DIN7991IM5X60DIN7991IM6X8DIN7991IM6X16DIN7991IM6X40DIN7991IM8X16DIN7991IM8X20DIN7991IM8X25DIN7991M3X10DIN7991M4X6DIN7991M4X12DIN7991M5X14DIN7991M6X12DIN7991M8X10DIN9021 M8X24X2DIN9021IM5DIN9240IM4.3X20 DIN20393A218X9.2X0.7 DIN79984A2_M8X16DKZ80DUN0433 MSNI M3.5DVK-HD-650ISO2338ST_D4X24 ISO7047A2_M4X12ISO7280IM8X10 ISO7379SS12M10X40 ISO7380_A2_M4X8ISO7380IM3X4ISO7380IM3X6ISO7380IM3X8ISO7380IM4X12ISO7380IM5X6ISO7380IM5X10ISO7380IM5X30ISO7380IM6X12ISO7380IM6X60ISO7380IM8X12ISO7380IM8X16ISO7380IM8X30 ISO7380IM10X20 ISO7380IMF6X16 ISO7380-M3X12-12S LIN0007I5X12LIN0007I8X32LIN0007ID4X15LIN0007ID4X36LIN0007ID5X39LIN0007IM3X36LIN0433IM12 LIN0439IM12X1.25LIN0603IM8X7.5LIN0661IM4X18LIN1472II4X36LIN1481I5X16LIN3616SM5X15 LIN6001SSM5X55LIN6004.M5X17 LIN6616SIM5X15LIN6912M8X13 LIN6923SM16X10LIN7985IM4X5LIN7985IM6X9LIN7991IM5X16 LIN7991IM10X20.5 LIN7991IM16X35LIN7991M5X16LIN9021M6S_ASSY_1024_140SCHNORRM14 SPPLVKKKA2 3.5X16 SPPLVKKKA2 4X16 SPPLVKKKA2 6X50 STALEN NAGELS。
UL-429-BULLETINS-2002.pdf
Subject4291655Scott Blvd.Santa Clara,CA95050September27,2002TO:Standards Technical Panel of UL for Electrically Operated ValvesSubscribers to UL’s Standards Service forElectrically Operated ValvesSubscribers to UL’s Listing Service forElectrically Operated Valves,YIOZ,Electrically Operated Valves Certified for Canada,YIOZ7Subscribers to UL’s Recognition Service forElectrically Operated Valves–Component,YIOZ2,Electrically Operated Valves–Unlisted Component,YIOZ3,Electrically Operated Valves Certified for Canada–Component,YIOZ8Electrically Operated Valve Parts–Component,YSYI2SUBJECT:Changes in Guide Information for Electrically Operated Valves Certified for Canada, YIOZ7UL announces that the category YIOZ7,Electrically Operated Valves Certified for Canada,now includes products intended for automotive use.Please refer to the guide card information in Appendix A.Changes to the guide card are indicated by italicized and underlined text.Questions regarding interpretation of requirements should be directed to the responsible UL Staff. Please see Appendix B of this bulletin regarding designated responsibility for the subject product categories.UNDERWRITERS LABORATORIES INC. MARCIA KAWATESecretary for STP429Standards DepartmentPhone:(408)876-2996Fax:(408)556-6045E-mail:*********************.com REVIEWED BY:SERGIO HERNANDEZEngineering Team LeaderConformity Assessment Services3015TSCL Phone:(408)876-2814SR:GLDbul-429.5_20020927GUIDE INFORMATION FORELECTRICALLY OPERATED VALVES CERTIFIED FOR CANADA,YIOZ7USE AND INSTALLATIONThis category covers electrically operated valves which are designated General Purpose Valves or Safety Valves as indicated in the individual Listings.These valves may be equipped with complementary or optional mechanical actuators.A General Purpose Valve is intended to control theflow of afluid,but is not intended for use as a safety valve.It may be a normally closed or normally open valve.A Safety Valve is a normally closed valve of the″On″and″Off″type intended to be actuated by a safety control or an emergency device to prevent the delivery of afluid.It may also be used as a general purpose valve.A multiple port valve may be designated as a Safety Valve only with respect to its normally closed port.These valves are intended for stationary installation in an ambient temperature normally prevailing in habitable spaces and for handlingfluids at a temperature not exceeding25°C(77°F)in ordinary (nonhazardous)locations as defined by the Canadian Electrical Code unless otherwise indicated.ADDITIONAL INFORMATIONFor additional information,see Flammable and Combustible Liquids and Gases Equipment Certified for Canada(AAPQ7).REQUIREMENTSThe basic standard used to investigate products in this category is C22.2No.139-1982,″Electrically Operated Valves.″Products intended for automotive use with CNG also use ANSI/AGA NGV3.1/CGA12.3,″Fuel System Components for Natural Gas Powered Vehicles.″Products intended for automotive use with LP-Gas also use CAN/CGA-12.2,″Propane Fuel System Components for Use on Highway Vehicles.″UL MARKThe Listing Mark of Underwriters Laboratories Inc.on the product is the only method provided by UL to identify products manufactured under its Listing and Follow-Up Service.The Listing Mark for these products includes the UL Mark for Canada symbol(as illustrated in the Introduction of this Directory) together with word″LISTED,″a control number,and one of the following product names as appropriate:″General Purpose Valve,″″Safety Shut off Valve,″″Safety Valve,″″Shut off Valve″or″Positive Shut off Valve.″The product name may be preceded by″Section of″and is followed by one of the following statements as appropriate:″Assembly Consisting of Coil(or Actuator)(No.)and Body(No.),″″For Automotive Use Only″or″For Use with(No.)Pilot Safety Control Switch.″The specificfluid(s)for which the valve is Listed together with thefluid temperature and ambient temperature ratings are also included on the Listing Mark or marked elsewhere on the valve.DESIGNATED RESPONSIBILITY FOR UL PRODUCT CATEGORIESYIOZ,ELECTRICALLY OPERATED VALVESYIOZ2,ELECTRICALLY OPERATED VALVES–COMPONENTYIOZ3,ELECTRICALLY OPERATED VALVES–UNLISTED COMPONENTYIOZ7,ELECTRICALLY OPERATED VALVES CERTIFIED FOR CANADA YIOZ8,ELECTRICALLY OPERATED VALVES CERTIFIED FOR CANADA–COMPONENT YSYI2,ELECTRICALLY OPERATED VALVE PARTS–COMPONENTThe individuals shown in the following table are involved with the investigation of products covered under the subject category.The Primary Designated Engineer(shown in UPPERCASE letters) coordinates the establishment and uniform interpretation of UL requirements applicable to the product category.The Designated Engineers(shown in lowercase letters)work with the Primary Designated Engineer to interpret requirements and maintain standards.Should you have questions regarding any adopted requirements that affect your product,you are encouraged to contact the individual at the office to which you normally submit your products.The Standards Technical Panel(STP)Chair for the subject categories is Anthony Zagone at UL’s Northbrook office.The STP Chair oversees the significant interpretations made by the Primary Designated Engineer and arbitrates any differences regarding interpretation of UL requirements.CCN Office/Affiliate Responsible Engineer ExtensionYIOZ,YIOZ2,YIOZ3,YIOZ7,YIOZ8Camas Raymond Spitsen55648Melville Beatrice Xerri22202 Northbrook RICHARD JOKELA42986 RTP Shannon Turner11358Santa Clara Sergio Hernandez32814Europe Marco Crosignani39-79-2603840 Mexico Eduardo Del Muro52-5-294-7660,Ext.32740 Italy Marco Crosignani39-79-2603840Brazil Giovanni Borges5511-3049-8300CCN Office/Affiliate Responsible Engineer Extension YSYI2Camas Raymond Spitsen55648Melville Beatrice Xerri22202Northbrook RICHARD JOKELA42986RTP Shannon Turner11358Santa Clara Sergio Hernandez32814。
4282中文资料
DESCRIPTIONThe 4282 Group enables fabrication of 8 × 7 key matrix and has the followin timers;• an 8-bit timer which can be used to set each carrier wave and has two reload register• an 8-bit timer which can be used to auto-control and has a reload register.FEATURES•Number of basic instructions (68)•Minimum instruction execution time............................8.0 µs (at f(X IN) = 4.0 MHz, system clock = f(X IN)/8)•Supply voltage.................................................1.8 V to 3.6 V •Subroutine nesting.....................................................4 levels •TimerTimer 1...................................................................8-bit timer (This has a reload register and carrier wave output auto-control function)Timer 2...................................................................8-bit timer (This has two reload registers and carrier wave output function)•Logic operation function (XOR, OR, AND)•RAM back-up function•Key-on wakeup function (ports D4–D7, E0–E2, G0–G3) (11)•I/O port (ports D, E, G, CARR) (16)•Oscillation circuit.....................................Ceramic resonance •Watchdog timer•Power-on reset circuit•Voltage drop detection circuit.........................Typical:1.50 V (system reset)APPLICATIONVarious remote control transmitters4282 GroupSINGLE-CHIP 4-BIT CMOS MICROCOMPUTER REJ03B0084-0133ZRev.1.332004.03.18元器件交易网PERFORMANCE OVERVIEWFunction688.0 µs (f(X IN ) = 4.0 MHz, system clock = f(X IN )/8, V DD = 3 V)2048 words ✕ 9 bits1024 words ✕ 9 bits 64 words ✕ 4 bits48 words ✕ 4 bits Four independent output portsFour independent I/O ports with the pull-down function 3-bit input port with the pull-down function 2-bit output port (E 0, E 1)4-bit I/O port with the pull-down function 1-bit output port; CMOS output 8-bit timer with a reload register8-bit timer with two reload registers4 levels (However, only 3 levels can be used when the TABP p instruction is executed)CMOS silicon gate20-pin plastic molded SSOP (20P2E/F-A)–20 °C to 85 °C 1.8 V to 3.6 V400 µA(f(X IN ) = 4.0 MHz, system clock = f(X IN )/8, V DD = 3 V)0.1 µA (at room temperature, V DD = 3 V)ParameterNumber of basic instructionsMinimum instruction execution time Memory sizes Input/Output portsTimerSubroutine nesting Device structure PackageOperating temperature range Supply voltage Powerdissipation(typical value)ROM RAMD 0–D 3D 4–D 7E 0–E 2E 0, E 1G 0–G 3CARR Timer 1Timer 2Active modeRAM back-up mode M34282M2/E2M34282M1M34282M2/E2M34282M1Output I/O Input Output I/O OutputPIN DESCRIPTIONNamePower supply GroundSystem clock input System clock output Output port D I/O port DI/O port EI/O port GCarrier wave output for remote controlInput/Output ——Input Output Output I/OOutput InputI/OOutputFunctionConnected to a plus power supply.Connected to a 0 V power supply.I/O pins of the system clock generating circuit. Connect a ceramic resonatorbetween pins X IN and X OUT . The feedback resistor is built-in between pins X IN and X OUT .Each pin of port D has an independent 1-bit wide output function. The output structure is P-channel open-drain.1-bit I/O port. For input use, set the latch of the specified bit to “0.” When the built-in pull-down transistor is turned on, the key-on wakeup function using “H” level sense and the pull-down transistor become valid. The output structure is P-channel open-drain.2-bit (E 0, E 1) output port. The output structure is P-channel open-drain.3-bit input port. For input use (E 0, E 1), set the latch of the specified bit to “0.”When the built-in pull-down transistor is turned on, the key-on wakeup function using “H” level sense and the pull-down transistor become valid. Port E 2 has an input-only port and has a key-on wakeup function using “H” level sense and pull-down transistor.4-bit I/O port. For input use, set the latch of the specified bit to “0.” The output structure is P-channel open-drain. When the built-in pull-down transistor is turned on, the key-on wakeup function using “H” level sense and pull-down transistor become valid.Carrier wave output pin for remote control. The output structure is CMOS circuit.Pin V DD V SS X IN X OUT D 0–D 3D 4–D 7E 0–E 2G 0–G 3CARRCONNECTIONS OF UNUSED PINSPinD 0–D 7E 0, E 1E 2G 0–G 3ConnectionOpen or connect to V DD pin (Note 1).Set the output latch to “1” and open, or connect to V DD pin (Note 2).Open or connect to V SS pin.Set the output latch to “1” and open, orconnect to V DD pin (Note 2).Notes 1: Ports D 4–D 7: Set the bit 2 (PU02) of the pull-down control register PU1 to “0” by software and turn the pull-down transistorOFF.2: Set the corresponding bits of the pull-down control register PU0 to “0” by software and turn the pull-down transistor OFF.(Note in order to set the output latch to “1” to make pins open)•After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “1” by software.Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.•To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away (caused by noise).(Note when connecting to V SS and V DD )•Connect the unused pins to V SS or V DD at the shortest distance and use the thick wire against noise.PORT FUNCTIONControl bits 1 bitOutput:2 bits Input:3 bits 4 bits1 bitControl instructions SD RD CLD SD RD CLD SZDOEA IAE IAE OGA IAG SCAR RCARControl registersPU1PU0PU0Output structureP-channel open-drain P-channel open-drainP-channel open-drain CMOS Input/OutputOutput (4)I/O (4)I/O (2)Input (1)I/O (4)Output (1)RemarkPull-down function and key-on wakeup function (programmable)Pull-down function and key-on wakeup function (programmable)Pull-down function and key-on wakeup function (programmable)Pin D 0–D 3D 4–D 7E 0E 1E 2G 0–G 3CARRPort Port DPort EPort GPort CARRDEFINITION OF CLOCK AND CYCLE•System clock (STCK)The system clock is the source clock for controlling this product.It can be selected as shown below whether to use the CCK K instruction When not using When usingInstruction clockf(X IN )/32f(X IN )/4System clock f(X IN )/8f(X IN )•Instruction clock (INSTCK)The instruction clock is a signal derived by dividing the system clock by 4, and is the basic clock for controlling CPU. The one instruction clock cycle is equivalent to one machine cycle.•Machine cycleThe machine cycle is the cycle required to execute the instruction.Table 4 Control registers related to timerV12 V11 V10Timer control register V1Auto-control output by timer 1 is invalidAuto-control output by timer 1 is validCarrier wave output (CARRY)Bit 5 of watchdog timer (WDT)Stop (Timer 1 state retained)Operating111Carrier wave output auto-control bitTimer 1 count source selection bitTimer 1 control bitat reset : 0002Wat RAM back-up : 0002V23 V22 V21 V20Timer control register V2To expand “H” interval is invalidTo expand “H” interval is valid (when V22=1 selected)Carrier wave generation function invalidCarrier wave generation function validf(X IN)f(X IN)/2Stop (Timer 2 state retained)Operating1111Carrier wave “H” interval expansion bitCarrier wave generation function control bitTimer 2 count source selection bitTimer 2 control bitat reset : 00002Wat RAM back-up : 00002Note: “W” represents write enabled.(1) Control registers related to timer•Timer control register V1Register V1 controls the timer 1 count source and auto-control function of carrier wave output from port CARR by timer 1. Set the contents of this register through register A with the TV1A instruction.•Timer control register V2Register V2 controls the timer 2 count source and the carrier wave generation function by timer. Set the contents of this register through register A with the TV2A instruction. (2) PrecautionsNote the following for the use of timers.•Count sourceStop timer 1 or timer 2 counting to change its count source.•Watchdog timerBe sure that the timing to execute the WRST instruction in order to operate WDT efficiently.•Writing to reload register R1When writing data to reload register R1 while timer 1 is operating, avoid a timing when timer 1 underflows.•Timer 1 count operationWhen the bit 5 of the watchdog timer (WDT) is selected as the timer 1 count source, the error of maximum ± 256 µs (at the minimum instruction execution time : 8 µs) is generated from timer 1 start until timer 1 underflow. When programming, be careful about this error.•Stop of timer 2Avoid a timing when timer 2 underflows to stop timer 2.•Writing to reload register R2HWhen writing data to reload register R2H while timer 2 is operating, avoid a timing when timer underflows.•Timer 2 carrier wave output functionWhen to expand “H” interval of carrier wave is valid, set “1”or more to reload register R2H.(3) Timer 1Timer 1 is an 8-bit binary down counter with the timer 1 reload register (R1).When timer is stopped, data can be set simultaneously in timer1 and the reload register (R1) with the T1AB instruction.When timer is operating, data can be set to only reload register R1 with the T1AB instruction.When setting the next count data to reload register R1 at operating, set data before timer 1 underflows.Timer 1 starts counting after the following process;➀ set data in timer 1,➁ select the count source with the bit 1 of register V1, and ➂ set the bit 0 of register V1 to “1.”Once count is started, when timer 1 underflows (the next count pulse is input after the contents of timer 1 becomes “0”), the timer 1 underflow flag (T1F) is set to “1,” new data is loaded from reload register R1, and count continues (auto-reload function).When a value set in reload register R1 is n, timer 1 divides the count source signal by n + 1 (n = 0 to 255).When the bit 2 of register V1 is set to “1,” the carrier wave output enable/disable interval of port CARR is alternately generated each timer 1 underflows (Figure 14).Data can be read from timer 1 to registers A and B. When reading the data, stop the counter and then execute the TAB1 instruction.(4) Timer 2Timer 2 is an 8-bit binary down counter with the timer 2 reload registers (R2H and R2L).Data can be set simultaneously in timer 2 and the reload register (R2L) with the T2AB instruction.The contents of reload register (R2L) set with the T2AB instruction can be set again to timer 2 with the T2R2L instruction. Data can be set to reload register (R2H) with the T2HAB instruction.Timer 2 starts counting after the following process;➀set data in timer 2,➁select the count source with the bit 1 of register V2, and ➂select the valid/invalid of the carrier wave generation function by bit 2 of register V1 (when this function is valid,select the valid/invalid of the carrier wave “H” intervalexpansion by bit 3), and➃set the bit 0 of register V1 to “1.”When the carrier wave generation function is invalid (V22=“0”), the following operation is performed;Once count is started, when timer 2 underflows (the next count pulse is input after the contents of timer 2 becomes “0”), the timer 2 underflow flag (T2F) is set to “1,” new data is loaded from reload register R2L, and count continues (auto-reload function).When a value set in reload register R2L is n, timer 2 divides the count source signal by n + 1 (n = 0 to 255).When the carrier wave generation function is valid (V22=“1”), the carrier wave which has the “L” interval set to the reload register R2L and “H” interval set to the reload register R2H can be output (Figure 15).After the count of the “L” interval of carrier wave is started, timer 2 underflows and the timer 2 underflow flag (T2F) is setto “1”. Then, the “H” interval data of carrier wave is reloaded from the reload register R2H, and count continues.When timer underflows again after auto-reload, the T2F flag is set to “1”. And then, the “L” interval data of carrier wave is reloaded from the reload register R2L, and count continues.After that, each timer underflows, data is reloaded from reload register R2H and R2L alternately.When a value set in reload register R2H is n, “H” interval of carrier wave is as follows;➀When to expand “H” interval is invalid (V23 = “0”), Count source ✕ (n+1), n = 0 to 255➁When to expand “H” interval is valid (V23 = “1”), Count source ✕ (n+1.5), n = 1 to 255When a value set in reload register R2L is m, “L” interval of carrier wave is as follows;Count source ✕ (m+1), m = 0 to 255Data can be read from timer 2 to registers A and B. When reading the data, stop the counter and then execute the TAB2 instruction.(5) Timer underflow flags (T1F, T2F)Timer 1 underflow flag or timer 2 underflow flag is set to “1”when the timer 1 or timer 2 underflows. The state of flags T1F and T2F can be examined with the skip instruction (SNZT1, SNZT2).Flags T1F and T2F are cleared to “0” when the next instruction is skipped with a skip instruction.RemarksOnly key-on wakeup function of the port whose pull-down transistor is turned ON by register PU1 is valid.Only key-on wakeup function of the port whose pull-down transistor is turned ON by register PU0 is valid.Key-on wakeup function is always valid.Return source Ports D 4–D 7Ports E 0, E 1, G Ports E 2Return condition Return by an external “H” level input.Return by an external “H” level input.Return by an external “H” level input.Table 8 Return source and return condition(5) Pull-down control registerRegisters PU0 and PU1 are 4-bit registers and control the ON/OFF of pull-down transistor and key-on wakeup function for ports E 0, E 1, G and ports D 4–D 7.Table 9 Pull-down control registersPU03PU02PU01PU00Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup validPorts G 2, G 3 pull-down transistor control bitPorts G 0, G 1 pull-down transistor control bitPort E 1 pull-down transistor control bit Port E 0 pull-down transistor control bitPull-down control register PU0at reset : 00002at RAM back-up : state retainedW01010101Note: “W” represents write enabled.Set the contents of register PU0 or PU1 through register A with the TPU0A or TPU1A instruction, respectively.(4) Return signalAn external wakeup signal is used to return from the RAM back-up mode. Table 8 shows the return condition for each return source.PU13PU12PU11PU10Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup valid Pull-down transistor OFF, key-on wakeup invalid Pull-down transistor ON, key-on wakeup validPort D 7 pull-down transistor control bit Port D 6 pull-down transistor control bit Port D 5 pull-down transistor control bit Port D 4 pull-down transistor control bitPull-down control register PU1at reset : 00002at RAM back-up : state retained W01010101INSTRUCTIONSThe 4282 Group has the 68 instructions. Each instruction is described as follows;(1) List of instruction function(2) Machine instructions (index by alphabet)(3) Machine instructions (index by function)(4) Instruction code tableSYMBOLThe symbols shown below are used in the following list of instruction function and the machine instructions.Symbol ABDRERV1V2PU0PU1LOXYDPPCPC HPC LSKSPCYR1T1T1FR2HR2LT2T2FWDT WDF1 WDF2 URSPSTCK INSTCKContentsRegister A (4 bits)Register B (4 bits)Register D (3 bits)Register E (8 bits)Timer control register V1 (3 bits)Timer control register V2 (4 bits)Pull-down control register PU0 (4 bits)Pull-down control register PU1 (4 bits)Logic operation selection register LO (2 bits)Register X (2 bits)Register Y (4 bits)Data pointer (6 bits)(It consists of registers X and Y)Program counter (11 bits)High-order 4 bits of program counterLow-order 7 bits of program counterStack register (11 bits ✕ 4)Stack pointer (2 bits)Carry flagTimer 1 reload registerTimer 1Timer 1 underflow flagTimer 2 reload registerTimer 2 reload registerTimer 2Timer 2 underflow flagWatchdog timerWatchdog timer flag 1Watchdog timer flag 2Most significant ROM code reference enable flagPower down flagSystem clockInstruction clockContentsPort D (8 bits)Port E (3 bits)Port G (4 bits)Port CARR (1 bit)CAR flag (1 bit)Hexadecimal variableHexadecimal variableHexadecimal variableHexadecimal constant which represents theimmediate valueHexadecimal constant which represents theimmediate valueBinary notation of hexadecimal variable A(same for others)Direction of data movementData exchange between a register and memoryDecision of state shown before “?”Contents of registers and memoriesNegate, Flag unchanged after executinginstructionRAM address pointed by the data pointerLabel indicating address a6 a5 a4 a3 a2 a1 a0Label indicating address a6 a5 a4 a3 a2 a1 a0in page p3 p2 p1 p0Hex. number C + Hex. number x (also same forothers)SymbolDEGCARRCARxypnjA3A2A1A0←↔?( )—M(DP)ap, aC+xNote :The 4282 Group just invalidates the next instruction when a skip is performed. The contents of program counter is not increased by 2. Accordingly, the number of cycles does not change even if skip is not performed. However, the cycle count becomes “1” if the TABP p, RT, or RTS instruction is skipped.Function(A) ← n n = 0 to 15(SP) ← (SP) + 1(SK(SP)) ← (PC)(PC H ) ← p p=0 to 15(PC L ) ← (DR 2–DR 0, A 3–A 0)When URS=0(B) ← (ROM(PC))7 to 4(A) ← (ROM(PC))3 to 0When URS=1(CY) ← (ROM(PC))8(B) ← (ROM(PC))7 to 4(A) ← (ROM(PC))3 to 0(PC) ← (SK(SP))(SP) ← (SP) – 1(A) ← (A) + (M(DP))(A) ← (A) + (M(DP)) + (CY)(CY) ← Carry(A) ← (A) + n n = 0 to 15(CY) ← 1(CY) ← 0(CY) = 0 ?(A) ← (A)→ CY → A 3A 2A 1A 0Logic operation instruction XOR, OR, AND(Mj(DP)) ← 1j = 0 to 3(Mj(DP)) ← 0j = 0 to 3(Mj(DP)) = 0 ?j = 0 to 3LIST OF INSTRUCTION FUNCTIONA r i t h m e t i c o p e r a t i o nR e g i s t e r t o r e g i s t e r t r a n s f e rG r o u p i n g MnemonicTAB TBATAY TYA TEABTABE TDA LXY x, yINY DEY TAM jXAM jXAMD j XAMI jFunction(A) ← (B)(B) ← (A)(A) ← (Y)(Y) ← (A)(ER 7–ER 4) ← (B)(ER 3–ER 0) ← (A)(B) ← (ER 7–ER 4)(A) ← (ER 3–ER 0)(DR 2–DR 0) ← (A 2–A 0)(X) ← x, x = 0 to 3(Y) ← y, y = 0 to 15(Y) ← (Y) + 1(Y) ← (Y) – 1(A) ← (M(DP))(X) ← (X) EXOR(j)j = 0 to 3(A) ←→ (M(DP))(X) ← (X) EXOR(j)j = 0 to 3(A) ←→ (M(DP))(X) ← (X) EXOR(j)j = 0 to 3(Y) ← (Y) – 1(A) ←→ (M(DP))(X) ← (X) EXOR(j)j = 0 to 3(Y) ← (Y) + 1G r o u p i n g Mnemonic LA nTABP p AM AMCA n SCRC SZCCMA RAR LGOPSB j RB j SZB j R A M t o r e g i s t e r t r a n s f e rR A M a d d r e s s e sB i t o p e r a t i o nPage 3840404241394031313040434343Page 3139272727353337303331343337C o m p a r i s o n o p e r a t i o nGrouping Mnemonic SEAM SEA nB a BL p, aBA a BLA p, aBM a BML p, a BMLA p,aRT RTS Function(A) = (M(DP)) ?(A) = n ?n = 0 to 15(PC L ) ← a 6–a 0(PC H ) ← p (PC L ) ← a 6–a 0(PC L ) ← (a 6–a 4, A 3–A 0)(PC H ) ← p(PC L ) ← (a 6–a 4, A 3–A 0)(SP) ← (SP) + 1(SK(SP)) ← (PC)(PC H ) ← 2(PC L ) ← a 6–a 0(SP) ← (SP) + 1(SK(SP)) ← (PC)(PC H ) ← p p= 0 to 15(PC L ) ← a 6–a 0(SP) ← (SP) + 1(SK(SP)) ← (PC)(PC H ) ← p p= 0 to 15(PC L ) ← (a 6–a 4, A 3–A 0)(PC) ← (SK(SP))(SP) ← (SP) – 1(PC) ← (SK(SP))(SP) ← (SP) – 1S u b r o u t i n e o p e r a t i o nR e t u r n o p e r a t i o nB r a n c h o p e r a t i o nGrouping Mnemonic TV1A TAB1T1AB SNZT1TV2ATAB2T2AB T2HABT2R2LSNZT2Function(V12–V10) ← (A 2–A 0)(B) ← (T17–T14)(A) ← (T13–T10)at timer 1 stop (V10=0):(R17–R14) ← (B)(T17–T14) ← (B)(R13–R10) ← (A)(T13–T10) ← (A)at timer 1 operating (V10=1):(R17–R14) ← (B)(R13–R10) ← (A)(T1F) = 1 ?After skipping the next instruction (T1F) ← 0(V23–V20) ← (A 3–A 0)(B) ← (T27–T24)(A) ← (T23–T20)(R2L 7–R2L 4) ← (B)(T27–T24) ← (B)(R2L 3–R2L 0) ← (A)(T23–T20) ← (A)(R2H 7–R2H 4) ← (B)(R2H 3–R2H 0) ← (A)(T27–T24) ← (R2L 7–R2L 4)(T27–T24) ← (R2L 3–R2L 0)(T2F) = 1 ?After skipping the next instruction (T2F) ← 0T i m e r o p e r a t i o nPage 3635272828282829293434Page 42393736423938383836LIST OF INSTRUCTION FUNCTION (CONTINUED)I n p u t /O u t p u t o p e r a t i o nG r o u p i n g MnemonicCLD RDSD SZD OEA IAE OGA IAGSCAR RCARNOP POF SNZP CCK TLOA URSC TPU0A TPU1A WRSTFunction(D) ← 0(D(Y)) ← 0(Y) = 0 to 7(D(Y)) ← 1(Y) = 0 to 7(D(Y)) = 0 ?(Y) = 4 to 7(E 1, E 0) ← (A 1, A 0)(A 2–A 0) ← (E 2–E 0)(G) ← (A)(A) ← (G)(CAR) ← 1(CAR) ← 0(PC) ← (PC) + 1RAM back-up (P) = 1 ?STCK changes to f(X IN )(LO 1, LO 0) ← (A 1, A 0)(URS) ← 1(PU03–PU00) ← (A 3–A 0)(PU13–PU10) ← (A 3–A 0)(WDF1) ← 0O t h e r o p e r a t i o nC a r r i e r w a v e c o n t r o l o p e r a t i o nPage 29343537323032303533323236294142414143Skip condition Number of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY 216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY 216MACHINE INSTRUCTIONS (INDEX BY ALPHABET)A n (Add n and accumulator)11n 3n 2n 1n 00A n11–Overflow = 0Grouping:Arithmetic operationDescription:Adds the value n in the immediate field toregister A.The contents of carry flag CY remains un-changed.Skips the next instruction when there is no overflow as the result of operation.Operation:(A) ← (A) + n n = 0 to 15AM (Add accumulator and Memory)1100A11––Grouping:Arithmetic operationDescription:Adds the contents of M(DP) to register A.Stores the result in register A. The contents of carry flag CY remains unchanged.Operation:(A) ← (A) + (M(DP))AMC (Add accumulator, Memory and Carry)11100B110/1–Grouping:Arithmetic operationDescription:Adds the contents of M(DP) and carry flagCY to register A. Stores the result in regis-ter A and carry flag CY.Operation:(A) ← (A) + (M(DP)) + (CY)(CY) ← CarryB a (Branch to address a)11a 6a 5a 4a 3a 2a 1a 01a11––Grouping:Branch operationDescription:Branch within a page : Branches to addressa in the identical page.Operation:(PC L ) ← a 6–a 08+aSkip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216BM a (Branch and Mark to address a in page 2)1a 6a 5a 4a 3a 2a 1a 01a a11––Grouping:Subroutine call operationDescription:Call the subroutine in page 2 : Calls thesubroutine at address a in page 2.Operation:(SK(SP)) ← (PC)(SP) ← (SP) + 1(PC H ) ← 2(PC L ) ← a 6–a 0BL p, a (Branch Long to address a in page p)00011p 3p 2p 1p 003p22––Grouping:Branch operationDescription:Branch out of a page : Branches to addressa in page p.Note:p is 0 to 7 for M34282M1,p is 0 to 15 for M34282M2/E2.Operation:(PC H ) ← (P)(PC L ) ← a 6–a 0BLA p, a (Branch Long to address a in page p)000101022––Grouping:Branch operationDescription:Branch within a page : Branches to address(a 6 a 5 a 4 A 3 A 2 A 1 A 0) determined by replac-ing the low-order 4 bits of the address a in page p with register A.Note:p is 0 to 7 for M34282M1,p is 0 to 15 for M34282M2/E2.21611a 6a 5a 4a 3a 2a 1a 01a 8+aOperation:(PC H ) ← (P)(PC L ) ← (a 6–a 4, A 3–A 0)21611a 6a 5a 4p 3p 2p 1p 01p BA a (Branch to address a + Accumulator)000100122––Grouping:Branch operationDescription:Branch within a page : Branches to address(a 6 a 5 a 4 A 3 A 2 A 1 A 0) determined by replac-ing the low-order 4 bits of the address a in the identical page with register A.Operation:(PC L ) ← a 6–a 4, A 3–A 021611a 6a 5a 4a 3a 2a 1a 01a8+a8+aSkip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216Skip conditionNumber of cyclesNumber of wordsInstrunction codeD 8D 0Flag CY216BML p, a (Branch and Mark Long to address a in page p)00111p 3p 2p 1p 007p22––Grouping:Subroutine call operationDescription:Call the subroutine : Calls the subroutine ataddress a in page p.Note:p is 0 to 7 for M34282M1,p is 0 to 15 for M34282M2/E2.Operation:(SK(SP)) ← (PC)(SP) ← (SP) + 1(PC H ) ← p (PC L ) ← a 6–a 0BMLA p, a (Branch and Mark Long to address a in page p)001105022––Grouping:Subroutine call operationDescription:Call the subroutine : Calls the subroutine ataddress (a 6 a 5 a 4 A 3 A 2 A 1 A 0) determined by replacing the low-order 4 bits of address a in page p with register A.Note:p is 0 to 7 for M34282M1,p is 0 to 15 for M34282M2/E2.CCK (Change system Clock to f(X IN ))111105911––Grouping:Other operationDescription:Changes system clock (STCK) from f(X IN )/8to f(X IN ). Execute this instruction at address 0 in page 0.Operation:Change to STCK = f(X IN )2161a 6a 5a 4a 3a 2a 1a 01aa Operation:(SK(SP)) ← (PC)(SP) ← (SP) + 1(PC H ) ← p(PC L ) ← (a 6–a 4, A 3–A 0)2161a 6a 5a 4p 3p 2p 1p 01ap CLD (CLear port D)1101111––Grouping:Input/Output operationDescription:Clears (0) to port D (high-impedance state).Operation:(D) ← 1。
21481482
中 国未 来 经 济 种 种弊端的制约，一些政府部 门和企 遗憾 的是 国目前还未能形成一个 有效 增长 正面临着需 求 、 业对发展 自主创新能力 的重要性和迫 运行 的国家创新 系统 。因此， 这将是我
中 经 的 展 自 ｉ 国 济 发 与 主５ 嘉 耘
策激励不足。 技术创新法规不健全 。 在 支持 产权保护方 面，尽管 目前我 国制 定了有关法规 ， 但执行 力度 不够 ， 种 各
术改造。要加 强国际科技合作与交流， 高起点引进先进技术 ，重点引进专利 软件和必要的关键设备， 加强对 主要原 因 ； 技术创新融 资困难， 险投 技术、 风 些关键性 、战略性技术的消化吸收 资机制特别是风险投资的退 出机制还 增强持续创新 的能力。 没有 完全建立起来，推动创新 的动力 和 自主创新 ， 不足。优胜劣汰 的市场机制还没有完 ４改革管理体 制 、 要充分发挥政府职能部门的作 全建立起来；政府对科技创新的保护 增强 国家 的 自主创新能力， 要充 需 和扶持力度不足，缺少全 面扶持企业 用 ， 分发挥 政府职能部 门的作用 。要按照 技术创新 的法律 、 、 政策 计划等 。
一
、
目 前在我 国许多企业 中产权关系 的厦因分析 技术创新 的有 效激励机制 我 国自主创新能力发展缓慢的原 还不 明晰， 短期 的发展行 为 、 盲 因是多方面的， 除了我 国是一 个发展 还没有完全形成， 目 的投资和引进行 为以及对 引进技术 中国家， 经济和科技底子薄、 实力弱的 这 原因之外， 主要还存在 以下 几方面 的 缺乏 消化 吸收 的问题 还相 当普遍 ， 是造成我国企 业技术创新能力薄 弱的 问题：
积 极 引进 国外 先 进 的消化吸收和创 新。如果 在经济发展 垄断 、 开展市场竞争 、 创造保护知识产 叫 技术 的基础上 ， 分 上过度依赖技术 引进，不仅永远赶不 权 的风 尚； 充 清除创新过程 中的障碍 ， 清
92021专题资料完美版
(3) 进口许可与进口检验 包括:①进口许可证。申领一张许可证并非易事；
②进口查验。有的繁杂而长时间的检查，海关也可 故意用查验来阻碍进口。
(4) 产品要求与有关规定 主要包括:①产品标准。为保护消费者的健康与安
全，每个国家都规定自己的产品标准，做为阻止或 减缓外国产品进口的壁垒，且这些标准经常变更， 排斥进口；②包装、标签与标志；③产品测试。产 品在销售前必须经过测试，以确定其安全性和适应 性；④产品规格说明书。它可以有利于当地厂商的 方式做出规定，将外国供货人拒之门外；⑤卫生与 安全规定。许多产品受到卫生与安全规定的限制， 例如:美国的联邦汽车安全标准与反污染法案使巴 西的小轿车很难进入美国市场。
2
９.1 非关税壁垒概述
9.1.1概念和特点 9.1.2非关税壁垒的分类 9.1.3 非关税壁垒的应用和发展新趋势
3
9.1.1概念、特点和作用-P291
１）概念 除关税以外一切用来限制商品进口的各种贸易措施
统称为非关税壁垒（Non-Tariff Barriers ，NTBS）。 在WTO规则体系中，主要包括进口配额、自动出
政府
协议配额
进口配额
民间
全球关税配额
按进口来源
国别关税配额
关税配额
优惠性关税配额
按征收关税的目的
非优惠性关税配额
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9.2.2 进口许可证
1)含义:进口许可证(import license):---国家规 定某些商品的进口必须持有国家颁发的许可 证才能进口。
2)分类:
特种进口许可证
根据申请的宽严程度
（ 2 ）从非关税壁垒影响的方式分类
从非关税壁垒影响的方式来看，非关税壁垒可以分为 直接性的非关税壁垒、间接性的非关税壁垒和意外性 的非关税壁垒三种。
211262739_天下
一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一一加拿大公务员大罢工持续多日，政府开出“最终”报价自4月19日起，加拿大公共服务联盟在全国范围内发动大规模罢工。
4月29日，加拿大联邦政府称，已开出公平、有竞争力且合理的“最终”报价，并期待尽早结束公共服务中断的状况。
作为加拿大最大的联邦公务员工会组织，加拿大公共服务联盟此前代表逾12万名财政部门雇员以及约3.5万名税务部门雇员，与政府展开谈判。
主要诉求是在通胀高企的背景下提升薪资涨幅，提供更好的工作条件和包容性的工作场所等。
加拿大总理特鲁多曾对媒体回应称，自己已直接介入谈判，且政府方面提出了“严肃的”报价。