Altium教程I2C Arbitration 6A软件设计0224

I2C Arbitration 6A 软件设计第一部分 原理图1.1 FPGA_51_External_Memory.SchDocPXXPXX PXX PXX PXXPXXPXX PXXPXX PXX PXX PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXXlibrary IEEE;use IEEE.std_logic_1164.all;entity EXT_MEM_CTRL isport (-- Selects the behaviour of the two external memory chipsMEM_SELECT : in std_logic ;-- External data/program Memory control signals - control from the core E_RAM_WR : in std_logic;E_RAM_RD : in std_logic;E_ROM_WR : in std_logic;E_ROM_RD : in std_logic;E_RAM_DATAI : in std_logic_vector(7 downto 0);E_RAM_DATAO : out std_logic_vector(7 downto 0);E_RAM_ADDR : in std_logic_vector(15 downto 0);-- External memory interface - going directly to the memory chipEXT_RAM0_DATA : inout std_logic_vector(7 downto 0);EXT_RAM0_WR : out std_logic;EXT_RAM0_OE : out std_logic;EXT_RAM1_DATA : inout std_logic_vector(7 downto 0);EXT_RAM1_WR : out std_logic;EXT_RAM1_OE : out std_logic;EXT_ADDRESS : out std_logic_vector(16 downto 0);EXT_CS : out std_logic);end EXT_MEM_CTRL;------------------------------------------------------------------------------------------------------------------------architecture rtl of EXT_MEM_CTRL isbegin-- if MEM_SELECT is 1 then-- RAM0_DATA is the data memory-- RAM1_DATA is the program memory-- RAM_DATA is connected to RAM0_DATA which is the data memory-- ROM_DATA is connected to RAM1_DATA which is the program memory-- the RAM0 control signals are tied to the processor RAM-- the RAM1 control signals are tied to the processor ROM---- otherwise---- RAM1_DATA is the data memory-- RAM0_DATA is the program memory-- RAM_DATA is connected to RAM1_DATA which is the data memory-- ROM_DATA is connected to RAM0_DATA which is the program memory-- the RAM0 control signals are tied to the processor ROM-- the RAM1 control signals are tied to the processor RAM--process(E_RAM_WR, E_ROM_WR, E_RAM_RD, E_ROM_RD, MEM_SELECT, E_RAM_DATAI, EXT_RAM0_DATA, EXT_RAM1_DATA) beginif MEM_SELECT = '1' thenif E_RAM_WR = '1' thenEXT_RAM0_DATA <= E_RAM_DATAI;elseEXT_RAM0_DATA <= (others=>'Z');end if;EXT_RAM1_DATA <= E_RAM_DATAI;elseEXT_RAM1_DATA <= (others=>'Z');end if;if E_RAM_RD = '1' thenE_RAM_DATAO <= EXT_RAM0_DATA;elsif E_ROM_RD = '1' thenE_RAM_DATAO <= EXT_RAM1_DATA;elseE_RAM_DATAO <= (others => '-');end if;EXT_RAM0_WR <= not E_RAM_WR;EXT_RAM0_OE <= not E_RAM_RD;EXT_RAM1_WR <= not E_ROM_WR;EXT_RAM1_OE <= not E_ROM_RD; elseif E_RAM_WR = '1' thenEXT_RAM1_DATA <= E_RAM_DATAI;elseEXT_RAM1_DATA <= (others=>'Z');end if;if E_ROM_WR = '1' thenEXT_RAM0_DATA <= E_RAM_DATAI;elseEXT_RAM0_DATA <= (others=>'Z');end if;E_RAM_DATAO <= EXT_RAM1_DATA;elsif E_ROM_RD = '1' thenE_RAM_DATAO <= EXT_RAM0_DATA;elseE_RAM_DATAO <= (others => '-');end if;EXT_RAM0_WR <= not E_ROM_WR;EXT_RAM0_OE <= not E_ROM_RD;EXT_RAM1_WR <= not E_RAM_WR;EXT_RAM1_OE <= not E_RAM_RD;end if;end process;-- Chip select of the external memory is active lowEXT_CS <= '0' ;-- Address from the processor is connected straight to the external address EXT_ADDRESS <= '0' & E_RAM_ADDR;end rtl;------------------------------------------------------------1.4Ext_Mem_Ctrl.ASM ;............................................................................... EAL.equ 0AFH;P0 .equ 80H;P1 .equ 90H;P2 .equ 0A0H;P3 .equ 0B0H;DPL .equ 82H;DPH .equ 83H;PSW .equ 0D0H;ACC .equ 0E0H ;...............................................................................;............................................................................... MainCountLow.equ 38HRightShift.equ 42HLeftShift.equ 43HCountInner.equ 40HCountOuter.equ 41HExtMemCnt.equ 44H ;................................................................................Section Text, Code; .org 0000HMainProc: ;...............................................................................LJMP INIT ;...............................................................................INIT:MOV DPL,#00HMOV DPH,#22HMOV PSW,#00HMOV P0, #00HMOV MainCountLow, #00HMOV RightShift, #01HMOV LeftShift, #80HCLR EAL;............................................................................... MainLoop : ;...............................................................................LCALL VeryLongDelayLCALL IncrementCounterLCALL ShiftForDiodeLCALL DisplayCounterSJMP MainLoop ;...............................................................................;............................................................................... IncrementCounter ;...............................................................................INC MainCountLowRET ;...............................................................................;............................................................................... ShiftForDiode:;...............................................................................MOV A, RightShiftRR AMOV RightShift, AMOV A, LeftShiftRL AMOV LeftShift, ARET ;...............................................................................;............................................................................... DisplayCounter: ;...............................................................................PUSH DPLPUSH DPHPUSH ACCMOV DPH, #01HMOV DPL, #0FFHMOV A, MainCountLowMOVX @DPTR, AMOV A, #00HMOVX A, @DPTRMOV ExtMemCnt, APOP ACCPOP DPHPOP DPLMOV P0, ExtMemCntRET ;...............................................................................;............................................................................... LongDelay: ;...............................................................................MOV CountOuter, #0AAHLoopOuter:MOV CountInner, #0AAHLoopInner:DEC CountInnerMOV A, CountInnerJNZ LoopInnerDEC CountOuterMOV A, CountOuterJNZ LoopOuterRET ;...............................................................................;............................................................................... VeryLongDelay: ;...............................................................................LCALL LongDelayLCALL LongDelayLCALL LongDelayLCALL LongDelayLCALL LongDelayRET ;................................................................................END。