电容规格书
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Data No. R05-6058
MULTI-LAYER CERAMIC CAPACITORS Report.
Draft Specification.
Customer:AVX/Kyocera ASIA.
This specification is draft specification, not final.
Therefore this may be changed at final specification.
Date : 17 Jun 2005
Kyocera
PREPD.
APPD.
Capacitor Division
Electronic Components Group
Kyocera Corporation
1.Scope:
This specification sheet shall be applied to multilayer ceramic chip capacitors; Kyocera CM series. 2.Nomenclature
CM A
(1)Series
(8)Packaging
(2)Size
(7)External Electrode
(3)T.C
(6)Rated Voltage
(4)Capacitance
(5)Tolerance
(1)External Dimensions(Size)
·External Dimensions
For Taping or Bulk. (unit:mm)Type L W T P 03 0.6±0.03 0.3±0.03 0.3±0.03 0.15±0.05
T.C. Tolerance
K:±250ppm/°C
J: ±120ppm/°C
H: ±60ppm/°C
G: ±30ppm/°C
T
(3)Capacitance Value
Capacitance is indentified by three numbers and a letter (see example as follows).
The first and second digits indicate the first two significant figures,and the final digit is a base 10 logarithmic multiplier in picofarads.When the nominal value is less than 10pF,the letter “R” is used to indicate the decimal point.The succeeding digit(s) of the group represent significant figure(s).
[Capacitance Range for Nickel Barrier Termination]
Characteristic C∆
Type Thickness(mm) 25V
03
0.3±0.03 MIN
MAX
R50
330
[Capacitance Series]
C≥10pF E-12 series
C<10pF 0.5,1,2,3,4,5,6,7,8,9 (pF)
(4) Tolerance
Code C D F J K
Tolerance ±0.25pF ±0.5pF ±1pF ±5% ±10%
Nominal C<10pF C≥10pF
(5) Rated Voltage
Code 16 25 50
Voltage 16VDC 25VDC 50VDC
(6) Termination (External Electrode)
A:NICKEL
BARRIER
(7) Packaging Configuration
Code Packaging
Configuration Applying
Size
B Bulk All
H Taping(2mm
Pitch.φ178 Reel)Refer to Taping specification
3.Operating temperature range
-55 to +125°C
4.Specifications and Test Methods
Item Specification
Measuring
Conditions
Temperature
Characteristics
Refer to Item 2-(2) Capacitance Within specified tolerance value Q(C:Nominal Capacitance) C≥30pF : Q≥1000
C<30pF : Q≥400+20C C≤1000pF:1MHz±10%,0.5 to 5Vrms C>1000pF:1kHz±10%,0.5 to 5Vrms C:Nominal capacitance
(*1)Insulation Resistance 10000MΩ or 500MΩ·µF,whichever
is less After charging with the rated voltage for 1 minutes at room temperature and normal humidity.
(*1)Dielectric Strength Resist to the high voltage Applying 3.0 times of the rated
voltage for 1 to 5 seconds,
The applied current must be controlled
under 50mA.
Appearance No serious defect Under Microscope ×10
End Termination Adherence No evidence of peeling
on the end termination
After soldering chip capacitors on
glass epoxy boards and applying
2N as shown by the arrow
mark in the sketch peeling or any
sign of peeling should not be
found on end terminations.
(Refer to Fig.1)
Appearance No serious defect
Capacitance Variation Within specified tolerance value
Resistance To Vibration
Q(Nominal Capacitance) C≥30pF : Q≥1000
C<30pF : Q≥400+20C
Vibration frequency:10 to 55 (Hz)
Swing width :1.5mm
Sweep :10→55→10
Hz/1min
x,y,z axis 2 hours/each
Total 6 hours
(Refer to Fig.2)
Appearance No serious defect
Capacitance
Variation
±2.5% or ±0.25pF,whichever is larger
Q(Nominal Capacitance) C≥30pF : Q≥1000
C<30pF : Q≥400+20C
(*1)Insulation Resistance 10000MΩ or 500MΩ·µF,whichever is less
Resistance to
Solder Leaching
(*1)Dielectric Strength Resist to the high voltage
After dipped in solder solution,
at 260±5°C for 10±0.5 seconds
and kept at room temperature and
normal humidity for 24±2 hours,
the part will satisfy the specifications.
*Pre-heat before immersion
1st: 80°C to 100°C for 120sec.
2st:150°C to 200°C for 120sec.
Solderability Coverage
≥ 90%
Each termination end After dipped in solder solution,at
235±5°C for 2±0.5 seconds and cooled gradually at room temperature and normal humidity.
(Pb Free)
After dipped in solder solution,at
245±5°C for 3±0.5 seconds and cooled gradually at room temperature and normal humidity.
(*1)Insulation Resistance/Dielectric Strength;Charging or discharging current for these tests is limited under 50mA.