(完整版)FPGA实现蜂鸣器播放音乐实验报告
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实验报告
功能:利用FPGA 开发板板子实现一段简单的简谱的播放。
工具:Spartan-3E_Starter_Kit开发板一块,PC机一台,ISE开发环境;无源蜂鸣器一个。
语言:VHDL 和Verilog 。
源码:
//'timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: XMU-EED
// Engineer: BMW007
// Create Date: 22:59:56 03/20/2014
// Design Name: beeper_play_music
// Module Name: beeper_play_music
// Project Name: beeper_play_music
// Target Devices: PC Win7/OS
// Tool versions: ISE13.2
// Description: The function of this project is making the beeper play simple music.
// Dependencies:
/// Revision:
// Revision 0.01 - File Created
// Additional Comments:
////////////////////////////////////////////////////////////////////////////////// module
beeper_play_music(clk,rst,beep,music_out);
input clk,rst;
output beep,music_out;
reg beep_o;
reg[7:0] state;
reg[16:0] count,count_end;
reg[23:0] count1;
assign music_out=beep;
parameter L_1=17'd95555, //261.63
L_2=17'd85130, //293.67
L_3=17'd75843, //329.63
L_4=17'd75843, //349.23
L_5=17'd63777, //391.99
L_6=17'd56818, //440
L_7=17'd50619, //493.88
M_1=17'd46970,//532.25
M_2=17'd42566,//587.33
M_3=16'd37921,//659.25
M_4=16'd35793,//698.46
M_5=16'd31888,//783.99
M_6=16'd28409,//880
M_7=16'd25310,//987.76
H_1=16'd23889,//1046.50
H_2=16'd21283,//1174.66
H_3=16'd18961,//1318.51
H_4=16'd17897,//1396.92
H_5=16'd15944,//1567.98
H_6=16'd14205,//1760
H_7=16'd12654;//1975.52
parameter TIME=8000000;
assign beep=beep_o; always@(posedge clk,posedge rst) begin if(rst)
begin
count <= 16'b0;
beep_o <= 1'b0;
end
else if(count==count_end)
begin
count <= 16'b0;
beep_o <= ~beep_o;
end
else
count <= count+1'b1;
end always@(posedge clk, posedge rst) begin
if(rst)
begin
count1 <=24'b0;
state <= 8'b0;
end
else if(count1