A Unified Procedure for Fault Detection of Analog and Mixed-Mode Circuits Using Magnitude and Phase

A Uni?ed Procedure for Fault Detection of Analog

and Mixed-Mode Circuits Using Magnitude and Phase Components of the Power Supply

Current Spectrum

Dimitris K.Papakostas and Alkis A.Hatzopoulos,Senior Member,IEEE Abstract—A method using the power supply current for fault

detection in analog and mixed-mode circuits is presented.A new

uni?ed fault detection procedure is introduced,and its fault de-

tection capability is estimated.The procedure combines the rms

value and the magnitude and phase components of the power

supply current.Certain required discrimination factors are de-

?ned,and their values are adjusted to include circuit parameter

deviations and matching dependencies for the ef?cient application

of the method.Representative results from the simulation of an

operational ampli?er(opamp)and a?ash analog-to-digital con-

verter circuit are given,showing the effectiveness of the proposed

method.

Index Terms—Analog circuits,circuit testing,fault detection,

Fourier analysis,mixed-mode circuits.

N OMENCLATURE

C0i Magnitude component value of the i harmonic

of the nominal circuit.

C0?MC i Magnitude component value of the i harmonic of the MC Monte Carlo case of the fault-free circuit.

C f i Magnitude component value of the i harmonic of the f faulty case.

dm MC

0Discrimination factor for the magnitude compo-nents between the MC Monte Carlo case of the fault-free circuit and the nominal circuit.

dm f Discrimination factor for the magnitude compo-nents between the f faulty case and the nominal

circuit.

dm lim

f Tolerance limit of the discrimination factor for the magnitude components.

dp MC

0Discrimination factor for the phase components between the MC Monte Carlo case of the fault-free circuit and the nominal circuit.

dp f Discrimination factor for the phase components between the f faulty case and the nominal

circuit.

Manuscript received December22,2006;revised March14,2008.First published June3,2008;current version published October10,2008.

D.K.Papakostas is with the Department of Electronics,Alexander Techno-logical and Educational Institute of Thessaloniki,57400Thessaloniki,Greece (e-mail:dpapakos@el.teithe.gr).

A.A.Hatzopoulos is with the Department of Electrical and Computer Engineering,Aristotle University of Thessaloniki,54124Thessaloniki,Greece (e-mail:alkis@eng.auth.gr).

Digital Object Identi?er10.1109/TIM.2008.924932dp lim

f

Tolerance limit of the discrimination factor for

the phase components.

F d Fault detectability of the circuit.

h Number of the used harmonics.

I RMS0

PS

rms value of power supply current of the nomi-

nal circuit.

I RMS0?MC

PS

rms value of the power supply current of MC

Monte Carlo case of the fault-free circuit.

I RMSf

PS

rms value of power supply current of the f

faulty case.

I RMS?lim

PS

Tolerance limit of the rms value of power supply

current.

MCs Number of the used Monte Carlo samples.

m f Number of simulated faulty cases.

n m Number of detected faulty cases using the mag-nitude components.

n p Number of detected faulty cases using the phase components.

n r Number of detected faulty cases using the rms value of power supply current.

P0i Phase component value of the i harmonic of the nominal circuit.

P0?MC

i

Phase component value of the i harmonic of the

MC Monte Carlo case of the fault-free circuit.

P f

i

Phase component value of the i harmonic of the

f faulty case.

ΔP f

i

Absolute difference between the phase compo-

nent values of the f faulty case and the nominal

circuit.

ΔP MC

i

Absolute difference between the phase compo-

nent values of the MC Monte Carlo case of the

fault-free circuit and the nominal circuit.

I.I NTRODUCTION

F AULT detection and identi?cation of electronic circuits

has been an active research topic in recent years[1]–[3], and it remains crucial,particularly for rapidly developed mixed-mode(analog and digital)circuits.The reduction of the de-sign and fabrication cost of modern electronic circuits makes fault identi?cation a relatively expensive task.Fault detection and identi?cation methods using power supply current(I PS) rms values and magnitude components have been described

0018-9456/$25.00?2008IEEE

[4]–[10],showing promising results.Although time-delay-related(TDR)faults are dif?cult to detect using the above methods in both analog and mixed-mode circuits[3],the use of I PS phase components leads to adequate fault detect-ability[10].

In this paper,the application of a fault-detection method based on the use of both spectrum magnitude and phase com-ponents and the rms value of the I PS in analog and mixed-mode circuits is established.A uni?ed procedure is proposed, and the required discrimination factors are introduced,whereas their values are adjusted according to the circuit parameter sta-tistical variations and matching dependencies.Demonstrative results from simulations of an operational ampli?er(opamp) and an analog-to-digital converter circuit are given to show the effectiveness of the proposed technique.

In the Nomenclature,the notations used throughout this paper are summarized.The motivation,the description of the theoretical approach,and the proposed procedure follow in Section II.Then,the fault detectability results using circuit sim-ulations are presented and discussed,showing the advantages and limitations of the method.Finally,concluding remarks and ideas for further work are given.

II.T HEORETICAL A PPROACH AND

P ROCEDURE D ESCRIPTION

The I PS of a circuit primarily depends upon the input signal and the circuit parameters,like nominal circuit values,loads, parasitic capacitances,operating frequency,etc.Generally,it is assumed that any fault condition causes a change in the I PS.Since the measurement of this current requires a single testing point,fault-detection methods can easily be applied with minimum additional hardware.

In[4],we showed that the rms value of the I PS,in combina-tion with the?rst?ve Fourier magnitude components,could be ef?ciently used for enhanced fault detection and identi?cation of resistive bridges and open circuits in analog circuits without taking into account component deviations.The application of the method for the detection of hard and parametric faults in both analog and mixed-mode circuits gave adequate fault detectability(75%–90%),whereas about10%–25%of the faulty cases remained undetectable.Carefully observing the undetectable faulty cases from all of the tested circuits,we found that these faulty cases usually cause a time delay at the output signal,whereas the shape of the output signal remained more or less the same.This time delay of the output signal usually causes an almost similar time delay in the I PS signal between the faulty and fault-free cases.Thus,it seems that Fourier magnitude components are not ef?cient in detecting TDR faults,and therefore,we proposed the use of the Fourier phase components[10].In this paper,a uni?ed procedure, which combines the use of the rms value of the I PS with the magnitude and phase components of its spectrum,is introduced and results in enhanced fault detection for all types of examined faults.

Let us consider a circuit with known topology,nominal parameter values along with their deviations and statistical matching dependencies,and a fault set.For fault detection and detectability estimation,a three-stage process is established.

At the?rst stage,the rms value and the magnitude and phase components of I PS spectrum for the nominal circuit are initially calculated and stored.The basic frequency of the spectrum equals the frequency of the test input signal.Then,the fault-free circuit is simulated using multiple Monte Carlo analysis with the multiparameter circuit analysis program[11]to select the tolerance limit of the rms value of I PS and the tolerance limits of the I PS magnitude and phase components.At the second stage,the circuit is simulated for each faulty case of the fault set to calculate and store the rms value and the magnitude and phase components of I PS spectrum for each faulty case.

At the third stage,the stored values of the components are compared to calculate the fault detectability of the circuit for the selected fault set.The rms value of I PS is used at?rst.A faulty case is considered detectable when the absolute difference be-tween the rms values of I PS of the faulty and fault-free circuits exceeds a certain tolerance limit.Then,for the undetected faulty cases,the magnitude components of I PS are compared using a magnitude discrimination factor as a tolerance limit. Finally,for the remaining undetected faulty cases,the phase components of I PS are compared using a phase discrimination factor as a tolerance limit.The de?nitions of the tolerance limits and the discrimination factors used are described in the following.

Let I RMS0

PS

be the rms value of I PS of the nominal circuit,

I RMS0?MC

PS

be the rms values of I PS of each Monte Carlo case(MC=1,...,MCs,and MCs is the number of Monte

Carlo samples used),and I RMSf

PS

be the rms values of I PS of the f faulty case(f=0,1,...,m f,with m f equal to the number of simulated faulty cases).Then,the tolerance bound

of the I RMS

PS

limit is de?ned as the maximum of the absolute

differences between the I RMS

PS

values of the nominal circuit and each one of the Monte Carlo case circuits using the following equation:

I RMS?lim

PS

=max

I RMSO

PS

?I RMSO?1

PS

I RMSO

PS

?I RMSO?2

PS

,...,

I RMSO

PS

?I RMSO?MCs

PS

.(1) In addition,let C f i be the magnitude component value of the

i th harmonic of the f th fault and P f

i

be the phase component value of the i th harmonic of the f th fault,where i=1,...,h, and f=0,1,...,m f,with h equal to the number of used harmonics and m f equal to the number of simulated faults;the nominal conditions are noted by f=0.A simple approach to compare the spectrum of the nominal circuit to the spectrums of every faulty circuit is the comparison between each of the values of the magnitude or phase component of the nominal circuit(C0i or P0i)with the corresponding one of every faulty circuit(C f i or P f i).However,the results of this approach proved to be misleading,since in some cases,large differences occur(particularly for higher-order harmonics)for almost iden-tical spectrums or very close values for generally dissimilar spectrums.

Taking into account the aforementioned observations,two discrimination factors are proposed as a measure of difference

PAPAKOSTAS AND HATZOPOULOS:PROCEDURE FOR FAULT DETECTION OF ANALOG AND MIXED-MODE CIRCUITS 2591

between the faulty and nominal spectrums.Considering the

values of the nominal harmonics C 0

i

and P 0i for i =1,...,h as h -dimensional vectors,they can be compared to C f

i

and P f i ,respectively,by using a formula based on the Euclidean dis-tance between them.Thus,each discrimination factor ex-presses a mean value of the difference between the compared spectrums,and it can be used for any selected number of harmonics h .This number (h )was considered as a constant value (equal to 5)in [10].In this paper,the discrimination factor for the magnitude components dm f is de?ned as

dm f =

h i =1 C f i ?C 0i

2h

(2)

and the discrimination factor for the phase components dp f is de?ned as

dp f =

h i =1 ΔP f i

2h (3)where

ΔP f i =???

P f i ?P 0i ,when P f i ?P 0i ≤π2π? P f i ?P 0i ,when P f i ?P 0i >π.

(4)

The detection of a given fault will be successful when one

of the discrimination factors exceeds its tolerance limit;other-wise,the fault is masked.In our previous work [4],the tolerance limit for the magnitude components using ?ve harmonics was heuristically set equal to √

5.In this paper,as well as in our pre-vious work [10],the value of the discrimination factor limits for each circuit are selected using the worst case of multiple Monte Carlo simulations of the fault-free circuit under known circuit parameter statistical deviations and dependencies to include these parameter deviations as well as possible measurement

inaccuracies.For each Monte Carlo simulation,the C 0?MC

i

magnitude component values and the P 0?MC i phase compo-nent values are extracted,and the corresponding discrimination

factors dm MC 0for magnitude components and dp MC 0

for phase components are calculated using the following equations:

dm MC 0

=

h i =1 C 0?MC

i

?

C 0i

2h

(5)

dp MC 0

=

h

i =1

ΔP MC i

2

h

(6)

where MC =1,...,MCs ,with MCs equal to the number of Monte Carlo samples used,and the ΔP MC i difference is calculated similar to ΔP f i using the following equations:ΔP MC i

=

P 0?MC

i ?P 0i ,when P 0?MC i ?P 0i ≤π,2π? P 0?MC i ?P 0i ,when P 0?MC i ?P 0i >π.

(7)

The values of the discrimination factor limits are set equal to the corresponding maximum discrimination factor values as

dm lim f =max dm 1

0,dm 20,...,dm MCs

(8)dp lim f =max dp 10,dp 20,...,dp MCs

0 .(9)Summarizing the above analysis,the proposed method can

be applied by following the uni?ed procedure as follows.Step 1)Simulate the nominal circuit to ?nd I RMS 0PS and C 0

i ,P 0

i for each harmonic (i =1,...,h ).

Step 2)

Perform multiple Monte Carlo simulations of the fault-free circuit under known tolerances,and store I RMS 0?MC PS

,C 0?MC

i ,P 0?MC i for each simulation (MC =1,...,MCs ).

Step 3)Calculate I RMS ?lim

PS

using (1).Step 4)Calculate dm MC 0

for each simulation using (5)and set the dm lim

f ,as in (8).

Step 5)Calculate dp MC 0

for each simulation using (6)and (7),and set dp lim

f as in (9).

Step 6)

For each faulty circuit (f =1,...,m f )

Simulate and store the I RMS ?f

PS

values,the magni-tude component values C f

i ,and the phase com-ponent values P f i for each harmonic i =1,...,h .Step 7)

Set the counters of the number of detected faults equal to 0:n r =0,n m =0,and n p =0.Step 8)

For each faulty circuit (f =1,...,m f )

If |I RMS 0

PS

?I RMSf PS |>I RMS ?lim PS ,then the f faulty case is detectable using the rms value of I PS (n r =n r +1),else

Calculate the dm f value according to (2).If (dm f >dm lim f ),then the f faulty case is de-tectable using the magnitude components of I PS (n m =n m +1),else

Calculate the dp f value according to (3)and (4).

If (dp f >dp lim f ),then the f faulty case is de-tectable using the phase components of I PS (n p =n p +1),else

The f faulty case is undetectable (masked).Step 9)

Calculate the fault detectability of the circuit:F d =[(n r +n m +n p )/m f ]?100%.

III.R ESULTS AND D ISCUSSION

The aforementioned procedure has been applied in various

analog and mixed-mode circuits.Examples from the two cir-cuits are presented in the following.It must be mentioned that the Monte Carlo analysis has been applied with 1000Monte Carlo samples (MCs =1000)that properly use the multipa-rameter circuit analysis program described in [11].The main purpose of this program is to supervise a multiple-circuit analy-sis procedure by automatically varying the selected circuit pa-rameters.The program embeds SPICE within a loop of Monte Carlo analysis for each faulty circuit case introduced.The var-ied parameters can be component values,model characteristics,or other SPICE parameters,and it is possible to change them linearly or nonlinearly within desired bounds or as a percentage

2592IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT,VOL.57,NO.11,NOVEMBER2008

PAPAKOSTAS AND HATZOPOULOS:PROCEDURE FOR FAULT DETECTION OF ANALOG AND MIXED-MODE CIRCUITS2593

TABLE I

F AULT D ETECTABILITY(F d)OF THE O PAMP C IRCUIT FOR V ARIOUS N UMBERS OF H ARMONICS AND FOR

T HREE I NPUT S IGNAL F REQUENCIES FOR A T OTAL N UMBER OF F AULTS E QUAL TO70

2594IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT,VOL.57,NO.11,NOVEMBER2008

PAPAKOSTAS AND HATZOPOULOS:PROCEDURE FOR FAULT DETECTION OF ANALOG AND MIXED-MODE CIRCUITS2595

signal(I PS)that are needed.Possible measurement inaccura-cies can be coped with by proper adjustment of the tolerance limits of the discrimination factors.The presentation of the method was based on software simulation results.An experi-mental implementation,which can lead to a versatile automatic test system for analog and mixed-signal circuits,is currently under development[17],[18].This system is able to implement various testing procedures and methods,and it will include the currently proposed method as well as the one described in our previous work[19].

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1998.

Dimitris K.Papakostas was born in Kolindros,

Pieria,Greece,in1968.He received the degree

in electrical engineering and the Ph.D.degree in

electrical and computer engineering from Aristotle

University of Thessaloniki,Thessaloniki,Greece,in

1991and1999,respectively.

He taught courses on analog and digital cir-

cuits and systems with the Computer and Telecom-

munication Engineering Department,University of

Thessaly,V olos,Greece.He was engaged in several

research projects for more than ten years.Since 2005,he has been an Associate Professor of“analog and digital electronic systems”with the Department of Electronics,Alexander Technological and Educational Institute of Thessaloniki.His research interests include computer-aided analysis,design,and fault diagnosis of electronic circuits and systems,the design of electronic circuits using thin-?lm transistors(TFTs),and telecommu-nication

electronics.

Alkis A.Hatzopoulos(SM’06)was born in

Thessaloniki,Greece.He received the degree(with

honors)in physics,the M.S.degree in electronics,

and the Ph.D.degree in electrical engineering from

Aristotle University of Thessaloniki in1980,1983,

and1989,respectively.

He is with the Department of Electrical and

Computer Engineering,Aristotle University of

Thessaloniki,where he was a Research Associate

for seven years,was elected Lecturer in1989,and

has been an Associate Professor since2002.He is also the Director of the Electronics Laboratory.He is actively involved in educational and research projects.He is the author or coauthor of more than 60scienti?c papers in international journals and conference proceedings.His research interests include the design and fault diagnosis of integrated circuits and systems(analog,mixed signal,and RF),electronic communication circuits, and instrumentation electronics.

Dr.Hatzopoulos is a member of the Greek Physics Society and the Greek Computer Society.