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HT45F23 ADC Application ExampleD/N：HA0234EIntroductionProcessing external analog signals is a basic requirement for most electronic devices. AnA/D converter will be necessary for converting signals from analog to digital and byintegrating the A/D function within the MCU, it will greatly reduce the need for extracomponents and reduce the PCB size.The HT45F23 includes a 6-channel 12-bit resolution A/D converter. The followingapplication describes the way to use the A/D function in the HT45F23.Operation PrinciplesThe A/D core of the HT45F23 is an on-chip 12-bit A/D converter. The following shows thespecific structure:A/D Converter StructureThe A/D converter reference voltage, whether from VDD or the external input pin VREF,should be determined by the VRSEL bit. The data registers, ADRH and ADRL, are usedto store the result of the 12-bit A/D conversion. The high 8-bits of data will be placed inADRH and the lower 4-bits of data in ADRL. The ADCR and ACSR registers control thesetting and operating of the A/D converter. The ADCS0~ADCS2 bits in the ACSR registerare used to setup the A/D clock whose cycle should not be less than 0.5us so as toensure conversion accuracy. The ADONB bit in the ACSR register controls the on/offfunction of the A/D module. The PCR0~PCR5 bits in the ADPCR resister are used to control whether the common I/O port is used as an A/D input or as an I/O pin, while the ACS0~ACS2 bits control which pin is routed to the internal A/D converter. START is the enable bit of the A/D conversion. The A/D will start converting when this bit changes from 0→1→0. EOCB is the end of A/D conversion flag. When the EOCB=0, it means that the A/D conversion is ended, otherwise the conversion process is still in progress.The A/D Conversion Timing is shown below:A/D Conversion TimingNote:When all the PCR5~PCR0 bits in the ADPCR register are not "0", namely a conversion channel is selected, and the ADONB bit is "0," the A/D function will be enabled. Users may disable the A/D module by setting the ADONB bit to "1." Enabling the ADC module will increase power consumption, so it is recommended to set the ADONB bit (ACSR.6) to “1” when the ADC is not in use.The operating clock and input channel of the A/D converter is respectively selected by the ADCS0~ADCS2 bits in the ACSR register and the ACS0~ACS2 bits in the ACSR register.The A/D channeld shared with I/O is shown by the following figure:A/D Conversion Steps:Step 1: Select the required A/D conversion clock by setting the ADCS2~ADCS0 in the ACSR register.Step 2: Select the related I/O as the A/D input pin by setting the PCR0~PCR5 in the ADPCR register.Step 3: Enable the A/D by clearing the ADONB bit in the ACSR register.Step 4: Select a related A/D conversion channel to connect with the ADC module by programming the ACS2~ACS0 bits in the ADCR register.Step 5: If the interrupts are to be used, the interrupt enable bit, EMI, must be correctly configured to ensure the A/D converter interrupt function is active. The masterinterrupt enable bit, EMI, multi-function interrupt bit, EMFI, and the A/D interruptenable bit EADI must all be set to “1.”(Note: After returning from the A/D interrupt process, the system will automaticallyclear the MFF BIT while the ADF bit should be cleared manually.Step 6: The A/D conversion can be enabled by setting the START bit in the ADCR register from 0→1→0.Step 7: To check when the A/D conversion process is compete, the EOCB bit in the ADCR register be polled by looking for a “0.” The conversion is complete if theEOCB bit is "0" and the A/D data registers ADRH/ADRL can be read.If the interrupt is enabled and the stack is not full, the program can wait for an A/Dinterrupt to occur.Note:∙When checking for the end of the conversion process, in the method of polling, with the EOCB bit in the ADCR register, the interrupt enable step above can be omitted.∙The ADC module will use a consume a certain amount of power, so when the ADC is not being used, the ADONB bit (ACSR.6) can be set to “1” to reduce powerconsumption.Application CircuitDescription:Two example programs are provided in this example, one using a polling method and oneusing an interrupt method, to introduce the way to use these two methods to implementmulti-channel A/D sampling in the HT45R23.The key button can switch the A/D sampling channel. The current sampling value will beshown on display 1 and the voltage value on display 2, 3 and 4.In the example, the A/D module voltage supply is connected to the power VDD. When theADC is not being used, set the ADONB bit (ACSR.6) to "1" to reduce power consumption.Users may set VRSEL=1 to provide a reference voltage to the A/D module through VREF.S/W Flowchart (the Polling Method)Main Program Flow A/D Conversion FlowThe program starts with an initialisation by setting the SEG, COM lines in the output modeand the key to the input mode with a pull-high resistor. Disable the A/D interrupt.Setup ACSR, the ADONB bit, to enable the A/D function and set the ADCS2~ADCS0 bitsto select the A/D conversion clock.Set ADPCR, the PCR5~PCR0 bits to enable the common shared I/O as A/D input pins.Set the ACS2~ACS0 bits in the ADCR register to route the corresponding A/D conversionchannel to the internal A/D Converter.START=0→1→0 to enable an A/D conversion. Check if the EOCB bit is "0". If not, itindicates that the A/D conversion is not complete. If yes, the A/D conversion has ended.Operate the A/D conversion process 128 times, convert the average value to the BCDcodes by simple four fundamental operations and finally show the result using the digitaldisplay program. Check if the key has been pressed to change the A/D channel. If notthen return to re-start the A/D conversion.Program Example (the Polling Method)Configuration Option：OFF OSC: HIRC,Filter5VInternal RC： 4M@Vdd=PB6/RES： PB6WDT: Enable;other option select by user.Program code and description: see attachment.S/W Flowchart (the Interrupt Method)Program Description (Polling Method)∙Main Program:Initialise the program by setting he SEG, COM lines to the output mode and the key to theinput mode with a pull-high resistor. Disable the A/D interrupt.Set ACSR, the ADONB bit to control the A/D function and set the ADCS2~ADCS0 bits toselect the A/D conversion clock.Set ADPCR, the PCR5~PCR0 bits to enable the common shared I/O as A/D input pins.Set the ACS2~ACS0 bits in the ADCR register to route the corresponding A/Dconversion channel to the internal A/D Converter.EMI=1, enable the master interrupt. EMFI=1, enable the multi-functional interrupt.EADI=1, enable the A/D interrupt.START=0→1→0, enable the A/D conversion and check if ADF=1 to wait for the A/Dconversion interrupt. Operate the A/D conversion process 128 times, convert theaverage value to BCD codes by simple four fundamental operations and finally showthe result using the digital display program. Check if key has been pressed to changethe A/D conversion channel. If not then return to re-start the A/D conversion.∙Interrupt Service Routine:Check if ADF=1. If it is "0", exit the interrupt. If it is "1", that means an A/D interrupt hasoccurred. Enter the A/D interrupt service routine. The system will automatically clearMFF after returning from the A/D interrupt service routine; however ADF must becleared manually so as to ensure the entry to the A/D interrupt service routine after thenext A/D conversion is complete.Program Example (Interrupt Method)Configuration Option：OFFOSC: HIRC,FilterInternal RC： 4M@Vdd=5VPB6/RES： PB6WDT: Enable;other option select by user.Program code and description: see attachment.ConclusionsThe above content has shown two actual application examples showing how to setup andimplement an A/D conversion in the HT45F23. Users may adapt their own applicationprograms according to their specific requirements.。