VIPer12ADIP_VIPer12AS

C . z d a
TUBE T&R VIPer12AS VIPer12AS13TR VIPer12ADIP
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DIP-8
DRAIN
PWM LATCH
R2 R3 R4
+ BLANKING OVERVOLTAGE LATCH Q 1 kΩ _ 0.23 V
230 Ω
S
SOURCE
September 2002
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REGULATOR INTERNAL SUPPLY VDD 8/14.5V _ + + 42V _ FB
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ON/OFF OVERTEMP. DETECTOR R FF
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60kHz OSCILLATOR R1 S FF Q
MOSFET on the same silicon chip. Typical applications cover off line power supplies for battery charger adapters, standby power supplies for TV or monitors, auxiliary supplies for motor control, etc. The internal control circuit offers the following benefits: – Large input voltage range on the VDD pin accommodates changes in auxiliary supply voltage. This feature is well adapted to battery charger adapter configurations. – Automatic burst mode in low load condition. – Overvoltage protection in hiccup mode.
THERMAL DATA
Symbol Rthj-case Parameter Thermal Resistance Junction-Pins for: SO-8 DIP8 Thermal Resistance Junction-Ambient for: SO-8 DIP8
Rthj-amb
Note: 1. When mounted on a standard single-sided FR4 board with 200 mm² of Cu (at least 35 µm thick) connected to all DRAIN pins.
-55 to 150
Note: 1. This parameter applies when the start up current source is off. This is the case when the VDD voltage has reached VDDon and remains above VDDoff. 2. This parameter applies when the start up current source is on. This is the case when the VDD voltage has not yet reached VDDon or has fallen below V DDoff.
VIPer12ADIP / VIPer12AS
ELECTRICAL CHARACTERISTICS (Tj=25°C, VDD=18V, unless otherwise specified) SUPPLY SECTION
Symbol IDDch IDDoff IDD0 IDD1 DRST VDDoff VDDon VDDhyst VDDovp Parameter Start Up Charging Current Start Up Charging Current in Thermal Shutdown Test Conditions VDS=100V; VDD=5V ...VDDon (See fig. 2) VDD=5V; VDS=100V Tj > TSD - THYST 0 3 (Note 1) (See fig. 3) (See fig. 2 & 3) (See fig. 2 & 3) 7 13 4.5 5 Min. Typ. -1 Max. Unit mA mA mA mA % V V V V
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Parameter
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h C
in
C . z d 1) Min. 730
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25 15 55 45
Max Value
Unit °C/W
°C/W
Test Conditions
Typ.
Max.
Unit V
ID=1mA; VFB=2V VDS=500V; VFB=2V; Tj=125°C ID=0.2A ID=0.2A; Tj=100°C ID=0.1A; VIN=300V ID=0.2A; VIN=300V VDS=25V (See fig.1) (See note 1) (See fig.1) (See note 1)
VDD
SOURCE DRAIN
FB
CURRENT AND VOLTAGE CONVENTIONS
IDD
I FB
FB
VDD
CONTROL
DRAIN
VDD VFB
VIPer12A
CONNECTION DIAGRAM
SOURCE SOURCE
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1 2 3 4
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8 7 6 5
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SOURCE

VIPer12ADIP / VIPer12AS
ABSOLUTE MAXIMUM RATINGS
Symbol VDS(sw) VDS(st) ID VDD IFB VESD Tj Tc Tstg Parameter Switching Drain Source Voltage (Tj=25 ... 125°C) Start Up Drain Source Voltage (Tj=25 ... 125°C) Continuous Drain Current Supply Voltage Feedback Current Electrostatic Discharge: Machine Model (R=0Ω; C=200pF) Charged Device Model Junction Operating Temperature Case Operating Temperature Storage Temperature (See note 1) (See note 2) Value -0.3 ... 730 -0.3 ... 400 Internally limited 0 ... 50 3 200 1.5 Internally limited -40 to 150 Unit V V A V mA V kV °C °C °C
SO-8 DIP-8
n HIGH VOLTAGE START UP CURRENT n OVERTEMPERATURE, OVERCURRENT AND
DESCRIPTION The VIPer12A combines a dedicated current mode PWM controller with a high voltage Power BLOCK DIAGRAM
ORDER CODES
PACKAGE
n n n n
FIXED 60 KHZ SWITCHING FREQUENCY 9V TO 38V WIDE RANGE VDD VOLTAGE CURRENT MODE CONTROL AUXILIARY UNDERVOLTAGE LOCKOUT WITH HYSTERESIS SOURCE OVERVOLTAGE PROTECTION WITH AUTORESTART
1/15
Free Datasheet Download

VIPer12ADIP / VIPer12AS
PIN FUNCTION
Name Function Power supply of the control circuits. Also provides a charging current during start up thanks to a high voltage current source connected to the drain. For this purpose, an hysteresis comparator monitors the VDD voltage and provides two thresholds: - VDDon: Voltage value (typically 14.5V) at which the device starts switching and turns off the start up current source. - VDDoff: Voltage value (typically 8V) at which the device stops switching and turns on the start up current source. Power MOSFET source and circuit ground reference. Power MOSFET drain. Also used by the internal high voltage current source during start up phase for charging the external VDD capacitor. Feedback input. The useful voltage range extends from 0V to 1V, and defines the peak drain MOSFET current. The current limitation, which corresponds to the maximum drain current, is obtained for a FB pin shorted to the SOURCE pin.