FT7522L6X;中文规格书,Datasheet资料

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NC7ST32L6X中文资料

Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression: ICCD = (C PD) (VCC) (fIN) + (ICCstatic).

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NC7ST32
AC Electrical Characteristics
Symbol tPLH, tPHL Parameter Propagation Delay VCC (V) 5.0 4.5 5.5 tTLH, tTHL CIN CPD Input Capacitance Power Dissipation Capacitance Output Transition Time 5.0 4.5 5.5 Open 5.0 Min TA = +25°C Typ 4.3 6.1 6.5 12.0 5.4 10.7 4 11 10 2 6 Max 12 17 16 27 14 26 10 25 21 10 31 26 20 31 18 30 ns ns pF pF (Note 3) Figure 2 CL = 15 pF CL = 50 pF Figures 1, 3 ns CL = 50 pF TA = −40°C to +85°C Min Max Units ns Conditions CL = 15 pF Figures 1, 3 Fig. No.

ST752手册

STSitronixST752217 x 96 Dot Matrix LCD Controller/DriverVer 1.0c 1/45 2002/07/10O V E R V I E WThe ST7522 family of dot matrix LCD drivers are designed for the display of characters and graphics. The drivers generate LCD drive signals derived from bit mapped data stored in an internal RAM.The drivers are available in two configurations The ST7522 family drivers incorporate innovative circuit design strategies to achieve very low power dissipation at a wide range of operating voltages. These features give the designer a flexible means of implementing small to medium size LCD displays for compact, low power systems.The ST7522 which is able to drive 1 line of 6 Chinese characters or 2 lines of 12 Chinese characters each linewith two ST7522.F E A T U R E SzFast 8-bit MPU interface compatible with 80- and 68- family microcomputers and serial interface z Clock synchronous serial interface z Many command setDisplay data Read/Write, display ON/OFF,Normal/Reverse display mode, page address set , column address set , status read , display all points ON/OFF, LCD bias set, electronic volume, read/modify/write, segment driver direction select, power saver, static indicator, adjustable OSC frequency, booster input voltage select, follower input voltage and amplified ratio selectable z 4 static indicator and 96 icon availablez Total 118 (segment + common + static) drive sets z Wide range of supply voltagesV DD – V SS ：2.7 to 5.5 V V DD – V 5：3.5 to 7.0 V V DD – V CAP3 ：3.5 to 7.0 V z Low-power CMOSz 64 level digital contrast controlClock frequency Product nameOn-Chip ExternalNumber of COM Numberof SEG Bias DutyST7522D 1.2KHz,2.4KHz (When VDD=3.0V)2.8KHz17961/5,1/6 1/17,1/33Ver 1.0c 9/45 2002/07/10The Serial InterfaceWhen the serial interface has been selected (P/S = “L”) then when the chip is in active state (CS1―= “L” and CS2 = “H”) the serial data input (SI) and the serial clock input (SCL) can be received. The serial data is read from the serial data input pin in the rising edge of the serial clocks D7, D6 through D0, in this order. This data is converted to 8 bits parallel data in the rising edge of the eighth serial clock for the processing. TheA0 input is used to determine whether or the serial data input is display data or command data; when A0 = “H”, the data is display data, and when A0 = “L” then the data is command data. The A0 input is read and used for detection every 8th rising edge of the serial clock after the chip becomes active. Figure 1 is a serial interface signal chart.Figure 1* When the chip is not active, the shift registers and the counter are reset to their initial states. * Reading is not possible while in serial interface mode.* Caution is required on the SCL signal when it comes to line-end reflections and external noise. We recommend that operation be rechecked on the actual equipment.The Chip SelectThe ST7522 Series chips have two chip select terminals: CS1―and CS2. The MPU interface or the serial interface is enabled only when CS1―= “L” and CS2 = “H”.When the chip select is inactive, D0 to D7 enter a high impedance state, and the A0, RD ―, and WR ―inputs are inactive. When the serial interface is selected, the shift register and the counter are reset.CS1CS2SI SCL A0D7D6D5D4D3D2D1D0D7D6D5D4D3Common Timing Generator Circuit Generates common timing signals and FR frame signals from the CL basic clock. The 1/17 or l/33 duty (forST7522)can be selected by the Duty Select command. If the l/33 duty is selected for the ST7522 , the l/33 and l/ 17 duties are provided by two chips consisting of the master and slave chips in the common multi-chip mode. Display Data Latch CircuitThis latch stores one line of display data for use by the LCD driver interface circuitry. The output of this latch is controlled by the Display ON/OFF.FR SIGNAL (Master output)Master Common Slaver Common 01231415161718313201Ver 1.0c 13/45 2002/07/10Ver 1.0c 17/45 2002/07/10The Reset CircuitWhen the RES ―input comes to the “L” level, these LSIs return to the default state. Their default states are as follows: 1. Display OFF 2. Static drive is turned OFF.3. ADC select: Normal (ADC command D0 = 0)4. Display all point on is select to normal5. Display normal/reverse is select to normal6. Power control register: (D2, D0) = (0, 0)7. Serial interface internal register data clear8. 1/6 bias is selected9. 1/17 duty is selected. 10. Read modify write OFF11. Column address set to Address 0 12. Page address set to Page 0 13. Start line set to first line14. Electronic contrast register = 35H(max:3FH) 15. OSC frequency set = 08H 16. Follower input voltage set =02H 17. Follower amplified ratio = 06H 18. Booster input voltage set = 00HWhen the power is turned on, the IC internal state becomes unstable, and it is necessary to initialize it using the RES ―terminal.After the initialization, each input terminal should be controlled normally.While RES ―is “L,” the oscillator works but the display timing generator stops, and the CL, FR, terminals are fixed to “H.” The terminals D0 to D7 are not affected.ST7522Booster input voltage set (Double Byte Command)This command is designed to select different level of the input voltage to booster. In 5V application system, it’s better to reduce the input voltage of booster to make sure that the output voltage of booster will not be over the specification range of VDD-Vcap3. This command is a two byte command used as a pair with the booster input voltage mode set command and the booster input voltage register set command, and both commands must be issued one after the other. See the power control explanation for details.The booster input voltage mode setA0 0―RD 1WR 0―D7 1D6 1D5 1D4 1D3 0D2 0D1 0D0 0Booster input voltage register set.A0 0―RD 1WR 0―D7 Jbst1D6 Jbst0D5 0D4 0D3 0D2 0D1 0D0 0Default value=“00H”Jbst1 0 0 1 1Jbst0 0 1 0 1VSS2 1*VSS(default) 4/5*VSS 3/5*VSS 2/5*VSSVDD-Vcap37Operating range5Booster input voltage parameter3For Vcap3 voltage level setup formula:(booster must on of power control command) (used booster input voltage set command)1 1 3 5 7Vcap3=VSS2 x 2(booster must on of power control command)VDDOperating voltage range of Vss and Vcap3 systemBooster VDDVcap3Vcap3=VSS2 x 2 B (power control command)input voltage jbst[1:0]VSS2VSSVer 1.0c 31/45 2002/07/10ST7522Reference circuit examples:When used 2x step-up voltage circuit, the “Power control” command must set to 2DH and adjust “Booster input voltage set” command of Vcap3’s full range. When used 1x step-up voltage circuit, the “Power control” command must set to 29H; the “Booster input voltage set” command is not action at this operation.VDD M/S CAP1 Cb CAP2 Cb VDD VSS VDD C1 C2 C3 C4 C5 V1 V2 V3 V4 V5 C1 C2 C3 C4 C5 CAP3 VDD VSS VDD V1 V2 V3 V4 V5 Open CAP2 CAP3 Open CAP1VDD M/SVDD=0V VSS=-3VVDD=0V VSS=-3VVcap3=Jbst[1,0] x (VSS-VDD) x 2 2x step-up voltage circuit (Power control=2DH)Vcap3=(VSS-VDD) x 1 1x step-up voltage circuit (Power control=29H)Ver 1.0c32/452002/07/10ST7522Static Indicator (Double Byte Command)This command controls the static drive system indicator display. The static indicator display is controlled by this command only, and is independent of other display control commands. This is used when one of the static indicator liquid crystal drive electrodes is connected to the COMS terminal, and the other is connected to the S1~S4 terminal. A different pattern is recommended for the static indicator electrodes than for the dynamic drive electrodes. If the pattern is too close, it can result in deterioration of the liquid crystal and of the electrodes. The static indicator ON command is a double byte command paired with the static indicator register set command, and thus one must execute one after the other. (The static indicator OFF command is a single byte command.)Static Indicator ON/OFFWhen the static indicator ON command is entered, the static indicator register set command is enabled. Once the static indicator ON command has been entered, no other command aside from the static indicator register set command can be used. This mode is cleared when data is set in the register by the static indicator register set command. A0 0―RD 1WR 0―D7 1D6 0D5 1D4 0D3 1D2 1D1 0D0 SS=1: Indicator on S=0: Indicator off (default)Static Indicator Register SetThis command sets four bits of data into the static indicator register, and is used to set the static indicator into a on/off mode A0 0―RD 1WR 0―D7 0D6 0D5 0D4 0D3 S1D2 S2D1 S3D0 S4the command selection the S1-S4 static indicator on or off. Sn=1: Sn -> on Sn=0: Sn -> Off(default)Static Indicator Register Set SequenceStatic indicator mode setOffOnStatic indicator register setNoChange complete?YesVer 1.0c33/452002/07/10ST7522Power Save (Compound Command)When the display all points ON is performed while the display is in the OFF mode, the power saver mode is entered, thus greatly reducing power consumption. The power saver mode has two different modes: the sleep mode and the standby mode. When all static indicator is OFF, it is the sleep mode that is entered. When the static indicator is ON, it is the standby mode that is entered. In the sleep mode and in the standby mode, the display data is saved as is the operating mode that was ineffect before the power saver mode was initiated, and the MPU is still able to access the display data RAM.Static indicator off(Static off only)Static indicator on(Static on + Static register set)Display off Display all point onDisplay off Display all point onSleep modeDisplay on or Display all point offStand by modeDisplay on or Display all point offSleep cancelStand by cancelSleep ModeThis stops all operations in the LCD display system, and as long as there are no accesses from the MPU, the consumption current is reduced to a value near the static current. The internal modes during sleep mode are as follows: 1. The oscillator circuit and the LCD power supply circuit are halted. 2. All liquid crystal drive circuits are halted, and the segment and common drive outputs output a VDD level.Standby ModeThe duty LCD display system operations are halted and only the static drive system for the indicator continues to operate, providing the minimum required consumption current for the static drive. The internal modes are in the following states during standby mode. 1. The LCD power supply circuits are halted. The oscillator circuit continues to operate. 2. The duty drive system liquid crystal drive circuits are halted and the segment and common driver outputs output a VDD level. * When the master is turned on, the oscillator circuit is operable immediately after the powering on. * When the master/slave mode, into Sleep or Standby mode have to at same time.Ver 1.0c34/452002/07/10ST7522Software ExampleCondition: 1. VDD=5.0V 2. Use Winbond W78E52-40 at 16MHz crystal(compatible intel 8051 MPU) 3. Use Mater and Slave mode(ST7522D x 2) 4. |VCAP3|=(5x2)x3/5=6V 5. |V5|=[600KΩ/(1MΩ+200KΩ)]x2x5=5V;ResetCLR RES ;Reset ST7522D(Master & Slave) CALL DELAY ; SETB RES CALL DELAY ; ;------------------------------------------------------------------------------------------------------------------------------------------------------------------;Initial LCD CLR CS1 ;Enable chip 1(low active) CLR CS2 ;Enable chip 2(low active) MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL MOV CALL CALL MOV CALL A,#11110001B WRINS A,#10001000B WRINS A,#11111000B WRINS A,#00000001B WRINS A,#00100000B WRINS A,#11110000B WRINS A,#10000000B WRINS A,#00101111B WRINS A,#10101001B WRINS A,#10100010B WRINS A,#10000001B WRINS A,#00110101B WRINS DELAY200mS A,#10101111B WRINS . . . . ;OSC frequency set ; ;Frame about 80.6Hz/OSC frequency about 2.6KHz ; ;Follower input voltage set ; ;V5 input voltage=3/6*VSS ; ;Follower amplified ratio ;Ratio=2 ;Booster input voltage set ; ;VSS2=3/5 *VSS ; ;Power control ; ;Duty select ; ;LCD bias set ; ;Electronic contrast set ; ;Contrast register=35H ; ;Delay 200mS for booster & follower stable ;Display on ;Ver 1.0c35/452002/07/10ST7522ABSOLUTE MAXIMUM RATINGSCharacteristicsPower supply voltage LCD driver voltage Input voltage Operating temperature Storage temperatureSymbolVDD Vcap3 VIN TA TSTOValue-0.3 to +7.0 -7.0 to +0.3 -0.3 to VDD+0.3 -40 to +85 -55 to +125UnitV V V ℃ ℃DC CHARACTERISTICSUnless otherwise specified, VSS = 0 V, VDD = 3.0 VItemOperating Voltage Step up output voltage Voltage follower circuit operating Voltage V5 accuracy High-level Input Voltage Low-level Input Voltage High-level Output Voltage Low-level Output Voltage Input leakage current Output leakage current Liquid Crystal Driver ON Resistance Internal Oscillator Oscillator Frequency External Input RECOMMANDSymbolVDD Vcap3 V5 V5 VIHC VILC VOHC VOLC ILI ILO RON fOSCCondition(Relative to VDD) (Relative to VDD) IOH = –0.5 mA IOL = 0.5 mA VIN = VDD or VSS Ta = 25°C (Relative V5 = –6.0 V To VDD) Ta = 25°C 1/33DutyMin.2.7 -7 -7 -7 0.7 VDD Vss 0.8VDD Vss -1 -1 2 2Rating Typ. Max.3.0 5.5 -3.5 -3.5 7 VDD 0.9 VDD 0.2 VDD 2 1 1.6 2.0 3UnitV V V % V V uA uA KΩApplicable PinVDD*1 CAP3 V5 V5 *2 *3 *4 *5 SEGn COMn *6kHz 3.5CLfCLVer 1.0c36/452002/07/10ST7522• Dynamic Consumption Current, During Display, with the Internal Power Supply OFF Current consumed by total ICs when an external power supply is used. Display Pattern OFF Ta = 25°C Vcap3=-6V Item ST7522 Display Pattern Checker Ta = 25°C Vcap3=-6V Item ST7522 Symbol IDD Condition VDD=3.0 V, VDD-V5=-5.0V VDD=5.0 V, VDD-V5=-5.0V Min. Rating Typ. 15 40 Max. 20 50 Unit μA Notes *7 Symbol IDD Condition VDD=3.0 V, VDD-V5=-5.0V VDD=5.0 V, VDD-V5=-5.0V Min. Rating Typ. 10 35 Max. 15 45 Unit μA Notes *7• Dynamic Consumption Current, During Display, with the Internal Power Supply ON Display Pattern OFF Ta = 25°C Vcap3=-6V Item ST7522 Symbol IDD Condition VDD=3.0 V, VDD-V5=-5.0V VDD=5.0 V, VDD-V5=-5.0V Min. Rating Typ. 60 120 Max. 70 130 Unit μA Notes *7Display Pattern Checker Ta = 25°C Vcap3=-6V Item ST7522 Symbol IDD Condition VDD=3.0 V, VDD-V5=-5.0V VDD=5.0 V, VDD-V5=-5.0V Min. Rating Typ. 65 130 Max. 80 150 Unit μA Notes *7• Consumption Current at Time of Power Saver Mode, VSS = 0 V, VDD = 3.0 V ± 10% Ta = 25°C Item Sleep mode Standby Mode Symbol IDD IDD Condition Min. Rating Typ. 5 10 Max. 10 15 Unit μA Notes -References for items market with * *1 While a broad range of operating voltages is guaranteed, performance cannot be guaranteed if there are sudden fluctuations to the voltage while the MPU is being accessed. *2 The A0, D0 to D5, D6 (SCL), D7 (SI), RD (E), WR (R/W), CS1, CS2, CLS, CL, FR, M/S, C86, P/S , and RES terminals. *3 The D0 to D7, FR and CL terminals. ― ― ― ― *4 The A0, RD (E), WR (R/W), CS1, CS2, CLS, M/S, C86, P/S, and RES terminals. *5 Applies when the D0 to D5, D6 (SCL), D7 (SI), CL, and FR terminals are in a high impedance state. *6 These are the resistance values for when a 0.1 V voltage is applied between the output terminal SEGn or COMn and the various power supply terminals (V 1 , V 2 , V 3 , and V 4 ). These are specified for the operating voltage (3) range. RON = 0.1 V /ΔI (Where ΔI is the current that flows when 0.1 V is applied while the power supply is ON.) *7 It indicates the current consumed on ICs alone when the internal oscillator circuit and display are turned on. Does not include the current due to the LCD panel capacity and wiring capacity. Applicable only when there is no access from the MPU.――――Ver 1.0c37/452002/07/10ST7522TIMING CHARACTERISTICS68 InterfaceA0 R/WtAW6 tAH6CS1 CS2tCYC6 tEWHR,tEWHW tEWLR,tEWLWEtDS6 tDH6D0 to D7 (Write)tACC6tOH6D0 to D7 (Read)Item Address hold time Address setup time System cycle time Data setup time Data hold time Access time Output disable time Enable H pulse time Read Write Read WriteSignal A0 A0 A0 D0 to D7 D0 to D7 D0 to D7 D0 to D7 ESymbolConditionVDD=2.7 to 4.5V Rating Min. Max. — — — — — 90 1100 — — — —(Ta = –40 to 85°C ) VDD=4.5 to 5.5V Rating Units Min. 10 10 3500 25 10 — — 160 160 140 1200 Max. — — — — — 60 1100 — — — — ns ns nstAH6 tAW6 tCYC6 tDS6 tDH6 tACC6 tOH6 tEWHR tEWHW tEWLR tEWLW— — —10 25 4400 25 10 — — 260 260 200 2300CL = 100 pFns—nsEnable L pulse timeE—ns*1 All timing is specified using 20% and 80% of VDD as the reference. ― *2 tEWLW and tEWLR are specified as the overlap between CS1 being “L” (CS2 = “H”) and E.Ver 1.0c38/452002/07/10ST752280 InterfaceA0tAW8 tAH8CS1 CS2tCYC8 tCCLR,tCCLW tCCHR,tCCHWWR,RDtDS8 tDH8D0 to D7 (Write)tACC8tOH8D0 to D7 (Read)Item Address hold time Address setup time System cycle time Control L pulse width (WR) Control L pulse width (RD ) Control H pulse width (WR) Control H pulse width (RD ) Data setup time Address hold timeSignal A0 A0SymbolCondition — —VDD=2.7 to 4.5V Rating Min. Max. — — — — — — — — — 70 1200 10 10 3400 350 530(Ta = –40 to 85°C ) VDD=4.5 to 5.5V Rating Units Min. 10 10 1300 160 200 1100 530 10 10 — — Max. — — — — — ns — — — — 70 1100 ns ns ns nstAH8 tAW8 tCYC8 tCCLW tCCLR—WR—RD——WR——RD—tCCHW tCCHR tDS8 tDH8 tACC8 tOH8— CL = 100 pF1100 730 25 10 — ———D0 to D7 D0 to D7—RD access timeOutput disable time*1 All timing is specified using 20% and 80% of VDD as the reference. ― ― ― *2 tCCLW and tCCLR are specified as the overlap between CS1 being “L” (CS2 = “H”) and WR and RD being at the “L” level.Ver 1.0c39/452002/07/10ST7522Serial InterfacetCSS tCSHCS1 CS2tSAStSAHA0tSCYC tSLW tSHWSCLtSDStSDHSIItem Serial Clock Period SCL “H” pulse width SCL “L” pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL timeSignalSymbolConditionVDD=2.7 to 4.5V Rating Min. Max. — — — — — — — — —(Ta = –40 to 85°C ) VDD=4.5 to 5.5V Rating Units Min. Max. 400 300 120 0 100 0 100 40 1000 — — — — — — — — — ns ns ns nstSCYCSCL500 — 100 200 — — — 0 100 0 120 60 2200tSHW tSLW tSAS tSAH tSDS tSDH tCSS tCSHA0 SI CS*1 All timing is specified using 20% and 80% of VDD as the standard.Ver 1.0c40/452002/07/10。

T1620-600W;T1620-700W;T1630-600W;中文规格书,Datasheet资料

October 2011Doc ID 3759 Rev 11/8T1620W, T1630WSnubberless™ 16A TriacsFeatures■I T(RMS) = 16 A■V DRM / V RRM = 600, 700 and 800 V ■I GT = 20 to 30 mADescriptionBased on ST’s Snubberless technology providing high commutation performances, theT1620-600W/700W/800W and T1630-600W are especially recommended for use with inductive loads such as rice cookers. They comply with UL standards (ref. E81734).TM : Snubberless is a trademark of STMicroelectronicsCharacteristics T1620W, T1630W2/8Doc ID 3759 Rev 11 CharacteristicsTable 1.Absolute maximum ratingsSymbol ParameterValue Unit I T(RMS)On-state rms current (full sine wave)T c = 80 °C 16A I TSM Non repetitive surge peak on-state current (full cycle, T j initial = 25 °C) F = 50 Hz t = 20 ms 200A F = 60 Hz t = 16.7 ms218I ²t I ²t Value for fusingt p = 10 ms220A ²s dI/dtCritical rate of rise of on-state current I G = 2 x I GT , t r≤ 100 nsF = 120 HzT j = 125 °C 50A/µs V DSM /V RSM Non repetitive surge peak off-statevoltage t p = 10 ms T j = 25 °C V DRM /V RRM+ 100V I GM Peak gate currentt p = 20 µsT j = 125 °C 4A P G(AV)Average gate power dissipation T j = 125 °C 1W T stgT jStorage junction temperature range Operating junction temperature range- 40 to + 150- 40 to + 125°CTable 2.Electrical characteristics (T j = 25 °C, unless otherwise specified)Symbol Test conditionsQuadrantValueUnitT1620T1630I GT (1)V D = 12 V R L = 30 ΩI - II - III MAX.2030mA V GT I - II - III MAX. 1.3V V GD V D = V DRM , R L = 3.3 k Ω, T j = 125 °C I - II - IIIMIN.0.2V I H (2)I T = 250 mA MAX.3550mA I LI G = 1.2 I GTI - III MAX.7080mA II 80100dV/dt (2)V D = 67% V DRM, gate open, T j = 125 °C MIN.300500V/µs (dI/dt)c(2)Without snubber, T j = 125 °CMIN.8.511A/ms 1.minimum I GT is guaranted at 5% of I GT max.2.for both polarities of A2 referenced to A1.T1620W, T1630W CharacteristicsDoc ID 3759 Rev 13/8Table 3.Static characteristicsSymbol Test conditionsValue Unit V T (1)I TM = 22.5 A, t p = 380 µs T j = 25 °C MAX. 1.4V V TO (1)Threshold voltage T j = 125 °C MAX.0.85V R D (1)Dynamic resistance T j = 125 °C MAX.250m ΩI DRM I RRMV DRM = V RRMT j = 25 °C MAX.5µA T j = 125 °C1mA1.for both polarities of A2 referenced to A1.Table 4.Thermal resistanceSymbol ParameterValue Unit R th(j-c)Junction to case (AC) (360° conduction angle) 3.1 °C/W R th(j-a)Junction to ambient60°C/WFigure 1.Maximum power dissipation versusFigure 2.On-state rms current versus caseFigure 3.Relative variation of thermalFigure 4.On-state characteristicsCharacteristicsT1620W, T1630W4/8Doc ID 3759 Rev 1Figure 9.Relative variation of critical rate of decrease of main current versus junctionFigure 5.Surge peak on-state current versus Figure 6.Non-repetitive surge peak on-state Figure 7.Relative variation of I GT ,I H , I L vs junction temperature Figure 8.Relative variation of critical rate of decrease of main current versusT1620W, T1630W Ordering information schemeDoc ID 3759 Rev 15/82 Ordering information schemeTable 5.Product SelectorPart Numbers Voltage (xxx)SensitivityTypePackage600 V700 V800 VT1620-600W X20 mASnubberless ISOWA TT220ABT1620-700W XT1620-800W XT1630-600WX30 mAPackage mechanical data T1620W, T1630W3 Package mechanical data●Epoxy meets UL94, V0●Recommended torque 0.4 to 0.6 N·mIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.6/8Doc ID 3759 Rev 1T1620W, T1630W Ordering InformationDoc ID 3759 Rev 17/84 Ordering Information5 Revision historyTable 7.Ordering informationOrder code Marking PackageWeightBase qtyDelivery modeT1620-600W T1620600W ISOWA TT220AB2.3 g50TubeT1620-700W T1620700W T1620-800W T1620800W T1630-600WT1630600WTable 8.Document revision historyDate RevisionChangesMar-20042Last update.18-Oct-20113Insert T1620-700W, Insert 700 V in fig.10,deleted T1630-800W.T1620W, T1630WPlease Read Carefully:Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.All ST products are sold pursuant to ST’s terms and conditions of sale.Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.ST and the ST logo are trademarks or registered trademarks of ST in various countries.Information in this document supersedes and replaces all information previously supplied.The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.© 2011 STMicroelectronics - All rights reservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America8/8Doc ID 3759 Rev 1分销商库存信息:STMT1620-600W T1620-700W T1630-600W。

DF752资料

APPLICATIONSs Induction Heating s A.C. Motor Drives s Inverters And Choppers s Weldings High Frequency Rectification s UPSFEATURESs Double Side Cooling s High Surge Capability s Low Recovery ChargeVOLTAGE RATINGSKEY PARAMETERS V RRM 2500V I F(AV)1050A I FSM 12000A Q r 1000µC t rr 6.0µsCURRENT RATINGSSymbolParameterConditionsDouble Side Cooled I F(AV)Mean forward current I F(RMS)RMS valueI FContinuous (direct) forward currentSingle Side Cooled (Anode side)I F(AV)Mean forward current I F(RMS)RMS valueI FContinuous (direct) forward currentUnitsMax.Half wave resistive load, T case = 65o C 1050A T case = 65o C 1660A T case = 65o C1500AHalf wave resistive load, T case = 65o C 686A T case = 65o C 1078A T case = 65o C933A 2500240022002000DF752 25DF752 24DF752 22DF752 20ConditionsV RSM = V RRM + 100VLower voltage grades available.Type NumberRepetitive PeakReverse VoltageV RRM VOutline type code: M779b.See Package Details for further information.DF752Fast Recovery DiodeReplaces March 1998 version, DS4212-3.4DS4548 - 3.2 January 2000SURGE RATINGSConditions Max.Units 12.0kA 720 x 103A 2s I 2t for fusingI 2t Surge (non-repetitive) forward current I FSM ParameterSymbol 10ms half sine; with 0% V RRM, T j = 150oC9.6kA 460 x 103A 2sI 2t for fusingI 2tSurge (non-repetitive) forward current I FSM 10ms half sine; with 50% V RRM, T j = 150oCTHERMAL AND MECHANICAL DATAdc ConditionsMax.UnitsoC/W -0.069Anode dcClamping force 15kN with mounting compound Thermal resistance - case to heatsinkR th(c-h)0.01Double side -Single sideThermal resistance - junction to caseR th(j-c)Single side cooledSymbolParameter-0.02oC/WoC/W Cathode dc-0.076oC/W Double side cooled-0.036oC/WT stg Storage temperature range -55175oCkN16.513.5Clamping force-T vj Virtual junction temperature On-state (conducting)-150oC Min.t rr 60Symbol Typ.Units ParameterV FM Forward voltage I RRM Peak reverse current Reverse recovery time Q RA1Recovered charge (50% chord)I RM Reverse recovery current K Soft factor V TO Threshold voltage r T Slope resistance V FRMForward recovery voltagedi/dt = 1000A/µs, T j = 125o C --VAt T vj = 150o C-0.45m ΩAt T vj = 150o C -0.9V ----330A -1000µC - 6.0µsAt V RRM , T case = 150o C-mAAt 2000A peak, T case = 25o C - 1.8V ConditionsMax.I F = 1000A, di RR /dt = 100A/µs T case = 150o C, V R = 100VCHARACTERISTICSDEFINITION OF K FACTOR AND QRA1CURVESFig.2 Maximum (limit) forward characteristicsFig.4 Typical reverse recovery current vs rate of rise of reverse currentFig.5 Maximum (limit) transient thermal impedance - junction to case - ˚C/WPACKAGE DETAILSFor further package information, please contact your local Customer Service Centre. All dimensions in mm, unless stated otherwise.DO NOT SCALE.ASSOCIATED PUBLICATIONSTitleApplication NoteNumber Calculating the junction temperature or power semiconductors AN4506Recommendations for clamping power semiconductors AN4839Thyristor and diode measurement with a multi-meter AN4853Use of V TO, r Ton-state characteristicAN5001POWER ASSEMBLY CAPABILITYThe Power Assembly group was set up to provide a support service for those customers requiring more than the basic semiconduc-tor, and has developed a flexible range of heatsink / clamping systems in line with advances in device types and the voltage and current capability of our semiconductors.We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today. The Assembly group continues to offer high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers.Using the up to date CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete solution (PACs).DEVICE CLAMPSDisc devices require the correct clamping force to ensure their safe operation. The PACs range offers a varied selection of pre-loaded clamps to suit all of our manufactured devices. This include cube clamps for single side cooling of ‘T’ 22mm Clamps are available for single or double side cooling, with high insulation versions for high voltage assemblies.Please refer to our application note on device clamping, AN4839HEATSINKSPower Assembly has it’s own proprietary range of extruded aluminium heatsinks. They have been designed to optimise theperformance or our semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request.For further information on device clamps, heatsinks and assemblies, please contact your nearest Sales Representative or the factory.CUSTOMER SERVICE CENTRESFrance, Benelux, Italy and Spain T el: +33 (0)1 69 18 90 00. Fax: +33 (0)1 64 46 54 50North America T el: 011-800-5554-5554. Fax: 011-800-5444-5444UK, Germany, Scandinavia & Rest Of World T el: +44 (0)1522 500500. Fax: +44 (0)1522 500020SALES OFFICESFrance, Benelux, Italy and Spain T el: +33 (0)1 69 18 90 00. Fax: +33 (0)1 64 46 54 50Germany T el: 07351 827723North America T el: (613) 723-7035. Fax: (613) 723-1518. T oll Free: 1.888.33.DYNEX (39639) /T el: (831) 440-1988. Fax: (831) 440-1989 / Tel: (949) 733-3005. Fax: (949) 733-2986.UK, Germany, Scandinavia & Rest Of World Tel: +44 (0)1522 500500. Fax: +44 (0)1522 500020These offices are supported by Representatives and Distributors in many countries world-wide.© Dynex Semiconductor 2000 Publication No. DS4212-4 Issue No. 4.0 January 2000TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRINTED IN UNITED KINGDOMHEADQUARTERS OPERATIONS DYNEX SEMICONDUCTOR LTD Doddington Road, Lincoln.Lincolnshire. LN6 3LF. United Kingdom.Tel: 00-44-(0)1522-500500Fax: 00-44-(0)1522-500550DYNEX POWER INC.Unit 7 - 58 Antares Drive,Nepean, Ontario, Canada K2E 7W6.T el: 613.723.7035Fax: 613.723.1518T oll Free: 1.888.33.DYNEX (39639)This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injuryor death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.e-mail: power_solutions@Datasheet Annotations:Dynex Semiconductor annotate datasheets in the top right hard corner of the front page, to indicate product status. The annotations are as follows:-Target Information: This is the most tentative form of information and represents a very preliminary specification. No actual design work on the product has been started.Preliminary Information: The product is in design and development. The datasheet represents the product as it is understood but details may change.Advance Information: The product design is complete and final characterisation for volume production is well in hand.No Annotation: The product parameters are fixed and the product is available to datasheet specification.。

SC16IS752中文资料

XTAL1
XTAL2
b. SPI interface Fig 1. Block diagram of SC16IS752/SC16IS762
SC16IS752_SC16IS762_6 © NXP B.V. 2006. All rights reserved.
Product data sheet
1 kΩ (3.3 V) 1.5 kΩ (2.5 V)
SPI
IRQ RESET I2C/SPI GPIO REGISTER
GPIO7/RIA GPIO6/CDA GPIO5/DTRA GPIO4/DSRA GPIO3/RIB GPIO2/CDB GPIO1/DTRB GPIO0/DSRB
002aab598
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
5. Block diagram
VDD VSS
SC16IS752/ SC16IS762
16C450 COMPATIBLE REGISTER SETS
TXA RXA RTSA CTSA TXB RXB RTSB CTSB
元器件交易网
NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
I I I I I I I I
I I I I I I
RS-485 driver direction control inversion Built-in IrDA encoder and decoder supporting IrDA SIR with speeds up to 115.2 kbit/s SC16IS762 supports IrDA SIR with speeds up to 1.152 Mbit/s1 Software reset Transmitter and receiver can be enabled/disabled independent of each other Receive and Transmit FIFO levels Programmable special character detection Fully programmable character formatting N 5-bit, 6-bit, 7-bit or 8-bit character N Even, odd, or no parity N 1, 11⁄2, or 2 stop bits Line break generation and detection Internal Loopback mode Sleep current less than 30 µA at 3.3 V Industrial and commercial temperature ranges 5 V tolerant inputs Available in HVQFN32 and TSSOP28 packages

XM7520 datasheet

XM7520电子烟集成电路◆应用:电子香烟◆典型应用电路图图 1: XM7520典型应用电路特征◆高集成度：集电子香烟模拟器，电池充电器和MOSFET的单芯片解决方案◆封装：DFN6-L (2x2x0.75)◆工作电压范围宽：1.6V至5.5V◆低静态电流：小于4uA◆高输出电流：2.5A概述XM7520是电子烟集成电路。

该芯片集成了电子烟功能以及电池充电功能于一体的单芯片方案。

传统5V适配器和USB端口均可用于电池充电。

独立的充电器的输入引脚增加了更高的灵活性。

引脚分配绝对最大额定值额定值极限值VDD 引脚供电电压 -0.3V 至 6.0V CAP, OUT 和 LED 引脚电压 -0.3V 至 6.0V OUT 引脚电流 2.5A工作温度范围 -40°C 至 85°C 结温 125°C 储存温度 -65°C 至150°C 焊接温度300°C电气特性(无特别说明，T A= 25°C, VDD=3.6V)参数符号条件极限值单位最小典型最大电源电压 V DD0 5.5 V电源电流I DD主动模式睡眠模式5 10 mA 2.5 4uA低电压阈值 V LVD 3.05 3.2 3.35V 充电器电压 V CHRG 4.5 5.5预设电压 V SET 4.15 4.20 4.25 充电电压 V RECHRG 4.05 4.10 4.15 涓流充电电压 V TRK 2.7 2.8 2.9充电电流 I SET 160 200 240 mA 涓流充电电流 I TRK 30 40 50 LED 电流 I LED 5 输出电流 I OUT R OUT =2Ω 1.5 1.8 2.1 A 热关断 T SD 150 °C PFET 导通电阻 R ON 0.15 Ω 短路阈值 R SC 0.5 2.0 Ω 过流阈值 I OC 3 3.5 4 A 传感电容 C SNS 2 20 pF 感应阈值 ΔC SNS 1.6 %传感间隔t SNS32ms引脚功能OUT (引脚1)：加热线圈和充电器连接引脚。

FT6x06- DataSheet _V01_ -Preliminary

FT6x06Self-Capacitive TouchPanel ControllerINTRODUCTIONThe FT6x06 Series ICs are single-chip capacitive touch panel controller ICs with a built-in 8 bit enhanced Micro-controller unit (MCU).They adopt the self-capacitance technology, which supports single point and gesture touch. In conjunction with a self-capacitive touch panel, Friendly UI can be applied on many portable devices, such as cellular phones, GPS and digital camera.The FT6x06 series ICs include FT6206 /FT6306, the difference of their specifications will be listed individually in this datasheet.FEATURES ● Self-Capacitive Sensing Techniques support single pointtouch and differential sensing● Absolute X and Y Coordinates or gesture● Auto-calibration: Insensitive to Capacitance and Environ-mental Variations● Built-in Enhanced MCU● FT6206 supports up to 28 channels of sensors /drivers● FT6306 supports up to 36 channels of sensors /drivers● Report Rate: Up to 80Hz● Support Interfaces :IIC● Support single Film material TP and diamond patternwithout additional shield● Internal accuracy ADC and smooth Filter● Support 2.8V to 3.6V Operating Voltage● Supports independent IOVCC● Built-in LDO for Digital Circuits ● High efficient consumption management with 3 Operating ModesActive Mode Monitor ModeHibernation Mode● Operating Temperature Range: -20°C to +85°C● ESD:HBM ≥5000V,INTRODUCTION (I)FEATURES (I)1 OVERVIEW (1)1.1 T YPICAL A PPLICATIONS (1)2 FUNCTIONAL DESCRIPTION (1)2.1 A RCHITECTURAL O VERVIEW (1)2.2 MCU (2)2.3 O PERATION M ODES (2)2.4 S ERIAL I NTERFACE (3)2.4.1 I2C (3)3 ELECTRICAL SPECIFICATIONS (4)3.1 A BSOLUTE M AXIMUM R ATINGS (4)3.2 DC C HARACTERISTICS (5)3.3 AC C HARACTERISTICS (5)3.4 I/O P ORTS C IRCUITS (6)3.5 POWER ON/R ESET/W AKE S EQUENCE (6)4 PIN CONFIGURATIONS (8)5 PACKAGE INFORMATION (10)5.1 P ACKAGE I NFORMATION OF QFN-5X5-40L P ACKAGE (10)5.2 P ACKAGE I NFORMATION OF QFN-6X6-48L P ACKAGE (11)5.3 O RDER I NFORMATION (12)1OVERVIEW1.1Typical ApplicationsFT6x06 accommodate a wide range of applications with a set of buttons up to a 2D touch sensing device, their typical applications are listed below.●Mobile phones, smart phones●GPS●Game consoles●POS (Point of Sales) devices●Portable MP3 and MP4 media players●Digital camerasFT6x06 Series ICs support up to 7” Touch Panel, users may find out their target IC from the specs listed in the following table,Model NamePanel PackageTouch Panel Size Channel Type Pin SizeFT6206GMA 28 QFN5*5 40 0.6-P0.4 2.8"～4.3"FT6306DMB 36 QFN6*6 48 0.6-P0.4 4.3"～7"2FUNCTIONAL DESCRIPTION2.1Architectural OverviewFigure2-1 shows the overall architecture for the FT6x06.Figure 2-1 FT6x06 System Architecture DiagramThe FT6x06 is comprised of five main functional parts listed below,●Touch Panel Interface CircuitsThe main function for the AFE and AFE controller is to interface with the touch panel. It scans the panel by sending AC signals to the panel and processes the received signals from the panel. So it supports both driver and Sensor functions. Key parameters to configure this circuit can be sent via serial interfaces.● Enhanced MCUFor the Enhanced MCU, larger program and data memories are supported. Furthermore, A Flash ROM is implemented to store programs and some key parameters.Complex signal Processing algorithms are implemented by MCU to detect the touches reliably and efficiently. Communication protocol software is also implemented on this MCU to exchange data and control information with the host pro-cessor.●External InterfaceI2C: an interface for data exchange with hostINT: an interrupt signal to inform the host processor that touch data is ready for readRSTN: an external low signal reset the chip.● A watch dog timer is implemented to ensure the robustness of the chip.● A voltage regulator to generate 1.8V for digital circuits from the input VDDA supply.2.2MCUThis section describes some critical features and operations supported by the Enhanced MCU.Figure 2-2 shows the overall structure of the MCU block. In addition to the Enhanced MCU core, we have added the following circuits,●Program Memory:32KB Flash●Data Memory: 2KB SRAM●Timer: A number of timers are available to generate different clocks●Master Clock:12/24/ 48MHz from a 48MHz RC Oscillator●Clock Manager: To control various clocks under different operation conditions of the systemFigure 2-2 MCU Block Diagram2.3Operation ModesFT6x06 operates in the following three modes:●Active ModeIn this mode, FT6x06 actively scans the panel. The default scan rate is 60 frames per second. The host processor can configure FT6x06 to speed up or to slow down.●Monitor ModeIn this mode, FT6x06 scans the panel at a reduced speed. The default scan rate is 25 frames per second and the host processor can increase or decrease this rate. When in this mode, most algorithms are stopped. A simpler algorithm is being executed to determine if there is a touch or not. When a touch is detected, FT6x06 shall enter the Active mode immediately to acquire the touch information quickly. During this mode, the serial port is closed and no data shall be transferred with the host processor●Hibernation ModeIn this mode, the chip is set in a power down mode. It shall respond to the “RESET” or “Wakeup” signal from the host processor. The chip therefore consumes very little current, which help prolong the standby time for the portable devices.Host InterfaceFigure 2-3 shows the interface between a host processor and FT6x06. This interface consists of the following threesets of signals: ● Serial Interface● Interrupt from FT6x06 to the Host ● Reset Signal from the Host to FT6x06Figure 2-3 Host Interface DiagramThe serial interface of FT6x06 is I2C. The details of this interface are described in detail in Section 2.5. The interrupt signal (/INT) is used for FT6x06 to inform the host that data are ready for the host to receive. The RSTN signal is used for the host to reset FT6x06. After resetting, FT6x06 shall enter the Active mode.2.4 Serial InterfaceFT6x06 supports the I2C interfaces, which can be used by a host processor or other devices. 2.4.1I2CThe I2C is always configured in the Slave mode. The data transfer format is shown in Figure 2-4.Figure 2-4 I2C Serial Data Transfer FormatFigure 2-5 I2C master write, slave readFigure 2-6 I2C master read, slave writeTable 2-1 lists the meanings of the mnemonics used in the above figures.Table 2-1 Mnemonics DescriptionMnemonicsDescriptionSI2C Start or I2C RestartA[6:0] Slave address R/WREAD/WRITE bit, ‘1’ for read, ‘0’for writeA(N) ACK(NACK) PSTOP: the indication of the end of a packet (if this bit is missing, S will indicate the endof the current packet and the beginning of the next packet)I2C Interface Timing Characteristics is shown in Table 2-2.Table 2-2 I2C Timing Characteristics ParameterMin Max Unit SCL frequency10 400 KHz Bus free time between a STOP and START condition 4.7 \ us Hold time (repeated) START condition 4.0 \ us Data setup time250 \ ns Setup time for a repeated START condition 4.7 \ us Setup Time for STOP condition4.0\us3ELECTRICAL SPECIFICATIONS3.1Absolute Maximum RatingsTable 3-1 Absolute Maximum RatingsItemSymbol Value Unit Note Power Supply Voltage VDDA - VSSA-0.3 ~ +3.6V1, 2I/O Digital Voltage IOVCC 1.8~3.6 V 1 Operating Temperature Topr -20 ~ +85 ℃ 1 Storage TemperatureTstg-55 ~ +150℃ 1Notes1. If used beyond the absolute maximum ratings, FT6x06 may be permanently damaged. It is strongly recommended that the device be used within the electrical characteristics in normal operations. If exposed to the condition not within the electrical characteristics, it may affect the reliability of the device.2. Make sure VDDA (high) ≥VSSA (low).3.2DC CharacteristicsTable 3-2 DC Characteristics (VDDA=2.8~3.3V, Ta=-20~85℃)Item Symbol Test Condition Min. Typ. Max. Unit Note Input high-level voltage VIH 0.7 x IOVCC-- IOVCC VInput low -level voltage VIL -0.3 -- 0.3 x IOVCC VOutput high -level voltage VOH IOH=-0.1mA 0.7 x IOVCC-- -- VOutput low -level voltage VOL IOH=0.1mA -- -- 0.3 x IOVCC VI/O leakage current ILI Vin=0~VDDA -1 -- 1 μACurrent consumption （Normal operation mode）IoprVDDA = 3.3VTa=25℃ MCLK=24MHz--2.1-- mACurrent consumption （Monitor mode）ImonVDDA = 3.3VTa=25℃ MCLK=24MHz--TBD -- mACurrent consumption （Sleep mode）IslpVDDA = 3.3VTa=25℃ MCLK=24MHz--0.03-- mAStep-up output voltage VDD5 VDDA = 3.3V 3.35TBD VPower Supply voltage VDDA 2.8- 3.6V3.3AC CharacteristicsTable 3-3 AC Characteristics of OscillatorsItem Symbol Test Condition Min. Typ. Max. Unit NoteOSC clock 1 fosc1 VDDA= 3.3VTa=25℃47 48 49 MHzTable 3-4 AC Characteristics of #SItem Symbol Test Condition Min Typ. Max Unit Note #S acceptable clock F#s - 160 - KHz#S rise time T#s r - 1.5 - nS#S fall time T#s f - 250 - nS3.4I/O Ports CircuitsFigure 3-1 Digital In/Out Port CircuitFigure 3-2 Reset Input Port Circuits3.5POWER ON/Reset/Wake SequenceThe GPIO such as INT and I2C are advised to be low before powering on. Reset should be pulled down to be low before powering on. INT signal will be sent to the host after initializing all parameters and then start to report points to the host.P o w e rFigure 3-7 Power on timeFigure 3-8 Power on SequenceReset time must be enough to guarantee reliable reset, the time of starting to report point after resetting approach to the time of starting to report point after powering on.Figure 3-8 Reset SequenceTable 3-5 Power on/Reset/Wake Sequence ParametersParameter DescriptionMin Max Units Tris Rise time from 0.1VDD to 0.9VDD-- 3 ms Tpon Time of starting to report point after powering on 300 -- ms Tprt Time of being low after powering on 1 -- ms Trsi Time of starting to report point after resetting 300 -- ms TrstReset time5--ms4 PIN CONFIGURATIONSPin List of FT6x06Table 4-1 Pin Definition of FT6x06NamePin No.Type DescriptionFT6206GMA FT6306DMBVREF 1 47 PWRGenerated internal reference voltage. A 1μF ceramic capacitor toground is required. S1 2 48 I/O Capacitance sensor /driver channel S2 3 1 I/O Capacitance sensor /driver channel S3 4 2 I/O Capacitance sensor /driver channel S4 5 3 I/O Capacitance sensor /driver channel S5 6 4 I/O Capacitance sensor /driver channel S6 7 5 I/O Capacitance sensor /driver channel S7 8 6 I/O Capacitance sensor /driver channel S8 9 7 I/O Capacitance sensor /driver channel S9 10 8 I/O Capacitance sensor /driver channel S10 11 9 I/O Capacitance sensor /driver channel S11 12 10 I/O Capacitance sensor /driver channel S12 13 11 I/O Capacitance sensor /driver channel S13 14 12 I/O Capacitance sensor /driver channel S14 15 13 I/O Capacitance sensor /driver channel S15 16 14 I/O Capacitance sensor /driver channel S16 17 15 I/O Capacitance sensor /driver channel S17 18 16 I/O Capacitance sensor /driver channel S18 19 17 I/O Capacitance sensor /driver channel S19 20 18 I/O Capacitance sensor /driver channel S20 21 19 I/O Capacitance sensor /driver channel S21 22 20 I/O Capacitance sensor /driver channel S22 23 21 I/O Capacitance sensor /driver channel S23 24 22 I/O Capacitance sensor /driver channel S24 25 23 I/O Capacitance sensor /driver channel S25 26 24 I/O Capacitance sensor /driver channel S26 27 25 I/O Capacitance sensor /driver channel S27 28 26 I/O Capacitance sensor /driver channel S28 29 27 I/O Capacitance sensor /driver channel S29 28 I/O Capacitance sensor /driver channel S30 29 I/O Capacitance sensor /driver channel S31 30 I/O Capacitance sensor /driver channel S32 31 I/O Capacitance sensor /driver channel S33 32 I/O Capacitance sensor /driver channel S34 33 I/O Capacitance sensor /driver channel S35 34 I/O Capacitance sensor /driver channel S3635I/OCapacitance sensor /driver channelVDD5 30 36 PWR High voltage power supply from the charge pump LDO generatedinternally. A 1μF ceramic to ground is required. VSSA 31 37 GND Analog ground VDDA 32 38 PWR Analog power supply, A 1μF ceramic capacitor to ground is required.VSS 33 39 GND Analog groundVDDD 34 40 PWR Digital power supply. A 1μF ceramic capacitor to ground is required.VSSD 35 41 GNDAnalog ground RSTN 36 42 I External Reset, Low is active IOVCC 37 43 PWR I/O power supply SCL 38 44 I/O I2C clock inputSDA 39 45 I/O I2C data input and output INT 4046I/OExternal interrupt to the hostFT6206GMA Package DiagramFT6306DMB Package Diagram5PACKAGE INFORMATION5.1Package Information of QFN-5x5-40L PackageItemSymbolMillimeter Min Type MaxTotal Thickness A 0.5 0.55 0.6 Stand OffA1 0 0.035 0.05 Mold Thickness A2 ---- 0.4 0.425 L/F Thickness A3 0.152 REF Lead Width b 0.150.20 0.25 Body Size D 5 BSC E 5 BSC Lead Pitch e 0.4 BSC EP SizeJ 3.3 3.4 3.5 K 3.3 3.4 3.5 Lead LengthL 0.350.4 0.45Package Edge Tolerance aaa 0.1 Mold Flatness bbb 0.1Co Planarity ccc0.08 Lead Offset ddd 0.1Exposed Pad Offseteee0.15.2Package Information of QFN-6x6-48L PackageItemSymbolMillimeterMin Type Max Total Thickness A 0.50.55 0.6 Stand OffA1 0 0.035 0.05 Mold Thickness A2 ----0.4 0.425L/F Thickness A3 0.152 REF Lead Width b 0.150.20 0.25 Body Size D 6 BSC E 6 BSC Lead Pitch e 0.4 BSC EP SizeJ 4.52 4.62 4.72 K 4.52 4.62 4.72 Lead LengthL 0.350.4 0.45 Package Edge Tolerance aaa 0.1 Mold Flatness bbb 0.1 Co Planarity ccc 0.08 Lead Offsetddd 0.1 Exposed Pad Offseteee 0.15.3Order InformationEND OF DATASHEETProduct Name Package Type #S Pins FT6206GMA FT6306DMBQFN-40L QFN-48L28 36。

2STR2215;中文规格书,Datasheet资料

density) technology. The resulting transistor
c shows exceptional high gain performances du coupled with very low saturation voltage. Obsolete Pro The complementary NPN is the 2STR1215.
Date
Revision
Changes
09-Feb-2006
1
Initial release.
20-Jul-2006
2
New template.
08-Sep-2008
3
Updated the SOT-23 mechanical data.
Updated Figure 1: Internal schematic diagram
Produc hFE (1) DC current gain
IC = -50 mA VCE = -2 V 200
IC = -500 mA VCE = -2 V 200 280 560
IC = -1 A IC = -2 A
VCE = -2 V 130 VCE = -2 V 80
leteCCBO
Collector-base capacitance (IE = 0)
IEBO
(IC =0)
VEB = -4 V
-0.1 µA
) Collector-base
t(s V(BR)CBO breakdown voltage
IC = -100 µA
-15
V
c (IE = 0)
rodu V(BR)CEO (1)
Collector-emitter breakdown voltage

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Applications
Cell Phones Portable Media Players Tablets Mobile Devices Consumer Medical
Figure 1.
Block Diagram
Ordering Information
Part Number
FT7522L6X
DC VCC or Ground Current per Supply Pin Storage Temperature Range Junction Temperature Under Bias Junction Lead Temperature, Soldering 10 Seconds Power Dissipation Electrostatic Discharge Capability Human Body Model, JESD22-A114 Charged Device Model, JESD22-C101 -65
Pin Definitions
Pin #
1 2 3 4 5 6
Name
/RST1 GND /SR0 VCC DSR TEST
Description Normal Operation
Open-Drain Output, Active LOW GND Reset Input, Active LOW Power Supply Delay Selection Input. Tie to GND during (1) normal operation. Used for device testing; should be tied to GND during normal operation. GND Reset Input, Active LOW Power Supply Delay Selection Input. Pull HIGH to enable the 0-second delay for factory test. Used for device testing; should be tied to GND during normal operation.
AC Electrical Characteristics
The values reported are valid for any of the following ranges: TA=-40°C to +85°C at VCC=1.8V to 5.0V, TA=-25°C to +85°C at VCC=1.7V to 5.0V, TA=0°C to +85°C at VCC=1.65V to 5.0V.
ห้องสมุดไป่ตู้
0-Second Factory-Test Mode
Open-Drain Output, Active LOW
Note: 1. This pin must always be tied to either GND or VCC. It must not float.
© 2012 Fairchild Semiconductor Corporation FT7522 • Rev. 1.0.0
DC Electrical Characteristics
The values reported are valid for any of the following ranges: TA=-40°C to +85°C at VCC=1.8V to 5.0V, TA=-25°C to +85°C at VCC=1.7V to 5.0V, TA=0°C to +85°C at VCC=1.65V to 5.0V.
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FT7522 — Reset Timer with Fixed Delay and Reset Pulse
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
© 2012 Fairchild Semiconductor Corporation FT7522 • Rev. 1.0.0
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FT7522 — Reset Timer with Fixed Delay and Reset Pulse

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FT7522 — Reset Timer with Fixed Delay and Reset Pulse
Pin Configuration
Figure 2.
Pad Assignments (Top-Through View)
Output Voltage DC Output Sink Current Free-Air Operating Temperature Thermal Resistance
Note: 3. VCC should never be allowed to float while input pins are driven.
V =0V After Power Down, Rising to VCC Recovery Time After Power Down CC 0.5V Input Voltage
(3)
ms 5 5 +0.5 +85 350 V V mA C °C/W
/SR0 /RST1 /RST1, VCC=1.8V to 5.0V
Symbol
VCC VIN VOUT IIK IOK IOL ICC TSTG TJ TL PD ESD
Parameter
Supply Voltage DC Input Voltage Output Voltage
(2)
Condition
/SR0, DSR /RST1 VIN < 0V VOUT < 0V
Min.
-0.5 -0.5 -0.5
Max.
7.0 7.0 7.0 -50 -50 +50 100
Unit
V V V mA mA mA mA C C C mW kV
DC Input Diode Current DC Output Diode Current DC Output Sink Current
FT7522 — Reset Timer with Fixed Delay and Reset Pulse
January 2012
FT7522
Reset Timer with Fixed Delay and Reset Pulse
Features
Fixed Reset Delay: 7.5 Seconds One Input Reset Pin Open-Drain Output Pin with Fixed 400ms Pulse 1.8V to 5.0V Operation (TA=-40°C to +85°C) 1.7V to 5.0V Operation (TA=-25°C to +85°C) 1.65V to 5.0V Operation(TA=0°C to +85°C) <1µA ICCQ Consumption Zero-Second Test-Mode Enable
Condition
DSR, /SR0 DSR, /SR0 RST, IOL=500µA 0V VIN 5.0V /SR0=0V
Min.
0.65 x VCC
Max.
0.25 x VCC 0.3 1.0 1 100
Unit
V V V µA µA µA
Quiescent Supply Current (Timer Inactive) /SR0=VCC
Operating Temperature Range
-40C to +85C
Top Mark
PF
Package
6-Lead, MicroPak™ 1.0 x 1.45mm, JEDEC MO-252
Packing Method
5000 Units on Tape and Reel
© 2012 Fairchild Semiconductor Corporation FT7522 • Rev. 1.0.0
Symbol
VIH VIL VOL IIN ICC
Parameter
Input High Voltage Input Low Voltage Low Level Output Voltage Input Leakage Current (/SR0, DSR) Dynamic Supply Current (Timer Active)
Description
The FT7522 is a timer for resetting a mobile device where long reset times are needed. The long delay helps avoid unintended resets caused by accidental key presses. It has a fixed delay of 7.5 ±20% seconds. The DSR pin enables Test Mode operation by immediately forcing /RST1 LOW for factory testing. The FT7522 has one input for single-button resetting capability. The device has a single open-drain output with 0.5mA pull-down drive. FT7522 draws minimal ICC current when inactive and functions over a power supply range of 1.65V to 5.0V.