LPC11U1x_中文资料
lpc1111.lpc1112.lpc1113.lpc1114

HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 7 x 7 x 0.85 mm
capabilities (second SPI on LQFP48 and PLCC44 packages only). I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a
data rate of 1 Mbit/s with multiple address recognition and monitor mode. Other peripherals:
HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 7 x 7 x 0.85 mm
HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 7 x 7 x 0.85 mm
instruction set and memory addressing together with reduced code size compared to
existing 8/16-bit architectures.
LPC1114的IO配置部分的中文手册

表111. LPC111x 引脚配置引脚配置--图8–10引脚描述表8–114引脚配置--图8–10引脚描述表8–114引脚配置图8–8-图8–10引脚描述表8–112表8–114图8–10表8–112表8–113表8–1143. LPC111x 引脚描述表 112. LPC1113/14 引脚描述表 (LQFP48 封装)RESET — 外部复位输入:此引脚上的低电平会使设备复位,I/O 端口和外设复位成初始的默认状态,并使处理器从0地址开始执行。
I/O PIO0_0 — 通用数字输入/输出引脚。
PIO0_1/CLKOUT/ CT32B0_MAT2PIO0_2/SSEL0/ CT16B0_CAP04[1]I/O PIO0_1 —通用数字输入/输出引脚。
复位时低电平启动在线系统编程命令处 理程序。
O CLKOUT — 时钟输出脚。
OCT32B0_MAT2 —32位定时器0匹配输出2。
10[1]I/O PIO0_2 —通用数字输入/输出引脚。
O SSEL0 —SPI0从机选择。
ICT16B0_CAP0 —16位定时器0捕获输入0。
PIO0_314[1] I/OPIO0_3 —通用数字输入/输出引脚。
.I/O SCK0 —SPI0串行时钟。
PIO0_7/CTS 23[1] I/O PIO0_7 —通用数字输入/输出引脚(大电流输出驱动器)。
I CTS —UART清除发送。
PIO0_8/MISO0/CT16B0_MAT0PIO0_9/MOSI0/CT16B0_MAT1 SWCLK/PIO0_10/ SCK0/CT16B0_MAT2TDI/PIO0_11/AD0/CT32B0_MAT3 TMS/PIO1_0/AD1/CT32B1_CAP0 TDO/PIO1_1/AD2/CT32B1_MAT0TRST/PIO1_2/AD3/CT32B1_MAT1 27[1] I/O PIO0_8 —通用数字输入/输出引脚。
74LCX11中文资料

© 2005 Fairchild Semiconductor Corporation
DS012426
元器件交易网
74LCX11
Connection Diagrams
Pin Assignments for SOIC, SOP, and TSSOP
General Description
The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
10 10
PA PA PA PA
3.6V d VI d 5.5V
r10
500
'ICC
3
元器件交易网
74LCX11
AC Electrical Characteristics
TA Symbol Parameter VCC CL Min tPLH tPHL tOSLH tOSHL Output to Output Skew (Note 6) Propagation Delay 1.5 1.5 3.3V r 0.3V 50 pF Max 6.0 6.0 1.0 1.0 Min 1.5 1.5
LMP2011中文资料

LMP2011Single/LMP2012Dual/LMP2014QuadHigh Precision,Rail-to-Rail Output Operational AmplifierGeneral DescriptionThe LMP201X is a new precision amplifier family that offers unprecedented accuracy and stability at an affordable price and is offered in miniature packages.This device utilizes patented techniques to measure and continually correct the input offset error voltage.The result is an amplifier which is ultra stable over time and temperature.It has excellent CMRR and PSRR ratings,and does not exhibit the familiar 1/f voltage and current noise increase that plagues tradi-tional amplifiers.The combination of the LMP201X charac-teristics makes it a good choice for transducer amplifiers,high gain configurations,ADC buffer amplifiers,DAC I-V conversion,and any other 2.7V-5V application requiring pre-cision and long term stability.Other useful benefits of the LMP201X are rail-to-rail output,a low supply current of 930µA,and wide gain-bandwidth product of 3MHz.These extremely versatile features found in the LMP201X provide high performance and ease of use.Features(For V S =5V,Typical unless otherwise noted)n Low guaranteed V OS over temperature 60µV n Low noise with no 1/f 35nV/n High CMRR 130dB n High PSRR 120dB n High A VOL130dB n Wide gain-bandwidth product 3MHz n High slew rate4V/µs n Low supply current 930µA n Rail-to-rail output30mVn No external capacitors requiredApplicationsn Precision instrumentation amplifiers n Thermocouple amplifiers n Strain gauge bridge amplifierConnection Diagrams5-Pin SOT238-Pin SOIC8-Pin MSOP20071502Top View20071542Top View20071538Top View14-Pin TSSOP14-Pin LLP20071539Top View20071541Top ViewPRELIMINARYOctober 2004LMP2011Single/LMP2012Dual/LMP2014Quad High Precision,Rail-to-Rail Output Operational Amplifier©2004National Semiconductor Corporation Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.ESD Tolerance Human Body Model 2000V Machine Model 200V Supply Voltage 5.8VCommon-Mode Input Voltage−0.3≤V CM ≤V CC +0.3VLead Temperature (soldering 10sec.)+300˚CDifferential Input Voltage ±Supply VoltageCurrent at Input Pin30mACurrent at Output Pin 30mA Current at Power Supply Pin50mAOperating Ratings (Note 1)Supply Voltage2.7V to 5.25V Storage Temperature Range −65˚C to 150˚COperating Temperature Range LMP2011MF,LMP2011MFX −40˚C to 125˚C LMP2011MA,LPM2011MAX −40˚C to 125˚C LMP2012MM,LMP2011MMX −40˚C to 125˚C LMP2014SD,LMP2014SDX −40˚C to 125˚CLMP2014MT,LMP2014MTX0˚C to 70˚C 2.7V DC Electrical CharacteristicsUnless otherwise specified,all limits guaranteed for T J =25˚C,V +=2.7V,V -=0V,VCM=1.35V,V O =1.35V and R L >1M Ω.Boldface limits apply at the temperature extremes.Symbol ParameterConditions Min (Note 3)Typ (Note 2)Max (Note 3)Units V OSInput Offset Voltage 0.82560µV Offset Calibration Time0.51012ms TCV OSInput Offset Voltage 0.015µV/˚C Long-Term Offset Drift 0.006µV/monthLifetime V OS Drift2.5µV I IN Input Current -3pA I OS Input Offset Current 6pA R IND Input Differential Resistance 9M ΩCMRR Common Mode Rejection Ratio−0.3≤V CM ≤0.9V 0≤V CM ≤0.9V1309590dB PSRR Power Supply Rejection Ratio 1209590dBA VOLOpen Loop Voltage GainR L =10k Ω1309590dBR L =2k Ω1249085V OOutput SwingR L =10k Ωto 1.35V V IN (diff)=±0.5V2.6652.6552.68V0.0330.0600.075R L =2k Ωto 1.35V V IN (diff)=±0.5V2.6302.6152.65V0.0610.0850.105I OOutput CurrentSourcing,V O =0V V IN (diff)=±0.5V 1253mASinking,V O =5V V IN (diff)=±0.5V1853R OUT Output ImpedanceΩI SSupply Current per Channel0.9191.201.50mAL M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 22.7V AC Electrical CharacteristicsT J =25˚C,V +=2.7V,V -=0V,V CM =1.35V,V O =1.35V,and R L>1M Ω.Boldface limits apply at the temperature extremes.Symbol ParameterConditions Min (Note 3)Typ (Note 2)Max (Note 3)Units GBW Gain-Bandwidth Product 3MHz SR Slew Rate 4V/µs θm Phase Margin 60Deg G m Gain Margin−14dB e n Input-Referred Voltage Noise 35nV/i n Input-Referred Current Noise pA/e n p-p Input-Referred Voltage Noise R S =100Ω,DC to 10Hz 850nV pp t rec Input Overload Recovery Time 50mst SOutput Settling timeA V =+1,R L =2k Ω1V Step1%ns0.1%0.01%A V =−1,R L =2k Ω1V Step1%0.1%0.01%5V DC Electrical CharacteristicsUnless otherwise specified,all limits guaranteed for TJ=25˚C,V +=5V,V -=0V,VCM=2.5V,V O =2.5V and R L >1M Ω.Boldface limits apply at the temperature extremes.Symbol ParameterConditionsMin (Note 3)Typ (Note 2)Max (Note 3)Units V OSInput Offset Voltage 0.122560µV Offset Calibration Time0.51012ms TCV OSInput Offset Voltage 0.015µV/˚C Long-Term Offset Drift 0.006µV/monthLifetime V OS Drift2.5µV I IN Input Current -3pA I OS Input Offset Current 6pA R IND Input Differential Resistance 9M ΩCMRR Common Mode Rejection Ratio−0.3≤V CM ≤3.20≤V CM ≤3.213010090dB PSRR Power Supply Rejection Ratio 1209590dBA VOLOpen Loop Voltage GainR L =10k Ω130105100dBR L =2k Ω1329590V OOutput SwingR L =10k Ωto 2.5V V IN (diff)=±0.5V4.964.954.978V0.0400.0700.085R L =2k Ωto 2.5V V IN (diff)=±0.5V4.8954.8754.919V0.0910.1150.140LMP2011Single/LMP2012Dual/LMP2014Quad35V DC Electrical Characteristics Unless otherwise specified,all limits guaranteed for T J =25˚C,V +=5V,V -=0V,VCM=2.5V,V O =2.5V and R L >1M Ω.Boldface limits apply at the temperature extremes.(Continued)Symbol ParameterConditionsMin (Note 3)Typ (Note 2)Max (Note 3)UnitsI OOutput CurrentSourcing,V O =0V V IN (diff)=±0.5V 1586mASinking,V O =5V V IN (diff)=±0.5V1786R OUT Output ImpedanceΩI SSupply Current per Channel0.9301.201.50mA5V AC Electrical CharacteristicsT J =25˚C,V +=5V,V -=0V,V CM =2.5V,V O =2.5V,and R L >1M Ω.Boldface limits apply at the temperature extremes.Symbol ParameterConditionsMin (Note 3)Typ (Note 2)Max (Note 3)Units GBW Gain-Bandwidth Product 3MHz SR Slew Rate 4V/µs θm Phase Margin 60deg G m Gain Margin−15dB e n Input-Referred Voltage Noise 35nV/i n Input-Referred Current Noise pA/e n p-p Input-Referred Voltage Noise R S =100Ω,DC to 10Hz 850nV pp t rec Input Overload Recovery Time 50mst SOutput Settling timeA V =+1,R L =2k Ω1V Step1%ns0.1%0.01%A V =−1,R L =2k Ω1V Step1%0.1%0.01%Note 1:Absolute Maximum Ratings indicate limits beyond which damage may occur.Operating Ratings indicate conditions for which the device is intended to be functional,but specific performance is not guaranteed.For guaranteed specifications and test conditions,see the Electrical Characteristics.Note 2:Typical values represent the most likely parametric norm.Note 3:Limits are 100%production tested at 25˚C.Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC)method.Ordering InformationPackage Part Number TemperatureRangePackage MarkingTransport Media NSC Drawing5-Pin SOT23LMP2011MF −40˚C to 125˚CAN1A 1k Units Tape and Reel MF05A LMP2011MFX 3k Units Tape and Reel 8-Pin MSOP LMP2012MM AP1A1k Units Tape and Reel MUA08A LMP2012MMX 3.5k Units Tape and Reel8-Pin SOIC LMP2011MA LMP2011MA 95Units/Rail M08A LMP2011MAX 2.5k Units Tape and Reel 14-Pin LLP LMP2014SD P2014SD 250Units Tape and Reel SRC14A LMP2014SDX 2.5Units Tape and Reel14-Pin TSSOPLMP2014MT 0˚C to 70˚C LMP2014MT94Units/Rail MTC14LMP2014MTX2.5k Units Tape and ReelL M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 4Typical Performance CharacteristicsT A =25C,V S =5V unless otherwise specified.Supply Current vs.Supply VoltageOffset Voltage vs.Supply Voltage2007152420071525Offset Voltage mon Mode Offset Voltage mon Mode2007153520071534Voltage Noise vs.Frequency Input Bias Current mon Mode2007150420071503LMP2011Single/LMP2012Dual/LMP2014Quad5Typical Performance Characteristics(Continued)PSRR vs.FrequencyPSRR vs.Frequency2007150720071506Output Sourcing @2.7V Output Sourcing @5V2007152620071527Output Sinking @2.7V Output Sinking @5V2007152820071529L M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 6Typical Performance Characteristics(Continued)Max Output Swing vs.Supply VoltageMax Output Swing vs.Supply Voltage2007153020071531Min Output Swing vs.Supply Voltage Min Output Swing vs.Supply Voltage2007153220071533CMRR vs.Frequency Open Loop Gain and Phase vs.Supply Voltage2007150520071508LMP2011Single/LMP2012Dual/LMP2014Quad7Typical Performance Characteristics(Continued)Open Loop Gain and Phase vs.R L @2.7VOpen Loop Gain and Phase vs.R L @5V2007150920071510Open Loop Gain and Phase vs.C L @2.7V Open Loop Gain and Phase vs.C L @5V2007151120071512Open Loop Gain and Phase vs.Temperature @2.7V Open Loop Gain and Phase vs.Temperature @5V2007153620071537L M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 8Typical Performance Characteristics(Continued)THD+N vs.AMPLTHD+N vs.Frequency20071514200715130.1Hz −10Hz Noise vs.Time20071515LMP2011Single/LMP2012Dual/LMP2014Quad9Application InformationTHE BENEFITS OF LMP201XNO1/f NOISEUsing patented methods,the LMP201X eliminates the1/fnoise present in other amplifiers.That noise,which in-creases as frequency decreases,is a major source of mea-surement error in all DC-coupled measurements.Low-frequency noise appears as a constantly-changing signal inseries with any measurement being made.As a result,evenwhen the measurement is made rapidly,this constantly-changing noise signal will corrupt the result.The value of thisnoise signal can be surprisingly large.For example:If aconventional amplifier has a flat-band noise level of10nV/and a noise corner of10Hz,the RMS noise at0.001Hz is1µV/.This is equivalent to a0.50µV peak-to-peak error,in the frequency range0.001Hz to1.0Hz.In acircuit with a gain of1000,this produces a0.50mV peak-to-peak output error.This number of0.001Hz might appearunreasonably low,but when a data acquisition system isoperating for17minutes,it has been on long enough toinclude this error.In this same time,the LMP201X will onlyhave a0.21mV output error.This is smaller by2.4x.Keepin mind that this1/f error gets even larger at lower frequen-cies.At the extreme,many people try to reduce this error byintegrating or taking several samples of the same signal.This is also doomed to failure because the1/f nature of thisnoise means that taking longer samples just moves themeasurement into lower frequencies where the noise level iseven higher.The LMP201X eliminates this source of error.The noiselevel is constant with frequency so that reducing the band-width reduces the errors caused by noise.Another source of error that is rarely mentioned is the errorvoltage caused by the inadvertent thermocouples createdwhen the common"Kovar type"IC package lead materialsare soldered to a copper printed circuit board.These steel-based leadframe materials can produce over35µV/˚C whensoldered onto a copper trace.This can result in thermo-couple noise that is equal to the LMP201X noise when thereis a temperature difference of only0.0014˚C between thelead and the board!For this reason,the lead-frame of the LMP201X is made ofcopper.This results in equal and opposite junctions whichcancel this effect.The extremely small size of the SOT-23package results in the leads being very close together.Thisfurther reduces the probability of temperature differencesand hence decreases thermal noise.OVERLOAD RECOVERYThe LMP201X recovers from input overload much fasterthan most chopper-stabilized op amps.Recovery from driv-ing the amplifier to2X the full scale output,only requiresabout40ms.Many chopper-stabilized amplifiers will takefrom250ms to several seconds to recover from this sameoverload.This is because large capacitors are used to storethe unadjusted offset voltage.The wide bandwidth of the LMP201X enhances performancewhen it is used as an amplifier to drive loads that injecttransients back into the output.ADCs(Analog-to-Digital Con-verters)and multiplexers are examples of this type of load.To simulate this type of load,a pulse generator producing a1V peak square wave was connected to the output through a10pF capacitor.(Figure1)The typical time for the output torecover to1%of the applied pulse is80ns.To recover to0.1%requires860ns.This rapid recovery is due to the widebandwidth of the output stage and large total GBW.NO EXTERNAL CAPACITORS REQUIREDThe LMP201X does not need external capacitors.This elimi-nates the problems caused by capacitor leakage and dielec-tric absorption,which can cause delays of several secondsfrom turn-on until the amplifier’s error has settled.MORE BENEFITSThe LMP201X offers the benefits mentioned above andmore.It has a rail-to-rail output and consumes only950µA ofsupply current while providing excellent DC and AC electricalperformance.In DC performance,the LMP201X achieves130dB of CMRR,120dB of PSRR and130dB of open loopgain.In AC performance,the LMP201X provides3MHz ofgain-bandwidth product and4V/µs of slew rate.HOW THE LMP201X WORKSThe LMP201X uses new,patented techniques to achieve thehigh DC accuracy traditionally associated with chopper-stabilized amplifiers without the major drawbacks producedby chopping.The LMP201X continuously monitors the inputoffset and corrects this error.The conventional choppingprocess produces many mixing products,both sums anddifferences,between the chopping frequency and the incom-ing signal frequency.This mixing causes large amounts ofdistortion,particularly when the signal frequency approachesthe chopping frequency.Even without an incoming signal,the chopper harmonics mix with each other to produce evenmore trash.If this sounds unlikely or difficult to understand,look at the plot(Figure2),of the output of a typical(MAX432)chopper-stabilized op amp.This is the output when there isno incoming signal,just the amplifier in a gain of-10with theinput grounded.The chopper is operating at about150Hz;the rest is mixing products.Add an input signal and the noisegets much pare this plot with Figure3of theLMP201X.This data was taken under the exact same con-ditions.The auto-zero action is visible at about30kHz butnote the absence of mixing products at other frequencies.Asa result,the LMP201X has very low distortion of0.02%andvery low mixing products.20071516FIGURE1.LMP211Single/LMP212Dual/LMP214Quad10Application Information(Continued)INPUT CURRENTSThe LMP201X’s input currents are different than standard bipolar or CMOS input currents in that it appears as a current flowing in one input and out the other.Under most operating conditions,these currents are in the picoamp level and will have little or no effect in most circuits.These currents tend to increase slightly when the common-mode voltage is near the minus supply.(See the typical curves.)At high temperatures such as85˚C,the input currents become larger,0.5nA typical,and are both positive except when the V CM is near V−.If operation is expected at low common-mode voltages and high temperature,do not add resistance in series with the inputs to balance the impedances.Doing this can cause an increase in offset voltage.A small resistance such as1 kΩcan provide some protection against very large transients or overloads,and will not increase the offset significantly.PRECISION STRAIN-GAUGE AMPLIFIERThis Strain-Gauge amplifier(Figure4)provides high gain (1006or~60dB)with very low offset and ing the resistors’tolerances as shown,the worst case CMRR will be greater than108dB.The CMRR is directly related to the resistor mismatch.The rejection of common-mode error,at the output,is independent of the differential gain,which is set by R3.The CMRR is further improved,if the resistor ratio matching is improved,by specifying tighter-tolerance resis-tors,or by trimming.Extending Supply Voltages and Output Swing by Using a Composite Amplifier Configuration:In cases where substantially higher output swing is required with higher supply voltages,arrangements like the ones shown in Figure5and Figure6could be used.These configurations utilize the excellent DC performance of the LMP201X while at the same time allow the superior voltage and frequency capabilities of the LM6171to set the dynamic performance of the overall amplifier.For example,it is pos-sible to achieve±12V output swing with300MHz of overall GBW(A V=100)while keeping the worst case output shift due to V OS less than4mV.The LMP201X output voltage is kept at about mid-point of its overall supply voltage,and its input common mode voltage range allows the V-terminal to be grounded in one case(Figure5,inverting operation)and tied to a small non-critical negative bias in another(Figure6, non-inverting operation).Higher closed-loop gains are also possible with a corresponding reduction in realizable band-width.Table1shows some other closed loop gain possibili-ties along with the measured performance in each case.20071517 FIGURE2.20071504 FIGURE3.20071518FIGURE4.LMP2011Single/LMP2012Dual/LMP2014Quad11Application Information(Continued)TABLE posite Amplifier Measured PerformanceAV R1ΩR2ΩC2pF BW MHz SR (V/µs)en p-p (mV PP )5020010k 8 3.31783710010010k 10 2.5174701001k 100k 0.67 3.117070500200100k 1.75 1.4962501000100100k2.20.9864400In terms of the measured output peak-to-peak noise,the following relationship holds between output noise voltage,e n p-p,for different closed-loop gain,A V ,settings,where −3dB Bandwidth is BW:It should be kept in mind that in order to minimize the output noise voltage for a given closed-loop gain setting,one could minimize the overall bandwidth.As can be seen from Equa-tion 1above,the output noise has a square-root relationship to the Bandwidth.In the case of the inverting configuration,it is also possible to increase the input impedance of the overall amplifier,by raising the value of R1,without having to increase the feed-back resistor,R2,to impractical values,by utilizing a "Tee"network as feedback.See the LMC6442data sheet (Appli-cation Notes section)for more details on this.20071519FIGURE 5.20071520FIGURE 6.20071521FIGURE 7.L M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 12Application Information(Continued)LMP201X AS ADC INPUT AMPLIFIERThe LMP201X is a great choice for an amplifier stage imme-diately before the input of an ADC (Analog-to-Digital Con-verter),whether AC or DC coupled.See Figure 7and Figure 8.This is because of the following important characteristics:A)Very low offset voltage and offset voltage drift over timeand temperature allow a high closed-loop gain setting without introducing any short-term or long-term errors.For example,when set to a closed-loop gain of 100as the analog input amplifier for a 12-bit A/D converter,the overall conversion error over full operation temperature and 30years life of the part (operating at 50˚C)would be less than 5LSBs.B)Fast large-signal settling time to 0.01%of final value (1.4µs)allows 12bit accuracy at 100KH Z or more sampling rate.C)No flicker (1/f)noise means unsurpassed data accuracyover any measurement period of time,no matter how long.Consider the following op amp performance,based on a typical low-noise,high-performance commercially-available device,for comparison:Op amp flatband noise =8nV/1/f corner frequency =100Hz A V =2000Measurement time =100sec Bandwidth =2HzThis example will result in about 2.2mV PP (1.9LSB)of output noise contribution due to the op amp alone,com-pared to about 594µV PP (less than 0.5LSB)when that op amp is replaced with the LMP201X which has no 1/f contribution.If the measurement time is increased from 100seconds to 1hour,the improvement realized by using the LMP201X would be a factor of about 4.8times (2.86mV PP compared to 596µV when LMP201X is used)mainly because the LMP201X accuracy is not compromised by increasing the observation time.D)Copper leadframe construction minimizes any thermo-couple effects which would degrade low level/high gain data conversion application accuracy (see discussion under "The Benefits of the LMP201X"section above).E)Rail-to-Rail output swing maximizes the ADC dynamicrange in 5-Volt single-supply converter applications.Be-low are some typical block diagrams showing the LMP201X used as an ADC amplifier (Figure 7and Figure 8).20071522FIGURE 8.LMP2011Single/LMP2012Dual/LMP2014Quad13Physical Dimensionsinches (millimeters)unless otherwise noted5-Pin SOT23NS Package Number MF0A58-Pin MSOPNS Package Number MUA08AL M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d 14Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)8-Pin SOICNS Package Number M08A14-Pin TSSOPNS Package Number MTC14LMP2011Single/LMP2012Dual/LMP2014Quad15Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)14-LLPNS Package Number SRC14ANational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.For the most current product information visit us at .LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.BANNED SUBSTANCE COMPLIANCENational Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2)and the Banned Substances and Materials of Interest Specification (CSP-9-111S2)and contain no ‘‘Banned Substances’’as defined in CSP-9-111S2.National Semiconductor Americas Customer Support CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Support CenterEmail:ap.support@National SemiconductorJapan Customer Support Center Fax:81-3-5639-7507Email:jpn.feedback@ Tel:81-3-5639-7560L M P 2011S i n g l e /L M P 2012D u a l /L M P 2014Q u a d H i g h P r e c i s i o n ,R a i l -t o -R a i l O u t p u t O p e r a t i o n a l A m p l i f i e r。
LPCXpresso 用户手册V1.0_cn

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LPCXpresso 用户手册 V1.0
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LPCXpresso 用户手册 V1.0
目标板包括一个小的原型区域和便于扩展的接口。LPCXpresso 开发板的目标板可用于:自身的软件开发 利用板载 MCU,连接到扩展板利用 JTAG 接口,连接到别的用户目标板。 第一个 LPCXpresso 目标板将是基于 LPC1000系列的。
1.5 LPCXpresso 合作伙伴
LPCXpresso 目标板由 NXP、Code Red Technologies、Embedded Artists 共同合作开发。为增加适应性和 更高的存储器配置,LPCXpresso 平台可以很容易地从 Code Red Technologies 获得升级,还可以从 Embedded Artists 获得更多的硬件增强开发包。请访问 LPCXpresso 网站获得更多信息。
操作系统:windows xp windows vista windows7 内 硬 存: 最低512MB 盘:最少225MB 可用空间
显 示 器:最低分辨率1024*768 网络连接:需要高速网络已完成软件下载和注册
NXPLPC111x芯片中文手册―11带SSP的SPI01

up .w hd 1. 如何阅读本章所有 LPC111x 系列中的 SPI 模块均相同。
第二个 SPI 模块, SPI1,只存在于LQFP48和 PLCC44封装上,在 HVQFN33封装上则没有。
注释:两个 SPI 模块都包含全部的 SSP 特征集,所有相关寄存器都使用 SSP 前缀命名。
2. 特性? 兼容 Motorola SPI 、 4线 TI SSI 和美国国家半导体公司的 Microwire 总线。
? 同步串行通信。
? 支持主机和从机操作。
? 收发均有 8帧 FIFO 。
?每帧有 4-16位数据。
3. 基本描述SPI/SSP是一个同步串行端口 (SSP控制器,可控制 SPI 、 4线 SSI 和 Microwire 总线。
它可以与总线上的多个主机和从机相互作用。
在数据传输过程中,总线上只能有一个主机与一个从机进行通信。
原则上数据传输是全双工的, 4~16位帧的数据由主机发送到从机或由从机发送到主机。
但实际上,大多数情况下只有一个方向上的数据流包含有意义的数据。
LPC111x 系列处理器有两个 SPI/同步串行端口控制器。
u d u UM10398Semiconductors LPC1100开发,尽在第 11章 :LPC111x 带有 SSP 的 SPI0/1 4. 引脚描述表 161622. SPI 引脚描述SCK0/1I/OSCK CLK SK 串行时钟。
SCK/CLK/SK是用来同步数据传输的时钟信号。
它由主机驱动,从机接收。
当使用 SPI 接口时,时钟可编程为高电平有效或低电平有效,否则总是高电平有效。
SCK 仅在数据传输过程中切换。
在其它时间里, SPI/SSP接口保持无效状态或不驱动它(使其处于高阻态。
SSEL0/1I/OSSEL FS CS 帧同步 /从机选择。
当 SPI/SSP接口是总线主机时,它在串行数据启动前驱动该信号为有效状态。
在数据发送出去之后又将该信号恢复为无效状态。
DS-LPC11U14使用手册

鼎尚LPC11U14开发板使用手册版本 V1.5(2012/11)苏州鼎尚信息技术有限公司版权所有Copyright© 2012 苏州鼎尚信息技术有限公司Copyright© 2012 Suzhou Dingsung Information Technology Co.,Ltd. All Rights Reserved目录一、概述 (3)二、芯片特性 (3)三、开发板简介 (5)I、使用板载仿真器下载或调试程序 (6)1、板载仿真器介绍 (6)2、确定使用的Keil版本 (6)3、安装CoLinkEx调试软件 (6)4、使用USB连接线连接仿真器与电脑 (7)5、设置“Project/Options/Debug/Coocox Debugger”对话框 (7)6、设置“Project/Options/Utilities/Coocox Debugger”对话框 (8)7、在Keil工程中下载程序 (9)8、在Keil环境中仿真程序 (10)II、使用Flash Magic下载程序到开发板 (12)四、使用例程说明 (13)●1-1-led-blinky (13)●1-2-led-systick (17)●1-3-led-key (19)●2-2-uart-shell (22)●2-3-uart-rs485 (25)●3-1-key-wakeup (27)●4-1-usb-hid (27)●4-2-usb-msc (29)●4-3-usb-cdc (31)●4-4-usb-audio (32)●5-1-IIc (35)●6-1-ssp (35)一、概述苏州鼎尚信息技术有限公司出品的LPC11U14开发板采用NXP ARM Cortex-M0为核心的LPC11U14芯片。
LPC11U14芯片性能卓越、简单易用、功耗低、能显著降低8/16位应用的代码长度,它的价值和易用性比现有的8位/16位微控制器更胜一筹。
LPC11U67_LPC11U68_LPC11U69_LPC11U6X数据手册说明书

32-bit ARM Cortex-M0+ microcontroller; up to 256 kB flash and 36 kB SRAM; 4 kB EEPROM; USB; 12-bit ADC
Rev. 1 — 17 January 2014 Product data sheet
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Power control: Integrated PMU (Power Management Unit) to minimize power consumption. Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and Deep power-down mode. Wake-up from Deep-sleep and Power-down modes on external pin inputs and USART activity. Power-On Reset (POR). Brownout detect. Unique device serial number for identification. Single power supply (2.4 V to 3.6 V). Separate VBAT supply for RTC. Operating temperature range 40 °C to 105 °C. Available as LQFP48, LQFP64, and LQFP100 packages.
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表3 引脚描述
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6. 引脚信息
6.1 引脚
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模拟外设:
o 10位ADC,在8个引脚之间实现输入多路复用
串行接口:
o o USB2.0 全速 Device 控制器 带小数波特率生成器的USART,带有内部FIFO、全Modem控制握手接口,并支持RS485/9-bit模式和同步模式。USART支持异步智能卡接口 (ISO 7816-3) o o 2个SSP控制器,具有FIFO和多协议功能 I2C总线接口支持完整的I2C总线规范和Fast-mode Plus模式,数据速率高达1Mbit/s,具有 多地址识别和监控模式
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4. 订购信息
表1 订购信息
4.1 订购选择
表2 订购选择
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[1] 复位后默认功能的引脚状态:I=输入; O =输出; PU =使能内部上拉; IA =未激活,没有使能上拉或下拉。F = 悬 空; 悬空引脚在未使用时要接地或电源来减少功耗。 [2] 见图31关于复位引脚的配置。在深度掉电模式下RESET引脚是不使能的。使用WAKEUP引脚复位和从深度睡眠 模式中唤醒。深度睡眠模式下,该引脚需要外加一个上拉电阻。 [3] 5V 容差引脚,提供带可配置滞后的上拉/下拉电阻的数字I/O 功能(见图30)。 [4] I2C 总线引脚符合I2C 标准模式和I2C Fast-mode plus 的I2C 总线规格。 [5] 5V 容差引脚。提供带可配置滞后上拉/下拉电阻和模拟输入的数字I/O功能,含高电流输出驱动(见图30)。 [6] 5V电压容忍板使得数字I/O功能有可配置的上拉/下拉电阻,可配置的滞后和模拟输入性能。当作为一个模拟数字 转换器输入时,板上的数字部分就失效,引脚上也不是 5V电压容忍(参见图30);包含数字输入脉冲筛选器。 [7] 这块板提供USB功能,它在设计上兼容USB规范,2.0版本(只适用于全速和低速模式)。不支持5V电压容忍。 [8] 当系统振荡器未被使用时,按如下方式连接XTALIN和XTALOUT:XTALIN可被悬空或接地(为减小干扰推荐接 地)。XTALOUT悬空。
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为了将某个端口引脚配置成表4中的外设功能,需要将端口引脚IOCON寄存器的FUNC位编程 为该功能。用户要保证分配到端口上的功能是明确的。只有JTAG和SWD的调试功能是由对应的 IOCON寄存器默认选择的。所以其他的功能都必须于使用前在IOCON模块中编程。具体见 LPC11U1x用户手册。
表4 外设功能的多重技术
调试选项:
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o o o
标准JTAG测试/调试接口 串行线调试 (SWD, Serial Wire Debug) 边界扫描 (Boundary Scan), 可简化板级测试
数字外设:
o 多达40个通用I/O引脚 (GPIO, General Purpose I/O),带可配置的上拉和下拉电阻,具有中 继模式和漏极开路模式 o o o o o o 多达8个GPIO引脚可用作边沿或电平触发的中断源 2个GPIO中断模块组合使得基于可编程模式的一组GPIO引脚输入状态的中断成为可能 一个引脚 (P0_7) 的最大电流输出驱动能力为20mA 开路漏极引脚 (P0_4 和 P0_5) 上的最大灌电流为 20 mA 4个通用定时器/计数器,共有5个捕获输入和13个匹配输出 可编程的窗口型看门狗定时器 (WWDT, Windowed WatchDog Timer),内置专用的低功耗看 门狗振荡器 (WDO)
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5. 系统框图
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6.2 引脚描述
表3按GPIO端口号显示了所有引脚和所分配的数字和模拟功能。排列在最前面的是芯片复位后 的默认功能。除了真正的漏极开路引脚 PIO0_4和PIO0_5外,其他所有端口引脚都内置了上拉电阻, 它们在芯片复位后被使能。 每个端口引脚都有对应的IOCON寄存器,通过这个寄存器可将引脚配置成数字或模拟功能,上 拉/下拉,中继和漏极开路模式。 USART,定时器/计数器和SSP功能不止在一个端口引脚上可用。 表4显示了外设功能是如何被分配到端口引脚上的。
7. 功能描述
7.1. 存储器映射
LPC1111/12/13/14包含了下图所示的若干不同存储区域。图5展示了复位后从程序入口点开始 整个地址空间的全部映射。其中中断向量区支持地址的重映射。 AHB外设区的大小为 2MB,可分 配多达 128个外设。APB 外设区的大小为512KB,可分配多达 32个外设,任何类型的外设空间的 大小都为 16KB,从而简化了每个外设的地址译码。
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ห้องสมุดไป่ตู้
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时钟产生:
o o o o 晶体振荡器的工作范围为1MHz~25MHz 12MHz内部RC (IRC) 振荡器,可用作系统时钟 内置低功耗,低频看门狗振荡器,输出频率可编程 锁相环 (PLL: Phase-locked loops) 允许CPU无需使用高频晶体也可工作在最大CPU速率。 时钟可以由系统振荡器或内部RC振荡器提供 o o 另有一个专供USB使用的PLL 带分频器的时钟输出功能,可以映到主振荡器时钟、IRC时钟、CPU时钟和看门狗时钟
2. 功能与优点 系统:
o o ARM Cortex-M0 处理器,工作频率最高为 50MHz ARM Cortex-M0 处理器,内置嵌套向量中断控制器 (NVIC) o 非可屏蔽中断 (NMI) 的输入源可选 o 系统节拍定时器 (System tick timer)
存储器:
o o o o 高达32kB片上闪存程序存储器 总共6kB 静态随机访问存储器 SRAM数据存储器(4kB 主SRAM,2kB USB SRAM) 16kB Boot ROM 通过片内Bootloader 软件来实现在系统编程 (ISP) 和在应用编程 (IAP)
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