BZ-2ADT1中文资料
BZ2300X10000重型板式给料机使用说明书
重型板式给料机使用说明书唐山宇辰重型机械有限公司共16页第1页1.用途：重型板式给料机主要用于向破碎机连续均匀的给料。
在使用中不允许卸空物料，不允许大块物料直接冲击负荷链板（输送槽），不允许在负荷链板上进行爆破破拱操作。
2．设备整体布置：参见我公司提供的设备总图。
3．主要技术参数和特点：链板宽度：1400mm 1500 mm 1600 mm 1800 mm2000 mm 2200 mm 2300 mm 2400 mm 头尾轮中心距：5000～20000 mm输送量：150～1500t/h链速：0.05m～0.095m/s(50HZ时)安装倾角：α=0o～25o电机型号：YTP型变频调速电机功率37～90KW变频范围5～50HZ减速机型号：KDAB型硬齿面磨齿减速机，低速轴为空心轴装结构，整个驱动装置通过锁紧盘把给料机主轴与减速机空心轴联结在一起，不需另设驱动基础。
驱动装置：安装可分为左式或右式，可由用户自行选择。
4．工作原理：重型板式给料机是由电机驱动，通过高速轴联轴器、减速器、锁紧盘最终传给主轴装置。
主动链轮带动牵引链条及固定在上面的负荷链板作直线运动，从而达到输送物料的目的。
5．设备的主要结构：本重型板式给料机由驱动装置、主轴装置、机架、上托链辊、承重辊、下托辊、运行机构、尾部张紧装置等主要部件组成。
5.1驱动装置：驱动装置由电机、高速轴联轴器、减速机、锁紧盘、驱动装置底座的组成,见图(1)。
采用变频调速专用电机、硬齿面磨齿减速机。
减速机低速轴为空心轴结构,用锁紧盘把空心轴和给料机主轴联成一体。
5.2主轴装置：主轴装置由主轴、主动链轮及轴承座组成,见图(2)。
5.3机架：机架由型钢和钢板组焊而成。
5.4下托辊：下托辊用于支承回程段的负荷链板。
托辊由轴、压盖、毡封、轴承、辊体、压注油杯等组成,见图(3)。
5.5上托链辊、承重辊：在链板的两侧纵向布置有两排托链辊,支承牵引链条,料仓下部辊子的间距为310 mm ,出仓后间距为400 mm左右,在两排托链辊的中间纵向布置有1～3排承重辊(与链板宽有关)间距与托链辊相同,但与托链辊前后交错布置。
奥德维特说明书
PDA 系列产品的设计、制造、检查、试验及特性都应遵照适合的最新版IEC 和中国GB 标准及国际单位SI 制。
GB/T13730《地区电网数据采集与监控系统通用技术条件》GB/50171-92《电气装置安装工作盘、柜及二次回路接线施工及验收规范》DL/T630《交流采样远动终端通用技术条件》DL/478-92《静态继电保护及安全自动装置通用技术条件》GB/50062-92《电力装置的继电保护和自动装置设计规范》GB/T50063-2008《电力装置的电测量仪表装置设计规范》DL/T587-1996《微机继电保护装置运行管理规程》GB/T13729-2002《远动终端通用技术条件》GB/14285-93《继电保护和安全自动装置技术规程》GB/T17626.12-1998《振荡波抗扰度试验》GB/T17626.11-2008《电压暂降、短时中断和电压变化抗扰度试验》GB/T17626.10-1998《阻尼振荡磁场抗扰度试验》GB/T17626.8-2006《工频磁场的抗扰度试验》GB/T17626.6-2008《射频场感应的传导骚扰抗扰度》GB/T17626.5-2008《浪涌（冲击）抗扰度试验》GB/T17626.4-2008《电快速瞬变脉冲群抗扰度试验》GB/T17626.2-2006《静电放电抗扰度试验》GB/T 14047-1993《量度继电器和保护装置》GB 3836.3-2000《爆炸性气体环境用电气设备 第 3 部 分：增安型"e"》JB/T 10613-2006《数字式电动机综合保护装置》GB/T13850-1998《交流电量转换为模拟量或数字信号的电测量变送器》JJG596-1999《电子式电能表检定规程》GB/T17215.321-2008《静止式有功电能表(1级和2级)》GB/T 22264-2008《安装式数字显示电测量仪表》产品标准Contents 目 录A -01综合电力监控仪PDA-120系列B -13 三相智能型电力仪表 PDA-103系列C -31单相智能型电力仪表 PDA-101系列D -51 智能型电动机保护控制器 PDA-110MRK F -66参考设计图附录产品业绩G -73GB/T17215.322-2008《》静止式有功电能表(0.2S 级和0.5S 级)E -58 低压电动机保护装置 ADVP-1451产品简介功能详表产品特点PDA -120系列综合电力监控仪是北京奥德威特电力科技股份有限公司按IEC 国际标准开发，与当今国际先进技术同步的网络化综合电力监控仪表。
狮岛2011年8月第2版
四 、JB-QG-SD2200数字式智能火灾报警及联动控制系统（柜式机箱） 60cm× 185cm× 40cm（宽× 高× 厚）柜式机箱，10.4吋彩色液晶显示。热敏式打印机、总线产品为电子编码，总线地址混编 1 2 3 4 5 6 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） SD2200-250 SD2200-500 SD2200-750 SD2200-1000 SD2200-1250 SD2200-1500 102000.00 1个I/O子站，1×250点 106000.00 2个I/O子站，2×250点 110000.00 3个I/O子站，3×250点 114000.00 4个I/O子站，4×250点 118000.00 5个I/O子站，5×250点 122000.00 6个I/O子站，6×250点 -2本报价包含：标准机柜、SD7014A （DW）系统电源。 本报价不包含联动子站、键盘子站 、系统备电、联动电源和备电等 本报价包含：标准机柜、SD7014A （DW）系统电源。 本报价不包含联动子站、键盘子站 、联动电源和备电等
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SHIDAO FIRE
产
2007年8月启用
序号 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 产 品 名 称 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 火灾报警控制器（联动型） 型 号 规 格 SD2200-8000 SD2200-8250 SD2200-8500 SD2200-8750 SD2200-9000 SD2200-9250 SD2200-9500 SD2200-9750 SD2200-10000 SD2200-10250 SD2200-10500 SD2200-10750 SD2200-11000 SD2200-11250 SD2200-11500 SD2200-11750 SD2200-12000 SD2200-12250 SD2200-12500 SD2200-12750 SD2200-13000 SD2200-13250 SD2200-13500 SD2200-13750 SD2200-14000
BZT52-B系列单极性电阻芯片在SOD123包装中的稳压电器数据手册说明书
BZT52-B seriesSingle Zener diodes in a SOD123 packageRev. 1 — 20 December 2017Product data sheet1 1 Product profile1.1General descriptionGeneral-purpose Zener diodes in a SOD123 small Surface-Mounted Device (SMD)plastic package.1.2Features and benefits•Total power dissipation: ≤ 590 mW•Wide working voltage range: nominal 2.4 V to 75 V (E24 range)•Small plastic package suitable for surface-mounted design •Low differential resistance •B selection•AEC-Q101 qualified1.3Applications•General regulation functions1.4Quick reference data[1]Pulse test: t p ≤ 300 μs; δ ≤ 0.02.[2]Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.[3]Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for cathode 1 cm 2.Single Zener diodes in a SOD123 package 2Pinning information[1]The marking bar indicates the cathode.3Ordering information[1]The series consists of 37 types with nominal working voltages from 2.4 V to 75 V.4MarkingSingle Zener diodes in a SOD123 package 5Limiting valuesTable 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).[1]t p = 100 μs; square wave; T j = 25 °C prior to surge.[2]Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.[3]Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for cathode 1 cm2.6Thermal characteristics[1]Device mounted on an FR4 Printed-Circuit Board (PCB),single-sided copper, tin-plated and standard footprint.[2]Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for cathode 1 cm2.[3]Soldering point of cathode tab.7CharacteristicsTable 7. CharacteristicsT = 25 °C unless otherwise specified.[1]Pulse test: t p ≤ 300 μs; δ ≤ 0.02.Single Zener diodes in a SOD123 package Table 8. Characteristics per type; BZT52-B2V4 to BZT52-B24= 25 °C unless otherwise specified.T[1] f = 1 MHz; V R = 0 V[2]t p = 100 μs; T amb = 25 °CSingle Zener diodes in a SOD123 packageTable 9. Characteristics per type; BZT52-B27 to BZT52-B51T= 25 °C unless otherwise specified.[1] f = 1 MHz; V R = 0 V[2]t p = 100 μs; T amb = 25 °CTable 10. Characteristics per type; BZT52-B56 to BZT52-B75T = 25 °C unless otherwise specified.[1] f = 1 MHz; V R = 0 V[2]t p = 100 μs; T amb = 25 °CSingle Zener diodes in a SOD123 package8Test information8.1Quality informationThis product has been qualified in accordance with the Automotive Electronics Council(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and issuitable for use in automotive applications.Single Zener diodes in a SOD123 package 9Package outline10SolderingSingle Zener diodes in a SOD123 package 11Revision historySingle Zener diodes in a SOD123 package 12Legal information12.1 Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term 'short data sheet' is explained in section "Definitions".[3]The product status of device(s) described in this document may have changed since this document was published and may differ in case of multipledevices. The latest product status information is available on the Internet at URL .12.2 DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet.12.3 DisclaimersLimited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracyor completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation -lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia's aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia.Right to make changes — Nexperia reserves the right to make changesto information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale — Nexperia products aresold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance orthe grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted tobe suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk.Single Zener diodes in a SOD123 packageQuick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.12.4 TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.Nexperia BZT52-B series Single Zener diodes in a SOD123 packagePlease be aware that important notices concerning this document and the product(s)described herein, have been included in section 'Legal information'.© Nexperia B.V. 2017.All rights reserved.For more information, please visit: Forsalesofficeaddresses,pleasesendanemailto:***************************Date of release: 20 December 2017Document identifier: BZT52-B_SERContents1 1 Product profile .................................................11.1General description ............................................11.2Features and benefits ........................................11.3Applications ........................................................11.4Quick reference data .........................................12Pinning information ............................................23Ordering information ..........................................24Marking .................................................................25Limiting values ....................................................36Thermal characteristics ......................................37Characteristics ....................................................38Test information ..................................................68.1Quality information .............................................69Package outline ...................................................710Soldering ..............................................................711Revision history ..................................................812Legal information (9)Mouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:N experia:BZT52-B11J BZT52-B39X BZT52-B4V7X BZT52-B75J BZT52-B75X BZT52-B7V5X BZT52-B68X BZT52-B6V2X BZT52-B8V2J BZT52-B13J BZT52-B27J BZT52-B3V6J BZT52-B4V3X BZT52-B5V6J BZT52-B9V1J BZT52-B16X BZT52-B18X BZT52-B36X BZT52-B3V3J BZT52-B5V1J BZT52-B7V5J BZT52-B12J BZT52-B2V4J BZT52-B33X BZT52-B47X BZT52-B6V8X BZT52-B10J BZT52-B20X BZT52-B24X BZT52-B3V0X BZT52-B51J BZT52-B56J BZT52-B43J BZT52-B43X BZT52-B68J BZT52-B11X BZT52-B3V3X BZT52-B8V2X BZT52-B6V8J BZT52-B9V1X BZT52-B13X BZT52-B15X BZT52-B2V7J BZT52-B3V9J BZT52-B12X BZT52-B18J BZT52-B27X BZT52-B3V6X BZT52-B4V7J BZT52-B6V2J BZT52-B5V1X BZT52-B2V7X BZT52-B30X BZT52-B3V9X BZT52-B47J BZT52-B62J BZT52-B20J BZT52-B2V4X BZT52-B33J BZT52-B36J BZT52-B4V3J BZT52-B56X BZT52-B22J BZT52-B22X BZT52-B24J BZT52-B39J BZT52-B3V0J BZT52-B51X BZT52-B15J BZT52-B16J BZT52-B30J BZT52-B5V6X BZT52-B62X BZT52-B10X。
S2E01中文资料
S2E01中文资料Dual OutputSingle OutputBlock DiagramMinmax's S2E00 Model 1.5W DC/DC's are specially designed to provide 30mA output ripple, continuous short circuit in a low-profile 24-pin DIP package.The series consists of 18 models with input voltages of 5V, 12V and 15VDC which offers regulated output voltages of 5V, 12V, 15V, {5V, {12V and {15VDC.The -40] to +85] operating temperature range makes it ideal for data communication equipments, mobile battery driven equipments,distributed power systems,telecommunication equipments, mixed analog/digitalsubsystems, automatic test instrumentation and industrial robot systems.y Meets EN60950 and EN60601-1y Low Leakage Currenty Low Isolation Capacitance y Temperature Performance -40]to +85]y Output 5, 12, 15, {5, {12 and {15VDC y Input 5, 12 and 15VDCy 30mV P-P Ripple and Noise y MTBF > 2,000,000 Hours y 8000VDC Isolationy Low CostKey Features1.5W, Ultra-High Isolation DIP, Single & Dual Output DC/DC ConvertersS2E00 SeriesREV:0 2005/04MINMAX175133{50{15S2E1875133{63{12S2E1775133{150{5S2E167513310015S2E157513 312512S2E147520301330300515(13.5 ~ 16.5)S2E1375167{50{15S2E1275167{63{12S2E1175167{150{5S2E 107516710015S2E0975********S2E087525301670300512(10.8 ~ 13.2)S2E0775400{50{15S2E0675400{63{12S2E0575400{150{5S2E 0475********S2E0375********S2E02753050400030055(4.5 ~ 5.5)S2E01% (Typ.)mA (Typ.)mA (Typ.)mA (Typ.)mAmA VDC VDC@Max.Load@******************.Max.EfficiencyReflected Ripple Current Input CurrentOutput CurrentOutput VoltageInput VoltageModel NumberModel Selection GuideFree-Air ConvectionCooling%95---Humidity ]+125-55Storage Temperature ]+95-40CaseOperating Temperature ]+85-40Ambient Operating Temperature Unit Max.Min.Conditions ParameterEnvironmental SpecificationsExceeding the absolute maximum ratings of the unit could cause damage.These are not continuous operating ratings.mW1,000---Internal Power Dissipation]260---Lead Temperature (1.5mm from case for 10 Sec.)VDC 21-0.715VDC Input ModelsVDC 17-0.712VDC Input ModelsVDC 7-0.75VDC Input ModelsInput Surge Voltage( 1000 mS )Unit Max.Min.ParameterNotes :1. Specifications typical at Ta=+25], resistive load,nominal input voltage, rated output current unless otherwise noted.2. Ripple & Noise measurement bandwidth is 0-20MHz.3. All DC/DC converters should be externally fused at the front end for protection.4. Operation under no-load conditions will not damage these modules; however, they may not meet all specifications listed.5. Other input and output voltage may be available,please contact factory.6. Specifications subject to change without notice.Absolute Maximum RatingsS2E00 Series2MINMAX REV:0 2005/04KHz 100---50Switching Frequency pF 1510---100KHz,1VIsolation Capacitance G[------10500VDC Isolation Resistance uA 2------240VAC, 60Hz Leakage Current VDC ------8800Flash Tested for 1 SecondIsolation Voltage T est VDC ------800060 SecondsIsolation Voltage Rated Unit Max.Typ.Min.Conditions ParameterGeneral SpecificationsContinuousOutput Short Circuit%/]{0.02{0.01---Temperature Coefficient %------120Over LoadmV rms 10------Ripple & Noise (20MHz)mV P-P 50------Over Line, Load & Temp.Ripple & Noise (20MHz)mV P-P 4030---Ripple & Noise (20MHz)%{6.0{4.0---Load Regulation(15,{15V Output)%{8.0{6.0---Load Regulation(12,{12V Output)%{12{8.0---Load Regulation({5V Output)%{10{7.0---Io=20% to 100%Load Regulation(5V Output)%{1.5{1.2---For Vin Change of 1% Line Regulation%{2.0{0.5---Dual Output, Balanced LoadsOutput Voltage Balance %{4.0{2.0---Output Voltage Accuracy Unit Max.Typ.Min.ConditionsParameterOutput SpecificationsPi FilterInput FiltermW 1000------Short Circuit Input Power A 0.5------All ModelsReverse Polarity Input Current 16.51513.515V Input Models13.21210.812V Input Models VDC 5.554.55V Input Models Input Voltage RangeUnitMax.Typ.Min.Model ParameterInput SpecificationsK Hours------2000MIL-HDBK-217F @ 25], Ground BenignMTBF# For each outputuF220220220470470470Maximum Capacitive Load Unit {15V #{12V #{5V #15V 12V 5V Models by VoutCapacitive Load250mA Slow - Blow Type250mA Slow - Blow Type1000mA Slow - Blow Type15V Input Models 12V Input Models 5V Input Models Input Fuse Selection GuideS2E00 SeriesREV:0 2005/04MINMAX3S2E00 Series4MINMAX REV:0 2005/04Test ConfigurationsInput Reflected-Ripple Current Test SetupInput reflected-ripple current is measured with a inductor Lin (4.7uH) and Cin (220uF, ESR < 1.0[ at 100 KHz) to simulate source impedance.Capacitor Cin, offsets possible battery impedance.Current ripple is measured at the input terminals of the module, measurement bandwidth is 0-500 KHz.Peak-to-Peak Output Noise Measurement TestUse a Cout 0.33uF ceramic capacitor.Scope measurement should be made by using a BNC socket, measurement bandwidth is 0-20 MHz. Position the load between 50 mm and 75 mm from the DC/DC Converter.Maximum Capacitive LoadThe S2E00 series has limitation of maximum connected capacitance at the output.The power module may be operated in current limiting mode during start-up, affecting the ramp-up and the startup time.For optimum performance we recommend 220uFmaximum capacitive load for each dual outputs and 470u F capacitive load for single outputs.The maximum capacitance can be found in the data sheet.Input Source ImpedanceThe power module should be connected to a low ac-impedance input source. Highly inductive source impedances can affect the stability of the power module.In applications where power is supplied over long lines and output loading is high, it may be necessary to use a capacitor at the input to ensure startup.Capacitor mounted close to the power module helps ensure stability of the unit, it is recommended to use a good quality low Equivalent Series Resistance (ESR < 1.0[ at 100KHz) capacitor of a 2.2uF for the 5V input devices, a 1.0uF for the 12V input devices and a 0.47uF for the 15V devices.Output Ripple ReductionA good quality low ESR 1.5uF capacitor connected as colse as possible to the load is recommended.Thermal ConsiderationsMany conditions affect the thermal performance of the power module, such as orientation, airflow over the module and board spacing. To avoid exceeding the maximumtemperature rating of the components inside the power module, the case temperature must be kept below 95°C.The derating curves are determined from measurements obtained in an experimental apparatus.S2E00 SeriesREV:0 2005/04MINMAX5The S2E00 converter is encapsulated in a low thermal resistance molding compound that has excellent resistance/electrical characteristics over a wide temperature range or in high humidity environments.The encapsulant and unit case are both rated to UL 94V-0 flammability specifications.Leads are tin plated for improved solderability.-Vin-Vin24-Vin -Vin 23UL94V-0:Flammability-Vout No Pin 15Common -Vout 1412g :Weight Common -Vout 13+Vout +Vout 12Non-Conductive Black Plastic :Case Material +Vout +Vout 11+Vin +Vin 2 1.25*0.80*0.40 inches +Vin +Vin 131.8*20.3*10.2 mm :Case Size Dual OutputSingle OutputPin Physical CharacteristicsPin ConnectionsConnecting Pin PatternsTop View ( 2.54 mm / 0.1 inch grids )Mechanical DimensionsS2E00 Series6MINMAX REV:0 2005/04。
BZT52C13
-3.5 0
5
-3.5 0
5
-3.5 0
5
-3.5 0
5
-3.5 0
5
-3.5 0
5
-3.5 0
5
-3.5 0.2
5
-2.7 1.2
5
-2.0 2.5
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0.4 3.7
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1.2 4.5
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2.5 5.3
5
3.2 6.2
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3.8 7.0
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4.5 8.0
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5.4 9.0
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6.0 10.0
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7.0 11.0
5
FEATURES： z Planar Die Construction z 350mW Power Dissipation on Ceramic PCB z General Purpose, Medium Current z Ideally Suited for Automated Assembly Processes z Available in Lead Free Version
【领先的片式无源器件整合供应商—南京南山半导体有限公司】
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOD-123 Plastic-Encapsulate Diodes
BZT52C2V4-BZT52C43 ZENER DIODE
Typical Characteristics
BZT52C13
FORWARD CURRENT I (mA) F
100
30 10
3 1
0.3 0.1
0.4
Forward Characteristics
手持式交流平板砂光机-2023最新标准
手持式交流平板砂光机1范围本文件规定了手持式交流平板砂光机的术语和定义、基本参数、技术要求、试验方法、检验规则、标志、包装、运输与贮存。
本文件适用于一般环境条件下，由单相串励电动机驱动偏心机构，使旋转运动变为摆动，并在平板上装有刚玉或其他磨料的砂纸(或砂布)对木材、金属材料等表面进行砂磨的手持式电动摆动式平板砂光机(以下简称砂光机)。
本文件不适用于单相异步鼠笼型电动机驱动的摆动式平板砂光机、电池供电的砂光机。
2规范性引用文件下列文件中的内容通过文中的规范性引用而构成本文件必不可少的条款。
其中，注日期的引用文件，仅该日期对应的版本适用于本文件；不注日期的引用文件，其最新版本（包括所有的修改单）适用于本文件。
GB/T 191包装储运图示标志(ISO 780：1997，MOD)GB/T 1002家用和类似用途单相插头插座型式、基本参数和尺寸GB/T 2099.1家用和类似用途单相插头插座第1部分：通用要求（GB/T 2099.1—2008IEC 60884-1：2006，E3.1MOD）GB/T 2900.28电工名词术语电动工具GB/T 4208-2017外壳防护等级GB/T 3883.1-2014手持式、可移式电动工具和园林工具的安全第1部分：通用要求GB/T 3883.204-2019手持式、可移式电动工具和园林工具的安全第204部分：手持式非盘式砂光机和抛光机的专用要求（IP代码）（IEC 60529：2013，IDT）GB 4343.1家用电器、电动工具和类似器具的电磁兼容要求第1部分：发射GB/T 5013.4-2008额定电压450/750V 及以下橡皮绝缘电缆第4部分：软线和软电缆(IEC 60245-4：2004，IDT)GB/T 5023.5-2008额定电压450/750V及以下聚氯乙烯绝缘电缆第5部分：软电缆（软线）（IEC 60227-5：2003，IDT）GB 17625.1电磁兼容限值谐波电流发射限值(设备每相输入电流≤16A)GB/T 17625.2电磁兼容限值对每相额定电流≤16A且无条件接入的设备在公用低压供电系统中产生的电压变化、电压波动和闪烁的限制SJ/T 11364-2014电子电气产品有害物质限制使用标识要求3术语和定义GB/T 2900.28、GB/T 3883.1-2014界定的以及下列术语和定义适用于本文件。
AD7612BCPZ资料
16-Bit, 750 kSPS, Unipolar/BipolarProgrammable Input PulSAR® ADCAD7612 Rev. 0Information furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.FEATURESMultiple pins/software programmable input ranges:5 V, 10 V, ±5 V, ±10 VPins or serial SPI®-compatible input ranges/mode selection Throughput750 kSPS (warp mode)600 kSPS (normal mode)500 kSPS (impulse mode)INL: ±0.75 LSB typical, ±1.5 LSB maximum (±23 ppm of FSR) 16-bit resolution with no missing codesSNR: 92 minimum (5 V) @ 2 kHz, 94 dB typical (±10 V) @ 2 kHz THD: −107 dB typicali CMOS™ process technology5 V internal reference: typical drift 3 ppm/°C; TEMP output No pipeline delay (SAR architecture)Parallel (16- or 8-bit bus) and serial 5 V/3.3 V interfaceSPI-/QSPI™-/MICROWIRE™-/DSP-compatiblePower dissipation: 190 mW @ 750 kSPSPb-free, 48-lead LQFP and LFCSP (7 mm × 7 mm) packages APPLICATIONSProcess controlMedical instrumentsHigh speed data acquisitionDigital signal processingInstrumentationSpectrum analysisATEGENERAL DESCRIPTIONThe AD7612 is a 16-bit charge redistribution successive approximation register (SAR), architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s i CMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7612 contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the analog input on IN+ with respect to a ground sense, IN−. The AD7612 features four different analog input ranges and three different sampling modes: warp mode for the fastest throughput, normal mode for the fastest asynchronous throughput, and impulse mode where power consumption is scaled linearly with throughput. Operation is specified from−40°C to +85°C.FUNCTIONAL BLOCK DIAGRAM6265-1WARP IMPULSE BIPOLAR TENFigure 1.Table 1. 48-Lead 14-/16-/18-Bit PulSAR SelectionType100 kSPS to250 kSPS500 kSPS to570 kSPS800 kSPS to1000 kSPS>1000kSPS PseudoDifferentialAD7651AD7660AD7661AD7650AD7652AD7664AD7666AD7653AD7667True Bipolar AD7663AD7665AD7612AD7671TrueDifferentialAD7675AD7676AD7677AD7621AD7622AD7623 18-Bit, TrueDifferentialAD7678AD7679AD7674AD7641AD7643 Multichannel/SimultaneousAD7654AD7655PRODUCT HIGHLIGHTS1.Programmable input range and mode selection.Pins or serial port for selecting input range/mode select. 2.Fast throughput.In warp mode, the AD7612 is 750 kSPS.3.Superior Linearity.No missing 16-bit code. ±1.5 LSB max INL.4.Internal Reference.5 V internal reference with a typical drift of ±3 ppm/°Cand an on-chip temperature sensor.5.Serial or Parallel Interface.Versatile parallel (16- or 8-bit bus) or 2-wire serial interface arrangement compatible with 3.3 V or 5 V logic.AD7612Rev. 0 | Page 2 of 32TABLE OF CONTENTSFeatures..............................................................................................1 Applications.......................................................................................1 General Description.........................................................................1 Functional Block Diagram..............................................................1 Product Highlights...........................................................................1 Revision History...............................................................................2 Specifications.....................................................................................3 Timing Specifications..................................................................5 Absolute Maximum Ratings............................................................7 ESD Caution..................................................................................7 Pin Configuration and Function Descriptions.............................8 Typical Performance Characteristics...........................................12 Terminology....................................................................................16 Theory of Operation......................................................................17 Overview......................................................................................17 Converter Operation..................................................................17 Modes of Operation...................................................................18 Transfer Functions......................................................................18 Typical Connection Diagram...................................................19 Analog Inputs.............................................................................20 Driver Amplifier Choice...........................................................21 Voltage Reference Input/Output..............................................21 Power Supplies............................................................................22 Conversion Control...................................................................23 Interfaces..........................................................................................24 Digital Interface..........................................................................24 Parallel Interface.........................................................................24 Serial Interface............................................................................25 Master Serial Interface...............................................................25 Slave Serial Interface..................................................................27 Hardware Configuration...........................................................29 Software Configuration.............................................................29 Microprocessor Interfacing.......................................................30 Application Information................................................................31 Layout Guidelines.......................................................................31 Evaluating Performance............................................................31 Outline Dimensions.......................................................................32 Ordering Guide.. (32)REVISION HISTORY10/06—Revision 0: Initial VersionAD7612Rev. 0 | Page 3 of 32SPECIFICATIONSAVDD = DVDD = 5 V; OVDD = 2.7 V to 5.5 V; VCC = 15 V; VEE = −15 V; V REF = 5 V; all specifications T MIN to T MAX , unless otherwise noted. Table 2.Parameter Conditions/Comments Min Typ Max Unit RESOLUTION 16 Bits ANALOG INPUT Voltage Range, V IN V IN+ − V IN− = 0 V to 5 V −0.1 +5.1 V V IN+ − V IN− = 0V to 10 V −0.1 +10.1 V V IN+ − V IN− = ±5 V −5.1 +5.1 V V IN+ − V IN− = ±10 V −10.1 +10.1 V V IN− to AGND −0.1 +0.1 V Analog Input CMRR f IN = 100 kHz 75 dBInput Current V IN = ±5 V, ±10 V @ 750 kSPS 2201μA Input Impedance See Analog Inputs section THROUGHPUT SPEED Complete Cycle In warp mode 1.33 μsThroughput Rate In warp mode 1 7502kSPS Time Between Conversions In warp mode 1 ms Complete Cycle In normal mode 1.67 μs Throughput Rate In normal mode 0 600 kSPS Complete Cycle In impulse mode 2 μs Throughput Rate In impulse mode 0 500 kSPS DC ACCURACYIntegral Linearity Error 3−1.5 ±0.75 +1.5 LSB 4No Missing Codes 3 16 BitsDifferential Linearity Error 3−1 +1.5 LSB Transition Noise 0.55 LSB Zero Error (Unipolar or Bipolar) −35 +35 LSB Zero Error Temperature Drift ±1 ppm/°C Bipolar Full-Scale Error −50 +50 LSB Unipolar Full-Scale Error −70 +70 LSB Full-Scale Error Temperature Drift ±1 ppm/°C Power Supply Sensitivity AVDD = 5 V ± 5% 3 LSB AC ACCURACY Dynamic Range V IN = 0 V to 5 V, f IN = 2 kHz, −60 dB 92.5 93.5 dB 5 V IN = 0 V to 10 V, ±5 V, f IN = 2 kHz, −60 dB 94 dB V IN = ±10 V, f IN = 2 kHz, −60 dB 94.5 dB Signal-to-Noise Ratio V IN = 0 V to 5 V, 0 V to 10 V, f IN = 2 kHz 92 93 dB V IN = ±5 V, ±10 V, f IN = 2 kHz 94 dB Signal-to-(Noise + Distortion) (SINAD) V IN = ±5 V, f IN = 2 kHz 92.5 dB V IN = 0 V to 10 V, ±5 V, f IN = 2 kHz 93 dB V IN = ±10 V, f IN = 2 kHz 93.5 dB Total Harmonic Distortion f IN = 2 kHz −107 dB Spurious-Free Dynamic Range f IN = 2 kHz 107 dB –3 dB Input Bandwidth V IN = 0 V to 5 V 45 MHz Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-scale step 500 ns INTERNAL REFERENCE PDREF = PDBUF = low Output Voltage REF @ 25°C 4.965 5.000 5.035 V Temperature Drift –40°C to +85°C ±3 ppm/°C Line Regulation AVDD = 5 V ± 5% ±15 ppm/V Long-Term Drift 1000 hours 50 ppm Turn-On Settling Time C REF = 22 μF 10 msAD7612Rev. 0 | Page 4 of 32Parameter Conditions/Comments Min Typ Max Unit REFERENCE BUFFER PDREF = high REFBUFIN Input Voltage Range 2.4 2.5 2.6 V EXTERNAL REFERENCE PDREF = PDBUF = high Voltage Range REF 4.75 5 AVDD + 0.1 V Current Drain 750 kSPS throughput 250 μA TEMPERATURE PIN Voltage Output @ 25°C 311 mV Temperature Sensitivity 1 mV/°C Output Resistance 4.33 kΩ DIGITAL INPUTS Logic Levels V IL −0.3 +0.6 V V IH 2.1 OVDD + 0.3 V I IL −1 +1 μA I IH −1 +1 μA DIGITAL OUTPUTS Data Format Parallel or serial 16-bitPipeline Delay 6V OL I SINK = 500 μA 0.4 V V OH I SOURCE = –500 μA OVDD − 0.6 V POWER SUPPLIES Specified PerformanceAVDD 4.7575 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.25 V VCC 7 15 15.75 V VEE −15.75 −15 0 VOperating Current 8, 9@ 750 kSPS throughput AVDD With Internal Reference 19.5 mA With Internal Reference Disabled 18 mA DVDD 6.5 mA OVDD 0.5 mA VCC VCC = 15 V, with internal reference buffer 3 mA VCC = 15 V 2.3 mA VEE VEE = −15 V 2 mA Power Dissipation @ 750 kSPS throughput With Internal Reference PDREF = PDBUF = low 205 230 mW With Internal Reference Disabled PDREF = PDBUF = high 190 210 mWIn Power-Down Mode 10PD = high 10 μWTEMPERATURE RANGE 11Specified Performance T MIN to T MAX −40 +85 °C1 With V IN = 0 V to 5 V or 0 V to 10 V ranges, the input current is typically 70 μA. In all input ranges, the input current scales with throughput. See the Analog Inputs section.2All specified performance is guaranteed up to 750 kSPS throughout, however throughputs up to 900 kSPS can be used with some linearity performance degradation. 3Linearity is tested using endpoints, not best fit. All linearity is tested with an external 5 V reference. 4LSB means least significant bit. All specifications in LSB do not include the error contributed by the reference. 5All specifications in decibels are referred to a full-scale range input, FSR. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified. 6Conversion results are available immediately after completed conversion. 74.75 V or V REF – 0.1 V, whichever is larger. 8Tested in parallel reading mode. 9With internal reference, PDREF = PDBUF = low; with internal reference disabled, PDREF = PDBUF = high. With internal reference buffer, PDBUF = low. 10With all digital inputs forced to OVDD. 11Consult sales for extended temperature range.AD7612TIMING SPECIFICATIONSAVDD = DVDD = 5 V; OVDD = 2.7 V to 5.5 V; VCC = 15 V; VEE = −15 V; V REF = 5 V; all specifications T MIN to T MAX, unless otherwise noted.Rev. 0 | Page 5 of 32AD7612Rev. 0 | Page 6 of 32Parameter Symbol Min Typ Max UnitSLAVE SERIAL/SERIAL CONFIGURATION INTERFACE MODES 2 (See Figure 42, Figure 43, and Figure 45)External SDCLK, SCCLK Setup Time t 31 5 ns External SDCLK Active Edge to SDOUT Delay t 32 2 18 ns SDIN/SCIN Setup Time t 33 5 ns SDIN/SCIN Hold Time t 34 5 ns External SDCLK/SCCLK Period t 35 25 ns External SDCLK/SCCLK High t 36 10 ns External SDCLK/SCCLK Low t 37 10 ns1 In warp mode only, the time between conversions is 1 ms; otherwise, there is no required maximum time.2In serial interface modes, the SDSYNC, SDSCLK, and SDOUT timings are defined with a maximum load C L of 10 pF; otherwise, the load is 60 pF maximum. 3In serial master read during convert mode. See Table 4 for serial master read after convert mode.Table 4. Serial Clock Timings in Master Read After Convert ModeDIVSCLK[1] 0 0 1 1DIVSCL K [0]Symbol 0 1 0 1 Unit SYNC to SDCLK First Edge Delay Minimum t 18 3 20 20 20 ns Internal SDCLK Period Minimum t 19 30 60 120 240 ns Internal SDCLK Period Maximum t 19 45 90 180 360 ns Internal SDCLK High Minimum t 20 15 30 60 120ns Internal SDCLK Low Minimum t 21 10 25 55 115 ns SDOUT Valid Setup Time Minimum t 22 4 20 20 20 ns SDOUT Valid Hold Time Minimumt 23 58 35 90 ns SDCLK Last Edge to SYNC Delay Minimum t 24 5 7 35 90 ns BUSY High Width Maximum t 28 Warp Mode 1.65 2.35 3.75 6.53 μs Normal Mode 1.9 2.6 4.00 6.78 μs Impulse Mode2.15 2.85 4.25 7.03 μsNOTES1. IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND SDOUT ARE DEFINED WITH A MAXIMUM LOADC L OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.1.4VTO OUTPUTPIN06265-002Figure 2. Load Circuit for Digital Interface Timing, SDOUT, SYNC, and SCLK Outputs, C L = 10 pF06265-003Figure 3. Voltage Reference Levels for TimingAD7612Rev. 0 | Page 7 of 32ABSOLUTE MAXIMUM RATINGSTable 5.Parameter Rating Analog Inputs/Outputs IN+1, IN−1 to AGND VEE − 0.3 V to VCC + 0.3 V REF, REFBUFIN, TEMP , REFGND to AGNDAVDD + 0.3 V toAGND − 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages AVDD, DVDD, OVDD −0.3 V to +7 V AVDD to DVDD, AVDD to OVDD ±7 V DVDD to OVDD ±7 V VCC to AGND, DGND –0.3 V to +16.5 VEE to GND +0.3 V to −16.5 Digital Inputs −0.3 V to OVDD + 0 .3 V PDREF, PDBUF 2 ±20 mAInternal Power Dissipation 3700 mW Internal Power Dissipation 4 2.5 W Junction Temperature 125°C Storage Temperature Range −65°C to +125°CStresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ESD CAUTION1See the Analog Inputs section. 2See the Voltage Reference Input section. 3Specification is for the device in free air: 48-Lead LFQP; θJA = 91°C/W, θJC = 30°C/W. 4Specification is for the device in free air: 48-Lead LFCSP; θJA = 26°C/W.AD7612Rev. 0 | Page 8 of 32PIN CONFIGURATION AND FUNCTION DESCRIPTIONSD B U FD RE FE F B U F I NE M PV D D I N +G N DE EC C I N –E F G N DE FD 4/E X T /I N TD 5/I N V S Y N CD 6/I N V S C L KD 7/R D C /S D I NO G N DO V D DD V D DD G N DD 8/S D O U TD 9/S D C L KD 10/S Y N CD 11/RD E R R O RAGND AVDD AGNDBYTESWAP OB/2C SER/PAR D0D1D2/DIVSCLK[0]D3/DIVSCLK[1]IMPULSE WARPBIPOLAR CNVST PD RESET CS RD TEN BUSY D15/SCCS D14/SCCLK D13/SCIN D12/HW/SW06265-004Figure 4. Pin ConfigurationHH HAD7612Rev. 0 | Page 9 of 32AD7612Rev. 0 | Page 10 of 32AD7612Pin No. Mnemonic Type1 Description43 IN+ AI Analog Input. Referenced to IN−.45 TEMP AO Temperature Sensor Analog Output.46 REFBUFIN AI Reference Buffer Input. When using an external reference with the internal reference buffer (PDBUF =low, PDREF = high), applying 2.5 V on this pin produces 5 V on the REF pin. See the Voltage ReferenceInput section.47 PDREF DI Internal Reference Power-Down Input.When low, the internal reference is enabled.When high, the internal reference is powered down, and an external reference must be used.48 PDBUF DI Internal Reference Buffer Power-Down Input.When low, the buffer is enabled (must be low when using internal reference).When high, the buffer is powered-down.1 AI = analog input; AI/O = bidirectional analog; AO = analog output; DI = digital input; DI/O = bidirectional digital; DO = digital output; P = power.2In serial configuration mode (SER/PAR = high, HW/SW = low), this input is programmed with the serial configuration register and this pin is a don’t care. See the Hardware Configuration section and Software Configuration section.AD7612TYPICAL PERFORMANCE CHARACTERISTICSAVDD = DVDD = 5 V; OVDD = 5 V; VCC = 15 V; VEE = −15 V; V REF = 5 V; T A = 25°C.065536CODEI N L (L S B )16384327684915206265-005Figure 5. Integral Nonlinearity vs. Code1800–1.01.0INL DISTRIBUTION (LSB)N U M B E R O F U N I T S16014012010080604020–0.8–0.6–0.4–0.200.20.40.60.806265-006Figure 6. Integral Nonlinearity Distribution (239 Devices)200k 20k7FFE 8006CODE IN HEXC O U N T S40k 60k 80k 100k 120k140k160k 180k 7FFF80008001800280038004800506265-007Figure 7. Histogram of 261,120 Conversions of a DC Inputat the Code Center 1.5–1.0065536CODED N L (L S B )0.51638432768491521.0–0.506265-008Figure 8. Differential Nonlinearity vs. Code1800–1.01.0DNL DISTRIBUTION (LSB)N U M B E R O F U N I T S16014012010080604020–0.8–0.6–0.4–0.200.20.40.60.806265-009Figure 9. Differential Nonlinearity Distribution (239 Devices)140k7FFE 80078006CODE IN HEXC O U N T S40k 60k 80k 100k7FFF 80008001800280038004800520k 120k 06265-010Figure 10. Histogram of 261,120 Conversions of a DC Inputat the Code TransitionAD76120–1800375FREQUENCY (kHz)A M P L I T U D E (dB o f F u l l S c a l e)–20–40–60–80–100–120–140–16012525006265-011Figure 11. FFT 20 kHz96801100FREQUENCY (kHz)S N R , S I N A D (d B )14.414.614.815.015.215.415.615.816.0E N O B (B i t s )SNR SINAD ENOB949290888684821006265-012Figure 12. SNR, SINAD, and ENOB vs. Frequency9690–55125TEMPERATURE (°C)S N R (d B )–35–15525456585105959493929106265-013Figure 13. SNR vs. Temperature95.093.0–60INPUT LEVEL (dB)S N R , S I N A D (d B )94.594.093.5–50–40–30–20–1006265-014Figure 14. SNR and SINAD vs. Input Level (Referred to Full Scale)–70–1301100FREQUENCY (kHz)T H D , H A R M O N I C S (d B )10–80–90–100–110–1202030405060708090100110120S F D R (d B )06265-015Figure 15. THD, Harmonics, and SFDR vs. Frequency9690–55125TEMPERATURE (°C)S I N A D (d B )–35–15525456585105959493929106265-016Figure 16. SINAD vs. TemperatureAD7612–96–120–55125TEMPERATURE (°C)T H D (d B )–35–15525456585105–98–100–102–104–106–108–110–112–114–116–11806265-017Figure 17. THD vs. Temperature5–5–55125TEMPERATURE (°C)Z E R O E R R O R , F U L L S C A L E E R R O R (L S B )–35–1552545658510543210–1–2–3–406265-018Figure 18. Zero Error, Positive and Negative Full Scale vs. Temperature6008REFERENCE DRIFT (ppm/°C)N U M B E R O F U N I T S5040302010123456706265-019Figure 19. Reference Voltage Temperature Coefficient Distribution (247 Devices) 124106–55125TEMPERATURE (°C)S F D R (d B )–35–1552545658510512212011811611411211010806265-020Figure 20. SFDR vs. Temperature (Excludes Harmonics)5.0024.995–55125TEMPERATURE (°C)V R E F (V )–35–155254565851055.0015.0004.9994.9984.9974.99606265-021Figure 21. Typical Reference Voltage Output vs. Temperature (3 Devices)1000000.001101000000SAMPLING RATE (SPS)O P E R A T I N G C U R R E N T S (µA )1001000100001000000.010.111010010001000006265-022Figure 22. Operating Currents vs. Sample RateAD76127000–55105TEMPERATURE (°C)P O W E R -D O W N O P E R A T I N G C U R R E N T S (n A )600500400300200100–35–155********06265-023Figure 23. Power-Down Operating Currents vs. Temperature 05101520253035404550050100150200C L (pF)t 12D E L A Y (n s )06265-024Figure 24. Typical Delay vs. Load Capacitance C LAD7612TERMINOLOGYLeast Significant Bit (LSB)The least significant bit, or LSB, is the smallest increment that can be represented by a converter. For an analog-to-digital con-verter with N bits of resolution, the LSB expressed in volts isNINp-p V V LSB 2)(=Integral Nonlinearity Error (INL)Linearity error refers to the deviation of each individual code from a line drawn from negative full-scale through positive full-scale. The point used as negative full-scale occurs a ½ LSB before the first code transition. Positive full-scale is defined as a level 1½ LSBs beyond the last code transition. The deviation is meas-ured from the middle of each code to the true straight line. Differential Nonlinearity Error (DNL)In an ideal ADC, code transitions are 1 LSB apart. Differential nonlinearity is the maximum deviation from this ideal value. It is often specified in terms of resolution for which no missing codes are guaranteed.Bipolar Zero ErrorThe difference between the ideal midscale input voltage (0 V) and the actual voltage producing the midscale output code. Unipolar Offset ErrorThe first transition should occur at a level ½ LSB above analog ground. The unipolar offset error is the deviation of the actual transition from that point.Full-Scale ErrorThe last transition (from 111…10 to 111…11) should occur for an analog voltage 1½ LSB below the nominal full-scale. The full-scale error is the deviation in LSB (or % of full-scale range) of the actual level of the last transition from the ideal level and includes the effect of the offset error. Closely related is the gain error (also in LSB or % of full-scale range), which does not include the effects of the offset error.Dynamic RangeDynamic range is the ratio of the rms value of the full-scale to the rms noise measured for an input typically at −60 dB. The value for dynamic range is expressed in decibels.Signal-to-Noise Ratio (SNR)SNR is the ratio of the rms value of the actual input signal to the rms sum of all other spectral components below the Nyquist frequency, excluding harmonics and dc. The value for SNR is expressed in decibels.Total Harmonic Distortion (THD)THD is the ratio of the rms sum of the first five harmonic components to the rms value of a full-scale input signal and is expressed in decibels.Signal-to-(Noise + Distortion) Ratio (SINAD)SINAD is the ratio of the rms value of the actual input signal to the rms sum of all other spectral components below the Nyquist frequency, including harmonics but excluding dc. The value for SINAD is expressed in decibels.Spurious-Free Dynamic Range (SFDR)The difference, in decibels (dB), between the rms amplitude of the input signal and the peak spurious signal.Effective Number of Bits (ENOB)ENOB is a measurement of the resolution with a sine wave input. It is related to SINAD and is expressed in bits byENOB = [(SINAD dB − 1.76)/6.02]Aperture DelayAperture delay is a measure of the acquisition performance measured from the falling edge of the CNVST input to when the input signal is held for a conversion.Transient ResponseThe time required for the AD7612 to achieve its rated accuracy after a full-scale step function is applied to its input.Reference Voltage Temperature CoefficientReference voltage temperature coefficient is derived from the typical shift of output voltage at 25°C on a sample of parts at the maximum and minimum reference output voltage (V REF ) meas-ured at T MIN , T(25°C), and T MAX . It is expressed in ppm/°C as610C 25((C ppm/××°=°)T –T ()(V )Min V –)Max V )(TCV MIN MAX REF REF REF REFwhere:V REF (Max ) = maximum V REF at T MIN , T(25°C), or T MAX . V REF (Min ) = minimum V REF at T MIN , T(25°C), or T MAX . V REF (25°C ) = V REF at 25°C. T MAX = +85°C. T MIN = –40°C.AD7612THEORY OF OPERATIONREF REFGND06265-025Figure 25. ADC Simplified SchematicOVERVIEWThe AD7612 is a very fast, low power, precise, 16-bit analog-to-digital converter (ADC) using successive approximation capacitive digital-to-analog (CDAC) architecture.The AD7612 can be configured at any time for one of four input ranges and conversion mode with inputs in parallel and serial hardware modes or by a dedicated write only, SPI-compatible interface via a configuration register in serial software mode. The AD7612 uses Analog Device’s patented i CMOS high voltage process to accommodate 0 to 5 V , 0 to 10 V , ±5 V , and ±10 V input ranges without the use of conventional thin films. Only one acquisition cycle, t 8, is required for the inputs to latch to the correct configuration. Resetting or power cycling is not required for reconfiguring the ADC.The AD7612 features different modes to optimize performance according to the applications. It is capable of converting 750,000 samples per second (750 kSPS) in warp mode, 600 kSPS in normal mode, and 500 kSPS in impulse mode.The AD7612 provides the user with an on-chip track-and-hold, successive approximation ADC that does not exhibit any pipe- line or latency, making it ideal for multiple multiplexed channel applications.For unipolar input ranges, the AD7612 typically requires three supplies; VCC, AVDD (which can supply DVDD), and OVDD which can be interfaced to either 5 V , 3.3 V , or 2.5 V digital logic. For bipolar input ranges, the AD7612 requires the use of the additional VEE supply.The device is housed in Pb-free, 48-lead LQFP or tiny LFCSP 7 mm × 7 mm packages that combine space savings with flexi-bility. In addition, the AD7612 can be configured as either a parallel or serial SPI-compatible interface.CONVERTER OPERATIONThe AD7612 is a successive approximation ADC based on a charge redistribution DAC. Figure 25 shows the simplified schematic of the ADC. The CDAC consists of two identical arrays of 16 binary weighted capacitors, which are connected to the two comparator inputs.During the acquisition phase, terminals of the array tied to the comparator’s input are connected to AGND via SW+ and SW−. All independent switches are connected to the analog inputs. Thus, the capacitor arrays are used as sampling capacitors and acquire the analog signal on IN+ and IN− inputs. A conversion phase is initiated once the acquisition phase is complete and the CNVST input goes low. When the conversion phase begins, SW+ and SW− are opened first. The two capacitor arrays are then disconnected from the inputs and connected to the REFGND input. Therefore, the differential voltage between the inputs (IN+ and IN−) captured at the end of the acquisition phase is applied to the comparator inputs, causing the comparator to become unbalanced. By switching each element of the capacitor array between REFGND and REF, the comparator input varies by binary weighted voltage steps (V REF /2, V REF /4 through V REF / 65536). The control logic toggles these switches, starting with the MSB first, in order to bring the comparator back into a balanced condition.After the completion of this process, the control logic generates the ADC output code and brings the BUSY output low.。