面向高速应用的10位2GHz数模转换器_英文_
Partner）指定授权代理
深圳市英锐恩科技有限公司（）(Microchip Authorized Design Partner)指定授权代理Add： Room 1203-1205 Top office,Glittery City,No. 3027,Shennan Road Central,Futian , Shenzhen City电话(tel) ：86-755-88845951,82543411传真(fax) ：86-755-82543511Web: ,"o"为字母.E-mail：*******************************联系人：马先生,王小姐公司在线咨询：QQ:27781279MSN:******************7x24小时在线产品咨询: 135******** 137********dsPIC30F6011A/6012A/6013A/6014A数据手册高性能数字信号控制器 2006 Microchip Technology Inc.初稿DS70143B_CNDS70143B_CN 第ii 页初稿2006 Microchip Technology Inc.提供本文档的中文版本仅为了便于理解。
请勿忽视文档中包含的英文部分，因为其中提供了有关Microchip 产品性能和使用情况的有用信息。
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DDS原理及AD9851电路设计、测试
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（3）频率分辨率极高 若时钟 Fi 的频率不变，DDS 的频率分辨率就由相位累加器的位数 N 决定。只要增加
相位累加器的位数Ｎ即可获得任意小的频率分辨率。目前，大多数 DDS 的分辨率在 1Hz 数量级，许多小于 1mHz 甚至更小。 （4）相位变化连续
四．DDS 频率合成的特点
（1）输出频率相对带宽较宽 输出频率带宽为 50％Fi（理论值）。但考虑到低通滤波器的特性和设计难度以及对输 出信号杂散的抑制，实际的输出频率带宽仍能达到 40％Fi。 （2）频率转换时间短 DDS 是一个开环系统，无任何反馈环节，这种结构使得 DDS 的频率转换时间极短。 事实上，在 DDS 的频率控制字改变之后，需经过一个时钟周期之后按照新的相位增量累 加，才能实现频率的转换。因此，频率转换的时间等于频率控制字的传输时间，也就是 一个时钟周期的时间。时钟频率越高，转换时间越短。DDS 的频率转换时间可达纳秒数 量级，比使用其它的频率合成方法都要短数个数量级。
相位累加器 U3 由Ｎ位加法器与Ｎ位累加寄存器级联构成。每来一个时钟脉冲 F0，加 法器将频率控制字 M 与累加寄存器输出的累加相位数据相加，把相加后的结果送至累加 寄存器的数据输入端。累加寄存器将加法器在上一个时钟脉冲作用后所产生的新相位数 据反馈到加法器的输入端，以使加法器在下一个时钟脉冲的作用下继续与频率控制字相 加。此过程的伪代码表述如下：
电平状态（逻辑关系）如下表:
ROM 地址总线 B3-B0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
ROM 地址选通线 A0-A15
技能认证PTN专业考试(习题卷3)
技能认证PTN专业考试(习题卷3)第1部分：单项选择题，共67题，每题只有一个正确答案,多选或少选均不得分。
1.[单选题]IPRAN产品XGE（10km）光模块指标中发送光功率、过载光功率、接收灵敏度分别是（）A)-6～-1，-1，-14B)-1～2，-0，-17C)0～4，-7，-24答案:A解析:2.[单选题]以下关于PTN时间同步说法正确的是A)采用物理层同步以太网实现时间相位的同步B)建议采用TC模式来实现时间同步，该模式不会引入误差累积C)本地时钟通过BMC算法来决策最优时钟D)1588V2时钟相比于GPS最大的优势是精确度更高答案:C解析:3.[单选题]610A设备与异厂家对接需配置什么才能正常监控A)NNIB)IPC)MACD)overlay答案:D解析:4.[单选题]电缆的弯曲半径应≥电缆直径的（ ）倍A)1~5B)5~10C)10~15D)15~20答案:B解析:5.[单选题]五星网络结构长支链要求低于A)0.05B)0.08C)0.1D)0.15答案:A解析:6.[单选题]PW冗余保护属于（）A)网内1+1保护解析:7.[单选题]MPLS可以使用多种标签分发协议，其中不包括（ ）A)OSPFB)RSVPC)LDPD)MP-BGP答案:A解析:8.[单选题]在Y.1731标准中，如何标示一个报文是TMP隧道层的OAM报文（）。
A)隧道层的标签为13B)隧道层的内一层标签为13C)隧道层外一层标签为20D)隧道层标签为20答案:B解析:9.[单选题]RSVP 是一个在 ( ) 上承载的信令协议，它允许路由器网络任何一端上终端系统或主机在彼此之间建立保留带宽路径A)信道B)IPC)网络层D)应用层答案:B解析:10.[单选题]MPLS-TP中OAM的CC检查流程中，检测到帧中MEG ID与目的MEP配置的MEG ID不同时，出现（）告警A)MismergeB)FLRC)SSFD)RDI答案:A解析:11.[单选题]下列说法正确的是A)OSPF的端口号是89B)BGP的协议号是179C)ISIS的端口号是90D)以上都不对答案:D解析:12.[单选题]互联端口IP地址采用（）位掩码，保证同一链路的两个接口在（）网段A)30、不同B)30、相同C)24、不同13.[单选题]以下关于CONTEXT_PACKET_LOS，说法错误的是？A)可能机盘故障B)可能是E1业务未接入C)可能是2M线未接入D)处理时可以考虑复位或者机盘答案:C解析:14.[单选题]ZXCTN6500-32可支持的全高业务线卡A)32B)16C)8D)4答案:A解析:15.[单选题]5G新建方案中，南北向业务通过（）承载，东西向业务通过（）承载A)1) SR-TE,SR-BEB)2) SR-TP,SR-BEC)3) SR-BE,SR-TED)4) SR-BE,SR-TP答案:B解析:16.[单选题]PTN网络验收测试指标背靠背用来（）A)测试设备的最大的转发能力B)测试设备的缓冲能力C)测试设备的转发时延D)吞吐能力答案:B解析:17.[单选题]在PTN中当以太网业务出现问题时，下面哪种方法无法用来检测故障 （1.5分）A)A . CV帧B)B . LB帧C)C . 查看性能D)D . 设备环回或者线路环回答案:D解析:18.[单选题]tcpdump抓包完成后常使用的抓包图形分析软件是A)SnifferB)wiresharkC)WinSock ExpertD)tcpdump答案:B解析:B)DateBusServerC)MSMPServerD)MySQL答案:A解析:20.[单选题]以下属于DHCP SERVER发出的报文有A)DHCP DISCOVERB)DHCP ACKC)DHCP INFORMD)DHCP REQUEST答案:B解析:21.[单选题]Y.1731 OAM标准中，连续性检查可应用于故障管理、性能监视或保护倒换。
机电专业中英文文献翻译-模拟与数字转换器译文
Analog and Digital TransducersAs mentioned previously, considerable experience has been accumulated with analog transducers, signal conditioning, A/D converters etc. , and it is natural that the majority of current systems tend to use these techniques. However, there are a number of measuring techniques that are essentially digit in nature, and which when used as separate measuring instruments require some intrgral digtal circuitry, such as frequency counters and timing circuits, to provide an indicator output. This type of transducer, if coupled to a computer, does not necessarily require the same amount of equipment since much of the processing done by the integral circuitry could be programmed and by the computer.Collins classifies the signals handled in control and instrumentation systems as follows:(1) Analog, in which the parameter of the system to be measured although initially derived in an analog form by a sensor is converted to an electrical analog, either by design or inherent in the methods adopted;(2) Coded-digital, in which a parallel digital sigal is generated, each bit radix-weighted according to some predetermined code. These are referred to in this bood as direct digital transducers;(3) Digital, in which a function, such as mean rate of a repetitive signal, is a measure of the parameter being measured. These are subsequently referred to as frequency-domain transducers.Some analog transducers are particularly suited to conversion to digital outputs using special techniques. The most popular of these are synchros, and similar devices, which produce a modulated output of a carrier frequency. For ordinary analog use, this output has to be demodulated to provide a signal whose magnitude and sign represent any displacement of the transducer’s moving element. Although it is possible to use a conventional A/D technique to produce a digital output while providing a high accuracy and resolution, and at a faster rate than is possible in the A/D converter method.Direct digital transducers are, in fact, few and far between, since there do not seem to be any natural phenomena in which some detectable characteristic changes in discrete intervals as a result of a change of pressure, or change of tempreature etc.. These are many advantages in using direct digital transducers in ordinary instrumentation systems, even if computers are not used in the complete installation.These advantages are:(1)The ease of generating, manipulating and storing digital signals, as punched tape, magnetic tape etc. ;(2)The need for high measurement accuracy and discrimination;(3)The relative immunity of a high-level digital signal to external disturbances (noise);(4)Ergonomic advantages in simplified data presentation(e. g. digital readout avoids interpretation errors in reading scales or graphs).The most active development in direct digital transducers has been in shaft encoders, which are used extensively in machine tools and aircraft systems. High resolution and accuracies can be obtained, and these devices may be mechanically coupled to provide a direct digital output of any parameter which gives rise to a measurable physical displacement. The usual displacement of these systems is that the inertia of the instrument and encoder often limit the speed of response and therefore the operating frequencies.Frequency domain transducers have a special part to play in online systems with only few variables to be measured, since the computer can act as part of an A/D conversion system and use its own registers and clock for counting pulses or measuring pulse width. In designing such systems, consideration must be given to the computer time required to access and process the trransducer output.Data Line Isolation TheoryWhen it comes to protect data lines from electrical transients, surge suppression is often the first thing that leaps to mind. The concept of surge suppression is intuitive and there are a large variety of devices on the market to choose from. Models are available to protect every-thing from your computer to answering machine as well as those serial devices found in RS-232, RS-422 and RS-485 systems.Unfortunately, in most serial communications systems,surge suppression is not the best choice. The result of most storm and inductively induced surges is to cause a difference in ground potential between points in a xommunications system. The more physical area covered by the system, the more likely those differences in ground potential will exist.The water analogy helps explain this. Instead of phenomenon water in a pipe, we’ll thi nk a little bigger and use waves on the ocean. Ask anyone what the elevation of the ocean is, and you will get an answer of zero－so common that we call it sealevel. While the average ocean elevation is zero, we know that tides and waves can cause large short-term changes in the actual height of the water. This is very similar to earth ground. The effect of a large amount of current dumped into the earth can be visualized in the same way, as a wave propa-gating outwards from the origin. Until this energy dissipates, the voltage level of the earth will vary greatly between two locations.Adding a twist to the ocean analogy, what is the best way to protect a boat from high waves? We could lash the boat to a fixed dock, forcing the boat to remain at one elevation. This will protect against small waves, but this solution obviously has limitation. While a little rough, this comparison isn’t far off from what a typical surge suppressor is trying to accom-plish. Attempting to clamp a surge of energy to a level safe for the local equipment requires that the clamping device be able to completely absorb or redirect transient energy.Instead of lashing the boat to a fixed dock let the dock float. Now the boat can rise and fall with the ocean swells (until we hit the end of our floating dock’s posts).Instead of fighting nature, we’re simply moving along with it. This is our data line isola-tion solution.Isolation is not a new idea. It has always been implemented in telephone and Ethernet equipment. For asynchronous data applications such as many RS-232, RS-422 and RS-485 systems, optical isolators are the most common isolation elements. With isolation, two different grounds (better thought of as reference voltages) can exist on opposite sides of the isolation element without any current flowing through the element. With an optical isolator, this is performed with an LED and a photosensitive transistor. Only light passes between the two elements.Another benefit of optical isolation is that it is not dependent on installation quality. Thpical surge suppressors used in data line protection use special diodes to shunt excess energy to ground. The installer must provide an extremely low imprdance ground connection to handle this energy, which can be thousands of amps at frequencies into the tens of megahertz. A small impedance in the ground connection, such as in 1.8m (6ft) of 18 gauge wire, can cause a voltage drop of hundreds of volts －enough voltage to damage most equipments. Isolation, on the other hand, does not require an additional ground connection, making it insensitive to installation quality.Isolation is not a perfect solution. An additional isolated power supply is required to support the circuitry. This supply may be built in as an isolated DC-DC converteror external. Simple surge suppressors require no power source. Isolation voltages are limited as well, usually ranging from 500V to 4000V. In some cases, applying both surge suppression and isolation is an effective solution.When choosing data line protection for a system it is important to consider all available options. There are pros and cons to both surge suppression and optical isolation, however isolation is a more effective solution for most systems. If in doubt, choose isolation.模拟与数字转换器前面我们已经提到，人们在模拟转换器、信号调节器和A/D 转换器等的使用上已经积累了大量的经验。
直接数字频率合成技术
通常用频率增量来表示频率合成器的分辨率，DDS的最小分辨率为
f min
fc 2N
这个增量也就是最低的合成频率。最高的合成频率受奈奎斯特抽样定理的限制，所 以有
f 0 max
fc 2
与PLL不同,DDS的输出频率可以瞬时地改变,即可以实现跳频，这是DDS的一个突 出优点，用于扫频测量和数字通讯中，十分方便。
直接数字频率合成技术 (DDS)
DDS技术是一种先进的波形产生技术，已经在实 际中获得广泛应用。
– 1971年,由J.Tierney 和C.M.Tader 等人在 “A Digital Frequency Synthesizer”一文中首次提出了 DDS的概念； DDS或DDFS 是 Direct Digital Frequency Synthesis 的 简称 –通常将此视为第三代频率合成技术； –它突破了前两种频率合成法的原理,从”相位”的概念 出发进行频率合成； –这种方法不仅可以产生不同频率的正弦波,而且可以控 制波形的初始相位； –还可以用DDS方法产生任意波形(AWG)。
AD公司的产品
型 号 AD9832 AD9831 AD9833 AD9834 AD9835 AD9830 AD9850 AD9853 AD9851 AD9852 AD9854 AD9858
最大工作(MHz) 25 25 25 50 50 50 125 165 180 300 300 1000
工作电压（V） 3.3/5 3.3/5 2.5～5.5 2.5～5.5 5 5 3.3/5 3.3/5 3/3.3/5 3.3 3.3 3.3
DDS原理
工作过程为: 1, 将存于数表中的数字波形,经数模转换器D/A,形成模拟量波形. 2, 两种方法可以改变输出信号的频率: (1),改变查表寻址的时钟CLOCK的频率, 可以改变输出波形的频率. (2), 改变寻址的步长来改变输出信号的频率.DDS即采用此法. 步长即为对数字波形查表的相位增量.由累加器对相位增量进行累加, 累加器的值作为查表地址. 3, D/A输出的阶梯形波形,经低通(带通)滤波,成为质量符合需要的模拟波形
Pclamp10_软件的使用
马普科学仪器有限公司
pCLAMP 10组成部分
pCLAMP 10组成部分：
Clampex 10，用于数据采集与刺激输出。 Clampfit 10，用于数据分析。 AxoScope 10，用于背景信号的记录。 MiniDigi，双通道数字转换器。
pCLAMP 10的特点
Telegraphs (Gain, Frequency, Cm Capacitance)
8路数字输出 单路数字转换器启动输入 单路外部标签输入 示波器触发输出
TELEGRAPH INPUTS（后面 板）
0-3
DIGITAL OUTPUTS（前面板） 0-7 （前面板） （前面板） （前面板） START TAG SCOPE
数字输入 Clampex的触发输入可允许其他设备的外部触发来开始数据采集，其也可以支持 触发的同时将时间，注释或标签信息直接插入数据文件。这些需要TTL相兼 容的数字输入。
Telegraph（通讯） Clampex可以接收多数放大器的“telegraph”信号，这些信号可以报告不同的 增益，低通滤波还有全细胞电容补偿等放大器的相应设置。 老型号的放大器是依靠不同的BNC接口来传送不同的telegraph信号的。要传输 这些信号就必须使用电缆将放大器与数字转换器连接在一起。Digidata 1320与1440系列的数字转换器就具有专门的telegraph BNC接口。 MultiClamp 700与AxoClamp 900A放大器是使用计算机来进行控制的，所以 telegraph信号就直接以数字化的形式传送给了Clampex从而就不需要任何的 物理连线了。
在Clampex中设置Digidata 1320或1440 系列数字转换器
AD7610中文
表1. 48引脚14/16/18位PulSAR的选择
Pclamp10_软件的使用资料
Clampex是一个强大的通用工具，她适可用于所 有类型数字化数据的采集。除了其特别擅长的膜 片钳记录之外，她的功能也并 不限于电压与电流 钳制反应的记录。所有可以转换为电压变化的物 理参数都可以用Clampex进行记录。例如，你可 以检测与记录终板电流，测量光电倍增管输出的 荧光信号，测量应变计量表的压力，或者是其他 任意的模拟信号。 Clampfit是一强大的数据分析程序，对电生理数 据提供了多种类型的统计，分析，转换功能，才 外还包含多种设计工具。 AxoScope软件与MiniDigi数字转换器充当了传统 的独立图表记录器的功能，并用于在实验的同时 记录实验中的背景信号。
PCI插槽（全高）b
信号连接
Clampex使用下列在Digidata 1440系列数据采集系统上的BNC连接
Clampex信号 Digidata 1440 BNC面板接口 Digidata 1440 BNC接口名称
4路模拟输出通道 16路模拟输入通道
ANALOG OUTPUTS（前面 板）
0-3
ANALOG INPUTS（前面板） 0-15
数字输入 Clampex的触发输入可允许其他设备的外部触发来开始数据采集，其也可以支持 触发的同时将时间，注释或标签信息直接插入数据文件。这些需要TTL相兼 容的数字输入。
Telegraph（通讯） Clampex可以接收多数放大器的“telegraph”信号，这些信号可以报告不同的 增益，低通滤波还有全细胞电容补偿等放大器的相应设置。 老型号的放大器是依靠不同的BNC接口来传送不同的telegraph信号的。要传输 这些信号就必须使用电缆将放大器与数字转换器连接在一起。Digidata 1320与1440系列的数字转换器就具有专门的telegraph BNC接口。 MultiClamp 700与AxoClamp 900A放大器是使用计算机来进行控制的，所以 telegraph信号就直接以数字化的形式传送给了Clampex从而就不需要任何的 物理连线了。
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CH IN ESE JO U R NA L O F SEM ICO ND U CT O R S
Vo l. 28 N o. 10 O ct. , 2007
A 10bit 2GHz CMOS D/ A Converter for High Speed System Applications
l+ u + m
I out = 2 l+ uI unit
k = l+ u + 1 l+ u
(ak
l
2k- l- u- 1 ) + ( ak 2k- 1 ) ( 1)
2 l I unit
k= l+ 1
(ak
2 k- l- 1 ) + I unit
k= 1
2007 Ch inese In stit ut e of Electr onics
C orrespondi ng aut hor. E mail: lyuan@ semi . ac. cn R ecei ved 12 M ar ch 2007, revised manuscript received 8 M ay 2007
and the ov erall layout area. T he design pro posed in this w o rk is a hig h speed ( up t o 2GSam ples/ s) 10bit intr insic accuracy ( no t rimming, no calibrat ion, o r dy nam ic avera ging) current st eering seg ment ed archit ect ure DAC implement ed in a standard tw in w ell 4 met al layer 0 35 m CMOS t echnolog y. T he main feat ures of t he DAC are discussed.
m+ l l
F ig. 2 Simplified DA C a rchitectur e
I out = 2 I 0
k = l+ 1
l
( ak
2
k- l- 1
)+I0
k= 1
(ak
2
k- 1
) ( 2)
T he unit current of L SBs is I 0 , w hile t he unit current of MSBs is 2l I 0 . T herm omet er decoding has the w ell know n advant ages of monot onicit y and re duct ions o f g lit ches at m ajor carries, but f ul l t her m omet er decoded archit ectures are impr act ical t o implement fo r high reso lut ion, mainly because o f the large core area. T herefo re w e cho ose the seg m ent ed t her momet er decoding archit ect ure in order to reduce the number of decoding cells. T he DAC w e desig n consists o f 6 M SBs and 4 L SBs. T he in put bit s are respect ively t aken t o t he M SB and L SB thermo meter decoding cells, w hich contr ol t w o cur r ent sw it ch arrays: an 8 8 and a 2 8 current ar r ay . T he current sour ces are t aken direct ly t o a pair of 50 resist ors t hrough the current sw it ch array. Figure 2 show s a schematic representat ion o f t he realized chip.
第 10 期
Yuan Ling et al . :
A 10bit 2G Hz CM OS D/ A Co nv erter for H ig h Speed System A pplicat ions
1541
Fig. 1 Conventio nal DA C a rchitectur e
w here n= l+ u + m , a k ( k = 1, 2, !, l+ u + m ) is t he digit al signal input int o t he DAC In our desig n, t he binar y seg ment is om it t ed, and t he 10bit DA C is im plement ed as a seg ment ed thermo meter current DAC, w hich consist s of t w o thermo meter decoded part s: t he m t hermom et er de coded mo st significant bits ( M SBs) and t he l t her m omet er decoded least significant bits ( L SBs) . As sum ing I 0 is t he unit current, t he out put current is given by
Yuan Ling , Ni Weining, and Shi Yin
( I nsti t ute of S emi condu ctors , Chi nese A cad emy of Sc ienc es, B ei j i ng 100083, Chi na)
Abstract: T his paper pr esents a 2G S/ s 10bit CM O S digital to analog co nver ter ( D A C) that consists o f tw o unit cur rent ce ll matr ix es f or 6M SBs and 4L SBs, r espective ly, tr ading o ff betw een the pr ecisio n and size of the chip. Cur rent mode log ic ( CM L ) is use d to e nsur e high speed, and a double centr o symme tric curr ent matr ix is designed by the Q2 rando m wa lk str ateg y in or de r to ensure the linear ity of the D A C. T he D A C o cc upies 2 2mm 2 2m m of die ar ea a nd co nsum es 790mW w ith a sing le 3 3V po we r supply. Key words: D / A co nv er ter; curr ent ste ering; CM O S m ixe d integr ated circuit; Q 2 r ando m w alk EEACC: 1265H CLC number: T N432 Document code: A Article ID: 0253 4177( 2007) 10 1540 06
2
DAC architecture
F or high speed and hig h reso lut ion applica t ions, t he current source sw it ching archit ect ure is preferred since it can drive a resist ive load directly w it ho ut t he need for a v olt age buf fer. A co nven t ional high perf ormance DAC archit ect ure used in such applicat ions is show n in F ig . 1. T he n bit DAC consist s of m t hermom et er ( linear ly) decoded mo st sig nif icant bit s ( M SBs ) , u t herm omet er decoded upper least sig nif icant bits ( UL SBs) , and l binary decoded low er least significant bit s ( LL SBs) . T he curr ent sources ar e t aken direct ly t o a pair of resis t ive loads. M odern hig h speed and hig h reso lut ion DACs all use variat ions of t his basic architect ure[ 1~ 3] . Assuming I unit is the unit current source, t he output current is given by