PMC通信协议

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PMC系统与PLC的接口描述(AB&Siemens)

PMC系统与PLC的接口描述(AB&Siemens)

PMC系统与现场PLC通讯接口技术规范(适用于AB PLC 和SIEMENS PLC)Communication Interface Requirementsbetween PMC Data Collector and PLC (For AB PLC & Siemens PLC)修改记录文档目录/TABLE OF CONTENTS1引言/I NTRODUCTION (4)2本文档名称的概念/C ONCEPT USED IN THIS DOCUMENT (4)3PMC数据采集器和车间现场PLC之间的通讯方式/C OMMUNICATION MODE BETWEEN PMC PDU AND PLC S (4)4PMC接口对OEM编程的要求/OEM MUST OBEY THESE RULES DURING PROGRAMMING (5)5PMC接口描述/I NTERFACE DESCRIPTION (5)5.1PMC 接口模块内存分配情况/ PMC interface memory allocation (5)5.2接口详细说明/ Detail Interface (6)5.2.1PMC接口数据交换区/ Data Exchange Area (6)5.2.2生产报警监控区/ Produce Alarm Monitor Area (10)5.2.3生产计数监控区/ Produce Count Monitor Area (11)5.2.4模拟量数据监控区/ Analog data Monitor Area (16)6A PPENDIX 1报警清单文件格式样例A LARM D ATA F ILE FORMAT SAMPLE (17)1 引言/ Introduction本接口要求是一个指导性的文件,需要联网进行生产监控的PLC必须遵循其中的准则,具体的细节要求在技术评估和详细设计时进一步讨论。

This interface requirement is a guideline for those PLCs which need to be connected to the network and monitored. The detailed specifications will be defined during technical evaluation and detail design.2 本文档名称的概念/ Concept used in this document●PDU: PMC数据采集服务器PDU: PMC Production Data Unit (Data Collector Server)●Station:A location where work is performed●Cell:A gated area containing 1-32 Stations and controlled by 1 PLC●Alarm information:Alarm information means the alarm signals which will cause equipment orconveyor to stop.●Warning information:Warning information means the alarm signals which will not cause equipmentor conveyor to stop but need to maintain the equipment.●Starve:Starve means an area is idle because it is waiting for the parts from the preceding area along theproduction line.●Block:Block means an area is idle because the following area along the production line is not able toaccommodate any more parts from this area.●Andon Downtime:An alarm which produced by Andon fault●E-Stop Downtime:The emergency stops Time. Typically a button that you press to stop the machine inthe event of an emergency●Timer:A timer is a specialized type of clock. A timer can be used to clock some alarms.●Counter:A counter used to collect something number of times. Something like the Production.3 PMC数据采集器和车间现场PLC之间的通讯方式/ Communicationmode between PMC PDU and PLCs●通讯协议:TCP/IPCommunication Protocol: TCP/IP●网卡:PLC自带支持TCP/IP协议、带RJ45网络接口的网卡Network Adapter: OEM provide PLC network adapter which has RJ45 port and support TCP/IPprotocol●通讯速率:10/100MbsCommunication Speed: 10/100Mbs●IP地址:固定的IP地址IP address: Fixed IP address●数据采集方式:所有的Alarm以及Information信息由PMC使用Pull方式采集。

PMC与文本或触摸屏连接说明

PMC与文本或触摸屏连接说明

1. 在文本显示器编辑软件中 选择功能键按钮 自动生成设置功能码
2. 在功能键中填写属性 PLC 站号:204 线圈号:0x 类型 地址:13 (地址详见后面章节描 述)
此功能为:按 0 号按键的时候 对应的 Y0 输出打开
联系电话:400-6668651 0592-8880569
6
地 址:厦门市思明区软件园二期望海路 63 号之二
通用数据帧格式如下:
地址码 消息帧的地址域包含两个字符(ASCII)或 8Bit(RTU)。可能的从设备地址是 0...247 (十进制)。单个设备的地址范围 是 1...247。主设备通过将要联络的从设备的地址放入消息中的地址域来选择从设备。当从设备发送回应消息时,它把自 己的地址放入回应的地址域中,以便主设备知道是哪个设备做出回应。地址 0 是用作广播地址,以使所有的从设备都能 认识。
PMC 控制器的地址码是 0xcc(即为:204)
功能码 在 HMI 系统中,常用的功能码如下:
Modbus 功能码
名称
功能
对应的地址类型
01
读线圈状态
读位(读 N 个 Bits)
0x
02
读输入离散量
读位
1x
03
读多个寄存器
读整型、字符型、状态字、浮点型(读 N 个 Words)
4x
04
读输入寄存器
0x 位类型 :电机状态
可以读取,可以写入 读取:目前状态 写入:对应功能开启或者
关闭
联系电话:400-6668651 0592-8880569 地 址:厦门市思明区软件园二期望海路 63 号之二
控制 X 电机连续左行 地址 30 (0 停止,1 启动) 控制 X 电机连续右行 地址 31 (0 停止,1 启动) 控制 Y 电机连续左行 地址 32 (0 停止,1 启动) 控制 Y 电机连续右行 地址 33 (0 停止,1 启动) 控制 Z 电机连续左行 地址 34(0 停止,1 启动) 控制 Z 电机连续右行 地址 35 (0 停止,1 启动) 停止 X 电机并坐标清零 地址:36 停止 Y 电机并坐标清零 地址:37 停止 Z 电机并坐标清零 地址:38

PMC总线信号规范

PMC总线信号规范

Draft Standard Physical and Environmental Layers for PCI Mezzanine Cards:PMCSponsored by theMicroprocessor & Microcomputer Standards Committee (MMSC)of the IEEE Computer SocietyP1386.1/Draft 2.4January 12, 2001Draft submitted to IEEE for final standardization approvalAbstract: This draft standard, in conjunction with P1386 (CMC), defines the physical and environmental layers of a PCI Mezzanine Card (PMC) Family to be usable on (but not limited to) single slot VME, VME64 & VME64x boards, CompactPCI Boards, Multibus I boards, Multibus II boards, desktop computers, portable computers, severs and similar types of applications. The electrical and logical layers are based on the PCI Specification from the PCI Special Interest Group. The PCI Mezzanine Cards allow for a variety of optional function expansions for the host system. I/O functionality from the PMC may be either through the mezzanine front panel, or via the backplane by routing the I/O signals through the mezzanine connector to the host. Keywords: Backplane I/O, Bezel, Board, Card, CompactPCI, Face Plate, Front Panel I/O, Metric, Host Computer, I/O, Local Bus, Mezzanine, Module, Modular I/O, PCI, Multibus I, Multibus II, VME, VME64, VME64x, VMEbus.Copyright (c) 2001 by the Institute of Electrical and Electronics Engineers, Inc.345 East 47th StreetNew York, NY 10017, USAAll rights reserved.This is an unapproved draft of a proposed IEEE Standard, subject to change. Permission is hereby granted for IEEE Standards Committee participants to reproduce this document for purposes of IEEE standardization activities. If this document is to be submitted to ISO or IEC, notification shall be given to the IEEE Copyright Administrator. Permission is also granted for member bodies and technical committees of ISO and IEC to reproduce this document for purposes of developing a national position. Other entities seeking permission to reproduce portions of this document for these or other uses must contact the IEEE Standards Department for the appropriate license. Use of information contained in this unapproved draft is at your own risk.IEEE Standards DepartmentCopyright and Permissions445 Hoes Lane, PO Box 1331Piscataway, NJ 08855-1331, USAIEEE Standards documents are developed within the Technical Committees of the IEEE Societies and the Standards Coordinating Committees of the IEEE Standards Board. Members of the committees serve voluntarily and without compensation. They are not necessarily members of the Institute. The standards developed within the IEEE represent a consensus of the broad expertise on the subject within the Institute as well as those activities outside the IEEE which have expressed an interest in participating in the development of the standard. Use of an IEEE Standard is wholly voluntary. The existence of an IEEE standard does not imply that there are no other ways to produce, test, measure, purchase, market or provide other goods and services related to the scope of the IEEE standard. Furthermore, the viewpoint expressed at the time a standard is approved and issued is subject to change brought about through developments in the state of the art and comments received from users of the standard. Every IEEE standard is subjected to review at least once every five years for revision or reaffirmation. When a document is more than five years old, and has not been reaffirmed, it is reasonable to conclude that its contents, although still of some value, do not wholly reflect the present state of the art. Users are cautioned to check to determine that they have the latest edition of any IEEE Standard.Comments for revision of IEEE Standards are welcome from any interested party, regardless of membership affiliation with IEEE. Suggestions for changes in documents should be in the form of a proposed change of text, together with appropriate supporting comments. Interpretations: Occasionally questions may arise regarding the meaning of portions of standards as they relate to specific applications. When the need for interpretations is brought to the attention of the IEEE, the Institute will initiate action to prepare appropriate responses. Since IEEE Standards represent a consensus of all concerned interests, it is important to ensure that any interpretation has also received the concurrence of a balance of interests. For this reason, IEEE and the members of its technical committees are not able to provide an instant response to interpretation requests except in those cases where the matter has previously received formalconsideration.Comments on standards and requests for interpretations should be addressed to:Secretary, IEEE Standards Board445 Hoes LaneP.O. Box 1331Piscataway, NJ 08855-1331USAIEEE Standards documents are adopted by the Institute of Electrical and Electronic Engineers without regard to whether their adoption may involve patents on articles, material, or processes. Such adoption may not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the standards documents.CommentsIf you have questions or comments regarding this draft, please contact the chair/draft editor of this proposed standard:Wayne FischerP1386.1 (PMC) Chair & Draft EditorTahoe Embedded ComputersPO Box 8600Incline Village, NV 89452-8600 USAPh: 775-832-0447Em: tahoewayne@Ws: Change BarsAll paragraphs changed in this draft (2.4) from draft 2.3 are marked with a change bar on the right side of the paragraph. Any table entry that was changed will have a thicker vertical line on the right side of changed entry.Introduction(This introduction is not part of this Draft Standard Physical and Environmental Layers for a PCI Mezzanine Card: PMC)This draft standard provides the specifications for implementing the PCI local bus between a host and mezzanine card based on the P1386 (CMC) Standard for usage on VME64x boards, CompactPCI boards, and Multibus I & II boards. PCI boards defined for the general personal computer market will not fit on these boards since they mount perpendicular on the host computer. This standard provides the necessary mechanical and environmental requirements for the use of PCI based mezzanine cards in a large variety of low profile applications. PCI Mezzanine Cards can provide front bezel I/O, backplane I/O via the host, additional local host functions or a combination of the three.Special thanks are due to Dave Moore, original P1386.1 Working Group Draft Editor, for the generation of the many drafts, Rick Spratt, Cliff Lupien, Harry Parkinson, Chau Pham and Heinz Horstmeier for their contribution to development of this proposed standard.At the time this standard was completed, the P1386.1 Working Group had the following membership:Wayne Fischer, ChairChau Pham, Vice ChairMalcom Airst Dave Horton Harry ParkinsonHarry Andreas Anotol Kaganovich Elwood ParsonsJames Barnette Gary Kidwell Chau PhamJuergen Baumann Tom Kuleza Dave RiosMartin Blake Jing Kowk John RynearsonHans Brand Dees Lambreshtse Richard SprattDave Brearley Sang Dae Lee Nobuaki SugiuraGorky Chin Cliff Lupien Dennis TerryDick DeBock Kristian Martinson Russ TuckIan Dobson Jim Medeiros Jim TurleyWayne Fischer Robert McKee Mark VorenkarmpMike Hasenfratz Dave Mendenhall Eike WaltzRyuji Hayasaka David Moore Dave WickliffRoger Hinsdale Rob Noffke Bob WidlickaHeinz Horstmeier Joseph Norris David WrightThe following people were on the IEEE sponsor balloting committee:List to be provided,When the IEEE Standards Board approved this standard on XX Xxxx, 2001, it had the following membership:List to be provided,Also included are the following nonvoting IEEE Standard Board liaisons:List to be provided,Contents1.Overview (1)1.1Scope (1)1.2Purpose (1)1.3General Arrangement (1)1.4Dimensions (1)2.References (3)2.1Trademarks (3)3.Definitions, Abbreviations and Terminology (3)3.1Special Word Usage (3)4.Mechanics and Compliance (3)4.1Conformance (3)4.2PMC Voltage Keying (4)4.3Connector Configurations (4)4.4Power Consumption, Heat Dissipation and Air Flow (4)4.5Electromagnetic Compatibility (4)4.6Shock and Vibration (4)4.7Environmental (4)4.8MTBF (4)5.Electrical and Logical Layer (5)5.1Connector Utilization (5)5.2PMC Connector Pin Assignment (5)5.3Comparison of Pin Usage, PCI to PMC (9)5.4Mapping of PCI Reserve Pins (10)FiguresFigure1-1Typical PMC Mounted to a Host Module (2)Figure5-1Connector Orientation on PMC, Side 1 (8)Figure5-2Connector Orientation on Host, Side 1 (8)TablesTable5-1PMC Connectors Pin Assignments (6)Table5-2Pin Use Comparison PCI to PMC (Single Size) (9)Table5-3PCI-Reserved/PMC Relationship (10)Draft Standard Physical and EnvironmentalLayers for PCI Mezzanine Cards: PMC1. Overview1.1 ScopeThis draft standard defines a family of slim modular mezzanine cards for VME, VME64 VME64x, CompactPCI, Multibus I & II, desktop computers, portable computers, servers and other computer systems with the logical and electrical layers based on the PCI (Peripheral Component Interface) Specification from the PCI Special Interest Group.The complete physical (mechanical) and the environmental layers are specified within the Common Mezzanine Card (CMC) Standard P1386 [1]1.1.2 PurposePCI is a high speed local bus being used by a variety of microprocessors. The PCI specification defines multiple board sizes that plug into computer mother boards in a perpendicular fashion. These perpendicular boards are not usable for low profile computer applications. This draft standard defines the mechanics of a slim, modular, parallel mezzanine card family that uses the logical and electrical layers of the PCI specification for the local bus. I/O can be via the front bezel and/or through the connector to the host computer for backplane I/O. Additional local functionality can also be provided by these mezzanine cards.1.3 General ArrangementPCI Mezzanine Cards (PMC) are intended to be used where slim, parallel board mounting is required such as in single board computer host modules with the addition of expander cards or option cards, as illustrated in Figure 1-1. The PMC may be mounted with instruments and panels that comply with the requirements of IEEE Std 1386 [1].For maximum utilization of component space, the mezzanine card is typically placed such that the major component side (side one) of the mezzanine card faces the major component side (side one) of the host board.1.4 DimensionsAll mechanical dimensions are specified in P1386 [1]. All dimensions are in millimeters._____1 The numbers in brackets correspond to those of the references in Section 2.Figure 1-1Typical PMC Mounted to a Host Module2. ReferencesThe following publications are used in conjunction with this standard:[1] IEEE P1386 Standard Mechanics for a Common Mezzanine Card Family: CMC 2[2] PCI Local Bus Specification, Revision 2.2 1998 3When any of the above specifications are superseded by an approved revision, that revision shall apply.2.1 TrademarksThe following names used within this draft standard are trademarked:PICMG and CompactPCI are registered trademarks of the PCI Industrial Computers Manufacturers Group.3. Definitions, Abbreviations and Terminology3.1 Special Word Usageshall, A key word indicating a mandatory requirement. Designers shall implement such mandatory requirements to ensure interchangeably and to claim conformance with the specification. The phrase is required is used interchangeably with the key word shall.should, A key word indicating flexibility of choice with a strongly preferred implementation. The phrase is recommended and the word preferred are used interchangeably with the key word should.may, A key word indicating flexibility of choice with no implied preference. The phrase is optional is used interchangeably with the key word may.4. Mechanics and Compliance4.1 ConformanceA vendor of host modules or mezzanine cards may claim compliance to the P1386.1 (PMC) standard if there are no areas of conflict between the host design and the P1386 [1] or P1386.1 standards. In addition, the vendor claiming compliance shall specify in the product specifications those areas of compliance where optional features are allowed._____2IEEE publications are available from the institute of Electrical and Electronics Engineers, Service Center, 445 Hoes Lane. PO Box 1331, Piscataway, NJ 08855-1331, USA.3PCI Specifications are available from PCI Special Interest Group 2575 NE Kathryn Street, #17, Hillsboro, Oregon 97124, USA, 4.2 PMC Voltage KeyingThe PCI bus uses either 3.3V or 5V for signaling bus levels. A voltage keying is required to prevent association of host slots and mezzanine card with incompatible signaling voltages. The host shall indicate in its product specification which signaling voltage it uses and has been keyed for. Note that the mezzanine card may be designed to accept either or both signaling voltages.For keying mechanics see P1386 [1].4.3 Connector ConfigurationsThe 32 bit PCI bus requires two 64 pin connectors, Pn1/Jn1 and Pn2/Jn2. The 64 bit PCI bus requires three 64 pin connectors, Pn1/Jn1, Pn2/Jn2 and Pn3/Jn3. When I/O is routed through the host's backplane, the Pn4/Jn4 connector is required for routing of the I/O signals. Any combination of the three connector functions may be used on the mezzanine card as well as on the host.4.4 Power Consumption, Heat Dissipation and Air FlowEach PMC vendor shall document in the product's information the current drawn on the 5V and 3.3V power pins. The average heat dissipated on both sides shall be given as well as the average percent of area, side view, occupied by the components. A user can then calculate the amount of air flow that can be expected to flow across each mezzanine card as well as the amount of air needed to properly cool the mezzanine card.4.5 Electromagnetic CompatibilityEach PMC vendor shall document in the product's literature to which Electromagnetic Compatibility (EMC) standards and to what level(s) the product was designed and tested to (if tests were performed).4.6 Shock and VibrationEach PMC vendor shall document in the product's literature to which shock and vibration standards and to what level(s) the product was designed and tested to (if tests were performed).4.7 EnvironmentalEach PMC vendor shall document in the product's literature to which environmental standards and to what level(s) the product was designed and tested (if tests were performed).4.8 MTBFEach PMC vendor shall state in the product's literature the calculated MTBF (mean-time-between-failure) for which environmental level and state what method was used to calculate the MTBF number(s).5. Electrical and Logical Layer5.1 Connector UtilizationThe PMC and associated host connector pin assignments are based on specific signal integrity rules as well as power distribution. The 5V pins are assigned to Pn1/Jn1 connector, the 3.3V pins are assigned to Pn2/Jn2 connector and the V(I/O) to Pn1/Jn1 and Pn3/Jn3 connectors. All signal pins are adjacent to a voltage or ground pin with the CLK (clock) pin surrounded by three ground pins.The Pn1/Jn1 and Pn2/Jn2 connectors are always present and contain the signals for the 32 bit PCI Bus. When the PCI Bus is expanded to 64 bits, the Pn3/Jn3 connector is used for these signals. User defined I/O signals are assigned to the Pn4/Jn4 connector. The Pn3/Jn3 and Pn4/Jn4 connectors do not need to be present on either the PCI Mezzanine Card or the host when those signals are not used. Use of PCI Bus reserve (PCI-RSVD) and PMC (PMC-RSVD) reserved pins are not allowed as their use may be defined by future versions of the PCI specifications or by this standard, respectively. All Pn1/Jn1 and Pn2/Jn2 connector pins are fixed and shall not be reassigned to other functions.Note that the PCI signals are completely defined in reference (2), PCI Local Bus Specification.Pn4/Jn4 connectors are for user defined I/O functions. The mapping of these I/O signals to the backplane is defined in the P1386 (CMC) Standard [1] for VME and Multibus applications. Mapping of I/O signals off the rear of CompactPCI boards through CompactPCI backplanes is defined and controlled by PICMG, .5.2 PMC Connector Pin AssignmentPCI Mezzanine Cards and associated hosts that support PMC slots shall assign the local bus signal pins per the pin assignment given in Table 5-1.See Figures 5-1 and 5-2 for connector orientation on the PMC and on the associated host, respectively.Table 5-1PMC Connectors Pin AssignmentsPn1/Jn1 32 Bit PCI Pn2/Jn2 32 Bit PCI Pin Signal Signal Pin Pin Signal Signal Pin 1TCK-12V21+12V TRST#2 3Ground INTA#43TMS TDO4 5INTB#INTC#65TDI Ground6 7BUSMODE1#+5V87Ground PCI-RSVD*8 9INTD#PCI-RSVD*109PCI-RSVD*PCI-RSVD*10 11Ground 3.3Vaux1211BUSMODE2#+3.3V12 13CLK Ground1413RST#BUSMODE3#14 15Ground GNT#1615 3.3V BUSMODE4#16 17REQ#+5V1817PME#Ground18 19V (I/O)AD[31]2019AD[30]AD[29]20 21AD[28]AD[27]2221Ground AD[26]22 23AD[25]Ground2423AD[24]+3.3V24 25Ground C/BE[3]#2625IDSEL AD[23]26 27AD[22]AD[21]2827+3.3V AD[20]28 29AD[19]+5V3029AD[18]Ground30 31V (I/O)AD[17]3231AD[16]C/BE[2]#32 33FRAME#Ground3433Ground PMC-RSVD34 35Ground IRDY#3635TRDY#+3.3V36 37DEVSEL#+5V3837Ground STOP#38 39Ground LOCK#4039PERR#Ground40 41PCI-RSVD*PCI-RSVD*4241+3.3V SERR#42 43PAR Ground4443C/BE[1]#Ground44 45V (I/O)AD[15]4645AD[14]AD[13]46 47AD[12]AD[11]4847M66EN AD[10]48 49AD[09]+5V5049AD[08]+3.3V50 51Ground C/BE[0]#5251AD[07]PMC-RSVD52 53AD[06]AD[05]5453+3.3V PMC-RSVD54 55AD[04]Ground5655PMC-RSVD Ground56 57V (I/O)AD[03]5857PMC-RSVD PMC-RSVD58 59AD[02]AD[01]6059Ground PMC-RSVD60 61AD[00]+5V6261ACK64#+3.3V62 63Ground REQ64#6463Ground PMC-RSVD64 Note: For PCI-RESVD/PMC Pin Relationship see Table 5-3Table 5-1 (Concluded)PMC Connectors Pin AssignmentsPn3/Jn3 64 Bit PCI Pn4/Jn4 User Defined I/OPin Signal Signal Pin Pin Signal Signal Pin 1PCI-RSVD Ground21I/O I/O2 3Ground C/BE[7]#43I/O I/O4 5C/BE[6]#C/BE[5]#65I/O I/O6 7C/BE[4]#Ground87I/O I/O8 9V (I/O)PAR64109I/O I/O10 11AD[63]AD[62]1211I/O I/O12 13AD[61]Ground1413I/O I/O14 15Ground AD[60]1615I/O I/O16 17AD[59]AD[58]1817I/O I/O18 19AD[57]Ground2019I/O I/O20 21V (I/O)AD[56]2221I/O I/O22 23AD[55]AD[54]2423I/O I/O24 25AD[53]Ground2625I/O I/O26 27Ground AD[52]2827I/O I/O28 29AD[51]AD[50]3029I/O I/O30 31AD[49]Ground3231I/O I/O32 33Ground AD[48]3433I/O I/O34 35AD[47]AD[46]3635I/O I/O36 37AD[45]Ground3837I/O I/O38 39V (I/O)AD[44]4039I/O I/O40 41AD[43]AD[42]4241I/O I/O42 43AD[41]Ground4443I/O I/O44 45Ground AD[40]4645I/O I/O46 47AD[39]AD[38]4847I/O I/O48 49AD[37]Ground5049I/O I/O50 51Ground AD[36]5251I/O I/O52 53AD[35]AD[34]5453I/O I/O54 55AD[33]Ground5655I/O I/O56 57V (I/O)AD[32]5858I/O I/O58 59PCI-RSVD PCI-RSVD6059I/O I/O60 61PCI-RSVD Ground6261I/O I/O62 63Ground PCI-RSVD6463I/O I/O64TO FRONT PANELPn 3Pn 463636464112Pn 16364122Pn 2636412SIDE 1Figure 5-1Connector Orientation on PMC, Side 1T O F R O N T P A N E LJ n 1J n 2J n 36364J n 463641212636463641212S I D E 1Figure 5-2Connector Orientation on Host, Side 15.3 Comparison of Pin Usage, PCI to PMCFor reference purposes, a comparison of pin usage, PCI to PMC is provided in Table 5-2 below, where all the four 64-pin connectors are implemented.Table 5-2Pin Use Comparison PCI to PMC (Single Size)Power Pins Bus Pins PCI PMC+ 5V86+ 12V11- 12V11+ 3.3V129V (I/O118Ground4243Subtotal7569Signals100101BUSMODE24I/O064PCI1111PMC08Subtotal113187Total Pins1882565.4 Mapping of PCI Reserve PinsIn the future, should one or more of the PCI reserved pins become assigned to a new function, the assignment to the PMC connector shall be consistent. Table 5-3 lists the assignment of these reserved pins to the PMC connector. It will not be necessary to update this draft standard whenever this occurs.Assignment of PMC reserved pins will require an update to this standard.Table 5-3PCI-Reserved/PMC RelationshipPCI-RSVD PMC Signal PCI-RSVD PMC Signal9A Pn2-863B Pn3-110B Pn2-992A Pn3-5911A Pn2-1092B Pn3-6014B Pn1-1093B Pn3-6140A Pn1-4194A Pn3-6441A Pn1-42。

PMC供应商合作协议书

PMC供应商合作协议书

PMC供应商合作协议书需方:有限公司供方:经需、供双方友好协商,现达成如下协议条款:第一条目的需方委托供方制造本合约所附《采购附件资料清单》所订的物品,供方同意制造需方所提示规格的物品供应给需方。

第二条采购单价1. 《采购附件资料清单》中所记载的采购单价是根据需、供双方的协议而定的,并将其固定一年,每年按实际需要由需、供双方重新协议而修订。

2. 当采购报价决定后,供方应根据需方所指定的格式、内容,迅速将报价明细提交给需方。

需、供双方的法人代表签名认可或委托代理人签名认可(并注明开始生效时间)后,才具有法律效力,其他人的签名不予以承认。

3. 采用月结(季结)方式的产品单价一经双方确认,原则上一年不变,只有当生产此种产品的制造成本上浮或下跌达5%以上(含5%时,影响到本合约所订的采购业务而导致需方或供方希望修订采购单价时,双方应以书面形式预先通知对方,双方协商单价修订及实施日期事项(必要时签订补充协议)。

新单价经双方协商后调整,并经双方法人代表或委托代理人签名确认后开始生效。

第三条订货“1. 正常订货,需方应按《采购附件资料清单》中所制定的常采购周期”以书面形式向供方订货,紧急订货则按“紧急采购周期”执行。

2. 需方应在《采购订单》中明确所订物料的交货日期及每次的交货数量。

供方应遵守《采购订单》约定的内容交货,除需、供双方在事前以书面同意变更《采购订单》的约定内容外,供方的交货不得与订单的约定内容有异。

3. 当需方向供方发出《采购订单》后,供方要仔细审核《采购订单》内容,如质量标准、订单数量、交货日期,确认无误后,正常订货由供方负责人于一个工作日内签名回传需方,紧急订货于半个工作日内回签传给需方。

若不按时回传,需方有权对供方处以100 元罚款,罚款金额从帐款中扣除。

若供方对于需方的订货内容有异议时,于接到《采购订单》后四小时内通知需方处理。

4. 有关制造货品所需的图纸、规格、式样书、样本、技术资料及其他资料(简称“技术资料” ),由需方供给供方使用。

pmc合同范本

pmc合同范本

pmc合同范本PMC 合同范本甲方(项目业主):姓名/名称:地址:联系方式:乙方(PMC 承包商):姓名/名称:地址:联系方式:鉴于甲方拟对[项目名称]项目进行建设,并希望乙方承担项目管理承包商(PMC)的角色,双方经友好协商达成如下协议:一、项目概况1. 项目名称:2. 项目地点:3. 项目规模及主要内容:二、乙方的服务范围详细描述乙方在项目管理各个方面的职责和工作内容,包括但不限于项目规划、进度管理、质量管理、成本控制、风险管理、合同管理、协调工作等。

三、服务期限自[起始日期]起至[结束日期]止。

四、服务费用及支付方式1. 服务费用的计算方式和总金额。

2. 支付的时间节点和方式。

五、双方的权利和义务1. 甲方的权利和义务,如提供必要的支持、审批决策等。

2. 乙方的权利和义务,如按要求履行服务、及时报告等。

六、保密条款双方对于项目相关的信息和资料应承担保密义务。

七、违约责任明确双方在违反合同约定时应承担的责任和赔偿方式。

八、争议解决约定争议解决的方式,如协商、仲裁或诉讼。

九、合同变更与终止规定合同变更的程序和终止的条件。

十、其他条款其他双方认为需要约定的事项。

甲方(盖章):__________________法定代表人(签字):____________日期:__________________________乙方(盖章):__________________法定代表人(签字):____________日期:__________________________。

项目管理pmc合同协议书

项目管理pmc合同协议书

项目管理pmc合同协议书这是小编精心编写的合同文档,其中清晰明确的阐述了合同的各项重要内容与条款,请基于您自己的需求,在此基础上再修改以得到最终合同版本,谢谢!项目管理PMC合同协议书甲方:__________乙方:项目管理公司(以下简称PMC)鉴于甲方需要对某一项目进行管理,乙方具有项目管理的能力和经验,经双方友好协商,特订立本合同,以便共同遵守。

第一条 项目概况1.1 项目名称:__________1.2 项目地点:__________1.3 项目内容:__________1.4 项目周期:自合同签订之日起至项目验收合格之日止。

第二条 乙方的义务2.1 乙方应根据甲方的要求,组建项目管理团队,对项目进行全过程管理,确保项目按期完成。

2.2 乙方应遵守国家相关法律法规,严格执行项目管理制度,确保项目质量、安全、进度等目标的实现。

2.3 乙方应定期向甲方报告项目进展情况,对项目中的问题及时提出解决方案并报甲方审批。

2.4 乙方应承担因项目管理不善造成的甲方损失,并按合同约定支付违约金。

第三条 甲方的义务3.1 甲方应按照合同约定向乙方支付项目管理费用。

3.2 甲方应提供项目实施所需的相关资料和条件,确保乙方能够顺利开展项目管理工作。

3.3 甲方应对乙方提出的问题及时给予答复,并按照约定时间审批相关报告。

3.4 甲方应对乙方在项目管理过程中取得的成绩给予认可和奖励。

第四条 项目管理费用4.1 乙方向甲方提供的项目管理服务费用为人民币____元整(大写:_______________________元整)。

4.2 甲方应按照合同约定的付款方式及时向乙方支付费用。

第五条 违约责任5.1 任何一方违反合同的约定,应承担相应的违约责任,向对方支付违约金,并赔偿因此给对方造成的损失。

5.2 乙方未按约定完成项目或项目质量不符合约定的,甲方有权要求乙方返工、修复或赔偿。

第六条 争议解决本合同履行过程中发生的争议,双方应友好协商解决;协商不成的,可以向有管辖权的人民法院起诉。

pmcs723通讯规约

pmcs723通讯规约

pmcs723通讯规约什么是pmcs723通讯规约?PMCS723通讯规约是一种特定的通信规范,用于设备之间进行数据交换和通讯。

它采用统一的数据格式和通讯协议,以确保不同设备之间可以进行有效的数据传输和交互。

为什么需要pmcs723通讯规约?在现代工业控制系统中,不同设备之间的通讯非常重要。

不同的设备可能来自不同的厂商,具有不同的硬件和软件配置。

为了实现设备之间的互操作性和数据共享,需要一个统一的通讯规约。

PMCS723通讯规约提供了一种标准化的数据格式和通讯协议,使得不同设备之间的通讯变得简单和可靠。

它定义了数据的结构、传输方式、通讯协议以及错误处理等方面的规定,确保了设备之间的顺畅通讯和数据交换。

PMCS723通讯规约的特点是什么?1. 灵活性:PMCS723通讯规约可以根据不同的设备需求进行定制和配置。

它提供了各种数据类型和通讯方式的支持,可以适应不同设备的需求。

2. 可扩展性:PMCS723通讯规约可以轻松扩展以适应不断变化的设备和通讯需求。

它支持新的数据类型和功能的添加,以及通讯协议的更新。

3. 可靠性:PMCS723通讯规约采用了错误检测和纠正机制,以确保数据传输的可靠性和正确性。

它还提供了流控制和重传机制,以应对通讯中断和丢失的数据包。

4. 安全性:PMCS723通讯规约提供了数据加密和身份验证等安全机制,保护设备之间的通讯免受恶意攻击和数据泄露的威胁。

如何实现pmcs723通讯规约?要实现PMCS723通讯规约,需要以下步骤:1. 定义数据格式:首先,需要定义要传输的数据的结构和格式。

这包括数据类型、字节顺序和字段的含义等方面的规定。

可以使用XML、JSON或二进制格式等进行描述和编码。

2. 设计通讯协议:其次,需要设计通讯协议,规定设备之间的通讯方式和规则。

这包括数据包的格式、传输方式(如串行、并行、以太网等)以及通讯的时序和同步等方面的规定。

3. 实现数据传输:接下来,需要实现数据的传输和交换。

PMC916 通讯规约

PMC916 通讯规约

2
6 报文数据解释
1)系统参数、系统时间、告警的各类型整定值、告警关联的继电器和互感器参数,地址
连续的,在进行读写多个寄存器操作时,应一并读出或写入。其中电量和脉冲量可随意
读出或多个写入,进行单个寄存器写入时,对电量和脉冲量只能写入零。
2)站系统时间(地址 0014H)—
l 年,月寄存器:高字节表示年,范围 00-99,代表 2000-2099;低字节表示月,范
通信协议
RW
40072
RW
40073
RW
40074
1TNC911504M2001
1 1 1
线电压 Uab
RO
40100
2
线电压 Ubc
RO
40102
2
线电压 Uca
RO
40104
2
相电压 Uan
RO
40106
2
相电压 Ubn
RO
40108
2
相电压 Ucn
RO
40110
2
相电流 Ia
RO
40130
2
相电流 Ib
40156
1
C 相功率因数(PFc)
RO
40157
1
功率因数超前/滞后
RO
40158 01(超前)/00(滞后)
1
A 相功率因数超前/滞后
RO
40159 01(超前)/00(滞后)
1
B 相功率因数超前/滞后
RO
40160 01(超前)/00(滞后)
1
C 相功率因数超前/滞后
RO
40161 01(超前)/00(滞后)
1
2(连读/写) 2 1 1
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研宏科技PMC控制器通讯协议
一、数据传输采用数据帧方式
请求指令
[启动关键字AA][设备地址][操作码] [参数1] [参数2] [参数31] [参数32] [参数33] [参数34] [校验码]
回应消息
[启动关键值BB] [设备地址][操作码] [错误码] [参数1] [参数21] [参数22] [参数23] [参数24] [校验码] Eg: BB FF 01 01 00 00 00 00 00 FF
备注:
1、当前控制器支持的操作指令为等长指令,每个指令长度为10个字节;
2、地址码为0xff的指令为广播指令。

所有控制器都需要处理;
3、错误校验码采用普通的加法运算。

即:
[校验码]= [设备地址]+[操作码] + [操作数1] + [操作数2] + [操作数31] +[操作数32] + [操作数33] + [操作数34] ;
二、系统参数设置指令
1、设置控制器工作模式
par1 [01: 02PC]
eg:设置PC机器指令工作模式
AA FF 04 02 00 00 00 00 00 00
BB FF 04 00 00 00 00 00 00 FF
2、设置控制器地址
Eg:
AA FF 01 5500 00 00 00 00 00
BB 55 01 00 00 00 00 00 00 FF
3、获取控制器地址
BB XX 02 00 XX00 00 00 00 00
控制器地址
发送:AA FF 02 00 00 00 00 00 00 00
接收:BB 55 02 00 55 00 00 00 00 FF
4、获取控制器工作模式
BB XX 05 00 XX00 00 00 00 00
控制器工作模式
5、蜂鸣器叫
Par3ms
AA FF 09 00 00 00 00 01 00 00
6、向输出口上面输出一个
Par2 1为高电平,0为输出低电平
AA FF 13 01 00 00 00 00 00 00
读取输入口状态信息
BB FF 3F 00 00 00 00 0F FF FF
7、设置电机转动一圈需要的脉冲数。

Par3 电机驱动器的细分数
AA FF 61 01 00 00 00 06 40 00
BB FF 61 00 00 00 00 00 00 FF
8、获取驱动器的细分数(如果含有减速箱需要计算减速箱值)。

Par1 (1X2Y3Z) 返回指令中,细分数通过Par3带回
AA FF 62 01 00 00 00 00 00 00
BB FF 62 00 00 00 00 06 40 FF
设置电机转动一圈移动的距离。

Par1 (1X2Y3Z)
Par3 电机转动一圈运行的距离,为4字节浮点数
AA FF 63 01 00 00 00 80 3F 00
BB FF 63 00 00 00 00 00 00 FF
9、获取电机转动一圈移动的距离。

Par1 (1X2Y3Z) 返回指令中,细分数通过Par3带回
AA FF 64 01 00 00 00 00 00 00
返回:AA FF 64 01 00 00 00 00 00 00
10、设置电机加速系数。

注:Par1 操作电机类型(1、X轴;2、Y轴;3、Z轴) Par3 电机加速系数
AA FF 65 01 00 00 00 00 01 00
BB FF 65 00 00 00 00 00 00 FF
11、获取电机加速系数。

Par1 (1X2Y3Z) 返回指令中,细分数通过Par3带回
AA FF 67 01 00 00 00 00 00 00
BB FF 67 00 00 00 00 00 01 FF
12、设置电机减速系数。

Par1 (1X2Y3Z)
Par3 电机减速系数
AA FF 68 01 00 00 00 00 01 00
13、获取电机减速系数。

Par1 (1X2Y3Z) 返回指令中,细分数通过Par3带回
AA FF 6A 01 00 00 00 00 00 00
14、设置步进电机速度
: Par1(1X2Y3Z)
Par3: 最高速度(Hz)
AA FF 6B 01 00 00 00 25 80 00
15、读取步进电机速度
: Par1(1X2Y4Z)
Par3: 最高速度(Hz)
AA FF 83 01 00 00 00 00 00 00
AA FF 83 01 00 00 00 00 00 00
16、步进电机相对运动
: Par1(1X2Y4Z)
Par3: 运行的距离
AA FF 6D 01 00 00 00 00 01 00
BB FF 6D 00 00 00 00 00 00 FF 赋值成功
BB FF 3C 00 00 00 00 00 01 FF 运行中X轴
BB FF 3C 00 00 00 00 00 00 FF 停止
17、步进电机运行到指定位置
: Par1(1X2Y3Z)
Par3: 运行的距离
AA FF 6F 01 00 00 00 00 00 00
BB FF 6F 00 00 00 00 00 00 FF
BB FF 3C 00 00 00 00 00 01 FF
BB FF 3C 00 00 00 00 00 00 FF
18、立刻停止电机运行
注: Par1:操作电机类型(1、X轴;2、Y轴;3、Z轴)
AA FF 6D 01 00 00 00 00 10 00
BB FF 6D 00 00 00 00 00 00 FF
BB FF 3C 00 00 00 00 00 01 FF
AA FF 71 01 00 00 00 00 00 00 发送停止指令
BB FF 71 00 00 00 00 00 00 FF 返回停止指令确认
BB FF 3C 00 00 00 00 00 00 FF 返回电机停止状态19、慢速停止电机运行
AA FF 6D 01 00 FF FF FF E6 00 反方向运行10圈
BB FF 6D 00 00 00 00 00 00 FF
BB FF 3C 00 00 00 00 00 01 FF
AA FF 72 01 00 00 00 00 00 00 发送停止指令
BB FF 71 00 00 00 00 00 00 FF 返回停止指令确认
BB FF 3C 00 00 00 00 00 00 FF 返回电机停止状态20、将当前位置作为某个电机的0点位置
Par1(1X2Y3Z)
AA FF 75 01 00 00 00 00 00 00
21、读取当前的位置信息
AA FF 76 01 00 00 00 00 00 00
22、直线插补
Y轴移动到Par33Par34的位置处。

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