DSP滤波器中英文对照外文翻译文献

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图像处理中值滤波器中英文对照外文翻译文献

中英文资料对照外文翻译一、英文原文A NEW CONTENT BASED MEDIAN FILTERABSTRACTIn this paper the hardware implementation of a contentbased median filter suitabl e for real-time impulse noise suppression is presented. The function of the proposed ci rcuitry is adaptive; it detects the existence of impulse noise in an image neighborhood and applies the median filter operator only when necessary. In this way, the blurring o f the imagein process is avoided and the integrity of edge and detail information is pre served. The proposed digital hardware structure is capable of processing gray-scale im ages of 8-bit resolution and is fully pipelined, whereas parallel processing is used to m inimize computational time. The architecturepresented was implemented in FPGA an d it can be used in industrial imaging applications, where fast processing is of the utm ost importance. The typical system clock frequency is 55 MHz.1. INTRODUCTIONTwo applications of great importance in the area of image processing are noise filtering and image enhancement [1].These tasks are an essential part of any image pro cessor,whether the final image is utilized for visual interpretation or for automatic an alysis. The aim of noise filtering is to eliminate noise and its effects on the original im age, while corrupting the image as little as possible. To this end, nonlinear techniques (like the median and, in general, order statistics filters) have been found to provide mo re satisfactory results in comparison to linear methods. Impulse noise exists in many p ractical applications and can be generated by various sources, including a number of man made phenomena, such as unprotected switches, industrial machines and car ign ition systems. Images are often corrupted by impulse noise due to a noisy sensor or ch annel transmission errors. The most common method used for impulse noise suppressi on n forgray-scale and color images is the median filter (MF) [2].The basic drawback o f the application of the MF is the blurringof the image in process. In the general case,t he filter is applied uniformly across an image, modifying pixels that arenot contamina ted by noise. In this way, the effective elimination of impulse noise is often at the exp ense of an overalldegradation of the image and blurred or distorted features[3].In this paper an intelligent hardware structure of a content based median filter (CBMF) suita ble for impulse noise suppression is presented. The function of the proposed circuit is to detect the existence of noise in the image window and apply the corresponding MFonly when necessary. The noise detection procedure is based on the content of the im age and computes the differences between the central pixel and thesurrounding pixels of a neighborhood. The main advantage of this adaptive approach is that image blurrin g is avoided and the integrity of edge and detail information are preserved[4,5]. The pro posed digital hardware structure is capable of processing gray-scale images of 8-bitres olution and performs both positive and negative impulse noise removal. The architectt ure chosen is based on a sequence of four basic functional pipelined stages, and parall el processing is used within each stage. A moving window of a 3×3 and 5×5-pixel im age neighborhood can be selected. However, the system can be easily expanded to acc ommodate windows of larger sizes. The proposed structure was implemented using fi eld programmable gate arrays (FPGA). The digital circuit was designed, compiled and successfully simulated using the MAX+PLUS II Programmable Logic Development S ystem by Altera Corporation. The EPF10K200SFC484-1 FPGA device of the FLEX1 0KE device family was utilized for the realization of the system. The typical clock fre quency is 55 MHz and the system can be used for real-time imaging applications whe re fast processing is required [6]. As an example,the time required to perform filtering of a gray-scale image of 260×244 pixels is approximately 10.6 msec.2. ADAPTIVE FILTERING PROCEDUREThe output of a median filter at a point x of an image f depends on the values of t he image points in the neighborhood of x. This neighborhood is determined by a wind ow W that is located at point x of f including n points x1, x2, …, xn of f, with n=2k+1. The proposed adaptive content based median filter can be utilized for impulse noisesu p pression in gray-scale images. A block diagram of the adaptive filtering procedure is depicted in Fig. 1. The noise detection procedure for both positive and negative noise is as follows:(i) We consider a neighborhood window W that is located at point x of the image f. Th e differences between the central pixel at point x and the pixel values of the n-1surr ounding points of the neighborhood (excluding thevalue of the central pixel) are co mputed.(ii) The sum of the absolute values of these differences is computed, denoted as fabs(x ). This value provides ameasure of closeness between the central pixel and its su rrounding pixels.(iii) The value fabs(x) is compared to fthreshold(x), which is anappropriately selected positive integer threshold value and can be modified. The central pixel is conside red to be noise when the value fabs(x) is greater than thethreshold value fthresho d(x).(iv) When the central pixel is considered to be noise it is substituted by the median val ue of the image neighborhood,denoted as fk+1, which is the normal operationof the median filter. In the opposite case, the value of the central pixel is not altered and the procedure is repeated for the next neighborhood window.From the noised etection scheme described, it should be mentioned that the noise detection level procedure can be controlled and a range of pixel values (and not only the fixedvalues of 0 and 255, salt and pepper noise) is considered asimpulse noise.In Fig. 2 the results of the application of the median filter and the CBMF in the gray-sca le image “Peppers” are depicted.More specifically, in Fig. 2(a) the original,uncor rupted image“Peppers” is depicted. In Fig. 2(b) the original imagedegraded by 5% both positive and negative impulse noise isillustrated. In Figs 2(c) and 2(d) the resultant images of the application of median filter and CBMF for a 3×3-pixel win dow are shown, respectively. Finally, the resultant images of the application of m edian filter and CBMF for a 5×5-pixelwindow are presented in Figs 2(e) and 2(f). It can be noticed that the application of the CBMF preserves much better edges a nddetails of the images, in comparison to the median filter.A number of different objective measures can be utilized forthe evaluation of these results. The most wi dely used measures are the Mean Square Error (MSE) and the Normalized Mean Square Error (NMSE) [1]. The results of the estimation of these measures for the two filters are depicted in Table I.For the estimation of these measures, the result ant images of the filters are compared to the original, uncorrupted image.From T able I it can be noticed that the MSE and NMSE estimatedfor the application of t he CBMF are considerably smaller than those estimated for the median filter, in all the cases.Table I. Similarity measures.3. HARDWARE ARCHITECTUREThe structure of the adaptive filter comprises four basic functional units, the mo ving window unit , the median computation unit , the arithmetic operations unit , and th e output selection unit . The input data of the system are the gray-scale values of the pi xels of the image neighborhood and the noise threshold value. For the computation of the filter output a3×3 or 5×5-pixel image neighborhood can be selected. Image input d ata is serially imported into the first stage. In this way,the total number of the inputpin s are 24 (21 inputs for the input data and 3 inputs for the clock and the control signalsr equired). The output data of the system are the resultant gray-scale values computed f or the operation selected (8pins).The moving window unit is the internal memory of the system,used for storing th e input values of the pixels and for realizing the moving window operation. The pixel values of the input image, denoted as “IMAGE_INPUT[7..0]”, areimported into this u nit in serial. For the representation of thethreshold value used for the detection of a no Filter Impulse noise 5% mse Nmse(×10-2) 3×3 5×5 3×3 5×5Median CBMF 57.554 35.287 130.496 84.788 0.317 0.194 0.718 0.467ise pixel 13 bits are required. For the moving window operation a 3×3 (5×5)-pixel sep entine type memory is used, consisting of 9 (25)registers. In this way,when the windoP1 P2 P3w is moved into the next image neighborhood only 3 or 5 pixel values stored in the memory are altered. The “en5×5” control signal is used for the selection of the size of th e image window, when“en5×5” is equal to “0” (“1”) a 3×3 (5×5)-pixel neighborhood is selected. It should be mentioned that the modules of the circuit used for the 3×3-pix el window are utilized for the 5×5-pixel window as well. For these modules, 2-to-1mu ltiplexers are utilized to select the appropriate pixel values,where necessary. The mod ules that are utilized only in the case of the 5×5-pixel neighborhood are enabled by th e“en5×5” control signal. The outputs of this unit are rows ofpixel values (3 or 5, respe ctively), which are the inputs to the median computation unit.The task of the median c omputation unit is to compute themedian value of the image neighborhood in order to substitutethe central pixel value, if necessary. For this purpose a25-input sorter is utili zeed. The structure of the sorter has been proposed by Batcher and is based on the use of CS blocks. ACS block is a max/min module; its first output is the maximumof the i nputs and its second output the minimum. The implementation of a CS block includes a comparator and two 2-to-1 multiplexers. The outputs values of the sorter, denoted a s “OUT_0[7..0]”…. “OUT_24[7..0]”, produce a “sorted list” of the 25 initial pixel val ues. A 2-to-1 multiplexer isused for the selection of the median value for a 3×3 or 5×5-pixel neighborhood.The function of the arithmetic operations unit is to computethe value fabs(x), whi ch is compared to the noise threshold value in the final stage of the adaptive filter.The in puts of this unit are the surrounding pixel values and the central pixelof the neighb orhood. For the implementation of the mathematical expression of fabs(x), the circuit of this unit contains a number of adder modules. Note that registers have been used to achieve a pipelined operation. An additional 2-to-1 multiplexer is utilized for the selec tion of the appropriate output value, depending on the “en5×5” control signal. From th e implementation point of view, the use of arithmetic blocks makes this stage hardwar e demanding.The output selection unit is used for the selection of the appropriateoutput value of the performed noise suppression operation. For this selection, the corresponding no ise threshold value calculated for the image neighborhood,“NOISE_THRES HOLD[1 2..0]”,is employed. This value is compared to fabs(x) and the result of the comparison Classifies the central pixel either as impulse noise or not. If thevalue fabs(x) is greater than the threshold value fthreshold(x) the central pixel is positive or negative impulse noise and has to be eliminated. For this reason, the output of the comparison is used as the selection signal of a 2-to-1 multiplexer whose inputs are the central pixel and the c orresponding median value for the image neighborhood. The output of the multiplexer is the output of this stage and the final output of the circuit of the adaptive filter.The st ructure of the CBMF, the computation procedure and the design of the four aforeme n tioned units are illustrated in Fig. 3.ImagewindoeFigure 1: Block diagram of the filtering methodFigure 2: Results of the application of the CBMF: (a) Original image, (b) noise corrupted image (c) Restored image by a 3x3 MF, (d) Restored image by a 3x3 CBMF, (e) Restored image by a 5x5 MF and (f) Restored image by a 5x5 CBMF.4. IMPLEMENTATION ISSUESThe proposed structure was implemented in FPGA,which offer an attractive com bination of low cost, high performance and apparent flexibility, using the software pa ckage+PLUS II of Altera Corporation. The FPGA used is the EPF10K200SFC484-1 d evice of the FLEX10KE device family,a device family suitable for designs that requir e high densities and high I/O count. The 99% of the logic cells(9965/9984 logic cells) of the device was utilized to implement the circuit . The typical operating clock frequ ency of the system is 55 MHz. As a comparison, the time required to perform filtering of a gray-scale image of 260×244 pixelsusing Matlab® software on a Pentium 4/2.4 G Hz computer system is approximately 7.2 sec, whereas the corresponding time using h ardware is approximately 10.6 msec.The modification of the system to accommodate windows oflarger sizes can be done in a straightforward way, requiring onlya small nu mber of changes. More specifically, in the first unit the size of the serpentine memory P4P5P6P7P8P9SubtractorarryMedianfilteradder comparatormuitiplexerf abc(x)valueand the corresponding number of multiplexers increase following a square law. In the second unit, the sorter module should be modified,and in the third unit the number of the adder devicesincreases following a square law. In the last unit no changes are requ ired.5. CONCLUSIONSThis paper presents a new hardware structure of a content based median filter, ca pable of performing adaptive impulse noise removal for gray-scale images. The noise detection procedure takes into account the differences between the central pixel and th e surrounding pixels of a neighborhood.The proposed digital circuit is capable ofproce ssing grayscale images of 8-bit resolution, with 3×3 or 5×5-pixel neighborhoods as op tions for the computation of the filter output. However, the design of the circuit is dire ctly expandableto accommodate larger size image windows. The adaptive filter was d eigned and implemented in FPGA. The typical clock frequency is 55 MHz and the sys tem is suitable forreal-time imaging applications.REFERENCES[1] W. K. Pratt, Digital Image Processing. New York: Wiley,1991.[2] G. R. Arce, N. C. Gallagher and T. Nodes, “Median filters:Theory and applicat ions,” in Advances in ComputerVision and Image Processing, Greenwich, CT: JAI, 1986.[3] T. A. Nodes and N. C. Gallagher, Jr., “The output distributionof median type filte rs,” IEEE Transactions onCommunications, vol. COM-32, pp. 532-541, May1984.[4] T. Sun and Y. Neuvo, “Detail-preserving median basedfilters in imageprocessing,” Pattern Recognition Letters,vol. 15, pp. 341-347, Apr. 1994.[5] E. Abreau, M. Lightstone, S. K. Mitra, and K. Arakawa,“A new efficient approachfor the removal of impulsenoise from highly corrupted images,” IEEE Transa ctionson Image Processing, vol. 5, pp. 1012-1025, June 1996.[6] E. R. Dougherty and P. Laplante, Introduction to Real-Time Imaging, Bellingham:SPIE/IEEE Press, 1995.二、英文翻译基于中值滤波的新的内容摘要在本设计中的提出了基于中值滤波的硬件实现用来抑制脉冲噪声的干扰。

整流器中英文对照外文翻译文献

中英文资料外文翻译AC Voltage and Current Sensorless Control ofThree -Phase PWM Rectifiers1 THREE -PHASE PWM RECTIFIERSA System ModelingFig . 1 shows the power circuit of the three -phase PWM rectifier . The voltage equations are given by000000a a a b b b c c c R pL R pL R pL e i v e i v e i v ⎡⎤⎡⎤⎡⎤+⎛⎫⎢⎥⎢⎥⎢⎥ ⎪=++⎢⎥⎢⎥⎢⎥ ⎪⎢⎥⎢⎥⎢⎥ ⎪+⎝⎭⎢⎥⎢⎥⎢⎥⎣⎦⎣⎦⎣⎦ (1)Fig. 1. Three-phase PWM rectifier without ac-side sensors.where , and are the source voltage, the line current, and the rectifier input voltage, respectively and are the input resistance and the input inductance, respectively . When the peak line voltage , angular frequency , and initial phase angle are given, assuming a balanced three -phase system, the source phase voltage is expressed ascos 2cos()32cos()3a b c E e e e θθπθπ⎡⎤⎢⎥⎡⎤⎢⎥⎢⎥⎢⎥=-⎢⎥⎢⎥⎢⎥⎢⎥⎢⎥⎣⎦⎢⎥+⎣⎦ (2) Where0t θωθ=+ (3)A transformation matrix based on the estimated phase angle ,which transforms three -phase variables into a synchronous d –q reference frame, is23222cos cos()cos()323sin sin()sin()M M M M M M C θθπθπθθπθπ⎛⎫-+ ⎪ ⎪= ⎪++ ⎪⎝⎭ (4)Transforming (1) into the – reference frame using (4)qc qc qc M M dc dc dc e i v R pL L L R pL e i v ωω⎡⎤⎡⎤⎡⎤+-⎛⎫=+⎢⎥⎢⎥⎢⎥ ⎪+⎝⎭⎣⎦⎣⎦⎣⎦ (5)where p is a differential operator and .M M ωθ=Expressing (5) in a vector notationM e Ri LJi pLi v ω=+++ (6) where,qc dc e e e ⎡⎤=⎢⎥⎣⎦,qc dc i i i ⎡⎤=⎢⎥⎣⎦,qc dc v v v ⎡⎤=⎢⎥⎣⎦,0110J -⎛⎫= ⎪⎝⎭ (7) Taking a transformation of (2) by using (4)cos sin E e E θθ∆⎡⎤=⎢⎥∆⎣⎦ (8) WhereM θθθ∆=- (9)Expressing (6) and (8) in a discrete domain, by approximating the derivative term in (6) by a forward difference [9], respectively,[](1)(1)(1)()(1)(1)M e k Ri k LJi k L i k i k v k T ω-=-+-+--+- (10)c o s (1)(1)s i n (1)E k e k E k θθ∆-⎡⎤-=⎢⎥-∆-⎣⎦(11)Where T is the sampling period .Fig. 2. Overall control block diagram.B System ControlThe PI controllers are used to regulate the dc output voltage and the ac input current . For decoupling current control, the cross -coupling terms are compensated in a feed forward -typeand the source voltage is also compensated as a disturbance . For transient responses without overshoot, the anti -windup technique is employed [10]. The overall control block diagram eliminating the source voltage and line current sensors is shown in Fig . 2. The estimation algorithm of source voltages and line currents is described in the following sections .2 PREDICTIVE CURRENT ESTIMATIONThe currents of ()a I k and ()c I k can not be calculated instantly since the calculation time of the DSP is required . To eliminate the delay effect, a state observer can be used . In addition, the state observer provides the filtering effects for the estimated variable .Expressing (5) in a state -space form,x Ax Bu =+ (12) y Cx = (13) where,R L A R L ωω⎛⎫-- ⎪= ⎪ ⎪- ⎪⎝⎭,1010L B L ⎛⎫ ⎪= ⎪ ⎪ ⎪⎝⎭,1001C ⎛⎫= ⎪⎝⎭qc dc i x i ⎡⎤=⎢⎥⎣⎦,qc qc dc dc e v u e v -⎡⎤=⎢⎥-⎣⎦ And y is the output .Transforming (12) and (13) into a discrete domain, respectively,(1)()()X k FX k GU k +=+ (14)()()Y k HX k = (15)where,1111R T T L F R T T L ωω⎛⎫-- ⎪= ⎪ ⎪+- ⎪⎝⎭,00T L G T L ⎛⎫ ⎪= ⎪ ⎪ ⎪⎝⎭Then, the observer equation adding an error correction term to is given by(1)()()(()())X k F X k GU k K Y k Yk +=++- (16) Where K is the observer gain matrix and “＾ ” means the estimated quantity, and (1)X k + is the state variable estimated ahead one sampling period . Subtracting (15) from (16), the error dynamic equation of the observer is expressed as(1)[]()rr rr e k F KC e k +=- (17) where ()()()rr e k X k X k =- . Here, it is assumed that the model parameters match well with the real ones . Fig . 3 shows the block diagram of the closed -loop state observer .The state variable error depends only on the initial error and is independent of the input . For (17) to converge to the zero state, the roots of the characteristic equation of (17) should be located within the unit circle .Fig. 3. Closed-loop state observer.Fig. 4. Short pulse region.4EXPERIMENTS AND DISCUSSIONSA. System Hardware ConfigurationFig. 5shows the system hardware configuration. The source voltage is a three-phase,110[V].The input resistance and inductance are0.06Ωand3.3 mH,respectively. The dc link capacitance is2350μF and the switching frequency of the PWM rectifier is3.5kHz.Fig. 5. System hardware configuration.Fig. 6. Dc link currents and corresponding phase currents (in sector V ).The TMS320C31DSP chip operating at33.3MHz is used as a main processor and two12-b A/D converters are used. One of them is dedicated for detecting the dc link current and the other is used for measuring the dc outputvoltage and the source voltages and currents,where ac side quantities are just measured for performance comparison.One of two internal timers in the DSP is employed to decide the PWM control period and the other is used to determine the dc link current interrupt. Considering the rectifier blanking time of3.5s,A/D conversion time of2.6s, and the other signal delay time,the minimum pulse width is set to10s.A.Experimental ResultsFig. 6shows measured dc link currents and phase currents. In case of sector V of the space vector diagram,the dc link current corresponds to for the switching state of and for that of . Fig. 7(a)shows the raw dc link current before filtering. It has a lot of ringing components due to the resonance of the leakage inductance and the snubber capacitor. When the dc current is sampled at the end point of the active voltage vectors as shown in the figure,the measuring error can be reduced.Fig. 7. Sampling of dc link currents.Fig. 8. Estimated source voltage and current at starting.To reduce this error further,the low pass filter should be employed,of which result is shown in Fig. 7(b). The cut-off frequency of the Butterworth’s second-order filter is112kHz and its delay time is about2sec. Since the ringing frequency is258kHz and the switching frequency is3.5[kHz],the filtered signal without significant delay is acquired.Fig. 8shows the estimated source voltage and current at starting. With the proposed initial estimation strategy,the starting operation is well performed. Fig. 9shows the phaseangle,magnitude,and waveform of the estimated source voltage,which coincide well with measured ones.Fig. 10shows the source voltage and current waveform at unity power factor. Figs. With the estimated quantities for the feedback control,the control performance is satisfactory. The dc voltage variation for load changes will be remarkably decreased if a feedforward control for theload current is added, which is possible without additional cur-rent sensor when the PWM rectifier is combined with the PWM inverter for ac motor drives.(a) phase angle (b)magnitude (c) waveform.Fig. 10. Source voltage and current waveforms.(a)estimated (b) measured.4 CONCLUSIONSThis paper proposed a novel control scheme of the PWM rectifiers without employing any ac input voltage and current sensors and with using dc voltage and current sensors only. Reducing the number of the sensors used decreases the system cost as well as improves the system reliability. The phase angle and the magnitude of the source voltage have been estimated bycontrolling the deviation between the rectifier current and its model current tobe zero. For line current reconstruction,switching states and measured dc link currents were used. To eliminate the effect of the calculation time delay of the microprocessor,the predictive state observer was used. It was shown that the estimation algorithm is robust to the parameter variation. The whole algorithm has been implemented for a proto-type1.5[kV A]PWM rectifier system controlled by TMS320C31DSP. The experimental results have verified that the proposed ac sensor elimination method is feasible.无交流电动势、电流传感器的三相PWM整流器控制1三相PWM整流器A 系统模型图一所示为三相PWM 整流器的主电路，电压等式给出如下：000000a a a b b b c c c R pL R pL R pL e i v e i v e i v ⎡⎤⎡⎤⎡⎤+⎛⎫⎢⎥⎢⎥⎢⎥ ⎪=++⎢⎥⎢⎥⎢⎥ ⎪⎢⎥⎢⎥⎢⎥ ⎪+⎝⎭⎢⎥⎢⎥⎢⎥⎣⎦⎣⎦⎣⎦ (1)图1 无交流传感器三相PWM 整流器其中e ，i 和v 分别是源电压，线电流和整流器的输入电压，R 和L 分别是输入电阻和输入电感。

外文文献翻译译稿和原文

外文文献翻译译稿1卡尔曼滤波的一个典型实例是从一组有限的，包含噪声的，通过对物体位置的观察序列（可能有偏差）预测出物体的位置的坐标及速度。

在很多工程应用（如雷达、计算机视觉）中都可以找到它的身影。

同时，卡尔曼滤波也是控制理论以及控制系统工程中的一个重要课题。

例如，对于雷达来说，人们感兴趣的是其能够跟踪目标。

但目标的位置、速度、加速度的测量值往往在任何时候都有噪声。

卡尔曼滤波利用目标的动态信息，设法去掉噪声的影响，得到一个关于目标位置的好的估计。

这个估计可以是对当前目标位置的估计（滤波），也可以是对于将来位置的估计（预测），也可以是对过去位置的估计（插值或平滑）。

命名[编辑]这种滤波方法以它的发明者鲁道夫.E.卡尔曼（Rudolph E. Kalman）命名，但是根据文献可知实际上Peter Swerling在更早之前就提出了一种类似的算法。

斯坦利。

施密特（Stanley Schmidt）首次实现了卡尔曼滤波器。

卡尔曼在NASA埃姆斯研究中心访问时，发现他的方法对于解决阿波罗计划的轨道预测很有用，后来阿波罗飞船的导航电脑便使用了这种滤波器。

关于这种滤波器的论文由Swerling（1958）、Kalman (1960)与Kalman and Bucy（1961）发表。

目前，卡尔曼滤波已经有很多不同的实现。

卡尔曼最初提出的形式现在一般称为简单卡尔曼滤波器。

除此以外，还有施密特扩展滤波器、信息滤波器以及很多Bierman, Thornton开发的平方根滤波器的变种。

也许最常见的卡尔曼滤波器是锁相环，它在收音机、计算机和几乎任何视频或通讯设备中广泛存在。

以下的讨论需要线性代数以及概率论的一般知识。

卡尔曼滤波建立在线性代数和隐马尔可夫模型（hidden Markov model）上。

其基本动态系统可以用一个马尔可夫链表示，该马尔可夫链建立在一个被高斯噪声（即正态分布的噪声）干扰的线性算子上的。

系统的状态可以用一个元素为实数的向量表示。

中值滤波器脉冲噪声中英文对照外文翻译文献

中英文资料外文翻译文献Improved 2-D Median Filter for On-Line Impulse Noise Suppressiom Abstract-An inproved 2-D median filter employing multishell concept to suppress impulse noise ,is presented.The performance of proposed filter is evaluated over image ‘LENA’,The impulsive noise is added using MATLAB utility.The modified strategy reduces the mnuber of replacement and results in better performance and simple hardware realization that is suitable for on-line implementation.Index terms-Median Filter , Multi-shell Median Filter, Impulse NoiseI.INTRODUCTIONIn TV and other imaging systems,impulse noise is a common impairment . The standard T.V.Broadcast signal is often contaminated with impulsive noise arising from various sources such as household electrical appliance and atmospheric disturbances.Broad banding of the signal further increases the level of impulsive noise. V arious filters are proposed to suppress such impairments[1].The median filter(MF)[1-2] is widely usedfor impulse noise suppression and the multishell median filter(MMF)[3] introduces the concept of missing line recovery. Although these filters have satisfactory performance, MMF failsto filter two impulse noises in the same prossing window. Moveover,these filters tend to blur the images due to too many replacements. C.J.Juan proposed a modified multishell median filter (MMMF)[4], which removes most of the shortcomings associated with the MF and the MMF. However, it is observed that under certain condions, to be discussed in the follow sections, MMMF fails to perform the desired filtering operation .Moreover,the number of calculations/replacements invoved on the basis of MIN/MAX conditions is still too large and makes the filter difficult to realize,particulariy for real time applications.In this paper, the threshold strtegy of MMMF is modified so that:(a)effective noise filtering operations are performed under allconditions,and(b)number of calculations/replacements is reduced and simplified. This results in a simple hardware realization of the filter.II.PROPOSED MODIFICATIONConsider a 3x3-processing window, with P5 as the central pixel,as shown in Figure 1.P1 P2 P3P4 P5 P6P7 P8 P9Fig.1. A 3x3 processing windowThe output of MMMF as proposed in [4] isOutput (X,Y)= Max(P2,P8)if P5﹥Max[S]P5 if Min [s]﹤Max[S]Min(P2,P8) if P5﹤Max[S] (1)Where S is the set of samples surrounding central pixels except(P4.P6)i.e.S=｛P1,P2,P3,P7,P8,P9｝ (2) The principle invoved in the replacement strategy of Equation(1) is that if P5 is corrupted by noise ,it is better to replaceits gray level by P2 or P8 than by using Min[S] orMax[S] .also,due to missing lines error,since P4 and P6 may belost, they are not considered in Equation(2).The limitation of Equation(1) is that when Min[S] or Max[S] arealso corrupted by impulse noise,i.e.either Min[S] or Max[S] isequal to P5,Equation(1)fails to perform the desired filtering operation.To overcome this limitation following modificationsin the replacement strategy of Equation(1),are proposed.Output (X,Y)= Max(P2,P8)if P5≥Max[S]P5 if Min [s]＜P5＜Max[S] Min(P2,P8) if P5≤Max[S] (3)It has been observed that more than 70-80% points in an image,the gray level diatances of P5 from(P2 or P8) and from Max[S] are below 16.This is shown in Fig.2 for the image ‘LENA’.This fact is used to further reduce unnessary replacements,thereby reducing the bluring of the images.Thus taking into considertion of Figure(3) can be further modified asOutput (X,Y)= Max(P2,P8)if P5-Max[S]≥16Max(P2,P8) if Min [s]-P5≥16P5 otherwise （4）Equation 4 indicates that replacing action takes place only when the distance between P5 and Min[S] or Max[S] is no smaller than 16. This strtegy thus avoids the necessary replacements and reduces blurring of the images.Moreover，it can be implemented using simple comparators and subtractors.Gray level distancesFig.2. Gray level distances between central point and its neighboring points for the image ‘LENNA’Ⅲ .RESULTSFigure 3 shows the original image ‘LENNA’and Figure 4 shows the same image when corrupted with impulse noise. Results of median filter and the proposed filter are given in Figures 5 and 6, paring Figures 5 and 6, it is observed that the result of the proposed filter is much better than those obtained using the median filter. Aithough,the median filter remove the impulsive moise effectively, however,the image gets blurred.The proposed filter removes the impulsive noise and also preserves the details of the image.A multishell filter employing the modified replacement strategy is presentde in this paper.The modified filter effectively suppresses the inpulse moise.It uses threshold conditions that require fewer comparisons and replacements and is faster as compared to the other multishell median filters.moreover,it can be realized using simple comparators and subtractors and subtractors and hence can be effectively used in real time applications改进二维中值滤波器在线脉冲噪声的抑制摘要：一种改进二维中值滤波器，采用多壳的概念，以抑制脉冲噪声，拟定的过滤器的性能进行评估超过图像“LENNA”的中值滤波，脉冲噪声被添加使用到MATLAB的实用工具中。

电子信息工程专业外文翻译--滤波器

外文原文一、a question for study or discussion1．Research background and purpose1.1 conceptualizeElliptic filter (Elliptic filter), also known as the Call filter (Cauer filter), is in the passband and stopband ripple of a filter. Elliptic filter when compared to other types of filters, in order under the same conditions with minimal fluctuations in the passband and stopband. Same as its wave in passband and stopband, which distinguish it from the Butterworth filter with flat passband and stopband and flat passband and the stopband ripple or resistance with flat, cut than the snow filter passband ripple.A low-pass filter with a frequency response range of the ellipse：Four-order low-pass elliptic filter frequency response。

1.2 scientific researchIn the low-frequency (600Hz=500KHz) commonly used in band-pass filter, large LC filters, poor stability, stability of Crystal filters, but can only be made of narrow-band filter, bad shock and vibration resistance. Active filters are small, but stability and decay characteristics are often poor, and debugging easy. Ceramic filter is poor and low-frequency seismic performance of low temperature coefficient. And than snow filter Butterworth filter transfer function is a polynomial divided by a constant, for the whole network, all zeros in infinite, only infinite stopband attenuation is infinite, and the elliptic filter in both with zeros and poles on the limited frequency. Zero ripple in the passband, that it has a minimum across the passband and stopband ripple, This is distinguished from Butterworth filter with flat passband and stopband。

【最新推荐】基于DSP的IIR滤波器设计外文文献

学科分类号本科毕业设计题目(中文)：基于DSP的IIR滤波器设计(英文)：The Design of IIR Filter Basedon DSP Chip姓名学号院(系)专业、年级指导教师二〇年月目录摘要 (1)Abstract. (2)1 绪论 (2)1.1 认识数字信号处理和IIR数字滤波器 (3)1.2 数字滤波器的实现方法 (4)1.3 主要研究内容 (6)2 滤波器原理基础 (6)2.1 IIR数字滤波器的优缺点 (7)2.2 IIR数字滤波器的设计方法和原理 (9)2.2.1 脉冲响应不变法 (12)2.2.2 双线性变换法 (14)2.3 IIR滤波器的基本结构 (17)3 IIR滤波器的设计过程及DSP的实现 (21)3.1 IIR滤波器的设计过程 (21)3.2 DSP系统的设计流程 (22)3.3 IIR数字滤波器在DSP上的实现 (22)参考文献 (27)附录 (28)致谢 (31)外文文献译文......................................................................................... 1-3 外文文献原文基于DSP的IIR滤波器设计摘要：数字信号处理(Digital Signal Processing，DSP)是一门涉及许多学科而又广泛应用于众多领域的新兴学科。

早在20世纪60年代，数字信号处理(即信号的数字化及数字处理)理论已经被被提出，到20世纪70年代，DSP理论和算法基础才被人提出。

不久之后，1982年世界上第一枚DSP芯片诞生了。

这枚DSP芯片在当时运算速度很快，尤其是在编码解码和语音合成方面得到广泛应用。

随着科学技术的飞速发展，数字化硬件技术得到长足的发展，这就带动了数字信号处理的飞速发展，也使得它得到了很多的实际应用，由此奠定了DSP这一词的地位。

之后，DSP芯片的科研不断推陈出新，每一代的DSP芯片都向着使运算速度更快、精度更高的目标发展，应用于通信、语音、医疗、仪器仪表和家用电器等人类生产生活的各个领域。

外文翻译--数字滤波器的仿真与实现

毕业设计(论文)外文资料翻译院系电子信息工程专业电子信息工程学生姓名班级学号外文出处百度文库附件：1.外文资料翻译译文（约3000汉字）；2.外文资料原文(与课题相关的1万印刷符号左右)。

英文原文The simulation and the realization of the digital filter With the information age and the advent of the digital world, digital signal processing has become one of today's most important disciplines and door technology. Digital signal processing in communications, voice, images, automatic control, radar, military, aerospace, medical and household appliances, and many other fields widely applied. In the digital signal processing applications, the digital filter is important and has been widely applied.1、figures Unit on :Analog and digital filtersIn signal processing, the function of a filter is to remove unwanted parts of the signal, such as random noise, or to extract useful parts of the signal, such as the components lying within a certain frequency range.The following block diagram illustrates the basic idea.There are two main kinds of filter, analog and digital. They are quite different in their physical makeup and in how they work. An analog filter uses analog electronic circuits made up from components such as resistors, capacitors and op amps to produce the required filtering effect. Such filter circuits are widely used in such applications as noise reduction, video signal enhancement, graphic equilibrium in hi-fi systems, and many other areas. There are well-established standard techniques for designing an analog filter circuit for a given requirement. At all stages, the signal being filtered is an electrical voltage or current which is the direct analogue of the physical quantity (e.g. a sound or video signal or transducer output) involved. A digital filter uses a digital processor to performnumerical calculations on sampled values of the signal. The processor may be a general-purpose computer such as a PC, or a specialized DSP (Digital Signal Processor) chip. The analog input signal must first be sampled and digitized using an ADC (analog to digital converter). The resulting binary numbers, representing successive sampled values of the input signal, are transferred to the processor, which carries out numerical calculations on them. These calculations typically involve multiplying the input values by constants and adding the products together. If necessary, the results of these calculations, which now represent sampled values of the filtered signal, are output through a DAC (digital to analog converter) to convert the signal back to analog form.Note that in a digital filter, the signal is represented by a sequence of numbers, rather than a voltage or current.The following diagram shows the basic setup of such a system.Unit refers to the input signals used to filter hardware or software. If the filter input, output signals are separated, they are bound to respond to the impact of the Unit is separated, such as digital filters filter definition. Digital filter function, which was to import sequences X transformation into export operations through a series Y.According to figures filter function 24-hour live response characteristics, digital filters can be divided into two, namely, unlimited long live long live the corresponding IIR filter and the limited response to FIR filters. IIR filters have theadvantage of the digital filter design can use simulation results, and simulation filter design of a large number of tables may facilitate simple. It is the shortcomings of the nonlinear phase; Linear phase if required, will use the entire network phase-correction. Image processing and transmission of data collection is required with linear phase filters identity. And FIR linear phase digital filter to achieve, but an arbitrary margin characteristics. Impact from the digital filter response of the units can be divided into two broad categories : the impact of the limited response (FIR) filters, and unlimited number of shocks to (IIR) digital filters.FIR filters can be strictly linear phase, but because the system FIR filter function extremity fixed at the original point, it can only use the higher number of bands to achieve their high selectivity for the same filter design indicators FIR filter called band than a few high-IIR 5-10 times, the cost is higher, Signal delay is also larger. But if the same linear phase, IIR filters must be network-wide calibration phase, the same section also increase the number of filters and net work complexity. FIR filters can be used the recursive method, not in a limited precision of a shock, and into the homes and quantitative factors of uncertainty arising from the impact of errors than IIR filter small number, and FIR filter can be used FFT algorithms, the computational speed. But unlike IIR filter can filter through the simulation results, there is no ready-made formula FIR filter must use computer-aided design software (such as MATLAB) to calculate. So, a broader application of FIR filters, and IIR filters are not very strict requirements on occasions.Unit from sub-functions can be divided into the following four categories :(1) Low-filter (LPF);(2) high-filter (HPF);(3) belt-filter (BPF);(4) to prevent filter (BSF).The following chart dotted line for the ideals of the filter frequency characteristics :2、MATLAB introducedMATLAB is a matrix laboratory (Matrix Laboratory) is intended. In addition to an excellent value calculation capability, it also provides professional symbols terms, word processing, visualization modeling, simulation and real-time control functions. MATLAB as the world's top mathematical software applications, with a strong engineering computing, algorithms research, engineering drawings, applications development, data analysis and dynamic simulation, and other functions, in aerospace, mechanical manufacturing and construction fields playing an increasingly important role. And the C language function rich, the use of flexibility, high-efficiency goals procedures. High language both advantages aswell as low level language features. Therefore, C language is the most widely used programming language. Although MATLAB is a complete, fully functional programming environment, but in some cases, data and procedures with the external environment of the world is very necessary and useful. Filter design using MATLAB, could be adjusted with the design requirements and filter characteristics of the parameters, visual simple, greatly reducing the workload for the filter design optimization.In the electricity system protection and secondary computer control, many signal processing and analysis are based on are certain types sinusoidal wave and the second harmonics of the system voltage and current signals (especially at D process), are mixed with a variety of complex components, the filter has been installed power system during the critical components. Current computer protection and the introduction of two digital signal processing software main filter. Digital filter design using traditional cumbersome formula, the need to change the parameters after recalculation, especially in high filters, filter design workload. Uses MATLAB signal processing boxes can achieve rapid and effective digital filter design and simulation.MATLAB is the basic unit of data matrix, with its directives expression mathematics, engineering, commonly used form is very similar, it is used to solve a problem than in MATLAB C, Fortran and other languages End precision much the same thing. The popular MATLAB 5.3/Simulink3.0 including hundreds of internal function with the main pack and 30 types of tool kits (Toolbox). kits can be divided into functional tool kits and disciplines toolkit. MATLAB tool kit used to expand the functional symbols terms, visualization modeling simulation, word processing and real-time control functions. professional disciplines toolkit is a stronger tool kits, tool kits control, signal processing tool kit, tool kits, etc. belonging to such communicationsMATLAB users to open widely welcomed. In addition to the internal function, all the packages MATLAB tool kits are readable document and the document could be amended, modified or users through original program the construction of new procedures to prepare themselves for kits.3、Digital filter designDigital filter design of the basic requirementsDigital filter design must go through three steps :(1) Identification of indicators : In the design of a filter, there must be some indicators. These indicators should be determined on the basis of the application. In many practical applications, digital filters are often used to achieve the frequency operation. Therefore, indicators in the form of general jurisdiction given frequency range and phase response. Margins key indicators given in two ways. The first is absolute indicators. It provides a function to respond to the demands of the general application of FIR filter design. The second indicator is the relative indicators. Its value in the form of answers to decibels. In engineering practice, the most popular of such indicators. For phase response indicators forms, usually in the hope that the system with a linear phase frequency bands human. Using linear phase filter design with the following response to the indicators strengths：①it only contains a few algorithms, no plural operations；②there is delay distortion, only a fixed amount of delay; ③the filter length N (number of bands for N-1), the volume calculation for N/2 magnitude.(2) Model approach : Once identified indicators can use a previous study of the basic principles and relationships, a filter model to be closer to the target system.(3) Achieved : the results of the above two filters, usually by differential equations, system function or pulse response to describe. According to this description of hardware or software used to achieve it.4、Introduction of DSPToday, DSP is widely used in the modern techno logy and it has been the key part of many products and played more and mo re important role in our daily life Recently, Northwestern Poly technical University Aviation Microelectronic Center has completed the design of digital signal processor co re NDSP25, which is aiming at TM S320C25 digital signal processor of Texas Instrument TM S320 series. By using top 2dow n design flow NDSP25 is compatible with instruction and interface timing of TM S320C25.Digital signal processors (DSP) is a fit for real-time digital signal processing for high-speed dedicated processors, the main variety used for real-time digital signal processing to achieve rapid algorithms. In today's digital age background, the DSP has become the communications, computer, and consumer electronics products, and other fields based device.Digital signal processors and digital signal processing is inseparably, we usually say "DSP" can also mean the digital signal processing (Digital Signal Processing), is that in this digital signal processors Lane. Digital signal processing is a cover many disciplines applied to many areas and disciplines, refers to the use of computers or specialized processing equipment, the signals in digital form for the collection, conversion, recovery, valuation, enhancement, compression, identification, processing, the signals are compliant form. Digital signal processors for digital signal processing devices, it is accompanied by a digital signal processing to produce. DSP development process is broadly divided into three phases : the 20th century to the 1970s theory that the 1980s and 1990s for the development of products. Before the emergence of the digital signal processing in the DSP can only rely on microprocessors (MPU) to complete. However, the advantage of lower high-speed real-time processing can not meet the requirements. Therefore, until the 1970s, a talent made based DSP theory and algorithms. With LSI technology development in 1982 was the first recipient of the world gave birth to the DSP chip. Years later, the second generation based on CMOS工艺DSP chips have emerged. The late 1980s, the advent of the third generation of DSP chips. DSP is the fastest-growing 1990s, there have been four successive five-generation and the generation DSP devices. After 20 years of development, the application of DSP products has been extended to people's learning, work and all aspects of life and gradually become electronics products determinants.中文翻译数字滤波器的仿真与实现随着信息时代和数字世界的到来，数字信号处理已成为当今一门极其重要的学科和技术领域。

滤波器英文

The simulation and the realization of the digital filterWith the information age and the advent of the digital world, digital signal processing has become one of today's most important disciplines and door technology. Digital signal processing in communications, voice, images, automatic control, radar, military, aerospace, medical and household appliances, and many other fields widely applied. In the digital signal processing applications, the digital filter is important and has been widely applied.1、figures Unit on :Analog and digital filtersIn signal processing, the function of a filter is to remove unwanted parts of the signal, such as random noise, or to extract useful parts of the signal, such as the components lying within a certain frequency range.The following block diagram illustrates the basic idea.There are two main kinds of filter, analog and digital. They are quite different in their physical makeup and in how they work. An analog filter uses analog electronic circuits made up from components such as resistors, capacitors and op amps to produce the required filtering effect. Such filter circuits are widely used in such applications as noise reduction, video signal enhancement, graphic equalisers in hi-fi systems, and many other areas. There are well-established standard techniques for designing an analog filter circuit for a given requirement. At all stages, the signal being filtered is an electrical voltage or current which is the direct analogue of the physical quantity (e.g. a sound or video signal or transducer output) involved. A digital filter uses a digital processor to perform numerical calculations on sampled values of the signal. The processor may be a general-purpose computer such as a PC, or a specialised DSP (Digital Signal Processor) chip. The analog input signal must first be sampled and digitised using an ADC (analog to digital converter). The resulting binary numbers, representing successive sampled values of the input signal, are transferred to the processor, which carries out numerical calculations on them. These calculations typically involve multiplying the input values by constants and adding the products together. If necessary, theresults of these calculations, which now represent sampled values of the filtered signal, are output through a DAC (digital to analog converter) to convert the signal back to analog form.Note that in a digital filter, the signal is represented by a sequence of numbers, rather than a voltage or current.The following diagram shows the basic setup of such a system.Unit refers to the input signals used to filter hardware or software. If the filter input, output signals are separated, they are bound to respond to the impact of the Unit is separated, such as digital filters filter definition. Digital filter function, which was to import sequences X transformation into export operations through a series Y.According to figures filter function 24-hour live response characteristics, digital filters can be divided into two, namely, unlimited long live long live the corresponding IIR filter and the limited response to FIR filters. IIR filters have the advantage of the digital filter design can use simulation results, and simulation filter design of a large number of tables may facilitate simple. It is the shortcomings of the nonlinear phase; Linear phase if required, will use the entire network phase-correction. Image processing and transmission of data collection is required with linear phase filters identity. And FIR linear phase digital filter to achieve, but an arbitrary margin characteristics. Impact from the digital filter response of the units can be divided into two broad categories : the impact of the limited response (FIR) filters, and unlimited number of shocks to (IIR) digital filters.FIR filters can be strictly linear phase, but because the system FIR filter function extremity fixed at the original point, it can only use the higher number of bands to achieve their highselectivity for the same filter design indicators FIR filter called band than a few high-IIR 5-10 times, the cost is higher, Signal delay is also larger. But if the same linear phase, IIR filters must be network-wide calibration phase, the same section also increase the number of filters and network complexity. FIR filters can be used to achieve non-Digui way, not in a limited precision of a shock, and into the homes and quantitative factors of uncertainty arising from the impact of errors than IIR filter small number, and FIR filter can be used FFT algorithms, the computational speed. But unlike IIR filter can filter through the simulation results, there is no ready-made formula FIR filter must use computer-aided design software (such as MATLAB) to calculate. So, a broader application of FIR filters, and IIR filters are not very strict requirements on occasions.Unit from sub-functions can be divided into the following four categories :(1) Low-filter (LPF);(2) high-filter (HPF);(3) belt-filter (BPF);(4) to prevent filter (BSF).The following chart dotted line for the ideals of the filter frequency characteristics :A1(f) A2(f)10 f2cf 0 f2cf(a) (b)A3(f) A4(f)0 f1cf2cf 0 f1cf2cf(c) (d)(a)LPF (b)HPF (c)BPF (d)BSF2、MATLAB introducedMATLAB is a matrix laboratory (Matrix Laboratory) is intended. In addition to an excellent value calculation capability, it also provides professional symbols terms, word processing, visualization modeling, simulation and real-time control functions. MATLAB as the world's top mathematical software applications, with a strong engineering computing, algorithms research, engineering drawings, applications development, data analysis and dynamic simulation, and other functions, in aerospace, mechanical manufacturing and construction fields playing an increasingly important role. And the C language function rich, the use of flexibility, high-efficiency goals procedures. High language both advantages as well as low level language features. Therefore, C language is the most widely used programming language. Although MATLAB is a complete, fully functional programming environment, but in some cases, data and procedures with the external environment of the world is very necessary and useful. Filter design using Matlab, could be adjusted with the design requirements and filter characteristics of the parameters, visual simple, greatly reducing the workload for the filter design optimization.In the electricity system protection and secondary computer control, many signal processing and analysis are based on are certain types Yeroskipou and the second harmonics of the system voltage and current signals (especially at D process), are mixed with a variety of complex components, the filter has been installed power system during the critical components. Current computer protection and the introduction of two digital signal processing software main filter. Digital filter design using traditional cumbersome formula, the need to change the parameters after recalculation, especially in high filters, filter design workload. Uses MATLAB signal processing boxes can achieve rapid and effective digital filter design and simulation.MATLAB is the basic unit of data matrix, with its directives Biaodashi mathematics, engineering, commonly used form is very similar, it is used to solve a problem than in MATLAB C, Fortran and other languages End precision much the same thing. The popular MATLAB 5.3/Simulink3.0 including hundreds of internal function with the main pack and 30 types of tool kits (Toolbox). kits can be divided into functional tool kits and disciplines toolkit. MATLAB tool kit used to expand the functional symbols terms, visualization simulationmodelling, word processing and real-time control functions. professional disciplines toolkit is a stronger tool kits, tool kits control, signal processing tool kit, tool kits, etc. belonging to such communicationsMATLAB users to open widely welcomed. In addition to the internal function, all the packages MATLAB tool kits are readable document and the document could be amended, modified or users through Yuanchengxu the construction of new procedures to prepare themselves for kits.3、Digital filter designDigital filter design of the basic requirementsDigital filter design must go through three steps :(1) Identification of indicators : In the design of a filter, there must be some indicators. These indicators should be determined on the basis of the application. In many practical applications, digital filters are often used to achieve the frequency operation. Therefore, indicators in the form of general jurisdiction given frequency range and phase response. Margins key indicators given in two ways. The first is absolute indicators. It provides a function to respond to the demands of the general application of FIR filter design. The second indicator is the relative indicators. Its value in the form of answers to decibels. In engineering practice, the most popular of such indicators. For phase response indicators forms, usually in the hope that the system with a linear phase frequency bands human. Using linear phase filter design with the following response to the indicators strengths：①it only contains a few algorithms, no plural operations；②there is delay distortion, only a fixed amount of delay; ③the filter length N (number of bands for N-1), the volume calculation for N/2 magnitude.(2) Model approach : Once identified indicators can use a previous study of the basic principles and relationships, a filter model to be closer to the target system.(3) Achieved : the results of the above two filters, usually by differential equations, system function or pulse response to describe. According to this description of hardware or software used to achieve it.4、Introduced FPGAProgrammable logic device is a generic logic can use a variety of chips, which is to achieve ASIC ASIC (Application Specific Integrated Circuit) semi-customized device, Its emergenceand development of electronic systems designers use CAD tools to design their own laboratory in the ASIC device. Especially FPGA (Field Programmable Gate Array) generated and development, as a microprocessor, memory, the figures for electronic system design and set a new industry standard (that is based on standard product sales catalogue in the market to buy). Is a digital system for microprocessors, memories, FPGA or three standard building blocks constitute their integration direction.Digital circuit design using FPGA devices, can not only simplify the design process and can reduce the size and cost of the entire system, increasing system reliability. They do not need to spend the traditional sense a lot of time and effort required to create integrated circuits, to avoid the investment risk and become the fastest-growing industries of electronic devices group. Digital circuit design system FPGA devices using the following main advantages(1)Design flexibleUse FPGA devices may not in the standard series device logic functional limitations. And changes in system design and the use of logic in any one stage of the process, and only through the use of re-programming the FPGA device can be completed, the system design provides for great flexibility.(2) Increased functional densityFunctional density in a given space refers to the number of functional integration logic. Programmable logic chip components doors several high, a FPGA can replace several films, film scores or even hundreds of small-scale digital IC chip illustrated in the film. FPGA devices using the chip to use digital systems in small numbers, thus reducing the number of chips used to reduce the number of printed size and printed, and will ultimately lead to a reduction in the overall size of the system.(3) Improve reliabilityPrinting plates and reduce the number of chips, not only can reduce system size, but it greatly enhanced system reliability. A higher degree of integration than systems in many low-standard integration components for the design of the same system, with much higher reliability. FPGA device used to reduce the number of chips required to achieve the system in the number printed on the cord and joints are reduced, the reliability of the system can be improved.(4) Shortening the design cycleAs FPGA devices and the programmable flexibility, use it to design a system for longer than traditional methods greatly shortened. FPGA device master degrees high, use printed circuit layout wiring simple. At the same time, success in the prototype design, the development of advanced tools, a high degree of automation, their logic is very simple changes quickly. Therefore, the use of FPGA devices can significantly shorten the design cycle system, and speed up the pace of product into the market, improving product competitiveness.(5) Work fastFPGA/CPLD devices work fast, generally can reach several original Hertz, far larger than the DSP device. At the same time, the use of FPGA devices, the system needed to achieve circuitclasses and small, and thus the pace of work of the entire system will be improved.(6) Increased system performance confidentialityMany FPGA devices have encryption functions in the system widely used FPGA devices can effectively prevent illegal copying products were others(7) To reduce costsFPGA device used to achieve digital system design, if only device itself into the price, sometimes you would not know it advantages, but there are many factors affecting the cost of the system, taken together, the cost advantages of using FPGA is obvious. First, the use of FPGA devices designed to facilitate change, shorten design cycles, reduce development costs for system development; Secondly, the size and FPGA devices allow automation needs plug-ins, reducing the manufacturing system to lower costs; Again, the use of FPGA devices can enhance system reliability, reduced maintenance workload, thereby lowering the cost of maintenance services for the system. In short, the use of FPGA devices for system design to save costs.FPGA design principles :FPGA design an important guiding principles : the balance and size and speed of exchange, the principles behind the design of the filter expression of a large number of certification.Here, "area" means a design exertion FPGA/CPLD logic resources of the FPGA can be used to the typical consumption (FF) and the search table (IUT) to measure more general measure can be used to design logic equivalence occupied by the door is measured. "pace" means stability operations in the chip design can achieve the highest frequency, the frequency of the time series design situation, and design to meet the clock cycle -- PADto pad, Clock SetupTime, Clock Hold Beijing, Clock-to-Output Delay, and other characteristics of many time series closely related. Area (area) and speed (speed) runs through the two targets FPGA design always is the ultimate design quality evaluation criteria. On the size and speed of the two basic concepts : balance of size and speed and size and speed of swap.One pair of size and speed is the unity of opposites contradictions body. Requirements for the design of a design while the smallest, highest frequency of operation is unrealistic. More scientific goal should be to meet the design requirements of the design time series (includes requirements for the design frequency) premise, the smallest chip area occupied. Or in the specified area, the design time series cushion greater frequency run higher. This fully embodies the goals of both size and speed balanced thinking. On the size and speed requirements should not be simply interpreted as raising the level and design engineers perfect sexual pursuit, and should recognize that they are products and the quality and cost of direct relevance. If time series cushion larger design, running relatively high frequency, that the design Jianzhuangxing stronger, more quality assurance system as a whole; On the other hand, the smaller size of consumption design is meant to achieve in chip unit more functional modules, the chip needs fewer, the entire system has been significantly reduced cost. As a contradiction of the two components, the size and speed is not the same status. In contrast, meet the timetables and work is more important for some frequency when both conflicts, the use of priority guidelines.Area and the exchange rate is an important FPGA design ideas. Theoretically, if a design time series cushion larger, can run much higher than the frequency design requirements, then we can through the use of functional modules to reduce the consumption of the entire chip design area, which is used for space savings advantages of speed; Conversely, if the design of a time series demanding, less than ordinary methods of design frequency then generally flow through the string and data conversion, parallel reproduction of operational module, designed to take on the whole "string and conversion" and operate in the export module to chip in the data "and string conversion" from the macro point of view the whole chip meets the requirements of processing speed, which is equivalent to the area of reproduction - rate increase.For example. Assuming that the digital signal processing system is 350Mb/s input data flow rate, and in FPGA design, data processing modules for maximum processing speed of 150Mb/s, because the data throughput processing module failed to meet requirements, it is impossible to achieve directly in the FPGA. Such circumstances, they should use"area-velocity" thinking, at least three processing modules from the first data sets will be imported and converted, and then use these three modules parallel processing of data distribution, then the results "and string conversion," we have complete data rate requirements. We look at both ends of the processing modules, data rate is 350Mb/s, and in view of the internal FPGA, each sub-module handles the data rate is 150Mb/s, in fact, all the data throughput is dependent on three security modules parallel processing subsidiary completed, that is used by more chip area achieve high-speed processing through "the area of reproduction for processing speed enhancement" and achieved design.FPGA is the English abbreviation Field of Programmable Gate Array for the site programmable gate array, which is in Pal, Gal, Epld, programmable device basis to further develop the product. It is as ASIC (ASIC) in the field of a semi-customized circuit and the emergence of both a customized solution to the shortage circuit, but overcome the original programmable devices doors circuit few limited shortcomings.FPGA logic module array adopted home (Logic Cell Array), a new concept of internal logic modules may include CLB (Configurable Logic Block), export import module IOB (Input Output Block) and internal links (Interconnect) 3. FPGA basic features are :(1) Using FPGA ASIC design ASIC using FPGA circuits, the chip can be used,while users do not need to vote films production.(2) FPGA do other customized or semi-customized ASIC circuits throughout the Chinese specimen films.3) FPGA internal capability and rich I/O Yinjue.4) FPGA is the ASIC design cycle, the shortest circuit, the lowest development costs, risks among the smallest device5) FPGA using high-speed Chmos crafts, low consumption, with CMOS, TTL low-power compatibleIt can be said that the FPGA chip is for small-scale systems to improve system integration, reliability one of the bestCurrently FPGA many varieties, the Revenue software series, TI companies TPC series, the fiex ALTERA company seriesFPGA is stored in films from the internal RAM procedures for the establishment of the state of its work, therefore, need to programmed the internal Ram. Depending on the differentconfiguration, users can use a different programming methodsPlus electricity, FPGA, EPROM chips will be read into the film, programming RAM中data, configuration is completed, FPGA into working order. Diaodian, FPGA resume into white films, the internal logic of relations disappear, FPGA to repeated use. FPGA's programming is dedicated FPGA programming tool, using generic EPROM, prom programming device can. When the need to modify functional FPGA, EPROM can only change is. Thus, with a FPGA, different programming data to produce different circuit functions. Therefore, the use of FPGA very flexible.There are a variety of FPGA model : the main model for a parallel FPGA plus a EPROM manner; From the model can support a number of films FPGA; serial prom programming model could be used serial prom FPGA programming FPGA; The external model can be engineered as microprocessors from its programming microprocessors.Verilog HDL is a hardware description language for the algorithm level, doors at the level of abstract level to switch-level digital system design modelling. Modelling of the target figure by the complexity of the system can be something simple doors and integrity of electronic digital systems. Digital system to the levels described, and in the same manner described in Hin-time series modelling.Verilog HDL language with the following description of capacity : design behaviour characteristics, design data flow characteristics, composition and structure designed to control and contain the transmission and waveform design a certification mechanism. All this with the use of a modelling language. In addition, Verilog HDL language programming language interface provided by the interface in simulation, design certification from the external design of the visit, including specific simulation control and operation.Verilog HDL language grammar is not only a definition, but the definition of each grammar structure are clear simulation, simulation exercises. Therefore, the use of such language to use Verilog simulation models prepared by a certification. From the C programming language, the language inherited multiple operating sites and structures. Verilog HDL provides modelling capacity expansion, many of the initial expansion would be difficult to understand. However, the core subsets of Verilog HDL language very easy to learn and use, which is sufficient for most modelling applications. Of course, the integrity of the hardware description language is the most complex chips from the integrity of the electronic systems described.historyVerilog HDL language initially in 1983 by Gateway Design Automation companies for product development simulator hardware modelling language. Then it is only a dedicated language. Since their simulation, simulation devices widely used products, Verilog HDL as a user-friendly and practical language for many designers gradually accepted. In an effort to increase the popularity of the language activities, Verilog HDL language in 1990 was a public area. Open Verilog International (OVI) is to promote the development of Verilog international organizations. 1992, decided to promote OVI OVI standards as IEEE Verilog standards. The effort will ultimately succeed, a IEEE1995 Verilog language standard, known as IEEE Std 1364-1995. Integrity standards in Verilog hardware description language reference manual contains a detailed description.Main capacity：Listed below are the main Verilog hardware description language ability*Basic logic gate, and, for example, or have embedded in the language and nand* Users of the original definition of the term (UDP), the flexibility. Users can be defined in the original language combinations logic original language, the original language of logic could also be time series* Switches class infrastructure models, such as the nmos and pmos also be embedded in the language* Hin-language structure designated for the cost of printing the design and trails Shi Shi and design time series checks.* Available three different ways to design or mixed mode modelling. These methods include : acts described ways - use process of structural modelling; Data flow approach - use of a modelling approach Fuzhi expression; Structured way - using examples of words to describe modular doors and modelling.* Verilog HDL has two types of data : data types and sequence data line network types. Line network types that the physical links between components and sequence types that abstract data storage components.* To describe the level design, the structure can be used to describe any level module example * Design size can be arbitrary; Language is design size (size) impose any restrictions* Verilog HDL is no longer the exclusive language of certain companies but IEEE standards.* And the machine can read Verilog language, it may as EDA tools and languages of the world between the designers* Verilog HDL language to describe capacity through the use of programming language interface (PLI) mechanism further expansion. PLI is to allow external functions of the visit Verilog module information, allowing designers and simulator world Licheng assembly* Design to be described at a number of levels, from the switch level, doors level, register transfer level (RTL) to the algorithm level, including the level of process and content* To use embedded switching level of the original language in class switch design integrity modelling* Same language can be used to generate simulated incentive and certification by the designated testing conditions, such as the value of imports of the designated*Verilog HDL simulation to monitor the implementation of certification, the certification process of implementing the simulation can be designed to monitor and demonstrate value. These values can be used to compare with the expectations that are not matched in the case of print news reports.* Acts described in the class, not only in the RTL level Verilog HDL design description, and to describe their level architecture design algorithm level behavioural description* Examples can use doors and modular structure of language in a class structure described* Verilog HDL mixed mode modelling capabilities in the design of a different design in each module can level modelling* Verilog HDL has built-in logic function, such as*Structure of high-level programming languages, such as conditions of expression, and the cycle of expression language, language can be used* To it and can display regular modelling* Provide a powerful document literacy* Language in the specific circumstances of non-certainty that in the simulator, different models can produce different results; For example, describing events in the standard sequence of events is not defined.5、In troduction of DSPToday, DSP is w idely used in the modern techno logy and it has been the key part of many p roducts and p layed more and mo re impo rtant ro le in our daily life.Recent ly, Northw esternPo lytechnica lUniversity Aviation Microelect ronic Center has comp leted the design of digital signal signal p rocesso r co re NDSP25, w h ich is aim ing at TM S320C25 digital signal p rocesso r of Texas Inst rument TM S320 series. By using top 2dow n design flow , NDSP25 is compat ible w ith inst ruct ion and interface t im ing of TM S320C25.Digital signal processors (DSP) is a fit for real-time digital signal processing for high-speed dedicated processors, the main variety used for real-time digital signal processing to achieve rapid algorithms. In today's digital age background, the DSP has become the communications, computer, and consumer electronics products, and other fields based device.Digital signal processors and digital signal processing is inseparably, we usually say "DSP" can also mean the digital signal processing (Digital Signal Processing), is that in this digital signal processors Lane. Digital signal processing is a cover many disciplines applied to many areas and disciplines, refers to the use of computers or specialized processing equipment, the signals in digital form for the collection, conversion, recovery, valuation, enhancement, compression, identification, processing, the signals are compliant form. Digital signal processors for digital signal processing devices, it is accompanied by a digital signal processing to produce. DSP development process is broadly divided into three phases : the 20th century to the 1970s theory that the 1980s and 1990s for the development of products. Before the emergence of the digital signal processing in the DSP can only rely on microprocessors (MPU) to complete. However, the advantage of lower high-speed real-time processing can not meet the requirements. Therefore, until the 1970s, a talent made based DSP theory and algorithms. With LSI technology development in 1982 was the first recipient of the world gave birth to the DSP chip. Years later, the second generation based on CMOS工艺DSP chips have emerged. The late 1980s, the advent of the third generation of DSP chips. DSP is the fastest-growing 1990s, there have been four successive five-generation and the generation DSP devices. After 20 years of development, the application of DSP products has been extended to people's learning, work and all aspects of life and gradually become electronics products determinants.。

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中英文对照外文翻译文献(文档含英文原文和中文翻译)译文:GA算法优化IIR滤波器的设计摘要本文提出了运用遗传算法(GA)来优化无限脉冲响应数字滤波器(IIR)的设计。

IIR滤波器本质上是一个递归响应的数字滤波器。

由于IIR 数字滤波器的表面误差通常是非线性的和多峰的，而全局优化技术需要避免局部最小值。

本文提出了启发式方式来设计IIR滤波器。

GA是组合优化问题中一种功能强大的全局优化算法，该论文发现IIR数字滤波器的最佳系数可以通过GA 优化。

该设计提出低通和高通IIR数字滤波器的设计，以提供过渡频带的估计值。

结果发现，所计算出的值比可用于过滤器的在MATLAB设计FDA工具更优化。

举个例子，采用的仿真结果表明在过渡带和均方误差(MSE)的改善。

零极点的位置也被提出来用来描述系统的的稳定性，以便将结果与模拟退火(SA)的方法相比较。

关键词：数字滤波器;无限冲激响应(IIR);遗传算法(GA);优化1.说明在过去的几十年中的数字信号处理(DSP)领域已经成长太重要的理论和技术。

在DSP中，有两个重要的类型系统。

第一类型的系统是执行信号滤波的时域，因此它被称为数字滤波器。

第二类型的系统提供的信号表示频域，被称为频谱分析仪。

数字滤波是DSP的最有力的工具之一。

数字滤波器能够性能规格，最好的同时也是极其困难的，而且不可能的是，先用模拟滤波器实现。

另外，数字滤波器的特性，可以很容易地在软件控制下发生变化。

数字滤波器被分类为有限持续时间脉冲响应(FIR)滤波器或无限持续时间脉冲响应(IIR)滤波器，这取决于该系统的脉冲响应的形式。

在FIR系统中，脉冲响应序列是有限的持续时间，即，它具有非零项的数量有限。

数字无限脉冲响应(IIR)滤波器通常可以提供比其等效有限脉冲响应(FIR)滤波器更好的性能和更少的计算成本，并已成为越来越感兴趣的目标。

但是，由于IIR滤波器的误差表面通常是非线性的，多式联运，传统的基于梯度的设计方法可以很容易地陷入错误的表面。

因此当地极小，一些研究者已经试图开发基于设计方法现代启发式优化算法，如遗传算法(GA)，模拟退火(SA)，禁忌搜索(TS).简单的迭代方法通常导致次优的设计。

因此，有必要的优化方法(启发式型)，可以是用来设计数字滤波器，将满足规定的规格。

古德伯格呈现遗传算法的详细的数学模型。

本韦努托切在书中描述在设计数字滤波器具有线性相位数字滤波器的上下文中使用模拟退火(SA)算法的显着特征。

该算法然后被应用到FIR滤波器的设计。

其结果是并不令人印象深刻。

此外，它在计算上的花费是非常昂贵的。

艾哈迈德用遗传算法设计与CSD系数限制的低通滤波器的一阶IIR滤波器。

艾哈迈德和安东尼屋探讨了FIR滤波器和均衡器，通过遗传算法的使用，因而气需要大量的计算。

2007年奥利维拉等人提出了利用非线性随机全局优化的模拟退火技术，设计基于线性FIR滤波器的一种新方法。

2011年维斯和唐评价了遗传编程(GP)的适用性的分布式算法的进化。

上述各种方法的基本限制是它们主要是用来设计FIR数字滤波器。

前面的设计方法的缺点是计算时间是相当长的测试优化方法，所提出的算法在MATLAB和实现的结果是非常令人鼓舞的。

本文的组织如下：在第2节中，IIR数字滤波器的设计问题进行了讨论。

在3节中，遗传算法(GA)的方法作了简要的阐述。

遗传算法(GA)对滤波器的设计是在4节中提出了相关的。

设计实例的仿真结果进行简要描述在5节。

结论和未来的范围是在6节中描述的。

响应IIR滤波器的递推或是依赖于一个或更多的过去的输出。

如果这样的过滤器进行一个脉冲的输出不一定为零。

这表明，系统很容易反馈和不稳定。

每个解决方案与健身价值，反映了它是多么的好，在人群中有[ 16 ]其他方案进行了比较。

通过交叉机制，交流部分之间的数据字符串模拟染色体重组过程。

新的遗传物质也通过突变导致的随机变化的字符串了。

对这些遗传操作的发生频率是由一定的概率控制。

的选择，交叉，变异过程如图2所示[ 17 ]构成的基本遗传算法的循环或生成，这是重复直到预定的标准是满意的。

通过这一过程，先后更好个体的物种生成。

随着计算能力的集成电路技术的进步提供了进化系统，仿真越来越听话的气被应用到许多现实世界的问题，包括数字滤波器的设计。

原文:Genetic Algorithm for the Design of Optimal IIRDigital FiltersABSTRACTThis paper presents the design of Optimal Infinite-Impulse Response (IIR) digital filters using Genetic Algorithm (GA).IIR filter is essentially a digital filter with Recursive responses. Since the error surface of digital IIR filters is generally nonlinear and multimodal, global optimization techniques are required in order to avoid local minima. This paper presents heuristic way for the designing IIR filters. GA is a powerful global optimization algorithm introduced in combinatorial optimization problems. The paper finds the optimum Coefficients of IIR digital filter through GA. Design ofLow pass and High pass IIR digital filter is proposed to provide estimate of transition band. It is found that the calculated values are more optimal than fda tool available for the design of filter in MATLAB. The simulation result of the employed examples shows an improvement on transition band and mean-square-error (MSE). The position of pole-zero is also presented to describe stability and results are compared with Simulated Annealing (SA) method.Keywords: Digital Filter; Infinite-Impulse Response (IIR); Genetic Algorithm (GA); Optimization1. Introduction1.Over the last few decades the field of Digital Signal Processing (DSP) has grown to important both theoretically and technologically. In DSP, there are two important types of Systems. The first2.type of systems performs signal filtering in time domain and hence it is known as Digital filters. The second type of systems provide signal representation frequency domain and are known as Spectrum Analyzer. Digital filtering is one of the most powerful tools of DSP. Digital filters are capable of performance specifications that would, at best, be extremely difficult, if not impossible, to achieve with an analog implementation. In addition, the characteristics of a digital filter can be easily changed under software control. Digital filters are classified either as Finite duration impulse response (FIR) filters or Infinite duration impulse response (IIR) filters, depending on the form of impulse response of the system. In the FIR system, the impulse response sequence is of finite duration, i.e., it has a finite number of non zero terms. Digital infinite-impulse-response (IIR) filters can often provide a much better performance and less computational cost than their equivalent finite-impulse-response (FIR) filters and have become the target of growing interest . However, because the error surface of IIR filters is usually nonlinear and multimodal, conventional gradient-based design methods may easily get stuck in the local minima of error surface.Therefore, some researchers have attempted to develop designmethods based on modern heuristic optimization algorithms such as genetic algorithm (GA) , simulated annealing (SA), tabu search (TS) .Analytical or simple iterative methods usually lead to sub-optimal designs. Consequently, there is a need of optimization methods (heuristic type) that can be use to design digital filters that would satisfy prescribed specifications. Goldberg presented a detailed mathematical model of Genetic Algorithm . Benvenuto et al. (1992) described the salient features of using a simulated annealing (SA) algorithm in the context of designing digital filters with linear phase digital filter. The algorithm is then applied to the design of FIR filter. The result was not impressive. Moreover, it is computationally very expensive. Ahmadi et al.(2003) used genetic algorithm to design 1-D IIR filter with canonical-signed-digit coefficients restricted to low-pass filter. Ahmad and Antoniou (2006) explored FIR filters and equalizers through the use of GA. Consequently GAs requires a large amount of computation. Oliveira et al. (2007) presented a new approach for designing linear FIR filters by using nonlinear stochastic global optimization based on simulated annealing techniques. Jung et al. (2008) found the design method of a linear phase finite word length finite-duration impulse response (FIR) filter using simulated annealing. Weise and Tang (2011) evaluated the applicability of genetic programming (GP) for the evolution of distributed algorithms. The basic limitation of all the above methods is that they can mainly be used to design FIR digital filters. The drawback of preceding design methods is that the computation time is quite long To test the optimization procedure, the proposed algorithm is implemented in Matlab and results are found to be very encouraging. This Paper is organized as follows: In Section 2, IIR digital filter design aspects arediscussed. In section 3,Genetic Algorithm (GA) approach is briefly mentioned.The Genetic Algorithm (GA) related to filter design is proposed in Section 4. The simulation results of designed examples used is briefly described in Section 5. The Conclusion and future scope is described in Section 6. 2. IIR Filter Design Issues Digital filters are classified as Recursive and Non-Re- cursive filters. The response of Recursive or IIR filters is dependent on one or more of its past output. If such filter subjected to an impulse then its output need not necessarily become zero. This indicates that the system is prone to feedback and instability. mechanism for better solutions to survive. Each solutions associated with a fitness value that reflects how good it is, compared with other solutions in the population .The recombination process is simulated through a cross-over mechanism that exchanges portions of data strings between the chromosomes. New genetic material is also introduced through mutation that causes random alterations of the strings. The frequency of occurrence of these genetic operations is controlled by certain preset probabilities. The selection, crossover, and mutation processes as illustrated in Figure 2 constitute the basic GA cycle or generation, which is repeated until some predetermined criteria are satisfied. Through this process, successively better and better individuals of the species are generated. With the increasing computing power offered by advancement in integrated circuit technology, the simulation of evolutionary systems is becoming more and more tractable and GAs are being applied to many real world problems including the design of digital filters.。