翻译排版格式要求
翻译排版格式要求（通用）
中文格式要求
1 整篇文章的大标题居中，用“宋体，2-3号字体”；
2 正文用“5号字，宋体”；
3 大标题与正文之间的标题的字号按“小3号——4号——小4号”的顺序，超过3极标题的仍按此顺序，排到“小4号”后，以后的几级标题都按“小4号”；
4 每一自然段落的起头文字应退后两个字，符合中文排版习惯。
各自然段之间不需空行；
5 原文是斜体的地方，译文也应用斜体，原文是加黑的地方，译文也应加黑；
6 原文中的书名，中文应加书名号“《》”
7 如客户在格式上有特殊要求的，应服从客户的要求，如有的客户要求一页对一页地翻译，有的客户要求按照原文格式，有的客户要求分栏排版等。
8 在该分页的地方，务必进行分页，分页时必须通过插入分页符进行，即在word中点菜单“插入”下的“分隔符”，严禁使用打多个回车键来达到分页的目的，这样在修改时就会产生混乱。
英文格式要求
（注：其他外语语种可以参考该要求，特殊的应符合各自语言的惯例格式要求）
1 整篇文章的大标题居中，用“Times New Roman”，小2号字体；
2 正文用Times New Roman”，5号字体；
3 大标题与正文之间的标题的字号按“3号——4号——5号”的顺序，超过3级标题的仍按此顺序，排到“5号”后，以后的几级标题都按“5号”；
4 每一自然段落的起头文字不退后。
各自然段之间空一行；
5 各级标题的编号选用应恰当，且不得出现中文编号，如“三”、“（三）”等，各级标题上下应各空一行。
6 不同级标题的编号处于不同的层次上，译者可以通过拖动word文件中的标尺来实现这个目的。
同级标题编号应对齐，整个文件中的所有正文应全部对齐。
整个文档必须清晰整齐。
译者也可以参考老外的一些正式文件，他们的文件在格式上非常漂亮。
7 不得在英文中出现书名号“《》”，英文中的书或文章的题目应采用斜体来标记，而不是书名号；
8 外文译文按原中文格式，需斜体的地方，译文就斜体，需加黑的地方，译文也加黑；
9 请高度重视单词大小写问题。
整篇文章的大标题中，除连词、介词外，其余单词的首字母都应大写；其他标题只有句首的字母大写，其余单词小写
10 翻译完后，务必用逻辑检错程序查找是否有拼写错误、语法错误。
11 如客户在格式上有特殊要求的，应服从客户的要求，如有的客户要求一页对一页地翻译，有的客户要求按照原文格式，有的客户要求分栏排版等。
12 在该分页的地方，务必进行分页，分页时必须通过插入分页符进行，即在word中点菜单“插入”下的“分隔符”，严禁使用打多个回车键来达到分页的目的，这样在修改时就会产生混乱。
商务英语书信写作四种常见排版格式
★以下是英⽂写作翻译频道为⼤家整理的《商务英语书信写作四种常见排版格式》，供⼤家参考。
更多内容请看本站频道。
通常商务交流中的书信书写格式分为四种，每⼀种都有其突出的地⽅，⽽选择⽤哪种格式则看写信⼈的爱好了。
Modified-Block Letter Format In this format each typed element - except the date and the signature block - begins at the left-hand margin. The date may be backspaced from the right margin point to align at the right margin; it may be centered, or it may begin at the center. The most attractive placement of the date, however, may depend on the letterhead design. 这种格式下，书信的排版，除了⽇期和签名部分，都从左边空⽩处开始，没有空格，段段之间空⾏。
⽇期可以放在最右边，也可以放在中间，⾃成⼀⾏。
最吸引⼈的写⽇期的地⽅，其实应该根据书信抬头的设计⽽定。
Semi-Block Letter Format This format resembles to the modified block in every other regard except that the paragraphs in the body of the letter are indented. 这种格式的排版，出了书信主体每段⾸⾏要空格以外，其他均类似于Modified-Block Letter. Full-Block Letter Format The full block format is illustrative of the trend toward simplicity and ease of use. All lines, including the date and the signature block, begin at the left margin. Paragraphs are always blocked. This letter arrangement is more efficient than the modified block or the semi-modified block in that no extra time is required for paragraph indention or placement of the date and closing lines. In addition, many writers believe that the full-block arrangement provides an attractive, business-like appearance. 这种格式是写作者倾向于简单⽅便的⼀个证明。
外文翻译指导记录怎么写
外文翻译指导记录怎么写外文翻译指导记录怎么写外文翻译、开题报告要求一套完整的毕业设计(论文)材料由外文翻译、开题报告和毕业设计(论文)正文三部分组成，按照统一的封面和格式编写。
和字体大小将按照学院的规定。
文本格式和书写要求（一）外文翻译通过文献综述和翻译，进一步提高外语运用能力，熟悉本专业几大外文书刊，了解国内外毕业设计(论文)信息和动态。
1、格式：（1）外文（译文前面附被翻译的外文原件复印件）；（2）翻译成中文格式：①标题②署名（作者名）** 著译者：***③翻译正文④外文著录为了反映文稿的科学依据和译者尊重他人研究成果的严肃态度以及向读者提出有关信息的出处，要求译者按著录/题名/出版事项顺序排列注明：期刊——著者，题名，期刊名称，出版年，卷号（期号），起始页码。
书籍——著者，书名、版次（第一版不标注），出版地，出版者，出版年，起始页码。
2、内容要求：（1）阅读每位学生在文献查阅环节中，必须阅读5～10万个印刷符号的外语文献资料（最好阅读与课题或本专业有联系的内容），择其重要的翻译1～2万个印刷符号（约3000汉字）。
（2）翻译①标题应真实地反映出翻译外文的主体内容或原外文标题内容，一般控制在20个汉字以内。
可以用副标题对标题予以补充说明；②标题下方正中为外文作者署名；③外文翻译成中文的内容；④外文著录（二）开题报告1、格式：（1）课题名称；（2）学生、专业、指导教师和教学单位署名；（3）开题报告的正文撰写。
2、内容要求：（1）课题名称要求与毕业设计（论文）正文标题名称一致（一般控制在20个汉字以内，可以用副标题对标题予以补充说明）。
（2）学生、指导教师和教学单位署名：题目下方中间是学生签名，学生签名下方是专业名称，专业名称下方是指导老师签名，指导老师签名下方是教学单位签名(教学单位指学院)。
（3）开题报告的正文撰写要求包括（不少于2500字）：①课题来源②研究目的和意义③研究的内容与途径④国内外研究现状与发展趋势通过提问和分析问题，综合前人文献提出的理论和事实，比较各种学术观点，明确所提问题的历史、现状和发展方向。
翻译排版和一般要求
一、排版要求:1. 格式问题：（1）除有特殊要求外，文件都要做成双语对照的，即将译文一段对一段写在原文的下面。
注意：请不要将译文直接写在原文的后面，要另起一段。
为了格式的统一，译文的格式要和原文尽量保持一致。
一般来说，英翻中的译文首行空两格（两个汉字），中翻英的译文首行不空格。
具体格式如下：Word文件的格式：英译中：原文：The Parties agree that the Owner shall register this Tenancy Agreement within fifteen (15) days from the date of execution with the competent registration authorities at the district or county where the Premises is located in accordance with the relevant laws, and obtain the evidence of the registration and the record of the lease. If this Tenancy Agreement is amended or terminated after it has been registered and recorded, the Owner shall be responsible for registering the amendment or termination with the original registration authorities within fifteen (15) days from the date of such amendment or termination. The Owner shall be liable for all the costs, penalties, fines and disputes arising from its failure in registering this Tenancy Agreement or its amendment or termination.译文：双方约定，出租人应在本租赁协议签署日后十五（15）天内按照相关法律的规定，到房屋所在地区或国家的适当登记部门登记本租赁协议，并获得此登记的证明以及租赁记录。
外文翻译排版格式参考
毕业设计(论文)外文资料翻译系别：电子信息系专业：通信工程班级：B100309姓名：张杨学号：B10030942外文出处：附件： 1. 原文； 2. 译文2014年03月An Introduction to the ARM 7 ArchitectureTrevor Martin CEng, MIEETechnical DirectorThis article gives an overview of the ARM 7 architecture and a description of its major features for a developer new to the device. Future articles will examine other aspects of the ARM architecture.Basic CharacteristicsThe principle feature of the ARM 7 microcontroller is that it is a register based load-and-store architecture with a number of operating modes. While the ARM7 is a 32 bit microcontroller, it is also capable of running a 16-bit instruction set, known as "THUMB". This helps it achieve a greater code density and enhanced power saving. While all of the register-to-register data processing instructions are single-cycle, other instructions such as data transfer instructions, are multi-cycle. To increase the performance of these instructions, the ARM 7 has a three-stage pipeline. Due to the inherent simplicity of the design and low gate count, ARM 7 is the industry leader in low-power processing on a watts per MIP basis. Finally, to assist the developer, the ARM core has a built-in JTAG debug port and on-chip "embedded ICE" that allows programs to be downloaded and fully debugged in-system.In order to keep the ARM 7 both simple and cost-effective, the code and data regions are accessed via a single data bus. Thus while the ARM 7 is capable of single-cycle execution of all data processing instructions, data transfer instructions may take several cycles since they will require at least two accesses onto the bus (one for the instruction one for the data). In order to improve performance, a three stage pipeline is used that allows multiple instructions to be processed simultaneously.The pipeline has three stages; FETCH, DECODE and EXECUTE. The hardware of each stage is designed to be independent so up to three instructions can be processed simultaneously. The pipeline is most effective in speeding up sequential code. However a branch instruction will cause the pipeline to be flushed marring its performance. As we shall see later the ARM 7 designers had some clever ideas to solve this problem.InstructionFig 1 ARM 3- Stage pipelineARM7 Programming ModelThe programmer's model of the ARM 7 consists of 15 user registers, as shown in Fig. 3, with R15 being used as the Program Counter (PC). Since the ARM 7 is a load-and- store architecture, an user program must load data from memory into the CPU registers, process this data and then store the result back into memory. Unlike other processors no memory to memory instructions are available.M1M2M34,R1,R2 (R4=R0+R2)3Fig 2 Load And Store ArchitectureAs stated above R15 is the Program Counter. R13 and R14 also have special functions; R13 is used as the stack pointer, though this has only been defined as a programming convention. Unusually the ARM instruction set does not have PUSH and POP instructions so stack handling is done via a set of instructions that allow loading and storing of multiple registers in a single operation. Thus it is possible to PUSH or POP the entire register set onto the stack in a single instruction. R14 has special significance and is called the "link register". When a call is made to a procedure, the return address is automatically placed into R14, rather than onto a stack, as might be expected. A return can then be implemented by moving the contents of R14 intoR15, the PC. For multiple calling trees, the contents of R14 (the link register) must be placed onto the stack.15 User registers +PCR13 is used as the stack pointer R14 is the link registerR14 is the Program Counter Current Program Status RegisterFig 3 User Mode Register ModelIn addition to the 16 CPU registers, there is a current program status register (CPSR). This contains a set of condition code flags in the upper four bits that record the result of a previous instruction, as shown in Fig 4. In addition to the condition code flags, the CPSR contains a number of user-configurable bits that can be used to change the processor mode, enter Thumb processing and enable/disable interrupts.31 30 29 28 27Negative Carry OverflowIRQ System UserUndefined instruction AbortThumb instruction setFig 4 Current Program Status Register and Flags Exception And Interrupt ModesThe ARM 7 architecture has a total of six different operating modes, as shown below. These modes are protected or exception modes which have associated interruptsources and their own register sets.User: This mode is used to run the application code. Once in user mode the CPSR cannot be written to and modes can only be changed when an exception is generated. FIQ: (Fast Interrupt reQuest) This supports high speed interrupt handling. Generally it is used for a single critical interrupt source in a systemIRQ: (Interrupt ReQuest) This supports all other interrupt sources in a system Supervisor: A "protected" mode for running system level code to access hardware or run OS calls. The ARM 7 enters this mode after resetAbort: If an instruction or data is fetched from an invalid memory region, an abort exception will be generatedUndefined Instruction:If a FETCHED opcode is not an ARM instruction, an undefined instruction exception will be generated.The User registers R0-R7 are common to all operating modes. However FIQ mode has its own R8 -R14 that replace the user registers when FIQ is entered. Similarly, each of the other modes have their own R13 and R14 so that each operating mode has its own unique Stack pointer and Link register. The CPSR is also common to all modes. However in each of the exception modes, an additional register一the saved program status register (SPSR)，is added. When the processor changes the current value of the CPSR stored in the SPSR，this can be restored on exiting the exception mode.System&User FIQ Supervisor Abort IRQ Undefined Fig 5 Full Register Set For ARM 7Entry to the Exception modes is through the interrupt vector table. Exceptions in the ARM processor can be split into three distinct types.(i) Exceptions caused by executing an instruction, these include software interrupts, undefined instruction exceptions and memory abort exceptions(ii) Exceptions caused as a side effect of an instruction such as a abort caused by trying to fetch data from an invalid memory region.(iii) Exceptions unrelated to instruction execution, this includes reset, FIQ and IRQ interrupts.In each case entry into the exception mode uses the same mechanism. On generation of the exception, the processor switches to the privileged mode, the current value of the PC+4 is saved into the Link register (R14) of the privileged mode and the current value of CPSR is saved into the privileged mode's SPSR. The IRQ interrupts are also disabled and if the FIQ mode is entered, the FIQ interrupts are also disabled, Finally the Program Counter is forced to the exception vector address and processing of the exception can start. Usually the first action of the exception routine will be to pushPrefetch Abort(instruction fetch memory abort)Software interrupt (SWI)Undefined instruction ResetData Abort (data access momory abort)IRQ (interrupt)FIQ (fast interrupt)Supervisor Undefined Supervisor Abort Abort IRQ FIQ0x000000000x0000001C0x000000040x0000000C 0x000000080x000000100x00000018Fig 6 ARM 7 Vector TableA couple of things are worth noting on the vector table. Firstly, there is a missing vector at 0x000000014. This was used on an earlier ARM architecture and is left empty on ARM 7 to allow backward compatibility. Secondly, the FIQ interrupt is at the highest address so the FIQ routines could start from this address, removing the need for a jump instruction to reach the routine. It helps make entry into the FIQ routine as fast as possible.Once processing of the exception has finished, the processor can leave the privileged mode and return to the user mode. Firstly the contents of any registers previously saved onto the stack must be restored. Next the CSPR must be restored from the SPSR and finally the Program Counter is restored by moving the contents of the link register to R15, (i.e. the Program Counter). The interrupted program flow can then restart.Data TypesThe ARM instruction set supports six data types namely 8 bit signed and unsigned, 16 bit signed and unsigned plus 32 bit signed and unsigned. The ARM processor instruction set has been designed to support these data types in Little or Big-endian formats. However most ARM silicon implementations use the Little-endian format. ARM instructions typically have a three-operand format, as shown belowADD Rl，R2, R3 ; Rl=R2+R3ARM7 Program Flow ControlIn all processors there is a small group of instructions that are conditionally executed depending on a group of processor flags. These are branch instructions such as branch not equal. Within the ARM instruction set, all instructions are conditionally executable.31 28CONDFig. 7 Instruction Condition Code BitsThe top four bits of each instruction contain a condition code that must be satisfied if the instruction is to be executed. This goes a long way to eliminating small branches in the program code and eliminating stalls in the pipeline so increasing the overall program performance. Thus for small conditional branches of three instructions or less, conditional execution of instructions should be used. For larger jumps, normal branching instructions should be used.Fig. 8 Instruction Condition CodesThus our ADD instruction below could be prefixed with a condition code, as shown. This adds no overhead to instruction executionEQADD R1，R2，R3 ;If(Zero flag = 1)then R1 = R2+R3The ARM7 processor also has a 32-bit barrel shifter that allows it to shift or rotate one of the operands in a data processing instruction. This takes place in the same cycle as the instruction. The ADD instruction could be expanded as followsEQADD R1，R2 R3，LSL #2 ; If ( Zero flag = 1) then R1 = R2+ (R3 x 4) Finally the programmer may decide if a particular instruction can set the condition code flags in the CPSR.EQADDS R1，R2 R3，LSL #2; If (Zero flag = 1) then R1 = R2 + (R3 x4)and set condition code flagsIn the ARM instruction set there are no dedicated call or return instructions. Instead these functions are created out of a small group of branching instructions.The standard branch (B) instruction allows a jump of around+-32Mb. A conditional branch can be formed by use of the condition codes. For example, a "branch notequal" would be the branching instruction B and the condition code "NE" for not equal giving "BNE". The next form of the branch instruction is the branch with link. This is the branch instruction but the current value of the PC +4 is saved into R14, the link register. This acts as a CALL instruction by saving the return address into R14. A return instruction is not necessary since a return can be implemented by moving R14 into the PC. The return is more complicated in the case of an interrupt routine. Depending on the type of exception, it may be necessary to modify the contents of the link register to get the correct return address. For example, in the case of an IRQ or FIQ interrupt, the processor will finish its current instruction, increment the PC to the next instruction and then jumping to the vector table. This means that the value in the link register is PC+4 or one instruction ahead of the return address. This means we need to subtract 4 from the value in the link register to get the correct return address. This can be done in a single instruction thus: SUBS pc, r14, #4// PC=Link register-40x80000x400PC=0x80000x4000x8000Fig 9 Branch and Branch Link Instruction OperationBranching instructions are also used to enter the 16-bit Thumb instruction set. Both the branch and branch-with-link may perform an exchange between 32-bit and 16-bit instruction sets and vice versa .The Branch exchange will jump to a location and start to execute 16-bit Thumb instructions. Branch link exchange will jump to a location, save PC+4 into the link register and start execution of 16-bit Thumb instructions. In both cases, the T bit is set in the CPSR. An equivalent instruction is implemented in the Thumb instruction set to return to 32-bit ARM instruction processing.0x8000T=1Y=10x4000x4000x8000Fig. 10 Branch Exchange and Branch Link Exchange Instruction Operation Software InterruptsThe ARM instruction set has a software interrupt instruction. Execution of thisinstruction forces an exception as described above; the processor will enter supervisor mode and jump to the SWI vector at 0x00000008.Fig. 11 Software Interrupt InstructionThe bit field 0-23 of the SWI instruction is empty and can be used to hold an ordinal. On execution of an SWI instruction, this ordinal can be examined to determine which SWI procedure to run and gives over 16 million possible SWI functions.…Swi_ #1 . call swi function one…Tn the swi handlerregister unsigned*link ptr asm ("r14")；// define a pointer to the hnk register Switch ((*(link-ptr-1))&Ox00FFFFFF) //calculate the number of the swi function{Case 0x01 : SWI_unction (); //Call the function…}This can be used to provide a hardware abstraction layer. In order to access OS calls or SFR registers, the user code must make a SWI call . All these functions are therunning in a supervisor mode, with a separate stack and link register.As well as instructions to transfer data to and from memory and to CPU registers, the ARM 7 has instructions to save and load multiple registers. It is possible to load or save all 16 CPU registers or a selection of registers in a single instruction. Needless tosay, this is extremely useful when entering or exiting a procedure.M0Fig. 12 Load and Store Multiple Instruction OperationThe CPSR and SPSR are only accessed by two special instructions to move their contents to and from a CPU register. No other instruction can act on them directly.MSRMRSR15R15Fig. 13 Programming The SPSR And CPSR RegistersTHUMB SupportThe ARM processor is capable of executing both 32-bit (ARM) instructions and 16- Bit (Thumb instructions). The Thumb instruction set must always be entered byrunning a Branch exchange or branch link exchange instruction and NOT by setting the T bit in the CPSR. Thumb instructions are essentially a mapping of their 32 bit cousins but unlike the ARM instructions, they are unconditionally executed except though for branch instructions.Fig. 14 Thumb Instruction ProcessingThumb instructions reduced number of only have unlimited access to registers RO-R7 and R13一Rl5. A instructions can access the full register set.Fig.15 Thumb programmers modelThe Thumb instruction set has the same load and store multiple instructions as ARM and in addition, has a modified version of these instructions in the form of PUSH and POP that implement a full descending stack in the conventional manner. The Thumb instruction set also supports the SWI instruction, except that the ordinal field is only 8 bits long to support 256 different SWI calls. When the processor is executing Thumb code and an exception occurs, it will switch to ARM mode in order to process the exception. When the CPSR is restored the, Thumb bit will be reset and the processor continues to run Thumb instructions.BCXBXFig.16 Thumb Exception ProcessingThumb has a much higher code density than ARM code, needing some 70% of the space of the latter. However in a 32-bit memory, ARM code is some 40% faster than Thumb. However it should be noted that if you only have 16-bit wide memory then Thumb code will be faster than ARM code by about 45%. Finally the other important aspect of Thumb is that it can use up to 30% less power than ARM code.ARM7的体系结构介绍特里沃马丁曾，鼠技术总监本文给出了ARM 7架构的概述和开发新的设备，以及主要功能的描述，未来将研究ARM体系结构的其他方面。
翻译图书须知(翻译类) - 排版要求
图书翻译须知
编译者须把握好全书理论，讲究信、雅、达。
科技图书要注意科学性、通俗性。
从图书出版的版式角度来讲，须注意如下几点：
一、 所有单位不必翻译成中文，应基本保留原文（最好是英文单位）。
其中因为习惯和规定不同，美国的M 表示为千（相当于我国的k ），所以Mbbl ，或MMbbl 等单位翻译时请统一译成103bbl ，或106bbl 。
SCF （标准立方英尺、stb （标准桶）等直接翻译成ft 3或bbl 。
二、 所有图只需把图名翻译并排在正文中，并在图名上加一方框（表示这里是一个图），具体图中的文字、标注等都要翻译。
如：
图1—1 完井管柱图
三、 除简单公式排进去外，复杂公式一般均复印粘贴进去，不要排版。
因为，译者所用的排版系统大都为WORD 等文书系统，不是印刷系统。
故最终还得重新排版，并且译者为校正公式的正确性也浪费很多时间。
四、 除了数据简单的表格外，数据很多的表也不必把数据排进去，只需复印原文并翻译在复印件上，插到打印稿中间。
因为数据容易出错，而出版社有专业校对人员可以保证正确。
五、
参考文献原文复印即可，不必打印。
六、 排版要求
各级标题字体字号全书统一，可作者先定。
翻译规范
简明翻译规范一、文件的管理1、所有翻译稿必须按照内容单独存盘。
2、文件的取名：非公证书文档一般用中文取名，名称包括当事人姓名+内容+备注，公证书可以直接用阿拉伯数字编号取名。
3、文件夹管理，采用树状目录结构，清晰分类。
二、措词的规范1、日期：采用美式写法，例如：June 16, 2008，June 2008，一般不得采用纯数字，更不得使用中文习惯书写。
注意：仅有年月时，中间没有逗号！2、地址：从小到大依序翻译，中文地址一律采用拼音，但是“省”、“市”、“区”、“县”、“街”、“路”等需要翻译出来，例如：Zhongshan Road, Nanjing City, Jiangsu Province, P. R. China。
如路名街名中包含方位词，一般前置，例如：West Zhongshan Road, Middle Renmin Road。
注意：在地名、单位名等专有名词的中译英时，不应或不便意译时，一般采用拼音方式，不要强行意译。
如：南京市浮桥18号，应译为：18 Fuqiao, Nanjing。
英文人名和地址，除非国名、大城市名，和著名人物，一律照抄不要音译（除非另有要求），更不允许翻一半，留一半，签名的地方，直接标签名就可以了，不用截图。
3、文件编号：一般的，中国的文件档案编号由两个部分组成，前半截是中文字，后半截是阿拉伯数字，中间用标志“字”来标示。
例如：苏宁档案字201003456号。
翻译时，编号中的中文字都取其拼音首字母，大写，后面加点，标志“字”采用全拼，后面加点，阿拉伯数字采用序数No.XXX表示，以上“苏宁档案字201003456号”可译成“S. N. D. A. Zi. No.201003456”。
如遇客户单位已经有固定的文件编号翻译方式，应遵循该客户单位的习惯。
4、货币金额及数字：编号数字直接采用阿拉伯数字。
小写金额时，货币名称使用缩写字母，例如美元：USD；人民币：RMB。
货币缩写必须在金额数字之前！小写金额数字使用阿拉伯数字，必须使用分位符！例如：RMB10,000。
翻译排版格式
翻译排版格式要求（通用）中文格式要求1 整篇文章的大标题居中，用“宋体，2-3号字体”；2 正文用“5号字，宋体”；3 大标题与正文之间的标题的字号按“小3号——4号——小4号”的顺序，超过3极标题的仍按此顺序，排到“小4号”后，以后的几级标题都按“小4号”；4 每一自然段落的起头文字应退后两个字，符合中文排版习惯。
各自然段之间不需空行；5 原文是斜体的地方，译文也应用斜体，原文是加黑的地方，译文也应加黑；6 原文中的书名，中文应加书名号“《》”7 如客户在格式上有特殊要求的，应服从客户的要求，如有的客户要求一页对一页地翻译，有的客户要求按照原文格式，有的客户要求分栏排版等。
8 在该分页的地方，务必进行分页，分页时必须通过插入分页符进行，即在word中点菜单“插入”下的“分隔符”，严禁使用打多个回车键来达到分页的目的，这样在修改时就会产生混乱。
英文格式要求（注：其他外语语种可以参考该要求，特殊的应符合各自语言的惯例格式要求） 1 整篇文章的大标题居中，用“Times New Roman”，小2号字体； 2 正文用Times New Roman”，5号字体；3 大标题与正文之间的标题的字号按“3号——4号——5号”的顺序，超过3级标题的仍按此顺序，排到“5号”后，以后的几级标题都按“5号”；4 每一自然段落的起头文字不退后。
各自然段之间空一行；5 各级标题的编号选用应恰当，且不得出现中文编号，如“三”、“（三）”等，各级标题上下应各空一行。
6 不同级标题的编号处于不同的层次上，译者可以通过拖动word文件中的标尺来实现这个目的。
同级标题编号应对齐，整个文件中的所有正文应全部对齐。
整个文档必须清晰整齐。
译者也可以参考老外的一些正式文件，他们的文件在格式上非常漂亮。
7 不得在英文中出现书名号“《》”，英文中的书或文章的题目应采用斜体来标记，而不是书名号；8 外文译文按原中文格式，需斜体的地方，译文就斜体，需加黑的地方，译文也加黑；9 请高度重视单词大小写问题。
翻译排版格式要求(通用)
翻译排版格式要求（通用）中文格式要求1 整篇文章的大标题居中，用“宋体，2-3号字体”；2 正文用“5号字，宋体”；3 大标题与正文之间的标题的字号按“小3号——4号——小4号”的顺序，超过3极标题的仍按此顺序，排到“小4号”后，以后的几级标题都按“小4号”；4 每一自然段落的起头文字应退后两个字，符合中文排版习惯。
各自然段之间不需空行；5 原文是斜体的地方，译文也应用斜体，原文是加黑的地方，译文也应加黑；6 原文中的书名，中文应加书名号“《》”7 如客户在格式上有特殊要求的，应服从客户的要求，如有的客户要求一页对一页地翻译，有的客户要求按照原文格式，有的客户要求分栏排版等。
8 在该分页的地方，务必进行分页，分页时必须通过插入分页符进行，即在word中点菜单“插入”下的“分隔符”，严禁使用打多个回车键来达到分页的目的，这样在修改时就会产生混乱。
英文格式要求（注：其他外语语种可以参考该要求，特殊的应符合各自语言的惯例格式要求）1 整篇文章的大标题居中，用“Times New Roman”，小2号字体；2 正文用Times New Roman”，5号字体；3 大标题与正文之间的标题的字号按“3号——4号——5号”的顺序，超过3级标题的仍按此顺序，排到“5号”后，以后的几级标题都按“5号”；4 每一自然段落的起头文字不退后。
各自然段之间空一行；5 各级标题的编号选用应恰当，且不得出现中文编号，如“三”、“（三）”等，各级标题上下应各空一行。
6 不同级标题的编号处于不同的层次上，译者可以通过拖动word文件中的标尺来实现这个目的。
同级标题编号应对齐，整个文件中的所有正文应全部对齐。
整个文档必须清晰整齐。
译者也可以参考老外的一些正式文件，他们的文件在格式上非常漂亮。
7 不得在英文中出现书名号“《》”，英文中的书或文章的题目应采用斜体来标记，而不是书名号；8 外文译文按原中文格式，需斜体的地方，译文就斜体，需加黑的地方，译文也加黑；9 请高度重视单词大小写问题。
翻译实践报告范文(共7篇)
翻译实践报告范文(共7篇)1. 引言 ................................................ ................................................... (1)2. 翻译过程分析 ................................................ ................................................... .....2.1直译法 ................................................ ................................................... ...............2.2排比、对偶句的处理 ................................................ ..........................................2.3语序调整 ................................................ ................................................... ...........2.4成语及四字词语的处理 ......................................................................................3. 结语 ................................................ ................................................... .....................参考文献................................................. ................................................... ....................1. 引言翻译是一门艺术，一门语言的艺术。
翻译格式体例说明(1)
编写格式说明一、标题层次或体例1.常用的格式如下所示：第* 章***** （居中，二号字）第* 节***** （居中，三号）一、********* （居中，四号）（一）*********（靠边，前空两字，四号）1．****** ********** （靠边，前空两字，四号）（1）*******：********** （靠边，前空两字，小四号）1）*******：*********** （靠边，前空两字，小四号）①******；②*********；③*********。
（接正文，不作为一级标题，常用于正文接排，或表注）2.注意标题需顺次使用，不能小标题套大标题各章节的标题层次力求一致，以保持全书稿结构的平衡标题层次不宜过细、过繁琐个别章节内容较少时，可越级使用标题，如一级标题后径用三级标题。
3.必须要一致的格式全书的图号、表号、公式、例题的表达方式应一致。
如：图6-1，表6-1，式（6-1），例6-1，等等。
4.字体：使用Times New Roman，标题加黑；图表头使用五号字。
5.标点：规范使用标点符号，避免中、英标点混用。
二、图和表格1.一般用“三线表”，表必须有表号、表题，在正文内须标明出处。
2.表格请用Execl或Word排版。
不要按正文方式录入文字后，再单独绘线，也不要将表格扫描后以图片形式插入。
3.图和表以章为序编号。
4.图的标题在图下方居中，表头在表格上方居中。
5.正文中引用图表的位置要注明，格式如（见表1-3）三、参考文献、索引参考文献列于每章、节后，格式采取顺序编码制。
引用文献需要在正文引用位置以序号上标形式标出，文后附引用文章列表；引文列表字号采用5号字，英文Times New Roman。