电气专业毕业设计外文翻译--电源管理技术及计算
毕业设计外文原文+翻译(电力系统)
对称相电压
在图 2-10 中,三相电源的终端呗标记为 a、b、c，电源相电压标记为Ean ， Ebn ，Ecn ，当电源的三相电压有相同的幅度，任意两相之间互差 120 度角时，电 源是对称的。当以Ean 作为参考相量时，相电压的幅值是 10v，对称三相相电压 如下所示：
Ean =100 Ebn 10 120 10 240 （2.5.1） Ecn 10 120 10 240
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河南理工大学 HENAN POLYTECHNIC UNIVERSITY
480 30 Ean 3 IA= Z L ZY 180 30 40 3 277.1-30 （0.0872+j0.9962）（ + 7.660+j6.428） 277.1-30 277.1-30 = = =25.83-73.78 A （2.5.18） （7.748+j7.424） 10.7343.78 I B 25.83166.22 A I C 25.8346.22 A
Ebn Eab
Ebc
30
Ean
Ecn
Eca
（a）向量图
b
Eab Ebn
a
Ebc Ean Eca
c
Ecn
（b）电压三角形
图 2.12 正序三相 Y 形连接系统相电压和相线电压
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河南理工大学 HENAN POLYTECHNIC UNIVERSITY
对称线电流
在图 2-10 中，因为从电源到负载的中性线的阻抗忽略不计，所以 n 与 N 之间是 同电位的，即EnN =0。因此每一相都可以列一个单独的 KVL 方程，经观察，线电 流为：
I a Ean ZY I b Ebn ZY （2.5.7） I c Ecn ZY
电气毕业论文设计英语文献原文+翻译.doc
标准文档外文翻译院（系）专业班级姓名学号指导教师年月日Programmable designed for electro-pneumatic systemscontrollerJohn F.WakerlyThis project deals with the study of electro-pneumatic systems and the programmable controller that provides an effective and easy way to control the sequence of the pneumatic actuators movement and the states of pneumatic system. The project of a specific controller for pneumatic applications join the study of automation design and the control processing of pneumatic systems with the electronic design based on microcontrollers to implement the resources of the controller.1. IntroductionThe automation systems that use electro-pneumatic technology are formed mainly by three kinds of elements: actuators or motors, sensors or buttons and control elements like valves. Nowadays, most of the control elements used to execute the logic of the system were substituted by the Programmable Logic Controller (PLC). Sensors and switches are plugged as inputs and the direct control valves for the actuators are plugged as outputs. An internal program executes all the logic necessary to the sequence of the movements, simulates other components like counter, timer and control the status of the system.With the use of the PLC, the project wins agility, because it is possible to create and simulate the system as many times as needed. Therefore, time can be saved, risk of mistakes reduced and complexity can be increased using the same elements.A conventional PLC, that is possible to find on the market from many companies, offers many resources to control not only pneumatic systems, but all kinds of system that uses electrical components. The PLC can be very versatile and robust to be applied in many kinds of application in the industry or even security system and automation of buildings.Because of those characteristics, in some applications the PLC offers to much resources that are not even used to control the system, electro-pneumatic system is one of this kind of application. The use of PLC, especially for small size systems, can be very expensive for the automation project.An alternative in this case is to create a specific controller that can offer the exactly size and resources that the project needs [3, 4]. This can be made using microcontrollers as the base of this controller.The controller, based on microcontroller, can be very specific and adapted to only one kind of machine or it can work as a generic controller that can be programmed as a usual PLC and work with logic that can be changed. All these characteristics depend on what is needed and how much experience the designer has with developing an electronic circuit and firmware for microcontroller. But the main advantage of design the controller with the microcontroller is that the designer has the total knowledge of his controller, which makes it possible to control the size of the controller, change the complexity and the application of it. It means that the project gets more independence from other companies, but at the same time the responsibility of the control of the system stays at the designer hands2. Electro-pneumatic systemOn automation system one can find three basic components mentioned before, plus a logic circuit that controls the system. An adequate technique is needed to project the logic circuit and integrate all the necessary components to execute the sequence of movements properly.For a simple direct sequence of movement an intuitive method can be used [1, 5], but for indirect or more complex sequences the intuition can generate a very complicated circuit and signal mistakes. It is necessary to use another method that can save time of the project, makea clean circuit, can eliminate occasional signal overlapping and redundant circuits. The presented method is called step-by-step or algorithmic [1, 5], it is valid for pneumatic and electro-pneumatic systems and it was used as a base in this work.The method consists of designing the systems based on standard circuits made for each change on the state of the actuators, these changes are called steps.The first part is to design those kinds of standard circuits for each step, the next task is to link the standard circuits and the last part is to connect the control elements that receive signals from sensors, switches and the previous movements, and give the air or electricity to the supply lines of each step. In Figs. 1 and 2 the standard circuits are drawn for pneumatic and electro-pneumatic system [8]. It is possible to see the relations with the previous and the next steps.3. The method applied inside the controllerThe result of the method presented before is a sequence of movements of the actuator that is well defined by steps. It means that each change on the position of the actuators is a new state of the system and the transition between states is called step.The standard circuit described before helps the designer to define the states of the systems and to define the condition to each change betweenthe states. In the end of the design, the system is defined by a sequencethat never chances and states that have the inputs and the outputs well defined. The inputs are the condition for the transition and the outputs are the result of the transition.All the configuration of those steps stays inside of the microcontroller and is executed the same way it was designed. The sequences of strings are programmed inside the controller with 5 bytes; each string has the configuration of one step of the process. There are two bytes for the inputs, one byte for the outputs and two more for the other configurations and auxiliary functions of the step. After programming, this sequence of strings is saved inside of a non-volatile memory of the microcontroller, so they can be read and executed.The controller task is not to work in the same way as a conventional PLC, but the purpose of it is to be an example of a versatile controller that is design for an specific area. A conventional PLC process the control of the system using a cycle where it makes an image of the inputs, execute all the conditions defined by the configuration programmed inside, and then update the state of the outputs. This controller works in a different way, where it read the configuration of the step, wait the condition of inputs to be satisfied, then update the state or the outputs and after that jump to the next step and start the process again.It can generate some limitations, as the fact that this controller cannot execute, inside the program, movements that must be repeated for some time, but this problem can be solved with some external logic components. Another limitation is that the controller cannot be applied on systems that have no sequence. These limitations are a characteristic of the system that must be analyzed for each application.4. Characteristics of the controllerThe controller is based on the MICROCHIP microcontroller PIC16F877 [6,7] with 40 pins, and it has all the resources needed for thisproject .It has enough pins for all the components, serial communication implemented in circuit, EEPROM memory to save all the configuration of the system and the sequence of steps. For the execution of the main program, it offers complete resources as timers and interruptions.The list of resources of the controller was created to explore all the capacity of the microcontroller to make it as complete as possible. During the step, the program chooses how to use the resources reading the configuration string of the step. This string has two bytes for digital inputs, one used as a mask and the other one used as a value expected. One byte is used to configure the outputs value. One bytes more is used for the internal timer , the analog input or time-out. The EEPROM memory inside is 256 bytes length that is enough to save the string of the steps, with this characteristic it is possible to save between 48 steps （Table 1）.The controller (Fig.3) has also a display and some buttons that are used with an interactive menu to program the sequence of steps and other configurations.4.1. Interaction componentsFor the real application the controller must have some elements to interact with the final user and to offer a complete monitoring of the system resources that are available to the designer while creating the logic control of the pneumatic system (Fig.3):•Interactive mode of work; function available on the main program for didactic purposes, the user gives the signal to execute the step. •LCD display, which shows the status of the system, values of inputs, outputs, timer and statistics of the sequence execution.•Beep to give important alerts, stop, start and emergency.• Leds to show power on and others to show the state of inputs and outputs.4.2. SecurityTo make the final application works property, a correct configuration to execute the steps in the right way is needed, but more then that itmust offer solutions in case of bad functioning or problems in the execution of the sequence. The controller offers the possibility to configure two internal virtual circuits that work in parallel to the principal. These two circuits can be used as emergency or reset buttons and can return the system to a certain state at any time [2]. There are two inputs that work with interruption to get an immediate access to these functions. It is possible to configure the position, the buttons and the value of time-out of the system.4.3. User interfaceThe sequence of strings can be programmed using the interface elements of the controller. A Computer interface can also be used to generate the user program easily. With a good documentation the final user can use the interface to configure the strings of bytes that define the steps of the sequence. But it is possible to create a program with visual resources that works as a translator to the user, it changes his work to the values that the controller understands.To implement the communication between the computer interface and the controller a simple protocol with check sum and number of bytes is the minimum requirements to guarantee the integrity of the data.4.4. FirmwareThe main loop works by reading the strings of the steps from the EEPROM memory that has all the information about the steps.In each step, the status of the system is saved on the memory and it is shown on the display too. Depending of the user configuration, it can use the interruption to work with the emergency circuit or time-out to keep the system safety. In Fig.4,a block diagram of micro controller main program is presented.5. Example of electro-pneumatic systemThe system is not a representation of a specific machine, but it is made with some common movements and components found in a real one. The system is composed of four actuators. The actuators A, B and C are double acting and D-single acting. Actuator A advances and stays in specified position till the end of the cycle, it could work fixing an object to the next action for example (Fig. 5) , it is the first step. When A reaches the end position, actuator C starts his work together with B, making as many cycles as possible during the advancing of B. It depends on how fastactuator B is advancing; the speed is regulated by a flowing control valve. It was the second step. B and C are examples of actuators working together, while B pushes an object slowly, C repeats its work for some time.When B reaches the final position, C stops immediately its cycle and comes back to the initial position. The actuator D is a single acting one with spring return and works together with the back of C, it is the third step. D works making very fast forward and backward movement, just one time. Its backward movement is the fourth step. D could be a tool to make a hole on the object.When D reaches the initial position, A and B return too, it is the fifth step.Fig. 6 shows the first part of the designing process where all the movements of each step should be defined [2]. (A+) means that the actuator A moves to the advanced position and (A−) to the initial position. The movements that happen at the same time are joined together in the same step. The system has five steps.These two representations of the system (Figs. 5 and 6) together are enough to describe correctly all the sequence. With them is possible to design the whole control circuit with the necessary logic components. But till this time, it is not a complete system, because it is missing some auxiliary elements that are not included in this draws because they work in parallel with the main sequence.These auxiliary elements give more function to the circuit and are very important to the final application; the most important of them is the parallel circuit linked with all the others steps. That circuit should be able to stop the sequence at any time and change the state of the actuators to a specific position. This kind of circuit can be used as a reset or emergency buttons.The next Figs. 7 and 8 show the result of using the method without the controller. These pictures are the electric diagram of the control circuit of the example, including sensors, buttons and the coils of the electrical valves.The auxiliary elements are included, like the automatic/manual switcher that permit a continuous work and the two start buttons that make the operator of a machine use their two hands to start the process, reducing the risk of accidents.6. Changing the example to a user programIn the previous chapter, the electro-pneumatic circuits were presented, used to begin the study of the requires to control a system that work with steps and must offer all the functional elements to be used in a real application. But, as explained above, using a PLC or this specific controller, the control becomes easier and the complexity can be increasealso.Table 2 shows a resume of the elements that are necessary to control the presented example.With the time diagram, the step sequence and the elements of the system described in Table 2 and Figs. 5 and 6 it is possible to create the configuration of the steps that can be sent to the controller (Tables 3 and 4).While using a conventional PLC, the user should pay attention to the logic of the circuit when drawing the electric diagram on the interface (Figs. 7 and 8), using the programmable controller, described in this work, the user must know only the concept o f the method and program only the configuration of each step.It means that, with a conventional PLC, the user must draw the relationbetween the lines and the draw makes it hard to differentiate the steps of the sequence. Normally, one needs to execute a simulation on the interface to find mistakes on the logicThe new programming allows that the configuration of the steps be separated, like described by the method. The sequence is defined by itself and the steps are described only by the inputs and outputs for each step.The structure of the configuration follows the order:1-byte: features of the step;2-byte: mask for the inputs;3-byte: value expected on the inputs;4-byte: value for the outputs;5-byte: value for the extra function.Table 5 shows how the user program is saved inside the controller, this is the program that describes the control of the example shown before.The sequence can be defined by 25 bytes. These bytes can be dividedin five strings with 5 bytes each that define each step of the sequence (Figs. 9 and 10).7. ConclusionThe controller developed for this work (Fig. 11) shows that it is possible to create a very useful programmable controller based on microcontroller. External memories or external timers were not used in case to explore the resources that the microcontroller offers inside. Outside the microcontroller, there are only components to implement the outputs, inputs, analog input, display for the interface and the serial communication.Using only the internal memory, it is possible to control a pneumatic system that has a sequence with 48 steps if all the resources for all steps are used, but it is possible to reach sixty steps in the case of a simpler system.The programming of the controller does not use PLC languages, but a configuration that is simple and intuitive. With electro-pneumatic system, the programming follows the same technique that was used before to design the system, but here the designer work s directly with the states or steps of the system.With a very simple machine language the designer can define all the configuration of the step using four or five bytes. It depends only on his experience to use all the resources of the controller.The controller task is not to work in the same way as a commercial PLC but the purpose of it is to be an example of a versatile controller that is designed for a specific area. Because of that, it is not possible to say which one works better; the system made with microcontroller is an alternative that works in a simple way.应用于电气系统的可编程序控制器约翰 F.维克里此项目主要是研究电气系统以及简单有效的控制气流发动机的程序和气流系统的状态。
电气自动化专业毕业设计英文翻译模板
电气自动化专业毕业设计英文翻译Computer control technology1 Computer structure and functionThis section introduces the internal architecture of a computer and describes how instructions are stored and interpreted and explains how the instruction execution cycle is broken down into its various components.At the most basic level, a computer simply executes binary-coded results. For a general-purpose programmable computer, four necessary elements are the memory, central processing unit (CPU, or simply processor), an external processor bus, and an input/output system as indicated in Fig.3-1 A-1.Fig. 3-1A-1 Basic elements of a computerThe memory stores instructions and data.The CPU reads and interprets the instructions, reads the data required by each instruction, executes the action required by the instruction, and stores the results back in memory. One of the actions that is required of the CPU is to read data from or write data to an external device. This is carried out using the input/output system.The external processor bus is a set of electric conductors that carriesdata, address and control information between the other computer elements.1-1 The memoryThe memory of a computer consists of a set of sequentially numbered locations. Each location is a register in which binary information can be stored. The ”number”of a location is called its address. The lowest address is 0. The manufacturer defines a word length for the processor that is an integral number of locations long. In each word the bits can represent either data or instructions. For the Intel 8086/87 and Motorola MC6800 microprocessors, a word is 16 bits long, but each memory location has only 8 bits and thus two 8-bit locations must be accessed to obtain each data word.In order to use the contents of memory, the processor must fetch the contents of the right location. To carry out a fetch, the processor places (enables) the binary-coded address of the desired location onto the address lines of the external processor bus. The memory then allows the contents of the addressed memory location to be read by the processor. The process of fetching the contents of a memory location does not alter the contents of that location.Instructions in memory Instructions stored in memory are fetched by the CPU and unless program branches occur, they are executed inthe sequence they appear in memory. An instruction written as a binary pattern is called a machine-language instruction. One way to achieve meaningful patterns is to divide up the bits into fields as indicated in Fig. 3-1A-2, with each field containing a code for a different type of information.0001 0101 1000 XXXX 0100 0001 1000 XXXX 0011 XXXX XXXX 0100 Fields Opcode Immediate code Operand data Branch addressSet ‘5’ in location 8 Subtract ‘1’ f rom location 8 If zero, bran ch to location 416-bit instruction words... ... XXXX : not u sed (or “don ’t care”)Fig. 3-1A-2 Arrangement of program and data in memoryEach instruction in our simple computer can be divided up into four fields of 4 bits each. Each instruction can contain operation code (or opcode, each instruction has a unique opcode), operand address, immediate operands, branch address.In a real instruction set there are many more instructions. There is also a much large number of memory locations in which to store instructions and data. In order to increase the number of memory locations, the address fields and hence the instructions must be longer than 16 bits if we use the same approach. There are a number of waysto increase the addressing range of the microprocessor without increasing the instruction length: variable instruction field, multiword instructions, multiple addressing modes, variable instruction length. We will not discuss them in detail.Data in memory data is information that is represented in memory as a code. For efficient use of the memory space and processing time, most computers provide the capability of manipulating data of different lengths and representations in memory. The various different representations recognized by the processor are called its data types. The data types normally used are: bit, binary-coded decimal digit (4-bit nibble, BCD), byte (8 bits), word (2 bytes), double word (4 bytes).Some processors provide instructions that manipulate other data types such as single-precision floating-point data types (32bits) and double-precision floating-point data types (64 bits). There is another type of data—character data. It is also usually represented in 8 bits. Each computer terminal key and key combination (such as shift and control functions) on a standard terminal keyboard has a 7-bits code defined by the American Standard Code for Information Interchange (ASCII).Type of memory In the applications of digital control system, we also concerned with the characteristics of different memory techniques. For primary memory, we need it to be stored information temporarilyand to be written and got information from successive or from widely different locations. This type memory is called random-access memory (RAM). In some case we do not want the information in memory to be lost. So we are willing to use special techniques to write into memory. If writing is accomplished only once by physically changing connections, the memory is called a read-only memory (ROM). If the interconnection pattern can be programmed to be set, the memory is called a programmable read-only memory (PROM). If rewriting can be accomplished when it is necessary, we have an erasable programmable read-only memory (EPROM). An electronically erasable PROM is abbreviated EEPROM.1-2 The CPUThe CPU’s job is to fetch instructions from memory and execute these instructions. The structure of the CPU is shown in Fig. 3-1A-3. It has four main components: an arithmetic and logical unit (ALU), a set of registers, an internal processor bus and controller.。
电气毕业设计用外文翻译(中英文对照)
The Transformer on load ﹠Introduction to DC Machine sThe Transformer on loadIt has been shown that a primary input voltage 1V can be transformed to any desired open-circuit secondary voltage 2E by a suitable choice of turns ratio. 2E is available for circulating a load current impedance. For the moment, a lagging power factor will be considered. The secondary current and the resulting ampere-turns 22N I will change the flux, tending to demagnetize the core, reduce m Φ and with it 1E . Because the primary leakage impedance drop is so low, a small alteration to 1E will cause an appreciable increase of primary current from 0I to a new value of 1I equal to ()()i jX R E V ++111/. The extra primary current and ampere-turns nearly cancel the whole of the secondary ampere-turns. This being so , the mutual flux suffers only a slight modification and requires practically the same net ampere-turns 10N I as on no load. The total primary ampere-turns are increased by an amount 22N I necessary to neutralize the same amount of secondary ampere-turns. In the vector equation , 102211N I N I N I =+; alternatively, 221011N I N I N I -=. At full load, the current 0I is only about 5% of the full-load current and so 1I is nearly equal to 122/N N I . Because in mind that 2121/N N E E =, the input kV A which is approximately 11I E is also approximately equal to the output kV A, 22I E .The physical current has increased, and with in the primary leakage flux to which it is proportional. The total flux linking the primary ,111Φ=Φ+Φ=Φm p , is shown unchanged because the total back e.m.f.,（dt d N E /111Φ-）is still equal and opposite to 1V . However, there has been a redistribution of flux and the mutual component has fallen due to the increase of 1Φ with 1I . Although the change is small, the secondary demand could not be met without a mutual flux and e.m.f. alteration to permit primary current to change. The net flux s Φlinking the secondary winding has been further reduced by the establishment of secondary leakage flux due to 2I , and this opposes m Φ. Although m Φ and2Φ are indicated separately , they combine to one resultant in the core which will be downwards at the instant shown. Thus the secondary terminal voltage is reduced to dt d N V S /22Φ-= which can be considered in two components, i.e. dt d N dt d N V m //2222Φ-Φ-=or vectorially 2222I jX E V -=. As for the primary, 2Φ is responsible for a substantially constant secondaryleakage inductance 222222/Λ=ΦN i N . It will be noticed that the primary leakage flux is responsiblefor part of the change in the secondary terminal voltage due to its effects on the mutual flux. The two leakage fluxes are closely related; 2Φ, for example, by its demagnetizing action on m Φ has caused the changes on the primary side which led to the establishment of primary leakage flux.If a low enough leading power factor is considered, the total secondary flux and the mutual flux are increased causing the secondary terminal voltage to rise with load. p Φ is unchanged in magnitude from the no load condition since, neglecting resistance, it still has to provide a total back e.m.f. equal to 1V . It is virtually the same as 11Φ, though now produced by the combined effect of primary and secondary ampere-turns. The mutual flux must still change with load to give a change of 1E and permit more primary current to flow. 1E has increased this time but due to the vector combination with 1V there is still an increase of primary current.Two more points should be made about the figures. Firstly, a unity turns ratio has been assumed for convenience so that '21E E =. Secondly, the physical picture is drawn for a different instant of time from the vector diagrams which show 0=Φm , if the horizontal axis is taken as usual, to be the zero time reference. There are instants in the cycle when primary leakage flux is zero, when the secondary leakage flux is zero, and when primary and secondary leakage flux is zero, and when primary and secondary leakage fluxes are in the same sense.The equivalent circuit already derived for the transformer with the secondary terminals open, can easily be extended to cover the loaded secondary by the addition of the secondary resistance and leakage reactance.Practically all transformers have a turns ratio different from unity although such an arrangement issometimes employed for the purposes of electrically isolating one circuit from another operating at the same voltage. To explain the case where 21N N ≠ the reaction of the secondary will be viewed from the primary winding. The reaction is experienced only in terms of the magnetizing force due to the secondary ampere-turns. There is no way of detecting from the primary side whether 2I is large and 2N small or vice versa, it is the product of current and turns which causes the reaction. Consequently, a secondary winding can be replaced by any number of different equivalent windings and load circuits which will give rise to an identical reaction on the primary .It is clearly convenient to change the secondary winding to an equivalent winding having the same number of turns 1N as the primary.With 2N changes to 1N , since the e.m.f.s are proportional to turns, 2212)/('E N N E = which is the same as 1E .For current, since the reaction ampere turns must be unchanged 1222'''N I N I = must be equal to 22N I .i.e. 2122)/(I N N I =.For impedance , since any secondary voltage V becomes V N N )/(21, and secondary current I becomes I N N )/(12, then any secondary impedance, including load impedance, must become I V N N I V /)/('/'221=. Consequently, 22212)/('R N N R = and 22212)/('X N N X = .If the primary turns are taken as reference turns, the process is called referring to the primary side. There are a few checks which can be made to see if the procedure outlined is valid.For example, the copper loss in the referred secondary winding must be the same as in the original secondary otherwise the primary would have to supply a different loss power. ''222R I must be equal to 222R I . ）222122122/()/(N N R N N I ∙∙ does in fact reduce to 222R I .Similarly the stored magnetic energy in the leakage field )2/1(2LI which is proportional to 22'X I will be found to check as ''22X I . The referred secondary 2212221222)/()/(''I E N N I N N E I E kVA =∙==.The argument is sound, though at first it may have seemed suspect. In fact, if the actual secondarywinding was removed physically from the core and replaced by the equivalent winding and load circuit designed to give the parameters 1N ,'2R ,'2X and '2I , measurements from the primary terminals would be unable to detect any difference in secondary ampere-turns, kVA demand or copper loss, under normal power frequency operation.There is no point in choosing any basis other than equal turns on primary and referred secondary, but it is sometimes convenient to refer the primary to the secondary winding. In this case, if all the subscript 1’s are interchanged for the subscript 2’s, the necessary referring constants are easily found; e.g. 2'1R R ≈,21'X X ≈; similarly 1'2R R ≈ and 12'X X ≈.The equivalent circuit for the general case where 21N N ≠ except that m r has been added to allow for iron loss and an ideal lossless transformation has been included before the secondary terminals to return '2V to 2V .All calculations of internal voltage and power losses are made before this ideal transformation is applied. The behaviour of a transformer as detected at both sets of terminals is the same as the behaviour detected at the corresponding terminals of this circuit when the appropriate parameters are inserted. The slightly different representation showing the coils 1N and 2N side by side with a core in between is only used for convenience. On the transformer itself, the coils are , of course , wound round the same core.Very little error is introduced if the magnetising branch is transferred to the primary terminals, but a few anomalies will arise. For example ,the current shown flowing through the primary impedance is no longer the whole of the primary current. The error is quite small since 0I is usually such a small fraction of 1I . Slightly different answers may be obtained to a particular problem depending on whether or not allowance is made for this error. With this simplified circuit, the primary and referred secondary impedances can be added to give: 221211)/(Re N N R R += and 221211)/(N N X X Xe +=It should be pointed out that the equivalent circuit as derived here is only valid for normal operation at power frequencies; capacitance effects must be taken into account whenever the rate of change of voltage would give rise to appreciable capacitance currents, dt CdV I c /=. They are important at high voltages and at frequencies much beyond 100 cycles/sec. A further point is not theonly possible equivalent circuit even for power frequencies .An alternative , treating the transformer as a three-or four-terminal network, gives rise to a representation which is just as accurate and has some advantages for the circuit engineer who treats all devices as circuit elements with certain transfer properties. The circuit on this basis would have a turns ratio having a phase shift as well as a magnitude change, and the impedances would not be the same as those of the windings. The circuit would not explain the phenomena within the device like the effects of saturation, so for an understanding of internal behaviour .There are two ways of looking at the equivalent circuit:(a) viewed from the primary as a sink but the referred load impedance connected across '2V ,or (b) viewed from the secondary as a source of constant voltage 1V with internal drops due to 1Re and 1Xe . The magnetizing branch is sometimes omitted in this representation and so the circuit reduces to a generator producing a constant voltage 1E (actually equal to 1V ) and having an internal impedance jX R + (actually equal to 11Re jXe +).In either case, the parameters could be referred to the secondary winding and this may save calculation time .The resistances and reactances can be obtained from two simple light load tests.Introduction to DC MachinesDC machines are characterized by their versatility. By means of various combination of shunt, series, and separately excited field windings they can be designed to display a wide variety of volt-ampere or speed-torque characteristics for both dynamic and steadystate operation. Because of the ease with which they can be controlled , systems of DC machines are often used in applications requiring a wide range of motor speeds or precise control of motor output.The essential features of a DC machine are shown schematically. The stator has salient poles and is excited by one or more field coils. The air-gap flux distribution created by the field winding is symmetrical about the centerline of the field poles. This axis is called the field axis or direct axis.As we know , the AC voltage generated in each rotating armature coil is converted to DC in the external armature terminals by means of a rotating commutator and stationary brushes to which the armature leads are connected. The commutator-brush combination forms a mechanical rectifier,resulting in a DC armature voltage as well as an armature m.m.f. wave which is fixed in space. The brushes are located so that commutation occurs when the coil sides are in the neutral zone , midway between the field poles. The axis of the armature m.m.f. wave then in 90 electrical degrees from the axis of the field poles, i.e., in the quadrature axis. In the schematic representation the brushes are shown in quarature axis because this is the position of the coils to which they are connected. The armature m.m.f. wave then is along the brush axis as shown.. (The geometrical position of the brushes in an actual machine is approximately 90 electrical degrees from their position in the schematic diagram because of the shape of the end connections to the commutator.)The magnetic torque and the speed voltage appearing at the brushes are independent of the spatial waveform of the flux distribution; for convenience we shall continue to assume a sinusoidal flux-density wave in the air gap. The torque can then be found from the magnetic field viewpoint.The torque can be expressed in terms of the interaction of the direct-axis air-gap flux per pole d Φ and the space-fundamental component 1a F of the armature m.m.f. wave . With the brushes in the quadrature axis, the angle between these fields is 90 electrical degrees, and its sine equals unity. For a P pole machine 12)2(2a d F P T ϕπ= In which the minus sign has been dropped because the positive direction of the torque can be determined from physical reasoning. The space fundamental 1a F of the sawtooth armature m.m.f. wave is 8/2π times its peak. Substitution in above equation then gives a d a a d a i K i mPC T ϕϕπ==2 Where a i =current in external armature circuit;a C =total number of conductors in armature winding;m =number of parallel paths through winding;And mPC K a a π2=Is a constant fixed by the design of the winding.The rectified voltage generated in the armature has already been discussed before for an elementary single-coil armature. The effect of distributing the winding in several slots is shown in figure ,in which each of the rectified sine waves is the voltage generated in one of the coils, commutation taking place at the moment when the coil sides are in the neutral zone. The generated voltage as observed from the brushes is the sum of the rectified voltages of all the coils in series between brushes and is shown by the rippling line labeled a e in figure. With a dozen or so commutator segments per pole, the ripple becomes very small and the average generated voltage observed from the brushes equals the sum of the average values of the rectified coil voltages. The rectified voltage a e between brushes, known also as the speed voltage, is m d a m d a a W K W mPC e ϕϕπ==2 Where a K is the design constant. The rectified voltage of a distributed winding has the same average value as that of a concentrated coil. The difference is that the ripple is greatly reduced.From the above equations, with all variable expressed in SI units:m a a Tw i e =This equation simply says that the instantaneous electric power associated with the speed voltage equals the instantaneous mechanical power associated with the magnetic torque , the direction of power flow being determined by whether the machine is acting as a motor or generator.The direct-axis air-gap flux is produced by the combined m.m.f. f f i N ∑ of the field windings, the flux-m.m.f. characteristic being the magnetization curve for the particular iron geometry of the machine. In the magnetization curve, it is assumed that the armature m.m.f. wave is perpendicular to the field axis. It will be necessary to reexamine this assumption later in this chapter, where the effects of saturation are investigated more thoroughly. Because the armature e.m.f. is proportional to flux timesspeed, it is usually more convenient to express the magnetization curve in terms of the armature e.m.f. 0a e at a constant speed 0m w . The voltage a e for a given flux at any other speed m w is proportional to the speed,i.e. 00a m m a e w w e Figure shows the magnetization curve with only one field winding excited. This curve can easily be obtained by test methods, no knowledge of any design details being required.Over a fairly wide range of excitation the reluctance of the iron is negligible compared with that of the air gap. In this region the flux is linearly proportional to the total m.m.f. of the field windings, the constant of proportionality being the direct-axis air-gap permeance.The outstanding advantages of DC machines arise from the wide variety of operating characteristics which can be obtained by selection of the method of excitation of the field windings. The field windings may be separately excited from an external DC source, or they may be self-excited; i.e., the machine may supply its own excitation. The method of excitation profoundly influences not only the steady-state characteristics, but also the dynamic behavior of the machine in control systems.The connection diagram of a separately excited generator is given. The required field current is a very small fraction of the rated armature current. A small amount of power in the field circuit may control a relatively large amount of power in the armature circuit; i.e., the generator is a power amplifier. Separately excited generators are often used in feedback control systems when control of the armature voltage over a wide range is required. The field windings of self-excited generators may be supplied in three different ways. The field may be connected in series with the armature, resulting in a shunt generator, or the field may be in two sections, one of which is connected in series and the other in shunt with the armature, resulting in a compound generator. With self-excited generators residual magnetism must be present in the machine iron to get the self-excitation process started.In the typical steady-state volt-ampere characteristics, constant-speed primemovers being assumed. The relation between the steady-state generated e.m.f. a E and the terminal voltage t V isa a a t R I E V -=Where a I is the armature current output and a R is the armature circuit resistance. In a generator, a E is large than t V ; and the electromagnetic torque T is a countertorque opposing rotation.The terminal voltage of a separately excited generator decreases slightly with increase in the load current, principally because of the voltage drop in the armature resistance. The field current of a series generator is the same as the load current, so that the air-gap flux and hence the voltage vary widely with load. As a consequence, series generators are not often used. The voltage of shunt generators drops off somewhat with load. Compound generators are normally connected so that the m.m.f. of the series winding aids that of the shunt winding. The advantage is that through the action of the series winding the flux per pole can increase with load, resulting in a voltage output which is nearly constant. Usually, shunt winding contains many turns of comparatively heavy conductor because it must carry the full armature current of the machine. The voltage of both shunt and compound generators can be controlled over reasonable limits by means of rheostats in the shunt field. Any of the methods of excitation used for generators can also be used for motors. In the typical steady-state speed-torque characteristics, it is assumed that the motor terminals are supplied from a constant-voltage source. In a motor the relation between the e.m.f. a E generated in the armature and the terminal voltage t V isa a a t R I E V +=Where a I is now the armature current input. The generated e.m.f. a E is now smaller than the terminal voltage t V , the armature current is in the opposite direction to that in a motor, and the electromagnetic torque is in the direction to sustain rotation ofthe armature.In shunt and separately excited motors the field flux is nearly constant. Consequently, increased torque must be accompanied by a very nearly proportional increase in armature current and hence by a small decrease in counter e.m.f. to allow this increased current through the small armature resistance. Since counter e.m.f. is determined by flux and speed, the speed must drop slightly. Like the squirrel-cage induction motor ,the shunt motor is substantially a constant-speed motor having about 5 percent drop in speed from no load to full load. Starting torque and maximum torque are limited by the armature current that can be commutated successfully.An outstanding advantage of the shunt motor is ease of speed control. With a rheostat in the shunt-field circuit, the field current and flux per pole can be varied at will, and variation of flux causes the inverse variation of speed to maintain counter e.m.f. approximately equal to the impressed terminal voltage. A maximum speed range of about 4 or 5 to 1 can be obtained by this method, the limitation again being commutating conditions. By variation of the impressed armature voltage, very wide speed ranges can be obtained.In the series motor, increase in load is accompanied by increase in the armature current and m.m.f. and the stator field flux (provided the iron is not completely saturated). Because flux increases with load, speed must drop in order to maintain the balance between impressed voltage and counter e.m.f.; moreover, the increase in armature current caused by increased torque is smaller than in the shunt motor because of the increased flux. The series motor is therefore a varying-speed motor with a markedly drooping speed-load characteristic. For applications requiring heavy torque overloads, this characteristic is particularly advantageous because the corresponding power overloads are held to more reasonable values by the associated speed drops. Very favorable starting characteristics also result from the increase in flux with increased armature current.In the compound motor the series field may be connected either cumulatively, so that its.m.m.f.adds to that of the shunt field, or differentially, so that it opposes. The differential connection is very rarely used. A cumulatively compounded motor hasspeed-load characteristic intermediate between those of a shunt and a series motor, the drop of speed with load depending on the relative number of ampere-turns in the shunt and series fields. It does not have the disadvantage of very high light-load speed associated with a series motor, but it retains to a considerable degree the advantages of series excitation.The application advantages of DC machines lie in the variety of performance characteristics offered by the possibilities of shunt, series, and compound excitation. Some of these characteristics have been touched upon briefly in this article. Still greater possibilities exist if additional sets of brushes are added so that other voltages can be obtained from the commutator. Thus the versatility of DC machine systems and their adaptability to control, both manual and automatic, are their outstanding features.负载运行的变压器及直流电机导论负载运行的变压器通过选择合适的匝数比，一次侧输入电压1V 可任意转换成所希望的二次侧开路电压2E 。
电气工程毕业设计外文资料翻译
西华大学毕业设计外文资料翻译附录：外文资料翻译外文资料原文：A Virtual Environment for Protective Relaying Evaluation and TestingA. P. Sakis Meliopoulos and George J. CokkinidesAbstract—Protective relaying is a fundamental discipline of power system engineering. At Georgia Tech, we offer three courses that cover protective relaying: an undergraduate course that devotes one-third of the semester on relaying, a graduate courseentitled “Power System Protection,” and a three-and-a-half-day short course for practicing engineers. To maximize student understanding and training on the concepts,theory, and technology associated with protective relaying, we have developed a number of educational tools, all wrapped in a virtual environment. The virtual environment includes a) a power system simulator, b) a simulator of instrumentation for protective relaying with visualization and animation modules, c) specific protective relay models with visualization and animation modules, and d) interfaces to hardware so that testing of actual relaying equipment can be per formed. We refer to this set of software as the “virtual power system.” The virtual power system permits the in-depth coverage of the protective relaying concepts in minimum time and maximizes student understanding. The tool is not used in a passive way. Indeed, the students actively participate with well-designed projects such as a) design and implementation of multifunctional relays, b) relay testing for specific disturbances, etc. The paper describes the virtual power system organization and “engines,” s uch as solver, visualization, and animation of protective relays, etc. It also discusses the utilization of this tool in the courses via specific application examples and student assignments.Index Terms—Algebraic companion form, animation, relaying,time-domain simulation, visualization.I. INTRODUCTIONR ELAYING has always played a very important role in the security and reliability of electric power systems. As the technology advances, relaying has become more sophisticated with many different options for improved protection of the system. It is indisputable that relaying has made significant advances with dramatic beneficial effects on the safety of systems and protection of equipment. Yet, because of the complexity of the system and multiplicity of competing factors, relaying is a challenging discipline.Despite all of the advances in the field, unintended relay operations (misoperations) do occur. Many events of outages and blackouts can be attributed to inappropriate relayingsettings, unanticipated system conditions, and inappropriate selection of instrument transformers. Design of relaying schemes strives to anticipate all possible conditions for the purpose of avoiding undesirable operations. Practicing relay engineers utilize a two-step procedure to minimize the possibility of such events. First, in the design phase, comprehensive analyses are utilized to determine the best relaying schemes and settings. Second, if such an event occurs, an exhaustive post-mortem analysis is performed to reveal the roo t cause of the event and what “was missed” in the design phase. The post-mortem analysis of these events is facilitated with the existing technology of disturbance recordings (via fault disturbance recorders or embedded in numerical relays). This process results in accumulation of experience that passes from one generation of engineers to the next.An important challenge for educators is the training of students to become effective protective relaying engineers. Students must be provided with an understanding of relaying technology that encompasses the multiplicity of the relaying functions, communications, protocols, and automation. In addition, a deep understanding of power system operation and behavior during disturbances is necessary for correct relayin g applications. In today’s crowded curricula, the challenge is to achieve this training within a very short period of time, for example, one semester. This paper presents an approach to meet this challenge. Specifically, we propose the concept of the virtual power system for the purpose of teaching students the complex topic of protective relaying within a short period of time.The virtual power system approach is possible because of two factors: a) recent developments in software engineering and visualization of power system dynamic responses, and b) the new generation of power system digital-object-oriented relays. Specifically, it is possible to integrate simulation of the power system, visualization, and animation of relay response and relay testing within a virtual environment. This approach permits students to study complex operation of power systems and simultaneously observe relay response with precision and in a short time.The paper is organized as follows: First, a brief description of the virtual power system is provided. Next, the mathematical models to enable the features of the virtual power system are presented together with the modeling approach for relays and relay instrumentation. Finally, few samples of applications of this tool for educational purposes are presented.II. VIRTUAL POWER SYSTEMThe virtual power system integrates a number of application software in a multitasking environment via a unified graphical user interface. The application software includes a) a dynamic power system simulator, b) relay objects, c) relay instrumentation objects, and d)animation and visualization objects. The virtual power system has the following features:1) continuous time-domain simulation of the system under study;2) ability to modify (or fault) the system under study during the simulation, and immediately observe the effects of thechanges;3) advanced output data visualization options such as animated 2-D or 3-D displays that illustrate the operation of any device in the system under study.The above properties are fundamental for a virtual environment intended for the study of protective relaying. The first property guarantees the uninterrupted operation of the system under study in the same way as in a physical laboratory: once a system has been assembled, it will continue to operate. The second property guarantees the ability to connect and disconnect devices into the system without interrupting the simulation of the system or to apply disturbances such as a fault. This property duplicates the capability of physical laboratories where one can connect a component to the physical system and observe the reaction immediately (e.g., connecting a new relay to the system and observing the operation of the protective relaying logic, applying a disturbance and observing the transients as well as the relay logic transients, etc.). The third property duplicates the ability to observe the simulated system operation, in a similar way as in a physical laboratory. Unlike the physical laboratory where one cannot observe the internal operation of a relay, motor, etc., the virtual power system has the capability to provide a visualization and animation of the internal “workings” of a relay, motor, etc. This capability to animate and visualize the internal “workings” o f a relay, an instrumentation channel, or any other device has substantial educational value.The virtual power system implementation is based on the MS Windows multidocument-viewarchitecture. Each document object constructs a single solver object, which handles the simulation computations. The simulated system is represented by a set of objects—one for each system device (i.e. generators, motors, transmission lines, relays, etc). The document object can generate any number of view window objects. Two basic view classes are available: a) schematic views and b) result visualization views. Schematic view objects allow the user to define the simulated system connectivity graphically, by manipulating a single line diagram using the mouse. Result visualization views allow the user to observe calculated results in a variety of ways. Several types of result visualization views are supported and will be discussed later.Fig. 1 illustrates the organization of device objects, network solver, and view objects and their interactions. The network solver object is the basic engine that provides the time-domain solution of the device operating conditions. To maintain object orientation, each device isrepresented with a generalized mathematical model of a specific structure, the algebraic companion form (ACF). The mathematics of the algebraic companion form are described in the next section. Implementationwise, the network solver is an independent background computational thread, allowing both schematic editor and visualization views to be active during the simulation. The network solver continuously updates the operating states of the devices and “feeds” all other applications, such as visualization views,etc.The network solver speed is user selected, thus allowing speeding-up or slowing-down the visualization and animation speed. The multitasking environment permits system topology changes, device parameter changes, or connection of new devices (motors, faults) to the system during the simulation. In this way, the user can immediately observe the system response in the visualization views.The network solver interfaces with the device objects. This interface requires at minimum three virtual functions:Initialization: The solver calls this function once before the simulation starts. It initializes all device-dependent parameters and models needed during the simulation.Reinitialization: The solver calls this function any time the user modifies any device parameter. Its function is similar to the initialization virtual function.Time step: The solver calls this function at every time step of the time-domain simulation. It transfers the solution from the previous time step to the device object and updates the algebraic companion form of the device for the next time step (see next section “network solver.”)In addition to the above functions, a device object has a set of virtual functions comprising the schematic module interface. These functions allow the user to manipulate the device within the schematic editor graphical user interface. Specifically,the device diagram can be moved, resized, and copied using the mouse. Also, a function is included in this set, which implements a device parameter editing dialog window which “pops-up” by double clicking on the device icon. Furthermore,the schematic module interface allows for device icons that reflect the device status. For example, a breaker schematic icon can be implemented to indicate the breaker status.Finally, each device class (or a group of device classes) may optionally include a visualization module, consisting of a set of virtual functions that handle the visualization and animation output. The visualization module interface allows for both two-dimensional (2-D) and three-dimensional (3-D) graphics. Presently, 2-D output is implemented via the Windows graphical device interface (GDI) standard. The 3-D output is implemented using the opengraphics library (OpenGL). Both 2-D and 3-D outputs generate animated displays, which are dynamically updated by the network solver to reflect the latest device state. The potential applications of 2-D or 3-D animated visualization objects are only limited by the imagination of the developer. These objects can generate photorealistic renderings of electromechanical components that clearly illustrate their internal operation and can be viewed from any desired perspective,slowed down, or paused for better observation.III. NETWORK SOLVERAny power system device is described with a set of algebraicdifferential-integral equations. These equations are obtained directlyfrom the physical construction of the device. It is alwayspossible to cast these equations in the following general formNote that this form includes two sets of equations, which arenamed external equations and internal equations, respectively.The terminal currents appear only in the external equations.Similarly, the device states consist of two sets: external states[i.e., terminal voltages, v(t)] and internal states [i.e. y(t)]. Theset of (1) is consistent in the sense that the number of externalstates and the number of internal states equals the number of externaland internal equations, respectively.Note that (1) may contain linear and nonlinear terms. Equation(1) is quadratized (i.e., it is converted into a set of quadraticequations by introducing a series of intermediate variables and expressing the nonlinear components in terms of a series of quadratic terms). The resulting equations are integrated using a suitable numerical integration method. Assuming an integration time step h, the result of the integration is given with a second-order equation of the formwhere , are past history functions.Equation (2) is referred to as the algebraic companion form (ACF) of the device model. Note that this form is a generalizationof the resistive companion form (RCF) that is used by the EMTP [3]. The difference is that the RCF is a linear model that represents a linearized equivalent of the device while the ACF is quadratic and represents the detailed model of the device.The network solution is ob tained by application of Kirchoff’s current law at each node of the system (connectivity constraints). This procedure results in the set of (3). To these equations, the internal equations are appended resulting to the following set of equations:(3)internal equations of all devices (4)where is a component incidence matrix withif node of component is connected to node otherwise is the vector of terminal currents of component k.Note that (3) correspond one-to-one with the external system states while (4) correspond one-to-one with the internal system states. The vector of component k terminal voltages is related to the nodal voltage vector by(5)Upon substitution of device (2), the set of (3) and (4)become a set of quadratic equations (6)where x(t) is the vector of all external and internal system states.These equations are solved using Newton’s method. Specifically,the solution is given by the following expression(7)where is the Jacobian matrix of (6) and are the values ofthe state variables at the previous iteration.IV. RELAY INSTRUMENTATION MODELINGRelays and, in general, IEDs use a system of instrument transformers to scale the power system voltages and currents into instrumentation level voltages and currents. Standard instrumentation level voltages and currents are 67 V or 115 V and 5 A, respectively. These standards were established many years ago to accommodate the electromechanical relays. Today, the instrument transformers are still in use but because modern relays (and IEDs) operate at much lower voltages, it is necessary to apply an additional transformation to the new standard voltages of 10 or 2 V. This means that the modern instrumentation channel consists of typically two transformations and additional wiring and possibly burdens. Fig. 2 illustrates typical instrumentation channels, a voltage channel and a current channel. Note that each component of the instrumentation channel will introduce an error. Of importance is the net error introduced by all of the components of the instrumentation channel. The overallerror can be defined as follows. Let the voltage or current at the power system be and , respectively. An ideal instrumentation channel will generate a waveform at the output of the channel that will be an exact replica of the waveform at the power system. If the nominal transformation ratio is and for the voltage and current instrumentation channels, respectively, then the output of an “ideal” system and the instrumentation channel error will bewhere the subscript “out” refers to the actual output of the instrumentation channel. The error waveforms can be analyzed to provide the rms value of the error, the phase error, etc.Any relaying course should include the study of instrumentation channels. The virtual power system is used to study the instrumentation error by including an appropriate model of the entire instrumentation channel. It is important to model the saturation characteristics of CTs and PTs, resonant circuits of CCVTs, etc. (see [6]). In the virtual power system, models of instrumentation channel components have been developed. The resulting integrated model provides, with precision, the instrumentation channel error.With the use of animation methods, one can study the evolution of instrumentation errors during transients as well as normal operation.V. PROTECTIVE RELAY MODELINGToday, all new relays are numerical relays. These types of relays can be easily modeled within the virtual power system. Consider, for example, a directional relay. The operation ofthis relay is based on the phase angle between the polarizing voltage and the current. Modeling of this relay then requires that the phase angle between the polarizing voltage and the current be computed. For this purpose, as the power system simulation progresses, the relay model retrieves the instantaneous values of the polarizing voltage and the current. A Fourier transform is applied to the retrieved data (a running time Fourier transform over a user-specified time window). The result will be the phasors of the polarizing voltage and current from which the phase angles are retrieved. The directional element of the relay will trip if the phase angle difference is within the operating region. It should be also self understood that if the relay to be modeled has filters, these filters can be also included in the model.It is important that students be also involved in the design of numerical relays. A typical semester project is to define the functionality of a specific relay and a set of test cases. The student assignment is to develop the code that will mimic the operation of the relay and demonstrate its correct operation for the test cases.The new technology of the virtual power system offers another more practical way to model relays. The virtual power system uses object-oriented programming. As such, it is an open architecture and can accept dynamic link libraries of third parties. A natural extension of the work reported in this paper is to use this feature to interface with commercially available digital “relays.” The word “relay” is in quotation marks to indicate that the relay is simply a digital program that takes inputs of voltages and currents, performs an analysis of these data, applies logic, and issues a decision. This program is an object and can be converted into a dynamic link library. If this DLL is “linked” with the virtual power system, in the sense that the inputs come from the virtual power system, then the specific relay can be evaluated within the virtual environment. The technology for this approach is presently available. Yet, our experience is that relay manufacturers are not presently perceptive in making their “relay” objects available as DLLs that can be interfaced with third-party software.VI. APPLICATIONSThe described virtual environment has been used in a variety of educational assignments. The possible uses are only limited by the imagination of the educator. In this section, we describe a small number of educational application examples.Figs. 3 and 4 illustrate an exercise of studying instrumentation channel performance. Fig. 3 illustrates an example integrated model of a simple power system and the model of an instrumentation channel (voltage). The instrumentation channel consists of a PT, a length of control cable, an attenuator, and an A/D converter (Fig. 3 illustrates the icons of thesecomponents and their interconnection). Fig. 4 illustrates two waveforms: the voltage of phase A of the power system when it is experiencing a fault and the error of the instrumentation channel. The upper part of the figure illustrates the actual voltage of Phase A and the output of the instrumentation channel (multiplied by the nominal transformation ratio). The two traces are quite close. The lower part of the figure illustrates the error between the two waveforms of the upper part of the figure. The two curves illustrate the normalized error at the input of the A/D converter and at the output of the A/D converter. The figure is self-explanatory and a substantial error occurs during the transient of the fault. When the transients subside, the error of the instrumentation channel is relatively small. The intention of this exercise is to study the effects of different parameters of the instrumentation channel.For example, the students can change the length of the control cable and observe the impact on the error. Or in case of a current channel, they can observe the effects of CT saturation on the error of the instrumentation channel, etc.Fig. 5 illustrates the basics of an example application of the virtual power system for visualization and animation of a modified impedance relay. The example system consists of a generator, a transmission line, a step-down transformer, a passive electric load (constant impedance load), an induction motor, and a mechanical load of the motor (fan). A modified distance relay (mho relay) monitors the transmission line. The operation of this relay is based on the apparent impedance that the relay “sees” and the trajectory of this impedance.The visualization object of this relay displays what the relay “sees” during a disturbance in the system and superimposes this information on the relay settings. Typical examples are illustrated in Figs. 6 and 7. The relay monitors the three-phase voltages and currents at the point of its application. The animation model retrieves the information that the relay monitors from the simulator at each time step. Subsequently, it computes the phasors of the voltages and currents as well as the sequence components of these voltages and currents. Fig. 6 illustrates a 2-D visualization of the operation of this relay over a period that encompasses a combined event of an induction motor startup followed by a single-phase fault on the high-voltage side of the transformer. (This example demonstrates the flexibility of the tool to generate composite events that may lead to very interesting responses of the protective relays). The left-hand side of the 2-Dvisualization shows the voltages and currents “seen” by the relay(the snapshot is after the fault has been cleared). The graph also shows the trajectory (history) of the impedance “seen” by the relay. The graph shows the trajectory “seen” over a user-specified time interval preceding present time. The impedance trajectory is superimposed on the trip characteristics of this relay. In this case, the impedance trajectory does not visit thetrip “region” of the relay.Fig. 7 provides the recorded impedance trajectory for the combined event of an induction motor startup followed by a three-phase fault near the low-voltage bus of the transformer. The impedance trajectory is superimposed on the trip characteristics of this relay. In this case, the impedance trajectory does visit the trip “region” of the relay. This example can be extended to more advanced topics. For example, the animated display may also include stability limits for the “swing” of the generator. For this purpose, the stability limits for the particular condition must be computed and displayed.This exercise can be the topic of a term project.Another important protective relaying example is the differential relay. In this example, we present the animated operation of a differential relay scheme for a delta-wye connected transformer with tap changing under load. The example system is shown in Fig. 8. It consists of an equivalent source, a transmission line, a 30-MVA delta-wye connected transformer, a distribution line, and an electric load. A transformer differential relay Fig. 7. Animation of a mho relay for a three phase fault on the 13.8-kV bus. is protecting the transformer. The differential relay has as inputs the transformer terminal currents. A specific implementation of a differential relay visualization is shown in Fig. 9 based on the electromechanical equivalent relay. Note that the 2-D visualization shows t he “operating” coils and “restraining” coils and the currents that flow in these coils at any instant of time. Instantaneous values, rms values, and phasor displays are displayed. Fig. 9 illustrates one snapshot of the system. In reality, as the system operation progresses, this figure is continuously updated, providing an animation effect. The system may operate under steady-state or under transient conditions. The effects of tap changing on the operation of the relay are demonstrated. The importance of this animation module is that one can study the effects of various parameters and phenomena on the operation of the relay. Examples are: a) effects of tap setting. The differential relay settings are typically selected for the nominal tap setting. As the tap setting changes under load, the current in the operating coil changes and may be nonzero even under normal operating conditions. It is very easy to change the tap setting andobserve the operation of the relay in an animated fashion. It is also easy to observe the operation of the relay during a through fault for different values of tap settings. Thus, this tool is very useful in determining the optimal level of percent restraint for the relay. b) effects of inrush currents. One can perform energization simulations of the transformer by various types of breaker-closing schemes. Since the transformer model includes the nonlinear magnetization model of the transformer core, the magnetization inrush currents will appear in the terminals of the transformer and, therefore, in the differential relay. The display of Fig. 9 provides a full picture of the evolutionof the electric currents. One can study the effects of inrush currents by bypassing the even harmonic filters as well as by implementing a number of harmonic filters and observing the effectiveness of the filters. It is important to note that the phenomena involved are very complex, yet a student can study these phenomena indepth and in very short time with the aid of animation and visualization methods.The virtual power system has been also used for testing of physical relays. This application is quite simple. The virtual power system has the capability to export voltage and current waveforms of any event and for any user-selected time period in COMTRADE format. Then, the COMTRADE file is fed into commercial equipment that generates the actual voltages and currents and feeds them into the physical relays. The actual response of the relays is then observed. This application was performed on the premises of a utility with limited access to students.Recently, a major relay manufacturer (SEL) has donated equipment to Georgia Tech and we are in the process of setting up the laboratory for routine use of this function by students. There are numerous other applications of the proposed virtual power system. The pedagogical objective is to instill a deep understanding of protective relaying concepts and problems in the very short time of one semester. The effectiveness of the proposed approach increases as new examples are generated and stored in the database.Aclassical example that demonstrates the effectiveness of the virtual power system is the issue of sympathetic tripping. Usually, this topic requires several lectures and long examples. With the virtual power system, one can very thoroughly teach the concept of sympathetic tripping within onelecture. For example, a simple system with mutually coupled lines can be prepared, with relays at the ends of all lines. Then with a fault in one line, the relays of the healthy line can be visualized and animated. The students can observe that the relays of the healthy line “see” zero-sequence current induced by the fault on another line. And more important, the students can make changes to the designs of the lines and observe the relative effect of design parameters on induced voltages and currents, etc.VII. CONCLUSIONThis paper has discussed and presented the virtual power system and its application for visualization and animation of protective relaying. The virtual power system has proved to be a valuable tool in the instruction of protective relaying courses. It is also an excellent tool for assigning term projects on various aspects of protective relaying. One important feature of the tool is that the user can apply disturbances to the system while the system operates (i.e., faults, load shedding, motor start-up, etc.). The response of the relays is instantaneously observed.。
(完整版)电气专业中英文对照翻译毕业设计论文
优秀论文审核通过未经允许切勿外传Chapter 3 Digital Electronics3.1 IntroductionA circuit that employs a numerical signal in its operation is classified as a digital circuitputers,pocket calculators, digital instruments, and numerical control (NC) equipment are common applications of digital circuits. Practically unlimited quantities of digital information can be processed in short periods of time electronically. With operational speed of prime importance in electronics today,digital circuits are used more frequently.In this chapter, digital circuit applications are discussed.There are many types of digital circuits that electronics, including logic circuits, flip-flop circuits, counting circuits, and many others. The first sections of this unit discuss the number systems that are basic to digital circuit understanding. The remainder of the chapter introduces some of the types of digital circuits and explains Boolean algebra as it is applied to logic circuits.3.2 Digital Number SystemsThe most common number system used today is the decimal system,in which 10 digits are used for counting. The number of digits in the systemis called its base (or radix).The decimal system，therefore，the counting process. The largest digit that can be used in a specific place or location is determined by the base of the system. In the decimal system the first position to the left of the decimal point is called the units place. Any digit from 0 to 9 can be used in this place.When number values greater than 9 are used,they must be expressed with two or more places.The next position to the left of the units place in a decimal system is the tens place.The number 99 is the largest digital value that can be expressed by two places in the decimal system.Each place added to the left extends the number system by a power of 10.Any number can be expressed as a sum of weighted place values.The decimal number 2583,for example, is expressed as (2×1000)+(5×100)+(8×10)+(3×1).The decimal number system is commonly used in our daily lives. Electronically, the binary system.Electronically,the value of 0 can be associated with a low-voltage value or no voltage. The number 1 can then be associated with a voltage value larger than 0. Binary systems that use these voltage values are said to , this chapter.The two operational states of a binary system,1 and 0,are natural circuit conditions. When a circuit is turned off or the off, or 0,state. An electrical circuit that the on，or 1,state. By using transistor or ICs，it is electronically possible to change states in less than a microsecond. Electronic devices make it possible to manipulate millions of 0s and is in a second and thus to process information quickly.The basic principles of numbering used in decimal numbers apply ingeneral to binary numbers.The base of the binary system is 2,meaning that only the digits 0 and 1 are used to express place value. The first place to the left of the binary point,or starting point，represents the units，or is,location. Places to the left of the binary point are the powers of 2.Some of the place values in base 2 are 2º=1,2¹=2,2²=4,2³=8,2⁴=16,25=32,and 26=64.When bases other than 10 are used,the numbers should example.The number 100₂(read“one,zero,zero, base 2”)is equivalent to 4 in base 10,or 410.Starting with the first digit to the left of the binary point,this number this method of conversion a binary number to an equivalent decimal number，write down the binary number first. Starting at the binary point，indicate the decimal equivalent for each binary place location where a 1 is indicated. For each 0 in the binary number leave a blank space or indicate a 0 ' Add the place values and then record the decimal equivalent.The conversion of a decimal number to a binary equivalent is achieved by repetitive steps of division by the number 2.When the quotient is even with no remainder,a 0 is recorded.When the quotient process continues until the quotient is 0.The binary equivalent consists of the remainder values in the order last to first.3.2.2 Binary-coded Decimal (BCD) Number SystemWhen large numbers are indicated by binary numbers，they are difficult to use. For this reason，the Binary-Coded Decimal(BCD) method of counting was devised. In this system four binary digits are used to represent each decimal digit.To illustrate this procedure，the number 105，is converted to a BCD number.In binary numbers，To apply the BCD conversion process，the base 10 number is first divided into digits according to place values.The number 10510 gives the digits 1-0-5.Converting each displayed by this process with only 12 binary numbers. The between each group of digits is important when displaying BCD numbers.The largest digit to be displayed by any group of BCD numbers is 9.Six digits of a number-coding group are not used at all in this system.Because of this, the octal (base 8) and the binary form but usually display them in BCD,octal,or a base 8 system is 7. The place values starting at the left of the octal point are the powers of eight: 80=1,81=8,82=64,83=512,84=4096,and so on.The process of converting an octal number to a decimal number is the same as that used in the binary-to-decimal conversion process. In this method, equivalent decimal is 25810.Converting an octal number to an equivalent binary number is similar to the BCD conversion process. The octal number is first divided into digits according to place value. Each octal digit is then converted into an equivalent binary number using only three digits.Converting a decimal number to an octal number is a process of repetitive division by the number 8.After the quotient determined，the remainder is brought down as the place value.When the quotient is even with no remainder，a 0 is transferred to the place position.The number for converting 409810 to base 8 is 100028.Converting a binary number to an octal number is an importantconversion process of digital circuits. Binary numbers are first processed at a very output circuit then accepts this signal and converts it to an octal signal displayed on a readout device.must first be divided into groups of three，starting at the octal point.Each binary group is then converted into an equivalent octal number.These numbers are then combined，while remaining in their same respective places，to represent the equivalent octal number.3.2.4 Hexadecimal Number SystemThe digital systems to process large number values.The base of this system is 16，which means that the largest number used in a place is 15.Digits used by this system are the numbers 0-9 and the letters A-F. The letters A-P are used to denote the digits 10-15，respectively. The place values to the left of the .The process of changing a proper digital order.The place values，or powers of the base，are then positioned under the respective digits in step 2.In step 3，the value of each digit is recorded. The values in steps 2 and 3 are then multiplied together and added. The sum gives the decimal equivalent value of a . Initially，the converted to a binary number using four digits per group. The binary group is combined to form the equivalent binary number.The conversion of a decimal number to a ，as with other number systems. In this procedure the division is by 16 and remainders can be as large as 15.Converting a binary number to a groups of four digits，starting at the converted to a digital circuit-design applications binary signals arefar superior to those of the octal，decimal，or be processed very easily through electronic circuitry，since they can be represented by two stable states of operation. These states can be easily defined as on or off, 1 or 0，up or down，voltage or no voltage，right or left，or any other two-condition states. There must be no in-between state.The symbols used to define the operational state of a binary system are very important.In positive binary logic，the state of voltage，on，true，or a letter designation (such as A ) is used to denote the operational state 1 .No voltage，off，false，and the letter A are commonly used to denote the 0 condition. A circuit can be set to either state and will remain in that state until it is caused to change conditions.Any electronic device that can be set in one of two operational states or conditions by an outside signal is said to be bistable. Relays，lamps，switches，transistors, diodes and ICs may be used for this purpose. A bistable device .By using many of these devices，it is possible to build an electronic circuit that will make decisions based upon the applied input signals. The output of this circuit is a decision based upon the operational conditions of the input. Since the application of bistable devices in digital circuits makes logical decisions，they are commonly called binary logic circuits.If we were to draw a circuit diagram for such a system，including all the resistors，diodes，transistors and interconnections，we would face an overwhelming task, and an unnecessary one.Anyone who read the circuit diagram would in their mind group the components into standard circuits and think in terms of the" system" functions of the individual gates. Forthis reason，we design and draw digital circuit with standard logic symbols. Three basic circuits of this type are used to make simple logic decisions.These are the AND circuit, OR circuit, and the NOT circuit.Electronic circuits designed to perform logic functions are called gates.This term refers to the capability of a circuit to pass or block specific digital signals.The logic-gate symbols are shown in Fig.3-1.The small circle at the output of NOT gate indicates the inversion of the signal. Mathematically，this action is described as A=.Thus without the small circle，the rectangle would represent an amplifier (or buffer) with a gain of unity.An AND gate the 1 state simultaneously，then there will be a 1 at the output.The AND gate in Fig. 3-1 produces only a 1 out-put when A and B are both 1. Mathematically，this action is described as A·B=C. This expression shows the multiplication operation. An OR gate Fig.3-1 produces a when either or both inputs are l.Mathematically，this action is described as A+B=C. This expression shows OR addition. This gate is used to make logic decisions of whether or not a 1 appears at either input.An IF-THEN type of sentence is often used to describe the basic operation of a logic state.For example，if the inputs applied to an AND gate are all 1，then the output will be 1 .If a 1 is applied to any input of an OR gate，then the output will be 1 .If an input is applied to a NOT gate，then the output will be the opposite or inverse.The logic gate symbols in Fig. 3-1 show only the input and output connections. The actual gates，when wired into a digital circuit, would pin 14 and 7.3.4 Combination Logic GatesWhen a NOT gate is combined with an AND gate or an OR gate，it iscalled a combination logic gate. A NOT-AND gate is called a NAND gate，which is an inverted AND gate. Mathematically the operation of a NAND gate is A·B=. A combination NOT-OR ，or NOR，gate produces a negation of the OR function.Mathematically the operation of a NOR gate is A+B=.A 1 appears at the output only when A is 0 and B is 0.The logic symbols are shown in Fig. 3-3.The bar over C denotes the inversion，or negative function，of the gate.The logic gates discussed .In actual digital electronic applications，solid-state components are ordinarily used to accomplish gate functions.Boolean algebra is a special form of algebra that was designed to show the relationships of logic operations.Thin form of algebra is ideally suited for analysis and design of binary logic systems.Through the use of Boolean algebra，it is possible to write mathematical expressions that describe specific logic functions.Boolean expressions are more meaningful than complex word statements or or elaborate truth tables.The laws that apply to Boolean algebra are used to simplify complex expressions. Through this type of operation it may be possible to reduce the number of logic gates needed to achieve a specific function before the circuits are designed.In Boolean algebra the variables of an equation are assigned by letters of the alphabet.Each variable then exists in states of 1 or 0 according to its condition.The 1，or true state，is normally represented by a single letter such as A，B or C.The opposite state or condition is then described as 0，or false，and is represented by or A’.This is described as NOT A，A negated，or A complemented.Boolean algebra is somewhat different from conventional algebra withrespect to mathematical operations.The Boolean operations are expressed as follows:Multiplication:A AND B，AB，,A·BOR addition:A OR B .A+BNegation，or complementing:NOT A，，A’Assume that a digital logic circuit only C is on by itself or when A，B and C are all on expression describes the desired output. Eight (23) different combinations of A，B，and C exist in this expression because there are three，inputs. Only two of those combinations should cause a signal that will actuate the output. When a variable is not on (0)，it is expressed as a negated letter. The original statement is expressed as follows: With A，B，and C on or with A off, B off, and C on ，an output (X）will occur:ABC+C=XA truth table illustrates if this expression is achieved or not.Table 3-1 shows a truth table for this equation. First，ABC is determined by multiplying the three inputs together.A 1 appears only when the A，B，and C inputs are all 1.Next the negated inputs A andB are determined.Then the products of inputs C，A，and B are listed.The next column shows the addition of ABC and C.The output of this equation shows that output 1 is produced only when C is 1 or when ABC is 1.A logic circuit to accomplish this Boolean expression is shown in Fig. 3-4.Initially the equation is analyzed to determine its primary operational function.Step1 shows the original equation.The primary function is addition，since it influences all parts of the equation in some way.Step 2 shows the primary function changed to a logic gate diagram.Step 3 showsthe branch parts of the equation expressed by logic diagram，with AND gates used to combine terms.Step 4 completes the process by connecting all inputs together.The circles at inputs，of the lower AND gate are used to achieve the negative function of these branch parts.The general rules for changing a Boolean equation into a logic circuit diagram are very similar to those outlined.Initially the original equation must be analyzed for its primary mathematical function.This is then changed into a gate diagram that is inputted by branch parts of the equation.Each branch operation is then analyzed and expressed in gate form.The process continues until all branches are completely expressed in diagram formmon inputs are then connected together.3.5 Timing and Storage ElementsDigital electronics involves a number of items that are not classified as gates.Circuits or devices of this type the operation of a system.Included in this system are such things as timing devices，storage elements，counters，decoders，memory，and registers.Truth tables symbols，operational characteristics，and applications of these items will be presented an IC chip. The internal construction of the chip cannot be effectively altered. Operation is controlled by the application of an external signal to the input. As a rule，very little work can be done to control operation other than altering the input signal.The logic circuits in Fig. 3-4 are combinational circuit because the output responds immediately to the inputs and there is no memory. When memory is a part of a logic circuit，the system is called sequential circuit because its output depends on the input plus its an input signal isapplied.A bistable multivibrator，in the strict sense，is a flip-flop. When it is turned on，it assumes a particular operational state. It does not change states until the input is altered.A flip-flop opposite polarity.Two inputs are usually needed to alter the state of a flip-flop. A variety of names are used for the inputs.These vary a great deal between different flip-flops.1. R-S flip-flopsFig.3-5 shows logic circuit construction of an R-S flip-flop. It is constructed from two NAND gates. The output of each NAND provides one of the inputs for the other NAND. R stands for the reset input and S represents the set input.The truth table and logic symbol are shown in Fig. 3-6.Notice that the truth table is somewhat more complex than that of a gate. It shows, for example，the applied input, previous output，and resulting output.To understand the operation of an R-S flip-flop，we must first look at the previous outputs.This is the status of the output before a change is applied to the input. The first four items of the previous outputs are Q=1 and =0. The second four states this case of the input to NANDS is 0 and that is 0，which implies that both inputs to NANDR are 1.By symmetry，the logic circuit will also stable with Q0 and 1.If now R momentarily becomes 0，the output of NANDR，，will rise to resulting in NANDS be realized by a 0 at S.The outputs Q and are unpredictable when the inputs R and S are 0 states.This case is not allowed.Seldom would individual gates be used to construct a flip-flop，rather than one of the special types for the flip-flop packages on a single chipwould be used by a designer.A variety of different flip-flops are used in digital electronic systems today. In general，each flip-flop type R-S-T flip-flop for example .is a triggered R-S flip-flop. It will not change states when the R and S inputs assume a value until a trigger pulse is applied. This would permit a large number of flip-flops to change states all at the same time. Fig. 3-7 shows the logic circuit construction. The truth table and logic symbol are shown in Fig. 3-8. The R and S input are thus active when the signal at the gate input (T) is 1 .Normally，such timing，or synchronizing，signals are distributed throughout a digital system by clock pulses，as shown in Fig. 3-9.The symmetrical clock signal provides two times each period.The circuit can be designed to trigger at the leading or trailing edge of the clock. The logic symbols for edge trigger flip-flops are shown in Fig.3-10.2. J-K flip-flopsAnother very important flip-flop unpredictable output state. The J and K inputs addition to this，J-K flip-flops may employ preset and preclear functions. This is used to establish sequential timing operations. Fig.3-11 shows the logic symbol and truth table of a J-K flip-flop.3. 5. 2 CountersA flip-flop be used in switching operations，and it can count pulses.A series of interconnected flip-flops is generally called a register.Each register can store one binary digit or bit of data. Several flip-flops connected form a counter. Counting is a fundamental digital electronic function.For an electronic circuit to count，a number of things must beachieved. Basically，the circuit must be supplied with some form of data or information that is suitable for processing. Typically，electrical pulses that turn on and off are applied to the input of a counter. These pulses must initiate a state change in the circuit when they are received. The circuit must also be able to recognize where it is in counting sequence at any particular time. This requires some form of memory. The counter must also be able to respond to the next number in the sequence. In digital electronic systems flip-flops are primarily used to achieve counting. This type of device is capable of changing states when a pulse is applied，output pulse.There are several types of counters used in digital circuitry today.Probably the most common of these is the binary counter.This particular counter is designed to process two-state or binary information. J-K flip-flops are commonly used in binary counters.Refer now to the single J-K flip-flop of Fig. 3-11 .In its toggle state，this flip-flop is capable of achieving counting. First，assume that the flip-flop is in its reset state. This would cause Q to be 0 and Q to be 1 .Normally，we are concerned only with Q output in counting operations. The flip-flop is now connected for operation in the toggle mode. J and K must both be made the 1 state. When a pulse is applied to the T，or clock，input，Q changes to 1.This means that with one pulse applied，a 1 is generated in the output. The flip-flop the next pulse arrives，Q resets，or changes to 0. Essentially，this means that two input pulses produce only one output pulse. This is a divide-by-two function.For binary numbers，counting is achieved by a number of divide-by-two flip-flops.To count more than one pulse，additional flip-flops must be employed. For each flip-flop added to the counter，its capacity is increased by the power of 2. With one flip-flop the maximum count was 20，or 1 .For two flip-flops it would count two places，such as 20 and 21.This would reach a count of 3 or a binary number of 11.The count would be 00，01，10，and 11. The counter would then clear and return to 00. In effect, this counts four state changes. Three flip-flops would count three places，or 20，21，and 22.This would permit a total count of eight state changes.The binary values are 000，001，010，011，100，101，110 and 111.The maximum count is seven，or 111 .Four flip-flops would count four places，or 20，21，22，and 23.The total count would make 16 state changes. The maximum count would be 15，or the binary number 1111.Each additional flip-flop would cause this to increase one binary place.河南理工大学电气工程及其自动化专业中英双语对照翻译。
电子电气类专业毕业设计外文翻译
附录一：外文原文Super capacitors - An OverviewKey words: Electrostatic capacitor; Electrolytic capacitor; Ceramic capacitor;Electrical double layer capacitor; Super Capacitor1.INTRODUCTIONThis paper offers a concise review on the renaissance of a conventional capacitor toelectrochemical double layer capacitor or super capacitor. Capacitors are fundamental electrical circuitelements that store electrical energy in the order of microfarads and assist in filtering. Capacitors havetwo main applications; one of which is a function to charge or discharge electricity. This function isapplied to smoothing circuits of power supplies, backup circuits of microcomputers, and timer circuitsthat make use of the periods to charge or discharge electricity. The other is a function to block the flowof DC. This function is applied to filters that extract or eliminate particular frequencies. This isindispensable to circuits where excellent frequency characteristics are required. Electrolytic capacitorsare next generation capacitors which are commercialized in full scale. They are similar to batteries in cell construction but the anode and cathode materials remain the same. They are aluminum, tantalum and ceramic capacitors where they use solid/liquid electrolytes with a separator between two symmetrical electro des.An electrochemical capacitor (EC), often called a Super capacitor or Ultra capacitor, stores electrical charge in the electric double layer at a surface-electrolyte interface, primarily in high-surface-area carbon. Because of the high surface area and the thinness of the double layer, these devices can have very a high specific and volumetric capacitance. This enables them to combine a previously unattainable capacitance density with an essentially unlimited charge/discharge cycle life. The operational voltage per cell ,limited only by the breakdown potential of the electrolyte, is usually<1 or <3 volts per cell for aqueous or organic electrolytes respectively.The concept of storing electrical energy in the electric double layer that isformed at the interface between an electrolyte and a solid has been known since the late 1800s. The first electrical device using double-layer charge storage was reported in 1957 by H.I. Becker of General Electric (U.S. Patent 2,800,616).Unfortunately, Becker’s device was imp ractical in that, similarly to a flooded battery, both electrodes needed to be immersed in a container of electrolyte, and the device was never comercialised.Becker did, however, appreciate the large capacitance values subsequently achieved by Robert A. Rightmire, a chemist at the Standard Oil Company of Ohio (SOHIO), to whom can be attributed the invention of the device in the format now commonly used. His patent (U.S. 3,288,641), filed in 1962 and awarded in late November 1966, and a follow-on patent (U.S. Patent 3,536,963) by fellow SOHIO researcher Donald L. Boos in 1970, form the basis for the many hundreds of subsequent patents and journal articles covering all aspects of EC technology.This technology has grown into an industrywith sales worth severalhundred million dollars per year. It is an in dustry that is poised today for rapid growth in the near term with the expansion of power quality needs and emerging transportation applications.Following the commercial introduction of NEC’s Super Capacitor in 1978, under licence from SOHIO, EC have evolved through several generations of designs. Initially they were used as back-up power devices for v is for cells ranging in size from small millifarad size devices with exceptional pulse power performance up to devices rated at hundreds of thousands of farads, with systems in some applications operating at up to 1,500 volts. The technology is seeing increasingly broad use, replacing batteriesolatile clock chips and complementary metal-oxide-semiconductor (CMOS) computer memories. But many other applications have emerged over the past 30 years, including portable wireless communication, enhanced power quality for distributed power generation systems, industrial actuator power sources, and high-efficiency energy storage for electric vehicles(EVs) and hybrid electric vehicles (HEVs).Overall, the unique attributes of ECs often complement the weaknesses of other power sources like batteries and fuel cells.Early ECs were generally rated at a few volts and had capacitance values measured from fractions of farads up to several farads. The trend today in some cases and in others complementing their performance.The third generation evolution is the electric double layer capacitor, where the electrical charge stored at a metal/electrolyte interface is exploited to construct astorage device. The interface can store electrical charge in the order of 610Farad. The main component in the electrode construction is activated carbon. Though this concept was initialized and industrialized some 40 years ago, there was a stagnancy in research until recent times; the need for this revival of interest arises due to the increasing demands for electrical energy storage in certain current applications like digital electronic devices, implantable medical devices and stop/start operation in vehicle traction which need very short high power pulses that could be fulfilled by electric double layer capacitors. They are complementary to batteries as they deliver high power density and low energy density. They also have longer cycle life than batteries and possess higher energy density as compared to conventional capacitors. This has led to new concepts of the so-called hybrid charge storage devices in which electrochemical capacitor is interfaced with a fuel cell or a battery. These capacitors using carbon as the main electrode material for both anode and cathode with organic and aqueous electrolytes are commercialized and used in day to-day applications. Fig.1 presents the three types of capacitors depicting the basic differences in their design and construction.Figure 1.Schematic presentation of electrostatic capacitor, electrolytic capacitor and electrical double layer capacitor.EDLCs, however suffer from low energy density. To rectify these problems, recently researchers try to incorporate transition metal oxides along with carbon in the electrode materials. When the electrode materials consist of transition metal oxides, then the electrosorption or redox processes enhance the value of specific capacitance ca. 10 -100 times depending on the nature of oxides. In such a situation, the EDLC is called as super capacitor or pseudo capacitor . This is the fourth generation capacitor. Performance of a super capacitor combines simultaneously two kinds of energy storage, i.e. non-faradic charge as in EDLC capacitors and faradaic charge similar toprocesses proceeding in batteries. The market for EC devices used for memory protection in electronic circuitry is about $150-200 million annually. New potential applications for ECs include the portable electronic device market, the power quality market, due particularly to distributed generation and low-emission hybrid cars, buses and trucks. There are some published reviews on capacitors and super capacitors . In the present overview, the evolution of electrochemical double layer capacitors starting from simple electrostatic capacitors is summarized.2. EXPERIMENTAL PARTThe invention of Leiden jar in 1745 started the capacitor technology; since then, there has been tremendous progress in this field. In the beginning, capacitors are used primarily in electrical and electronic products, but today they are used in fields ranging from industrial application to automobiles, aircraft and space, medicine, computers, games and power supply circuits. Capacitors are made from two metallic electrodes (mainly Si) placed in mutual opposition with an insulating material (dielectric) between the electrodes for accumulating an electrical charge. The basic equation relating to the capacitors is:C = εS/d (1)where C(μF) is the electrostatic capacity, the dielectric constant of the dielectric, S (cm2) the surface area of the electrode and d (cm) the thickness of the dielectric. The charge accumulating principle can be described as follows: when a battery is connected to the capacitor, flow of current induces the flow of electrons so that electrons are attracted to the positive terminal of the battery and so they flow towards the power source. As a result, an electron deficiency develops at the positive side, which becomes positively charged and an electron surplus develops at the negative side, which becomes negatively charged. This electron flow continues until the potential difference between the two electrodes becomes equal to the battery voltage. Thus the capacitor gets charged. Once the battery is removed, the electrons flow from the negative side to the side with an electron deficiency; this process leads to discharging. The conventional capacitors yield capacitance in the range of 0.1 to 1 μF with a voltage range of 50 to 400 V. Various materials such as paper (ε, 1.2-2.6), paraffin (ε 1.9-2.4), polyethylene (2.2-2.4), polystyrene (ε, 2.5-2.7), ebonite (ε, 2-3.5), polyethylene tetraphtharate (ε,3.1-3.2), water (ε, 80) sulfur（ε, 2-4.2), steatite porcelain (ε, 6-7), Al porcelain (ε, 8-10), mica（ε, 5-7)and insulated mineral oil (ε, 2.2-2.4) are used as dielectrics in capacitors.The capacitance output of these silicon based capacitors is limited and has to cope with low surface-to volume ratios of these electrodes. To increase the capacitance, as per eq., one has to increase to ∂or S and decrease; however the ∂value is largely determined by the working voltage and cannot be tampered. When aiming at high capacitance densities, it is necessary to combine the mutual benefits achieved with a high permittivity insulator material and an increased effective surface area. With Si as the substrate material, electrochemical etching produces effective surface area. The surface area of this material gets enlarged by two orders of magnitude compared to unetched surface. Electrochemically formed macroporous Si has been used for the preparation of high aspect ratio capacitors with layered SiO2/Si3N4/SiO2 insulators. Research work on the modification of conventional capacitors to increase the specific capacitance is also in progress. Approximately 30 times higher capacitance densities are reported recently for Si/Al2O3/ZnO: Al capacitor where Si is electrochemically etched porous one. Another way identified to increase the surface area of the electrodes is to form anodically formed oxides (Al, Ta); however, ceramic capacitors are based on the high dielectric constant rather than the electrode area.3. ELECTROLYTIC CAPACITORSThe next generation capacitors are the electrolytic capacitors; they are of Ta, Al and ceramic electrolytic capacitors. Electrolytic capacitors use an electrolyte as conductor between the dielectrics and an electrode. A typical aluminum electrolytic capacitor includes an anode foil and a cathode foil processed by surface enlargement and or formation treatments. Usually, the dielectric film is fabricated by anodizing high purity Al foil for high voltage applications in boric acid solutions. The thickness of the dielectric film is related to the working voltage of the aluminum electrolytic capacitor. After cutting to a specific size according to the design specification, a laminate made up of an anode foil, a cathode foil which is opposed to the dielectric film of the anode foil and a separator interposed between the anode and cathode foils, is wound to provide an element. The wound element does not have any electricalcharacteristics of electrolytic capacitor yet until completely dipped in an electrolyte for driving and housed in a metallic sheathed package in cylindrical form with a closed-end equipping a releaser. Furthermore, a sealing material made of elastic rubber is inserted into an open-end section of the sheathed package and the open-end section of the sheathed package by drawing, whereby an aluminum electrolytic capacitor is constituted. Electrolytic aluminum capacitors are mainly used as power supplies for automobiles, aircraft, space vehicles, computers, monitors, motherboards of personal computers and other electronics.There are two types of tantalum capacitors commercially available in the market; wet electrolytic capacitors which use sulfuric acid as the electrolyte and solid electrolytic capacitors which use MnO2 as the solid electrolyte. Though the capacitances derived from both Ta and Al capacitors are the same, Ta capacitors are superior to Al capacitors in temperature and frequency characteristics. For analog signal systems, Al capacitors produce a current-spike noise which does not happen in Ta capacitors. In other words, Ta capacitors are preferred for circuits which need high stability characteristics. The total world wide production of Al electrolytic capacitors amounts to US$ 3.8 billion, 99% of which are of the wet type. Unlike Ta solid electrolytic capacitors, the solid electrolyte materials used are of organic origin; polypyrrole, a functional polymer and TCNQ (7,7, 8, 8- tetracyanoquniodimethane) an organic semiconductor. Next, MnO2 solid electrolyte material is formed on the surface of that dielectric layer and on top of that a layer of polypyrrole organic solid electrolyte material is formed by electrolytic synthesis. Following this, the positive and negative electrodes are mounted to complete the electronic component. However, the capacitances of these electrolytic capacitors are in the range 0.1 to 10F with a voltage profile of 25 to 50 V.The history of development of electrolytic capacitors which were mass produced in the past as well as today is presented by S. Niwa and Y. Taketani . Many researchers try to improve the performance of these electrolytic capacitors by modifying the electrode or electrolyte. Generally, the increases in effective surface area (S) are achieved by electrolytic etching of aluminum substrate before anodization, but now it faces with the limit. It is also very difficult to decrease d because the d value is largely decided when the working voltages are decided. Increase in may be a possible routine to form composite dielectric layers by incorporating relatively large value compounds. Replacement of MnO2 by polypyrrole solid electrolyte was reported to reduce electrostatic resistance due to its higher conductivity; aromaticsulfonate ions were used as charge compensating dopant ions .A tantalum capacitor with Ta metal as anode, polypyrrole as cathode and Ta2O5 dielectric layer was also reported. In the Al solid electrolytic capacitors, polyaniline doped with inorganic and organic acids was also studied as counter electrode. In yet another work, Al solid electrolytic capacitor with etched Al foil as anode, polyaniline / polypyrrrole as cathode and Al2O3 as dielectric was developed. Ethylene carbonate based organic electrolytes and -butyrolactone based electrolytes have been tried as operating electrolytes in Al electrolytic capacitors. Masuda et al. have obtained high capacitance by electrochemically anodizing rapidly quenching Al-Ti alloy foil. Many researchers have tried the other combination of alloys such as Al-Zr, Al-Si, Al-Ti, Al-Nb and Al-Ta composite oxide films. Composite oxide films of Al2O3-(Ba0.5Sr0.5TiO3) and Al2O3- Bi4Ti3O12 on low-voltage etched aluminum foil were also studied. Nb-Ta-Al for Ta electrolytic capacitors was also tried as anode material .A ceramic capacitor is a capacitor constructed of alternating layers of metal and ceramic, with the ceramic material acting as the dielectric. Multilayer ceramic capacitors (MLCs) typically consist of ~100 alternate layers of electrode and dielectric ceramics sandwiched between two ceramic cover layers. They are fabricated by screen-printing of electrode layers on dielectric layers and co-sintering of the laminate. Conventionally, Ag-Pd is used as the electrode material and BaTiO3 is used as the dielectric ceramic. From 2000 onwards, the MLCs market has been growing in pace with the exponential development of communications. They are produced in the capacitance range of 10 F (normally the range of Ta and Al electrolytic capacitors); they are highly useful in high frequency applications. Historically, a ceramic capacitor is a two-terminal non-polar device. The classical ceramic capacitor is the disc capacitor. This device predates the transistor and was used extensively in vacuum-tube equipment (e.g radio receivers) from c. a. 1930 through the 1950s and in discrete transistor equipment from the 1950s through the 1980s. As of 2007, ceramic disc capacitors are in widespread use in electronic equipment, providing high capacity and small size at low price compared to the other types.The other ceramic materials that have been identified and used are CaZrO3, MgTiO3, SrTiO3 etc. A typical 10 F MLC is a chip of size (3.2 x 1.6 x 1.5 mm). Mn, Ca, Pd , Ag etc are some of the other internal electrodes used. Linear dielectrics and antiferroelectrics based o strontium titante have been developed for high voltage disk capacitors. These are applicable for MLCs with thinner layers because of their high coercive fields. One of the most critical material processing parameters is the degreeof homogeneous mixing of additive in the slurry. The binder distribution in the green ceramic sheet, the degree of surface roughness, fine size nickel powder, formation of green sheet, electrode deposition ad sheet stacking etc play a crucial role in the process technology. Any one of these facts if mishandled would result in the failure of the device. For instance, providing a roughess of 5 m thick green sheet to 0.5 m is mandatory so that a smooth contact surface with the inner nickel electrode can be established. This is a very important factor in avoiding the concentration of electric filed at asperities, where the charge emission from the electrode is accelerated, resulting in short failure. Conventional sheet/printing method has a technical limit of producing a thickness around 1 m dielectric; in order to decrease the thickness further, thin film technologies like CVD, sputtering, plasma-spray etc has to be used.The other types of capacitors are film capacitors which use thin polyester film and polypropylene film as dielectrics and meta-glazed capacitors which incorporate electrode plates made of film vacuum evaporated with metal such as Al. Films can be of polyester, polypropylene or polycarbonate make. Also capacitors are specified depending on the dielectric used such as polyester film capacitor, polypropylene capacitor, mica capacitor, metallized polyester film capacitor etc.4. DOUBLE LAYER CAPACITORSElectric/electrochemical double layer capacitor (EDLC) is a unique electrical storage device, which can store much more energy than conventional capacitors and offer much higher power densitythan batteries. EDLCs fill up the gap between the batteries and the conventional capacitor, allowing applications for various power and energy requirements i.e., back up power sources for electronic devices, load-leveling, engine start or acceleration for hybrid vehicles and electricity storage generated from solar or wind energy. EDLC works on the principle of double-layer capacitance at the electrode/electrolyte interface where electric charges are accumulated on the electrode surfaces and ions of opposite charge are arranged on the electrolyte side.Figure 2.Charge storage mechanism of an EDLC cell under idle and charged conditions.Fig. 2 shows the mechanism of charge storage in an EDLC cell and Fig. 3 shows the configuration of an typical EDLC cell. There are two main types of double layer capacitors as classified by the charge storage mechanism: (i) electrical double-layer capacitor; (ii) electrochemical double layer capacitor or super/pseudocapacitor. An EDLC stores energy in the double-layer at the electrode/electrolyte interface, whereas the supercapacitor sustains a Faradic reaction between the electrode and the electrolyte in a suitable potential window. Thus the electrode material used for the construction of the cell for the former is mainly carbon material while for the latter, the electrode material consist of either transition metal oxides or mixtures of carbon and metal oxides/polymers. The electrolytes can be either aqueous or non-aqueous depending on the mode of construction of EDLC cell.Figure 3.Typical configuration of an EDLC cellThere are two general directions of interest. One is the long term goal of the development of electrical propulsion for vehicles, and the other is the rapid growth of portable electronic devices that require power sources with maximum energy content and the lowest possible size and weight.5. CONCLUSIONSAccording to a market survey by Montana, super capacitors are becoming a promising solution for brake energy storage in rail vehicles. The expected technological development outside railway sector is also shown to be highly dynamic: diesel electric vehicles, catenary free operation of city light rail, starting system for diesel engines, hybrid-electric cars, industrial applications, elevators, pallet trucks etc. The time horizon expected for development is next 5 to 10 years. The main development goals will be,· long life time· increase of the rated voltage· improvements of the range of operating temperature· increase of the energy and power densitiesVery recently, hybrid car is introduced in the market but it is turned to be very expensive and out of common man’s reach. Shortage and cost of fossil fuels already instigated alternate technologies viable for traction purposes. In such a situation,EDLCs are also useful to store energy generated from non-conventional energy sources. A future possibility of service centers set up for EDLC supply similar to petrol (as on date) is not far as the main setbacks in technology development may take a decade for fruitful results.附录二：外文译文超级电容器-概述关键词：静电电容，电解电容器，陶瓷电容器，双电层 ,电容器，超级电容器1．引言本文为电化学双层电容器或超级电容器提供在一台常规电容器，简明的介绍新生的电化学双电层电容器或超级电容器。
电气工程及其自动化专业毕业论文外文翻译
本科毕业设计(论文)中英文对照翻译院(系部）工程学院专业名称电气工程及其自动化年级班级 11级2班学生姓名蔡李良指导老师赵波Infrared Remote Control SystemAbstractRed outside data correspondence the technique be currently within the scope of world drive extensive usage of a kind of wireless conjunction technique, drive numerous hardware and software platform support。
Red outside the transceiver product have cost low，small scaled turn, the baud rate be quick，point to point SSL, be free from electromagnetism thousand Raos etc. characteristics，can realization information at dissimilarity of the product fast，convenience，safely exchange and transmission, at short distance wireless deliver aspect to own very obvious of advantage。
Along with red outside the data deliver a technique more and more mature, the cost descend, red outside the transceiver necessarily will get at the short distance communication realm more extensive of application.The purpose that design this s ystem is transmit customer’s operation information with infrared rays for transmit media, then demodulate original signal with receive circuit。
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附录3 英文资料Power Management Techniques and CalculationRelevant DevicesThis application note applies to the following devices: C8051F000, C8051F001, C8051F002, C8051F005, C8051F006, C8051F010, C8051F011, C8051F012, C8051F012, C8051F015, C8051F016, and C8051F017.IntroductionThis application note discusses power management techniques and methods of calculating power in a Cygnet C8051F00x and C8051F01x Sock. Many applications will have strict power requirements, and there are several methods of lowering the rate of power consumption without sacrificing performance. Calculating the predicted power use is important to characterize the system‟s power supply requirements.Key Points• Supply volt age and system clock frequency strongly affect power consumption.• Cygnet‟s Sock‟s feature power management modes: IDLE and STOP.• Power use can be calculated as a function of system clock frequency, supply voltage, and enabled peripherals.Power Saving MethodsCMOS digital logic device power consumption is affected by supply voltage and system clock (SYSCLK) frequency. These parameters can be adjusted to realize power savings, and are readily controlled by the designer. This section discusses these parameters and how they affect power usage.Reducing System Clock FrequencyIn CMOS digital logic devices, power consumption is directly proportional to system clock (SYSCLK) frequency: power=CV2ƒ, where C is CMOS load capacitance, V is supply voltage, and ƒ is SYSCLK frequency.Equation 1.CMOS Power EquationThe system clock on the C8051Fxxx family of devices can be derived from an internal oscillator or an external source. External sources may be a CMOS clock, RC circuit, capacitor, or crystal oscillator. For information on configuring oscillators, see applic ation note: “AN02 - Configuring the Internal and External Oscillators.” The internal oscillator can provide four SYSCLK frequencies: 2, 4, 8, and16 MHz. Manydifferent frequencies can be achieved using the external oscillator.To conserve power, a designer must decide what the fastest needed SYSCLK frequency and required accuracy is for a given application. A design may require a constant SYSCLK frequency during all device opera tions. In this case, the designer will choose the lowest possible frequency required, and use the oscillator configuration that consumes the least power. Typical applications include serial communications, and periodic sampling with an ADC that must be performed.Some operations may require high speed operation, but only in short, intermittent intervals. This is sometimes referred to as “burst” operation. In the C8051Fxxx, the SYSCLK frequency can be changed at anytime. Thus, the device can operate at low frequency until a condition occurs that requires high frequency operation.Two examples of alternating between SYSCLK sources are (1) an internal oscillator/external crystal configuration, and (2) an external crystal/RC oscillator configuration. If the device is used for occasional high speed data conversion, and a real-time clock is used for time-stamping the data, a combination internal oscillator and external crystal would be ideal. During sampling operations, the high speed internal oscillator would be used. When sampling is complete, the device could then use an external 32 kHz crystal to maintain the real-time clock. Once high speed operations are required again, the device switches to the internal oscillator as necessary (see Figure 1below). An example of this procedure is illustrated in application note “AN008 Implementing a Rea l-Time Clock”.The crystal oscillator and internal oscillator may be operated simultaneously and each selected as the SYSCLK source in software as desired. To reduce supply current, the crystal may also be shutdown when using the internal oscillator. In this case, when switching from the internal to external oscillator the designer must consider the start-up delay when switching the SYSCLK source. The C8051F0xx devices have a flag that is set when the external clock signal is valid (XTLVLD bit in the OSCXCN register) to indicate the oscillator is running and stable. This flag is polled before switching to the external oscillator. Note that other operations can continue using the internal oscillator during the crystal start-up time.Some applications require intermittent high speed and accuracy (e.g., ADC sampling and data processing), but have lower frequency and accuracy requirements at other times (e.g., waiting for sampling interval), a combination of an external oscillator and RC circuit can be useful. In this case, the external RC oscillator is usedto derive the lower frequency SYSCLK source, and the crystal is used for high frequency operations. The RC circuit requires a connection to VDD (voltage source) to operate.Because this connection could load the crystal oscillator circuit while the crystal is in operation, we connect the RC circuit to a general purpose port pin (see Figure 2 below). When the RC circuit is in use, the port pin connection is driven high (to VDD) by selectin g its output mode to “push-pull” and writing a …1‟ to the port latch. When the crystal oscillator is being used, the port pin is placed in a …hi- Z‟ condition by configuring the output mode of the port to “open-drain” and writing a …1‟ to the port latch. Note the RC circuit may take advantage of the existing capacitors used for the crystal oscillator.The start-up of the RC-circuit oscillator is nearly instantaneous. However, there is a notable start-up time for the crystal. Therefore, switching from the RC oscillator to the external crystal oscillator using the following procedure:1. Switch to the internal oscillator.2. Configure the port pin used for the RC circuit voltage supply as open-drain and write a …1‟ to the port pin (Hi-Z condition).3. Start the crystal (Set the XFCN bits).4. Wait for 1 ms.5. Poll for the External Crystal Valid Bit (XTLVLD --> …1‟).6. Switch to the external oscillator.Switch from the external crystal oscillator to the RC oscillator as follows:1. Switch to the internal oscillator.2. Shutdown the crystal (clear the XFCN bits).3. Drive the voltage supply port pin high (to VDD) by putting the port pin in“push pull” mode and writing a …1‟ to its port latch.4. Switch back to the external oscillator.Supply VoltageThe amount of current used in CMOS logic is directly proportional to the voltage of the power supply. The power consumed by CMOS logic is proportional the power supply voltage squared (See Equation 1). Thus, power consumption may be reduced by lowering the supply voltage to the device. The C8051Fxxx families of devices require a supply voltage of 2.7-3.6 Volts. Thus, to save power, it is recommended to use a 3.0 volt regulator instead of a 3.3 volt regulator for power savings.CIP-51 Processor Power Management Mode sThe C8051 processor has two modes which can be used for power management. These modes are IDLE and STOP.IDLE ModeIn IDLE Mode, the CPU and FLASH memory are taken off-line. All peripherals external to the CPU remain active, including the internal clocks. The CPU exits IDLE Mode when an enabled interrupt or reset occurs. The CPU is placed in IDLE Mode by setting the Idle Mode Select Bit (PCON.0) to …1‟.When the IDLE Mode Select Bit is set to …1‟, the CPU enters IDLE Mode once the instruction that sets the bit has executed. An asserted interrupt will clear the IDLE Mode Select Bit and the CPU will vector to service the interrupt. After a return from interrupt (RETI), the CPU will return to the next instruction following the one that had set the IDLE Mode Select Bit. If a reset occurs while in IDLE Mode, the normal reset sequence will occur and the CPU will begin executing code at memory location 0x0000.As an example, the CPU can be placed in IDLE while waiting for a Timer 2 overflow toInitiate a sample/conversion in the ADC. Once the conversion and sample processing is complete, the ADC end-of-conversion interrupt wakes the CPU from IDLE Mode and processes the sample. After the sample processing is complete, the CPU is placed back into IDLE Mode to save power while waiting for the next interrupt.As another example, the CPU may wait in IDLE Mode to save power until an externalInterrupt signal is used to “wake up” the CPU as needed. Upon receivin g an external interrupt, the CPU will exit IDLE Mode and vector to the corresponding interrupt vector (e.g., / INT0 or /INT1).STOP ModeThe C8051 STOP Mode is used to shut down the CPU and oscillators. This will effectively shut down all digital peripherals as well. All analog peripherals must be shutdown by software prior to entering STOP Mode. The processor exits STOP Mode only by an internal or external reset. Thus, STOP Mode saves power by reducing the SYSCLK frequency to zero.Note that the Missing Clock Detector will cause an internal reset (if enabled) that will terminate STOP Mode. Thus, the Missing Clock Detector should be disabled prior to entering STOP Mode if the CPU is to be in STOP Mode longer than the Missing Clock Detector timeout (100 μs).The C8051 processor is placed in STOP Mode by setting the STOP Mode Select Bit (PCON.1) to …1‟. Upon reset, the CPU performs the normal reset sequence and begins executing code at 0x0000. Any valid RESET source will exit STOP Mode. Sources of reset to exit STOP Mode are External Reset (/RST), Missing Clock Detector, Comparator 0, and the External ADC Convert Start (/CNVSTR).As an example, the CPU may be placed in STOP Mode for a period to save power when no device operation is required. When the device is needed, Comparator 0 reset could be used to “wake up” the device.Generally, a power conscious design will use the lowest voltage supply, lowest SYSCLK frequency, and will use Power Management Modes when possible to maximize power savings. Most of these can be implemented or controlled in software.Calculating Power ConsumptionThere are two components of power consumption in Cygnet‟s C8051F00x and C8051F01x family of devices: analog and digital. The analog component of power consumption is nearly constant for all SYSCLK frequencies. The digital component of power consumption changes considerably with SYSCLK frequency. The digital and analog components are added to determine the total power consumption.The current use calculations presented in this application note apply to the C8051F00x and C8051F01x (…F000, 01, 02, 03, 05, 06, 10, 11, 12, 15, and 16) family of Cygnet devices.The data sheet section, “Global DC Electrical Characteristics” contains various supply current values for different device conditions. The current values are separated into digital (at three example frequencies) and analog components. The analog numbers presented are values with all analog peripherals active. Supply current values for each analog peripheral can be found in the data sheet section for the peripheral.For convenience, the Global DC Electrical Characteristics for the C8051F00x and C8051F01x family of devices are presented in the table below.Internal vs. External OscillatorBesides using lower SYSCLK frequencies, the designer can realize power savings by making smart SYSCLK source choices. The internal oscillator will typically consume 200μA of current supplied from the digital power supply. The current used to drive an external oscillator can vary. The drive current (supplied from the analog power supply) for an external source, such as a crystal, is set in software by configuring the XFCN bits in the External Oscillator Control Register (OSCXCN). Thus, at higher drive currents the user may save power by using the internal oscillator. However, at the lowest XFCN setting the external oscillator will use less than 1μA which is less current than used by the internal oscillator. Some typical measured current values are listed below. These measurements may vary from device to device. This drive level is kept as low as possibleTo minimize power consumption, but must be high enough to start the external oscillator. The following table lists the current vs. External Oscillator Frequency Control Bit settings.Digital PeripheralsFor rough calculations, a good rule of thumb is to assume a 1mA/MHz of operating current (digital) + 1mA if the analog components (ADC, comparators, DAC, VREF, etc.) are enabled. This rule of thumb assumes a 3.6 V supply voltage. A lowersupply voltage will reduce power consumption. At 2.7 V, the rule of thumb is 0.5mA/MHz (in NORMAL mode). The rules of thumb for rough calculations are presented in the table below:Analog PeripheralsThe individual supply current values for each analog peripheral are posted in the data sheet section for that component (typically near the end of the section). It is recommended to disable all peripherals not in use to save power. For convenience, the C8051F00x and C8051F10x analog peripherals supply current values are listed below:Calculating Total CurrentWhen the required SYSCLK frequency, supply voltage, and peripherals have been determined, the total supply current can be estimated. To calculate the total supply current, the analog peripheral current use (found by adding the currents of each of the enabled analog peripherals) is added to the digital current use (calculated for a given frequency, power mode, and supply voltage). If all of the analog peripherals are enabled, analog current use is about 1mA.Example CalculationsThe following are examples of supply current calculations. Each application may use different power modes, SYSCLK frequencies, and peripherals at different times. Thus, power management specifications may require several different supply current calculations. The digital component and analog components of current use are found separately, and then added together for the total.Example 1The C8051F000 device is being used in a system with VDD=3.6 V. An ADC is sampling parameters and processing the sample for an output to one DAC. Because of the sampling and processing requirements of the application, SYSCLK frequency is 16 MHz using the internal oscillator.Analog ComponentsPeripheral Supply Current (μ A)ADC 450VREF (internal) 50Internal Oscan. 200One DAC 110VDD monitor 15Total Analog 825Digital ComponentIn NORMAL Mode @ 16 MHz;1mA/M Hz * 16 MHz = 16mATotal825μA (analog) + 16mA (digital)= 16.8mAExample 2Assume we are still estimating the supply current in the same application in Example 1. If the sample processing is a burst operation (i.e., intermittent need for sampling and conversions), we may choose to place the CIP-51 in IDLE Mode to allow a Timer to wake-up the CIP-51 after a specified interval. In this case, the average supply current can be calculated in order to estimate power requirements. The device will switch between NORMAL Mode (for sampling and data conversion) and IDLE Mode (between sample processing operations). The switch between IDLE and NORMAL Modes (and supply current values) will happen in a cycle with a period equal to the sampling rate. (See Figure 3 below). This will allow us to calculate average supply current, after we calculate the supply current in IDLE Mode.Analog ComponentAnalog peripherals are disabled during the IDLE Mode period between sample processing and output. Thus, analog current consumption is just:VDD monitor = 15μA.Digital ComponentIn IDLE Mode @ 16 MHz;0.65mA/MHz * 16 MHz = 10.4mATotalThe analog component would be considered negligible in most applications, thus, the total is just the digital component:50μA (analog) + 10.4mA (digital) = 10.4mANow that we have calculated IDLE Mode supply current and NORMAL Mode supply current (in Example 1), we must calculate the time we spend in each mode to find the average current the device will use.Assuming the ADC is in low-power tracking mode and at the maximum SAR conversionClock of 2 MHz (ADC set for SAR clock = SYSCLK/8), and we desire a 10 kHzsampling rate. The period of the power cycle in Figure 3 is 1/10,000 (sample rate) = 100μs.The time in NORMAL Mode will be the ADC tracking/conversion time, and the time to store the value in memory. In low-power tracking mode, it will take 3 SAR clocks for tracking, and 16 SAR clocks for conversion. 19 SAR clocks at 2 MHz will take 9.5μs. To store the number will take to system clock cycles, or 0.125μs. To enter NORMAL Mode, a move instruction is executed, taking 3 SYSCLK cycles which takes 0.188μs. Thus, the total time in NORMAL Mode is 9.5 μs+0.125 μs+0.188μs = 9.8μs.Because the ADC sample period is 100μs, the time we may be in IDLE Mode during the power cycle is 100μs - 9.8μs (time in NORMAL Mode) = 90.2μs. By integrating the area under the curve in Figure 3 for one period (100μs), and dividing that number by the period, the average supply current is 11mA.Example 3If the oscillator frequency were lowered while in IDLE Mode (in Example 2) to 32 kHz using an external crystal for additional power savings, the current use would be:The external oscillator contr ol bits will be set to XFCN = 000. This uses 0.6μA of analog current. (0.65mA *.032 MHz) + 0.6μA = 21μAThis is a dramatic difference from Example 2‟s IDLE Mode at 16 MHz, by simply reducing oscillator frequency.Continuing with the average supply current calculation in Example 2 (with 6 extra SYSCLK cycles in NORMAL Mode to lower the frequency), the average supply current would be 1.7mA!Example 4In this application, the C8051F000 is being used to sample a parameter using the ADC and store samples in memory, with high accuracy timing of samples required. For more accurate timing, the SYSCLK is derived from an external 18.432 MHz crystal oscillator. To save power, the designer has decided to use a supply voltage of 3.0 V. Timer 2 is used to time the ADC sampling intervals.Digital ComponentIn NORMAL Mode @ 18.432 MHz;0.8mA/MHz * 18.432 MHz = 14.7mATotal Current Use3.4mA (analog)+14.7mA (digital)= 18.1mAExample 4 in IDLE ModePlacing the application in IDLE Mode with the ADC disabled during intervals that sampling is not required (no CIP-51 operations are needed; digital peripherals continue to operate) will save power if the sampling operation is a burst operation. In IDLE Mode, the digital current consumption is only 0.6mA/MHz, with no ADC, thus the current consumption at 18.432 MHz =11.1 miscalculating the average supply current for one sample period (similarly to Example 2, assuming a 10 kHz sampling rate and low-power tracking mode), the average current is estimated to be 11.9mA附录4 英文资料翻译电源管理技术及计算本设计应用于下列器件C8051F000、C8051F001、C8051F002、C8051F005、C8051F006、C8051F010、C8051F011、C8051F012、C8051F015、C8051F016、C8051F0171 引言本应用笔记讨论电源管理技术及计算C8051F00x和C8051F01x Sock中的功率消耗的方法。