Space Vector Modulation using AVR32 UC3 Microcontroller
svpwm空间矢量控制原理课件
03
空间矢量调制波形的生成
通过计算得到各相电压的期望值，然后利用SVPWM算法生成相应的
PWM波形。
SVPWM算法实现
SVPWM算法的基本步骤
首先计算出电压矢量的期望值，然后根据该期望 值计算出相应的扇区，再根据扇区计算出相应的 矢量时间，最后生成相应的PWM波形。
矢量时间的计算
根据扇区数和期望的电压矢量幅值，可以计算出 相应的矢量时间。
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05
SVPWM控制策略优化
控制策略改进方法
引入滑模控制
通过设计滑模控制器，实 现SVPWM控制系统的快 速响应和鲁棒性。
优化死区时间
通过调整死区时间的设置 ，减小SVPWM控制过程 中的谐波分量，提高控制 精度。
引入重复控制
将重复控制算法应用于 SVPWM控制系统，减小 稳态误差，提高系统跟踪 性能。
SVPWM空间矢量控制原理课件
目录 CONTENTS
• SVPWM技术概述 • 空间矢量控制原理 • SVPWM实现方式 • SVPWM与PWM对比 • SVPWM控制策略优化 • SVPWM实验与验证
01
SVPWM技术概述
SVPWM定义
SVPWM
Space Vector Pulse Width Modulation的缩写，即空间矢量脉 宽调制技术。
波形生成的实现方式
利用SVPWM算法生成相应的PWM波形，并通 过驱动电路将PWM波形输出到逆变器中，从而 控制各相电压的大小和频率。
波形生成的优点
SVPWM波形生成具有较高的电压输出能力和较 低的谐波畸变率，能够实现精确的电压控制和较 高的功率因数。
STM32 微控制器上的 PDM 音频软件解码
AN3998应用笔记STM32 微控制器上的 PDM 音频软件解码1 简介本应用笔记以 ST MP45DT02 MEMS 麦克风与 STM32 微控制器的连接为例，介绍了 PDM信号解码和音频信号重建时使用的软件优化算法和架构。
该软件可直接采集麦克风输出的脉冲密度调制 (PDM) 数据，并将其转换为 16 位脉冲编码调制 (PCM) 格式。
本文档还提供了快速入门信息，介绍如何通过基于 STM32F4 微控制器和 STM32F4DISCOVERY板的 I2S 对 PDM 库进行单麦克风采集。
有关这一过程的详细信息，请参见 AN3997 使用 STM32F4DISCOVERY 进行音频回放和录音。
2011 年 10 月文档 ID 022391 第 1 版1/10目录AN3998目录1简介 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12PDM 信号简介 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3硬件接口：麦克风连接和采集 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54软件接口：数字信号处理 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64.1PDM 数字滤波和采样 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64.2数字信号调节 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65PDM 音频软件解码库说明 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75.1PDM_Filter_Init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85.2PDM_Filter_xx_xx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6版本历史 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92/10文档 ID 022391 第 1 版AN3998图片索引图片索引图 1.麦克风与 STM32 的连接框图 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5图 2.数字信号处理 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6文档 ID 022391 第 1 版3/10PDM 信号简介AN39984/10文档 ID 022391 第 1 版2 PDM 信号简介脉冲密度调制 (PDM) 是一种用于表示数字域中的模拟信号的调制形式。
灵动微电子MM32SPIN040C Arm Cortex-M0 32位微控制器数据手册说明书
数据手册Data SheetMM32SPIN040C 基于 Arm® Cortex®-M0 内核的32位微控制器版本：Rev1.07灵动微电子有权在任何时间对此文件包含的信息（包括但不限于规格与产品说明）做出任何改动与发布，本文件将取代之前所有公布的信息。
目录1总览 (1)1.1概述 (1)1.2产品简述 (1)2规格说明 (3)2.1型号列表 (3)2.1.1订购信息 (3)2.1.2丝印 (4)2.1.3模块框图 (6)2.2功能说明 (6)2.2.1内核简介 (6)2.2.2存储器映像 (6)2.2.3内置闪存存储器（FLASH） (8)2.2.4内置 SRAM （SRAM） (8)2.2.5循环冗余校验计算单元（CRC） (8)2.2.6嵌套的向量式中断控制器（NVIC） (8)2.2.7外部中断/事件控制器（EXTI） (8)2.2.8时钟和启动 (9)2.2.9供电方案 (9)2.2.10供电监控器 (9)2.2.11电压调压器 (10)2.2.12低功耗模式（LP） (10)2.2.13定时器和看门狗（TIM & WDG） (11)2.2.14通用异步收发器（UART） (13)2.2.15I2C 总线（I2C） (13)2.2.16串行外设接口（SPI） (13)2.2.17通用输入输出接口（GPIO） (13)2.2.18模拟/数字转换器（ADC） (13)2.2.19串行调试口（SWD） (13)3引脚定义及复用功能 (14)3.1引脚分布图 (14)3.2引脚定义表 (15)3.3复用功能表 (16)3.4功能框图 (18)4电气特性 (19)4.1测试条件 (19)4.1.1负载电容 (19)4.1.2引脚输入电压 (19)4.1.3供电方案 Power Supply (20)4.1.4电流消耗测量 (20)4.2绝对最大额定值 (21)4.3工作条件 (21)4.3.1通用工作条件 (21)4.3.2上电和掉电时的工作条件 (22)4.3.3内嵌复位和电源控制模块特性 (22)4.3.4供电电流特性 (23)4.3.5外部时钟源特性 (27)4.3.6内部时钟源特性 (29)4.3.7存储器特性 (30)4.3.8EMC 特性 (30)4.3.9功能性 EMS（电气敏感性） (31)4.3.10I/O端口特性 (32)4.3.11NRST 引脚特性 (34)4.3.12TIM 定时器特性 (34)4.3.13通信接口 (35)4.3.14ADC 特性 (40)5栅极驱动器 (43)5.1 工作条件 (43)5.2电气特性 (43)6封装特性 (46)6.1封装 TSSOP28 (46)6.2封装 QFN28 (48)7产品命名规则 (50)8缩略词 (51)9修订记录 (52)插图图 1 TSSOP28丝印标识 (4)图 2 QFN20丝印标识 (5)图 3 模块框图 (6)图 4 时钟树 (9)图 5 TSSOP28引脚分布图 (14)图 6 QFN28引脚分布图 (15)图 7 功能框图 (18)图 8 引脚负载条件 (19)图 9 引脚输入电压 (19)图 10 供电方案 (20)图 11 电流测量方案 (20)图 12上电与掉电波形 (22)图 13停机模式下的典型电流消耗在V DD = 3.3V 时与温度的对比 (25)图 14待机模式下的典型电流消耗在V DD = 3.3V 时与温度的对比 (25)图 15外部高速时钟源的交流时序图 (28)图 16使用8MHz 晶体的典型应用 (29)图 17输入输出交流特性定义 (33)图 18建议的NRST 引脚保护 (34)图 19 I2C 总线交流波形和测量电路（1） (36)图 20 I2C 从模式和 CPHA = 0,SPI_CCTL.CPHASEL=1 时波形图 (38)图 21 SPI 时序图-从模式和 CPHA = 1（1）, SPI_CCTL.CPHASEL=1 时波形图 (39)图 22 SPI 时序图-主模式和 CPHA = 1（1）, SPI_CCTL.CPHASEL=1 时波形图 (40)图 23 使用ADC 典型的连接图 (42)图 24 供电电源和参考电源去耦电路 (42)图 25 TSSOP28, 28 脚低剖面长方形扁平封装图 (46)图 26 QFN28, 28 脚方形扁平无引线封装外形封装图 (48)图 27 MM32 型号命名 (50)表格表 1 订购信息 (3)表 2存储器映像 (6)表 3低功耗模式一览表 (10)表 4不同功耗模式对应IP状态表 (10)表 5定时器功能比较 (11)表 6 引脚定义 (15)表 7 PA端口复用 (17)表 8 Gate Driver引脚说明表 (17)表 9 电压特性 (21)表 10 电流特性 (21)表 11通用工作条件 (21)表 12上电和掉电的工作条件（1）（2） (22)表 13内嵌复位和电源控制模块特性（1） (22)表 14运行模式高低温下的典型供应电流（1）（2） (24)表 15睡眠模式高低温下的典型供应电流（1）（2） (24)表 16停机和待机模式高低温下的典型供应电流 (24)表 17内置外设的电流消耗 (26)表 18低功耗模式的唤醒时间 (26)表 19高速外部用户时钟特性 (27)表 20 HSE 8 ~ 24MH振荡器特性（1）（2） (28)表 21 HSI振荡器特性（1）（2） (29)表 22 LSI振荡器特性（1）（2） (30)表 23 FLASH存储器特性 (30)表 24 FLASH存储器寿命和数据保存期限（1）（2） (30)表 25 EMS特性（1） (31)表 26 ESD特性（1） (32)表 27 IO静态特性（1） (32)表 28 输出交流特性（1）（2） (33)表 29 NRST引脚特性（1） (34)表 30 TIMx（1）特性 (35)表 31 I2C接口特性（1）（2） (35)表 32 SPI接口特性 (36)表 33 ADC特性（1） (40)表 34 f ADC=15MHz（1）时的最大R AIN (41)表 35 ADC精度（1）（2） (41)表 36 Gate driver绝对最大额定植 (43)表37 Gate driver推荐工作范围 (43)表38 Gate driver电气特性 (43)表39 PWM输入输出状态表 (45)表 40 TSSOP28 尺寸说明 (46)表 41 QFN28 尺寸说明 (48)表 42 修订记录 (52)1 总览1.1 概述本产品是使用高性能的Arm® Cortex®-M0 为内核的32 位微控制器，5V输出的LDO稳压器、三组集成的PN栅极驱动器和2路运放。
HC32F002系列32位ARM Cortex-M0+微控制器用户手册说明书
HC32F002系列 32位 ARM ® Cortex ®-M0+ 微控制器 用户手册Beta 版本，仅供参考 P r el i m i n a r y t o 立创商城声 明➢ 华大半导体有限公司（以下简称：“HDSC”）保留随时更改、更正、增强、修改华大半导体产品和/或本文档的权利，恕不另行通知。
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©2019 华大半导体有限公司 - 保留所有权利P r el i m i n a r y t o 立创商城目 录声 明 (2)目 录 (3)产品特性 低功耗 MCU (22)1 功能模块 (23)1.1功能模块框图 ...................................................................................................................................... 23 1.232 位 Cortex M0+ 内核 .................................................................................................................... 24 1.3 存储器.. (24)1.3.1 18 Kbytes FLASH ....................................................................................................................... 24 1.3.2 2 Kbytes RAM ............................................................................................................................. 24 1.4 时钟系统.............................................................................................................................................. 24 1.5 工作模式.............................................................................................................................................. 25 1.6 端口控制器 GPIO .............................................................................................................................. 25 1.7 中断控制器 NVIC .............................................................................................................................. 25 1.8 复位控制器 RESET ........................................................................................................................... 25 1.9 定时器 TIM ........................................................................................................................................ 25 1.10 看门狗 WDT ...................................................................................................................................... 26 1.11 低功耗同步异步收发器 LPUART .................................................................................................... 26 1.12 串行外设接口 SPI .............................................................................................................................. 27 1.13 I2C 总线.............................................................................................................................................. 27 1.14 时钟校准器 CTRIM ........................................................................................................................... 27 1.15 蜂鸣器 Buzzer .................................................................................................................................... 28 1.16 模数转换器 ADC ............................................................................................................................... 28 1.17 低电压检测器 LVD ............................................................................................................................ 28 1.18 嵌入式调试系统 .................................................................................................................................. 29 1.19 编程模式.............................................................................................................................................. 29 1.20 器件电子签名 ...................................................................................................................................... 29 1.21 高安全性.............................................................................................................................................. 29 2 引脚配置及功能 ................................................................................................................................................. 302.1 引脚配置图.......................................................................................................................................... 30 2.2 引脚功能说明 ...................................................................................................................................... 33 2.3 模块信号说明 ...................................................................................................................................... 35 3 系统结构 ............................................................................................................................................................. 363.1概述...................................................................................................................................................... 36 3.2存储器和模块地址分配 ...................................................................................................................... 37 4工作模式 ............................................................................................................................................................. 38 4.1工作模式概述 ...................................................................................................................................... 38 4.2工作模式切换 ...................................................................................................................................... 38 4.3运行模式（Active Mode ） ................................................................................................................. 41 4.4休眠模式（Sleep Mode ） .................................................................................................................. 41 4.5 深度休眠模式（Deep Sleep Mode ） ................................................................................................. 41 P r el i m i n a r y t o 立创商城4.7寄存器.................................................................................................................................................. 43 4.7.1 系统控制寄存器（SCB_SCR ） ................................................................................................ 43 5 系统控制器（SYSCTRL ） . (44)5.1 系统时钟介绍 (44)5.1.1 时钟架构图 (45)5.1.2 内部高速 RC 时钟 RCH (45)5.1.3 内部低速 RC 时钟 RCL (46)5.1.4 外部输入时钟EXTCLK (46)5.2系统时钟切换 (47)5.2.1 标准的时钟切换流程 (47)5.2.2 RCH 不同输出频率间切换流程 (48)5.2.3 从其它时钟切换到RCL 示例 (48)5.2.4 从其它时钟切换到RCHCLKD 示例 (49)5.3 片内外设时钟控制 (50)5.4 中断唤醒控制 ..................................................................................................................................... 51 5.4.1 从深度休眠模式唤醒后执行中断服务程序的方法 ................................................................. 51 5.4.2 从深度休眠模式唤醒后不执行中断服务程序的方法 ............................................................. 51 5.4.3 退出休眠 ..................................................................................................................................... 52 5.5 寄存器 ................................................................................................................................................. 54 5.5.1 系统控制寄存器0（CR0） ....................................................................................................... 55 5.5.2 系统控制寄存器1（CR1） ....................................................................................................... 56 5.5.3 系统控制寄存器2（CR2） ....................................................................................................... 57 5.5.4 系统控制寄存器3（CR3） ....................................................................................................... 58 5.5.5 RCH 控制寄存器（RCH ） ....................................................................................................... 59 5.5.6 RCL 控制寄存器（RCL ） ........................................................................................................ 60 5.5.7 片内外设时钟控制寄存器0（PeriClkEn0） ............................................................................ 61 5.5.8 片内外设时钟控制寄存器1（PeriClkEn1） ............................................................................ 63 5.5.9 调试模式模块工作状态控制寄存器（DebugActive ） ............................................................ 64 6 复位控制器（RESET ） ..................................................................................................................................... 656.1复位控制器介绍 .................................................................................................................................. 65 6.1.1 上电下电复位POR .................................................................................................................... 65 6.1.2 外部复位管脚复位 ..................................................................................................................... 66 6.1.3 WDT 复位 ................................................................................................................................... 66 6.1.4 LVD 低电压复位 ........................................................................................................................ 66 6.1.5 Cortex-M0+ SYSRESETREQ 复位 ............................................................................................ 66 6.1.6 Cortex-M0+ LOCKUP 复位 ....................................................................................................... 66 6.2寄存器.................................................................................................................................................. 67 6.2.1 复位标识寄存器（Reset_Flag ） ............................................................................................... 67 6.2.2 片内外设复位控制寄存器0（PeriReset0） ............................................................................. 69 6.2.3 片内外设复位控制寄存器1（PeriReset1） ............................................................................. 71 7中断控制器（NVIC ） ....................................................................................................................................... 72 P r el i m i n a r y t o 立创商城7.2中断优先级.......................................................................................................................................... 73 7.3中断向量表.......................................................................................................................................... 74 7.4中断输入和挂起行为 .......................................................................................................................... 75 7.5中断等待.............................................................................................................................................. 78 7.6中断源.................................................................................................................................................. 79 7.7中断结构图.......................................................................................................................................... 80 7.8 软件基本操作 .. (82)7.8.1 外部中断使能 (82)7.8.2 NVIC 中断使能和清除使能 (82)7.8.3 NVIC 中断挂起和清除挂起 (82)7.8.4 NVIC 中断优先级 (82)7.8.5 NVIC 中断屏蔽 (83)7.9 寄存器 (84)7.9.1 中断使能设置寄存器（NVIC_ISER ） (84)7.9.2 中断使能清除寄存器（NVIC_ICER ） (85)7.9.3 中断挂起状态设置寄存器（NVIC_ISPR ） (85)7.9.4 中断挂起状态清除寄存器（NVIC_ICPR ） (86)7.9.5 中断优先级寄存器（NVIC_IPR0） (87)7.9.6 中断优先级寄存器（NVIC_IPR1） (88)7.9.7 中断优先级寄存器（NVIC_IPR2） (89)7.9.8 中断优先级寄存器（NVIC_IPR3） (90)7.9.9 中断优先级寄存器（NVIC_IPR4） (91)7.9.10 中断优先级寄存器（NVIC_IPR5） (92)7.9.11 中断优先级寄存器（NVIC_IPR6） (93)7.9.12 中断优先级寄存器（NVIC_IPR7） (94)7.9.13 中断屏蔽特殊寄存器（PRIMASK ） (95)8 通用输入输出端口控制器（GPIO ） ................................................................................................................ 96 8.1 简介 (96)8.2 主要特性 (96)8.3功能描述.............................................................................................................................................. 97 8.3.1 端口电路框图 ............................................................................................................................. 97 8.3.2 端口模式配置 ............................................................................................................................. 98 8.3.3 端口复位状态 ............................................................................................................................. 99 8.3.4 端口模拟功能 ............................................................................................................................. 99 8.3.5 端口通用输入输出功能 ........................................................................................................... 100 8.3.5.1 输入模式 ......................................................................................................................... 101 8.3.5.2 输出模式 ......................................................................................................................... 102 8.3.6 端口复用功能 ........................................................................................................................... 103 8.3.7 端口时钟输出 ........................................................................................................................... 105 8.3.7.1 输出HCLK ...................................................................................................................... 105 8.3.7.2 输出TCLK ...................................................................................................................... 105 P r el i m i n a r y t o 立创商城8.3.8 端口外部中断 (106)8.4 寄存器描述 (107)8.4.1 寄存器列表 (107)8.4.2 端口数模配置寄存器（GPIOx_ADS ） (109)8.4.3 端口方向配置寄存器(GPIOx_DIR) (110)8.4.4 端口输出类型寄存器（GPIOx_OpenDrain ） (111)8.4.5 端口上拉寄存器（GPIOx_PU ） (111)8.4.6 端口数据输入寄存器（GPIOx_IN ） (112)8.4.7 端口数据输出寄存器（GPIOx_OUT ） (112)8.4.8 端口复位寄存器 (GPIOx_BRR) (113)8.4.9 端口置位复位寄存器（GPIOx_BSRR ） (114)8.4.10 端口复用功能低位寄存器（GPIOx_AFRL ） (115)8.4.11 端口高电平中断使能配置寄存器(GPIOx_HIGHIE) (116)8.4.12 端口低电平中断使能配置寄存器(GPIOx_LOWIE) (116)8.4.13 端口上升沿中断使能配置寄存器(GPIOx_RISEIE) (117)8.4.14 端口下降沿中断使能配置寄存器(GPIOx_FALLIE) (117)8.4.15 端口中断状态寄存器(GPIOx_IFR) (118)8.4.16 端口中断清除寄存器(GPIOx_ICR) (119)8.4.17 端口辅助功能配置寄存器1(GPIOx_CR1) (120)8.4.18 端口辅助功能配置寄存器4 (GPIO_CR4) (121)9 FLASH 控制器（FLASH ）............................................................................................................................. 122 9.1 概述. (122)9.2 容量划分 (122)9.3 读等待周期 (122)9.4 FLASH 操作（读、写、擦） (123)9.4.1 页擦除（Sector Erase ） ........................................................................................................... 123 9.4.2 全片擦除（Chip Erase ） ......................................................................................................... 123 9.4.3 写操作（Program ） ................................................................................................................. 124 9.4.4 读操作（Read ） ....................................................................................................................... 126 9.5 FLASH 安全保护 .............................................................................................................................. 127 9.5.1 页面擦写保护 ........................................................................................................................... 127 9.5.2 PC 地址擦写保护 ..................................................................................................................... 127 9.5.3 寄存器写保护 ........................................................................................................................... 127 9.5.4 数据读出保护 ........................................................................................................................... 128 9.6寄存器描述........................................................................................................................................ 129 9.6.1 控制寄存器列表 ....................................................................................................................... 129 9.6.2 控制寄存器（FLASH_CR ） ................................................................................................... 130 9.6.3 中断标志寄存器（FLASH_IFR ） .......................................................................................... 131 9.6.4 中断标志清除寄存器（FLASH_ICLR ）................................................................................ 131 9.6.5 序列寄存器（FLASH_BYPASS ） .......................................................................................... 132 9.6.6 擦写保护寄存器（FLASH_SLOCK ） ................................................................................... 132 9.6.7 读等待周期寄存器（FLASH_WAIT ） ................................................................................... 133 P r el i m i n a r y t o 立创商城9.6.8 读保护状态寄存器（FLASH_LockState ） (133)10 RAM 控制器（RAM ） (134)10.1概述.................................................................................................................................................... 134 10.2 功能描述.. (134)10.2.1 RAM 地址范围 (134)10.2.2 读写位宽 (134)11 基本定时器（BTIM ） (135)11.1概述.................................................................................................................................................... 135 11.2主要特性............................................................................................................................................ 135 11.3 功能描述.. (136)11.3.1 功能框图................................................................................................................................... 136 11.3.2 滤波单元................................................................................................................................... 136 11.3.3 计数单元................................................................................................................................... 136 11.3.4 定时器模式............................................................................................................................... 137 11.3.5 计数器模式............................................................................................................................... 138 11.3.6 触发启动模式 ........................................................................................................................... 138 11.3.7 门控模式................................................................................................................................... 139 11.3.8 定时器级联............................................................................................................................... 140 11.4 寄存器描述........................................................................................................................................ 141 11.4.1 重载寄存器（BTIMx_ARR ）(x=3,4,5) .................................................................................. 142 11.4.2 计数寄存器（BTIMx_CNT ）(x=3,4,5) .................................................................................. 142 11.4.3 控制寄存器（BTIMx_CR ） (x=3,4,5)................................................................................... 143 11.4.4 中断使能（BTIMx_IER ） (x=3,4,5) ..................................................................................... 144 11.4.5 中断标志寄存器（BTIMx_IFR ） (x=3,4,5) .......................................................................... 144 11.4.6 中断标志清除寄存器（BTIMx_ICR ）(x=3,4,5) ................................................................... 145 11.4.7 复合中断标志寄存器（BTIM345_AIFR ） ............................................................................ 146 11.4.8 复合中断标志清除寄存器（BTIM345_AICR ） ................................................................... 147 12 通用定时器（GTIM ） ..................................................................................................................................... 148 12.1 概述.................................................................................................................................................... 148 12.2 主要特性............................................................................................................................................ 148 12.3功能描述............................................................................................................................................ 149 12.3.1 功能框图 .................................................................................................................................. 149 12.3.2 滤波单元 .................................................................................................................................. 149 12.3.3 计数单元 .................................................................................................................................. 150 12.3.4 定时器模式 .............................................................................................................................. 151 12.3.5 计数器模式 .............................................................................................................................. 151 12.3.6 触发启动模式........................................................................................................................... 151 12.3.7 门控模式 .................................................................................................................................. 152 12.3.8 比较捕获功能........................................................................................................................... 153 12.3.8.1 捕获功能........................................................................................................................ 153 12.3.8.2 比较功能........................................................................................................................ 154 12.3.9 定时器级联 .............................................................................................................................. 155 P r el i m i n a r y t o 立创商城12.3.10 片内外设互联 (155)12.4 寄存器描述 (156)12.4.1 重载寄存器（GTIM_ARR ） (157)12.4.2 计数寄存器（GTIM_CNT ） (157)12.4.3 控制寄存器1（GTIM_CR1） (158)12.4.4 控制寄存器0（GTIM_CR0） (159)12.4.5 中断使能控制寄存器（GTIM_IER ） (160)12.4.6 中断标志寄存器（GTIM_IFR ） (161)12.4.7 中断标志清除寄存器（GTIM_ICR ） (162)12.4.8 比较捕获控制寄存器（GTIM_CMMR ） (163)12.4.9 比较捕获寄存器（GTIM_CCRy ）(y=0,1,2,3) (164)13 高级定时器（ATIM ） ..................................................................................................................................... 165 13.1 概述. (165)13.2 主要特性 (165)13.3功能描述 (167)13.3.1 定时器时钟 .............................................................................................................................. 167 13.3.2 定时计数器 .............................................................................................................................. 167 13.3.3 定时器预分频........................................................................................................................... 167 13.3.4 模式0 计数定时器功能 .......................................................................................................... 168 13.3.4.1 功能框图........................................................................................................................ 168 13.3.4.2 计数波形........................................................................................................................ 169 13.3.4.3 计数功能........................................................................................................................ 170 13.3.4.4 定时功能........................................................................................................................ 170 13.3.4.5 时序图............................................................................................................................ 170 13.3.4.6 Buzzer 功能 .................................................................................................................... 171 13.3.4.7 设置示例........................................................................................................................ 171 13.3.5 模式1 脉宽测量PWC ............................................................................................................ 172 13.3.5.1 PWC 功能框图 ............................................................................................................... 172 13.3.5.2 PWC 波形测量时序图 ................................................................................................... 173 13.3.5.3 PWC 单次触发模式 ....................................................................................................... 175 13.3.5.1 设置示例........................................................................................................................ 175 13.3.6 模式2/3比较捕获模式 ........................................................................................................... 177 13.3.6.1 计数器............................................................................................................................ 177 13.3.6.2 计数器波形.................................................................................................................... 178 13.3.6.3 重复计数........................................................................................................................ 181 13.3.6.4 数据缓存........................................................................................................................ 183 13.3.6.5 比较输出OCREF .......................................................................................................... 186 13.3.6.6 独立PWM 输出 ............................................................................................................ 189 13.3.6.7 互补PWM 输出 ............................................................................................................ 190 13.3.6.8 有死区的PWM 输出 .................................................................................................... 191 13.3.6.9 单脉冲输出.................................................................................................................... 192 13.3.6.10 比较中断...................................................................................................................... 193 P r el i m i n a r y t o 立创商城13.3.6.11 捕获输入 (194)13.3.6.12 设置示例 (197)13.3.7 模式2/3从模式 (200)13.3.7.1 门控计数 (200)13.3.7.2 触发功能 (201)13.3.7.3 复位计数 (201)13.3.8 正交编码计数功能 (202)13.3.9 Timer 触发ADC (204)13.3.10 刹车控制 (205)13.3.11 定时器互联 (205)13.3.12 CH0B 捕获输入互联 (205)13.4寄存器描述 (206)13.4.1 模式0寄存器描述................................................................................................................... 207 13.4.1.1 16位模式重载寄存器（A TIMx_ARR ） . (207)13.4.1.2 16位模式计数寄存器（A TIMx_CNT ） (207)13.4.1.3 32位模式计数寄存器（A TIMx_CNT32） (208)13.4.1.4 控制寄存器（A TIMx_M0CR ） (209)13.4.1.5 中断标志寄存器（A TIMx_IFR ） (211)13.4.1.6 中断标志清除寄存器（A TIMx_ICLR ） (211)13.4.1.7 死区时间寄存器（A TIMx_DTR ） (212)13.4.2 模式1寄存器描述................................................................................................................... 213 13.4.2.1 16位模式计数寄存器（A TIMx_CNT ） . (213)13.4.2.2 控制寄存器（A TIMx_M1CR ） (214)13.4.2.3 中断标志寄存器（A TIMx_IFR ） (216)13.4.2.4 中断标志清除寄存器（A TIMx_ICLR ） (216)13.4.2.5 主从模式控制寄存器（A TIMx_MSCR ） (217)13.4.2.6 输出控制滤波（A TIMx_FLTR ） (218)13.4.2.7 控制寄存器（A TIMx_CR0） (219)13.4.2.8 比较捕获寄存器 (A TIMx_CCR0A ) (219)13.4.3 模式2,3寄存器描述................................................................................................................ 220 13.4.3.1 16位模式重载寄存器（A TIMx_ARR ） . (220)13.4.3.2 16位模式计数寄存器（A TIMx_CNT ） (220)13.4.3.3 控制寄存器（A TIMx_M23CR ） (221)13.4.3.4 中断标志寄存器（A TIMx_IFR ） (224)13.4.3.5 中断标志清除寄存器（A TIMx_ICLR ） (226)13.4.3.6 主从模式控制寄存器（A TIMx_MSCR ） (227)13.4.3.7 输出控制/输入滤波（A TIMx_FLTR ） (229)13.4.3.8 ADC 触发控制寄存器（A TIMx_ADTR ） (232)13.4.3.9 通道0控制寄存器（A TIMx_CRCH0） (233)13.4.3.10 通道1/2控制寄存器（TIM3_CRCH1/2） (235)13.4.3.11 死区时间寄存器（A TIMx_DTR ） (237)13.4.3.12 重复周期设置值寄存器（A TIMx_RCR ） ................................................................ 238 P r e l i m i n a r y t o 立创商城。
STM32固件库使用手册的中文翻译
名为PPP_ClearITPendingBit的函数，其功能为清除外设PPP中断待处理标志位，例如： I2C_ClearITPendingBit.
1.3编码规则
本章节描述了固态函书库的编码规则。
该固态函数库通过校验所有库函数的输入值来实现实时错误检测。该动态校验提高了软件的 鲁棒性。实时检测适合于用户应用程序的开发和调试。但这会增加了成本，可以在最终应用 程序代码中移去，以优化代码大小和执行速度。想要了解更多细节，请参阅Section 2.5。
因为该固件库是通用的，并且包括了所有外设的功能，所以应用程序代码的大小和执行速度 可能不是最优的。对大多数应用程序来说，用户可以直接使用之，对于那些在代码大小和执 行速度方面有严格要求的应用程序，该固件库驱动程序可以作为如何设置外设的一份参考资 料，根据实际需求对其进行调整。
名为PPP_Init的函数，其功能是根据PPP_InitTypeDef中指定的参数，初始化外设PPP，例 如TIM_Init.
名为PPP_DeInit的函数，其功能为复位外设PPP的所有寄存器至缺省值，例如TIM_DeInit.
名为PPP_StructInit的函数，其功能为通过设置PPP_InitTypeDef 结构中的各种参数来定义 外设的功能，例如：USART_StructInit.
UM0427 用户手册
32位基于ARM微控制器STM32F101xx与STM32F103xx
介绍
固件函数库
本手册介绍了32位基于ARM微控制器STM32F101xx与STM32F103xx的固件函数库。
空间电压矢量调制SVPWM技术详解
∫ ∫ ∫ ∫ T
0 U ref dt =
U T x
0
xdt
+
U T x + T y
Tx
ydt
+
U d t T
*
Tx +Ty 0
或者等效成下式：
(1-5)
U ref * T = U x * Tx + U y * Ty + U 0 * T0
(1-6)
其中，Uref 为期望电压矢量；T 为采样周期；Tx、Ty、T0 分别为
− 3 Udc
3U dc
11 1
U7
0
0
0
0
0
0
图 1-3 给出了八个基本电压空间矢量的大小和位置
其中非零矢量的幅值相同(模长为 2Udc/3)，相邻的矢量间隔 60°,而 两个零矢量幅值为零，位于中心。在每一个扇区，选择相邻的两个电
压矢量以及零矢量，按照伏秒平衡的原则来合成每个扇区内的任意电
压矢量，即：
尽可能避免在负载电流较大的时刻的开关动作，最大限度地减少开关
损耗。
一个开关周期中空间矢量按分时方式发生作用，在时间上构成一
个空间矢量的序列，空间矢量的序列组织方式有多种，按照空间矢量
的对称性分类，可分为两相开关换流与三相开关换流。下面对常用的
序列做分别介绍。
第 6 页 共 19 页
1.2.1 7 段式 SVPWM
我们以减少开关次数为目标，将基本矢量作用顺序的分配原则选
定为：在每次开关状态转换时，只改变其中一相的开关状态。并且对
零矢量在时间上进行了平均分配，以使产生的 PWM 对称，从而有
效地降低 PWM 的谐波分量。当 U4(100)切换至 U0(000)时，只需改 变 A 相上下一对切换开关，若由 U4(100)切换至 U7(111)则需改变 B、C 相上下两对切换开关，增加了一倍的切换损失。因此要改变电
EFM32 USART 同步模式应用指南说明书
...the world's most energy friendly microcontrollers USART - Synchronous mode(SPI)AN0008 - Application NoteThis application note describes how to use the EFM32 USART in synchronous (SPI)mode.This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 USART1.1 IntroductionThe EFM32 Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible serial communication module. It operates in either synchronous or asynchronous mode.In synchronous mode, a separate clock signal is transmitted with the data. This clock signal is generated by the bus master, and both the master and slave sample and transmit data according to this clock.Both master and slave modes are supported by the USART. The synchronous communication mode is compatible with the Serial Peripheral Interface Bus (SPI) standard.In asynchronous mode, no separate clock signal is transmitted with the data on the bus. The USART receiver thus has to determine when to sample the data on the bus. To make this possible, additional synchronization bits are added to the data when operating in asynchronous mode, resulting in a slight overhead.1.2 Operation OverviewAn overview of the USART is shown in Figure 1.1 (p. 2) .Figure 1.1. USART OverviewTransmission is enabled by writing to the TXEN bit in the USARTn_CMD register. Any data written to the TX buffer will be transmitted. The USART performs this by first moving the data to the shift register, from which the data is shifted to the TX pin. When data has been moved from the TX buffer, the TXBL bit in the USARTn_STATUS register is set, indicating that a new transmit byte may be written. When all available transmit data (both in the shift register and in the TX buffer) have been transmitted, the TXC bit in the USARTn_STATUS register is set. Both the TXC and TXBL are also available as interrupt flags.When the RXEN bit in the USARTn_CMD register has been written, data received on the RX pin will be accepted. When new data is available from in the RX buffer, the RXDATAV bit in the USARTn_STATUS register is set. This bit will be cleared when the RX buffer is read. The RXDATAV is also available as an interrupt.For a detailed description of the USART please refer to the specific product family reference manual.2 Synchronous (SPI) Mode2.1 TheorySynchronous communication is normally set up using 4 lines: clock (CLK), data in and out (MISO and MOSI), and chip select (CS, also known as slave select, SS). See Figure 2.1 (p. 3) . The data lines consist of MOSI (Master Out Slave In) and MISO (Master In Slave Out). These lines are driven by the master and the slave, respectively.Figure 2.1. Typical SPI SetupA typical synchronous transaction is shown in Figure 2.2 (p. 3) . The master initiates a transfer by asserting the slave select line. Then the clock is driven by the master, and both master and slave shift data onto their output lines while sampling the other (i.e., the slave drives the MISO line while listening to the MOSI line). This enables data transmission in both directions simultaneously. When the master has received/sent the desired data, it terminates the transaction by deasserting the CS line.Figure 2.2. Typical SPI TransactionX 0MOS I 1234567XCLKCSX 0MIS O 1234567XIn this example, the USART is configured to set up the data on negative clock edges, and sample data on positive clock edges.The polarity of the signals as well as the sampling instant may be changed. Please see the product family Reference Manual for further details.2.2 SPI ExampleThe attached SPI example illustrates the use of the USART in synchronous mode. USART1 is configured as slave, whereas USART2 is master. The following transactions take place:•Data transmission from master to slave.•Data transmission from slave to master.•Data transmission from master to slave and from slave to master simultaneously.In order to make the attached SPI example work as intended, the IO lines of USART1 and 2 must be connected as specified in Table 2.1 (p. 4) . If the EFM32WG Development Kit (DVK) is used, these connections are easy to implement on the Prototyping Board. USART1 uses IO location 1 for its pins, whereas USART2 uses IO location 0.Table 2.1. SPI Connection Table3 Revision History3.1 Revision 1.132013-09-03New cover layout3.2 Revision 1.122013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.3.3 Revision 1.112012-11-12Adapted software projects to new kit-driver and bsp structure.3.4 Revision 1.102012-07-16Removed chapter on asynchronous mode. Asynchronous mode USART/UART communciation is now covered in AN0045.Changed name to reflect that this application note now is focused on SPI.Some minor corrections.3.5 Revision 1.062012-04-20Adapted software projects to new peripheral library naming and CMSIS_V3.Fixed a pin configuration issue with the uart example.3.6 Revision 1.052012-03-14Removed AF-Pin definitions from code example.Fixed makefile-error for CodeSourcery projects.3.7 Revision 1.042011-08-19Corrected GPIO configuration for SPI slave.3.8 Revision 1.032011-03-24Changed the location description for USART1.3.9 Revision 1.02February 1st, 2011.Changed GPIO configuration to reduce code size.3.10 Revision 1.01November 16th, 2010.Changed example folder structure, removed build and src folders.Added chip-init function.Small code changes in spi.c3.11 Revision 1.00September 20th, 2010.Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which,if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. USART (2)1.1. Introduction (2)1.2. Operation Overview (2)2. Synchronous (SPI) Mode (3)2.1. Theory (3)2.2. SPI Example (4)3. Revision History (5)3.1. Revision 1.13 (5)3.2. Revision 1.12 (5)3.3. Revision 1.11 (5)3.4. Revision 1.10 (5)3.5. Revision 1.06 (5)3.6. Revision 1.05 (5)3.7. Revision 1.04 (5)3.8. Revision 1.03 (5)3.9. Revision 1.02 (6)3.10. Revision 1.01 (6)3.11. Revision 1.00 (6)A. Disclaimer and Trademarks (7)A.1. Disclaimer (7)A.2. Trademark Information (7)B. Contact Information (8)B.1. (8)List of Figures1.1. USART Overview (2)2.1. Typical SPI Setup (3)2.2. Typical SPI Transaction (3)...the world's most energy friendly microcontrollers List of Tables2.1. SPI Connection Table (4)。
EFM32微控制器脉冲计数器应用指南说明书
...the world's most energy friendly microcontrollersPulse CounterAN0024 - Application NoteIntroductionThis application note describes how to configure and use the different modes inthe EFM32 Pulse Counter, select clock sources and use the available interrupts toachieve high energy efficiency.This application note includes:•This PDF document•Source files (zip)•Example C-code•Multiple IDE projects1 OverviewThe Pulse Counter (PCNT) can be used for counting incoming pulses on a single input or to decode quadrature encoded inputs. It can run from the internal LFACLK (EM0-EM2) while counting pulses on the PCNTn_S0IN pin or using this pin as an external clock source (EM0-EM3) that runs both the PCNT counter and register access.Figure 1.1. Pulse Counter OverviewPCNTn_SIPCNTn_S1INThe peripheral incorporates an 8-bit up/down-counter to keep track of the incoming pulses or rotations.It is possible to generate an interrupt after a specific number of pulses (or rotations) and there is alsoa change in direction interrupt available (quadrature decoder mode only). This eliminates the need fortiming or IO interrupts and CPU processing to measure pulse widths.2 Pulse Counter ModesThe PCNT can operate in single oversampling mode (OVSSINGLE), externally clocked single input counter mode (EXTCLKSINGLE) and externally clocked quadrature decoder mode (EXTCLKQUAD).•In OVSSINGLE mode the input on PCNTn_S0IN is sampled by the LFACLK and PCNTn_S1IN is ignored•In EXTCLKSINGLE the PCNTn_S0IN input clocks both the PCNT counter and register access.PCNTn_S1IN is also ignored in this mode•In EXTCLKQUAD the PCNTn_S0IN input clocks the register access as well and is used to sample PCNTn_S1IN in order to decode the quadrature signal2.1 FunctionsThe operational mode and general initialization can be set using the following function from the emlib: void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init)Using this function the user will be able to configure the following parameters:•Operational mode•Initial counter value (maximum of 0xFF)•Initial top value (maximum of 0xFF)•Polarity of incoming edge•Count up or down•Filter enableIf the user only wants to change the operational mode the function void PCNT_Enable(PCNT_TypeDef *pcnt, PCNT_Mode_TypeDef mode) can be used. It does not do any configuration, only sets the operational mode. This is normally only required after initialization is done and if not done as part of the initialization or if requiring to disable/reenable the PCNT.2.2 Clock SourcesThere are two selectable clock sources for the PCNT, the 32kHz LFA clock or an external clock through PCNTn_S0IN pin. Clock selection is done using the CMU_PCNTCTRL register in the CMU module and the LE interface clock must also be enabled in addition to the peripheral clock. The external clock is used to clock the counter in EXTCLKSINGLE mode and to sample PCNTn_S1IN in EXTCLKQUAD mode.When changing clock source the PCNT Clock Domain Reset bit (RSTEN in the PCNTn_CTRL register) should be set. If changing to an external source the clock pin has to be enabled as input in the GPIO module prior to deasserting RSTEN. Changing clock source without enabling RSTEN results in undefined behaviour. The clock source can be selected using the initialization function for the PCNT in the emlib void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init) which also handles automatically the RSTEN assertion.The pins used by the PCNT must be properly configured as inputs in the GPIO module and routed in the PCNT using the ROUTE register. Configuring the pins is covered in AN0012 GPIO.2.3 Single Input Oversampling ModeSingle input oversampling mode can also be enabled by writing OVSSINGLE (0x1) to the MODE bitfield in the PCNTn_CTRL register. The PCNTn_S0IN is the only observed input in this mode and is sampledby the LFACLK. The number of detected positive or negative edges on this pin appears in PCNTn_CNT.The counter can count either up or down and the digital pulse width filter is available in this mode and can be enabled using the FILT bit in PCNTn_CTRL. Count direction and edge polarity of the incoming signal can be changed using CNTDIR and EDGE bits in PCNTn_CTRL.2.3.1 Software ExamplesThere is one software example named pcnt_count that demonstrates OVSSINGLE mode and can be used for both STKs and DK. In this example the pulses are generated by making a connection between PC4(PC13 on the Tiny Gecko STK) and PC5 (P4.7 and P4.8 on the DK protoboard). PC4 is configured as input with a pull down to tie it to ground and avoid having a floating voltage. PC5 is configured as output high so when making a connection between them PC4 will have a high level also and thus generatinga pulse. Due to mechanical friction and bouncing each contact can generate more than one pulse. Theoverflow interrupts are used in this example to update the LCD with the number of pulses.The top value is initially set to 10 and then is increased by 10 on each overflow. The counter gets the previous top value because it goes to 0 after an overflow. The LCD will update when a number of pulses multiple of 10 is generated. The counting direction change interrupt is not used in this example.2.4 Externally Clocked Single Input Counter ModeExternally clocked single input counter mode can also be enabled by writing EXTCLKSINGLE (0x2) to the MODE bitfield in the PCNTn_CTRL register. The external pin clock source must be configured in the CMU_PCNTCTRL register in the CMU. Positive edges on the PCNTn_S0IN are used to clock the counter and PCNTn_S1IN is ignored in this mode. Given that the LFACLK is not used the PCNT can operate in EM3. The counter can be configured to count down or up using the DIR bit in PCNTn_CTRL register, but the digital pulse width filter is not available. An alternative is using the analog glitch suppression filter in the GPIO pads to remove some unwanted noise. That configuration has to be done in the GPIO module when enabling the pins as inputs for the PCNT. The EDGE bit in PCNTn_CTRL has no effect in this mode where only positive signal edges are counted.2.4.1 Software ExamplesThe software example from Section 2.3.1 (p. 4) can also be used to demonstrate this mode. To do so the mode parameter in pcntInit structure should be changed from pcntModeOvsSingle to pcntModeExtSingle. The only difference to the previous example is that the PCNT only starts counting on the 4th pulse. This is due to the required synchronization described in Section 4.2 (p. 8)2.5 Externally Clocked Quadrature Decoder ModeThis mode is enabled by writing EXTCLKQUAD (0x3) to the MODE field in PCNT_CTRL register. The external pin clock source must be configured in the CMU_PCNTCTRL register in the CMU. Both edges of the PCNTn_S0IN pin are used to sample PCNTn_S1IN in order to decode the quadrature code. The LFACLK is not used in this mode enabling operation down to EM3. The direction of the counter can be inverted using the EDGE bit in PCNTn_CTRL register and the digital pulse width filter is not available in this mode. A quadrature coded signal contains information about the relative speed and direction ofa rotating shaft as illustrated by Figure 2.1 (p. 5)Figure 2.1. Quadrature DecodingX = sensor positionClockwise direction Counter clockwisePCNTn_S PCNTn_S PCNTn_S PCNTn_S If PCNTn_S0IN leads PCNTn_S1IN in phase, the direction is clockwise, and if it lags in phase the direction is counter-clockwise. Although the direction is automatically detected it may be inverted by writing 1 to the EDGE bit in PCNTn_CTRL register. The counter direction may be read from the DIR bit in the PCNTn_STATUS register.2.5.1 Software ExamplesThere is one software example named pcnt_quad that demonstrates EXTCLKQUAD mode and can be used for both STK and DK. To simulate the quadrature encoded signal pins PC4 and PC5 (P4.7 and P4.8 on the DK protoboard) are configured as inputs for the PCNT inputs and pins PC6 and PC7 (P4.9and P4.10) are configured as output high. These should be connected to the input pins to generate the quadrature coded signal in one of two different cycles:For the Tiny Gecko STK the PCNT inputs are on PC13 and PC14. Exchange PC4, PC5 with PC13,PC14 in the following two cycles to generate the quadrature signals.The following cycle will make the PCNT count up:•Connect PC4 to PC6•Connect PC5 to PC7 and keep PC4 and PC6 connected •Disconnect PC4 from PC6•Disconnect PC5 from PC7The next cycle will make the PCNT count down:•Connect PC5 to PC7•Connect PC4 to PC6 and keep PC5 and PC7 connected •Disconnect PC5 from PC7•Disconnect PC4 from PC6The counter only starts counting on the 4th cycle. This is due to the required synchronization described in Section 4.2 (p. 8) . In this example both counter direction (UP or DOWN) and value are displayed on the LCD. When the direction changes a direction change interrupt is generated and the LCD is updated with the new direction and current counter value. The LCD has START and 0 written at the beginning and is only updated after a direction change.3 InterruptsThe interrupts generated by PCNT use the PCNTn_INT interrupt vector. Interrupts are set using the PCNTn_IFS register, cleared in the PCNTn_IFC register and read from the PCNTn_IF register. There are also emlib functions to handle these registers:•void PCNT_IntEnable(PCNT_TypeDef *pcnt, uint32_t flags) for enabling interrupts •PCNT_IntClear(PCNT_TypeDef *pcnt, uint32_t flags) for clearing interrupts•uint32_t PCNT_IntGet(PCNT_TypeDef *pcnt) for reading interruptsThe interrupts can also be disabled using the function void PCNT_IntDisable(PCNT_TypeDef *pcnt, uint32_t flags)3.1 Underflow and Overflow InterruptsThe underflow interrupt flag (UF) is set when the counter counts down from 0. I.e. when the value of the counter is 0 and a new pulse is received. The PCNTn_CNT register is loaded with the PCNTn_TOP value after this event.The overflow interrupt flag (OF) is set when the counter counts up from the PCNTn_TOP (reload) value.I.e. if PCNTn_CNT = PCNTn_TOP and a new pulse is received. The PCNTn_CNT register is loadedwith the value 0 after this event.3.2 Direction Change InterruptThe direction change interrupt flag (DIRCNG) is set when the direction of the quadrature code changes.The behavior of this interrupt is illustrated by Figure 3.1 (p. 7)Figure 3.1. Direction Change InterruptPCNTn_SPCNTn_SInterruptDelay from the shaft physicallychanged direction until thecounter direction is changedand the interrupt is generated4 Register access4.1 Writing to PCNTn_TOP and PCNTn_CNTSince the pulse counter is part of the low frequency domain, or externally clocked, and thereby asynchronous to the high frequency domain. All register accesses must be synchronized when writing,please see the reference manual, chapter: Access to Low Energy Peripherals (Asynchronous Registers)for more information about this.The emlib includes a function to load both TOP and COUNT registers:void PCNT_CounterTopSet(PCNT_TypeDef *pcnt, uint32_t count, uint32_t top)In this function the LTOPBIM command is always issued since it has no effect in revision C but is necessary in revisions A/B. If running the PCNT from an external clock source (EXTCLKSINGLE or EXTCLKQUAD modes) it is advisable not to use this function. It contains several sync cycles that can cause the program to stall if the clock is not present or delay the execution if the clock is slow. Before writing to PCNTn_TOPB, PCNTn_CMD or PCNTn_CTRL a sync check should be done to make sure these registers were synchronized to the low frequency domain.When using the initialization function void PCNT_Init(PCNT_TypeDef *pcnt,PCNT_Init_TypeDef *init) the counter value is not written for the external clock modes (EXTCLKSINGLE and EXTCLKQUAD). The counter value must first be written to TOP and then to CNT and it is necessary to sync the register access between the high and low frequency domains. In External clock modes there is no guarantee that the clock is present so waiting for syncs could cause the program to stall.4.2 Synchronizing in External Clock ModesWhen writing to PCNTn_TOPB, PCNTn_CMD or PCNTn_CTRL registers these need to be synchronized from the high frequency domain to the low frequency domain. The changes will not take effect until the synchronization is done and it takes 3 low frequency clock cycles to synchronize between the two domains. When using the PCNT in an external clock mode (EXTCLKSINGLE or EXTCLKQUAD), it also takes 3 cycles on the external clock to sync the registers. This should be taken into account when the user writes the PCNT registers in run-time. Figure 4.1 (p. 8) illustrates the sync in EXTCLKSINGLE mode after changing the CNTDIR bit in PCNT_CTRL register.Figure 4.1. Register Sync in EXTCLKSINGLECNTDIR = 1(counting down)PCNTn_CNTPCNTn_S 0INChanges are syncedPCNTn_S TATUS Counting up Counting downThe PCNT will need 3 clock cycles (or pulses) on the external clock (PCNTn_S0IN) to sync before the changes take effect. This means that the PCNT counts up for 3 more cycles before starting to count down. In this example the counter will be affected by 6 extra counts (2 x SYNC_CYCLES).4.2.1 Initializing in External Clock ModeWhen initializing the PCNT with one of the external clock modes (EXTCLKSINGLE or EXTCLKQUAD) the counting can start on the third or fourth pulse depending on how the initialization is done. There are two possible initialization sequences.•Single write to PCNTn_CTRL with chosen configuration and PCNT clock domain reset enable (RSTEN)•Wait for sync by polling the CTRL bit in the PCNTn_SYNCBUSY register•Select external clock source•Release the reset by writing 0 to RSTEN in PCNTn_CTRL•Write PCNTn_TOPB•Issue LTOPBIM command in PCNTn_CMD (EFM32G revisions A/B only)Using this sequence the configuration will be synchronized simultaneously with the RSTEN assertion.When clearing RSTEN the PCNT is already configured to the correct mode. The reset is synchronously released two PCNT clock edges after RSTEN being cleared and thus the PCNT will start counting on the third pulse.This initialization has however a drawback. The TOP value has to be written after clearing RSTEN. The PCNTn_TOP reset value is restored after clearing RSTEN so writing it before will have no effect. After reset it will take 4 or 3 clock cycles (revisions A/B and revision C and onward EFM32G and other EFM32 parts respectively) to synchronize PCNTn_TOP so when using this sequence the PCNT starts counting with a TOP value of 0xFF. If count down is selected the third pulse (first countable pulse) will make PCNTn_CNT go from 0 to 0xFF because the new PCNTn_TOP value has not been synchronized yet.The initialization sequence can be done differently to make sure that PCNTn_TOP is synchronized before or at the same time as PCNTn_CTRL after releasing reset.•Write to PCNTn_CTRL enabling PCNT clock domain reset enable (RSTEN)•Wait for sync by polling the CTRL bit in the PCNTn_SYNCBUSY register•Select external clock source•Release the reset by writing 0 to RSTEN in PCNTn_CTRL•Write PCNTn_TOPB•Issue LTOPBIM command in PCNTn_CMD (EFM32G revisions A/B only)•Wait for PCNTn_TOPB and PCNTn_CMD synchronization (EFM32G revisions A/B only)•Write PCNTn_CTRL with the chosen configurationsThe emlib function void PCNT_Init(PCNT_TypeDef *pcnt, PCNT_Init_TypeDef *init) implements this solution but without the wait for synchronization because the state of the external clock is unknown.If count down is selected PCNTn_CNT will go to the new PCNTn_TOP value instead of 0xFF. However in EFM32G revisions A/B chips there is the need for one more clock cycle as described in Section 4.1 (p.8) . For these chips the LTOPBIM command has to be issued after writing PCNTn_TOPB and bothshould be synchronized before writing and synchronizing PCNTn_CTRL. To avoid using the pulses for synchronization the user can configure PCNTn_S0IN as push pull and generate the pulses by software.This makes sure that the first external pulse is counted by the PCNT5 Revision History5.1 Revision 1.072013-09-03New cover layout5.2 Revision 1.062013-08-07Replaced hard coded interrupt flags and bug in interrupt handler.5.3 Revision 1.052013-05-08Added software projects for ARM-GCC and Atollic TrueStudio.Removed section about issues with early Gecko revisions, as this is errata material.5.4 Revision 1.042012-11-12Adapted software projects to new kit-driver and bsp structure.Added projects for Tiny and Giant Gecko STKs.5.5 Revision 1.032012-04-20Adapted software projects to new peripheral library naming and CMSIS_V3.5.6 Revision 1.022011-10-21Updated IDE project paths with new kits directory.5.7 Revision 1.012011-05-18Updated projects to align with new bsp version.5.8 Revision 1.002010-12-02Initial revision.A Disclaimer and TrademarksA.1 DisclaimerSilicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific written consent of Silicon Laboratories.A "Life Support System" is any product or system intended to support or sustain life and/or health, which,if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Laboratories products are generally not intended for military applications. Silicon Laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.A.2 Trademark InformationSilicon Laboratories Inc., Silicon Laboratories, the Silicon Labs logo, Energy Micro, EFM, EFM32, EFR, logo and combinations thereof, and others are the registered trademarks or trademarks of Silicon Laboratories Inc. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.B Contact InformationSilicon Laboratories Inc.400 West Cesar ChavezAustin, TX 78701Please visit the Silicon Labs Technical Support web page:/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.Table of Contents1. Overview (2)2. Pulse Counter Modes (3)2.1. Functions (3)2.2. Clock Sources (3)2.3. Single Input Oversampling Mode (3)2.4. Externally Clocked Single Input Counter Mode (4)2.5. Externally Clocked Quadrature Decoder Mode (4)3. Interrupts (7)3.1. Underflow and Overflow Interrupts (7)3.2. Direction Change Interrupt (7)4. Register access (8)4.1. Writing to PCNTn_TOP and PCNTn_CNT (8)4.2. Synchronizing in External Clock Modes (8)5. Revision History (10)5.1. Revision 1.07 (10)5.2. Revision 1.06 (10)5.3. Revision 1.05 (10)5.4. Revision 1.04 (10)5.5. Revision 1.03 (10)5.6. Revision 1.02 (10)5.7. Revision 1.01 (10)5.8. Revision 1.00 (10)A. Disclaimer and Trademarks (11)A.1. Disclaimer (11)A.2. Trademark Information (11)B. Contact Information (12)B.1. (12)List of Figures1.1. Pulse Counter Overview (2)2.1. Quadrature Decoding (5)3.1. Direction Change Interrupt (7)4.1. Register Sync in EXTCLKSINGLE (8)。
Almel ATmega32 ATmega32L微控制器 说明书
2
ATmega32(L)
2503F–AVR–12/03
(INT1) (OC1B) (OC1A) (ICP) (OC2)
PD3 PD4 PD5 PD6 PD7 VCC GND (SCL) PC0 (SDA) PC1 (TCK) PC2 (TMS) PC3
ATmega32(L)
综述
方框图
ATmega32 是基于增强的 AVR RISC 结构的低功耗 8 位 CMOS 微控制器。 由于其先进的指 令集以及单时钟周期指令执行时间，ATmega32 的数据吞吐率高达 1 MIPS/MHz，从而可 以缓减系统在功耗和处理速度之间的矛盾。 Figure 2. 结构框图
XTAL2 MCU CTRL. & TIMING RESET
INSTRUCTION DECODER
Y Z
CONTROL LINES
ALU
INTERRUPT UNIT
INTERNAL CALIBRATED OSCILLATOR
AVR CPU
STATUS REGISTER
EEPROM
PROGRAMMING LOGIC
TQFP/MLF
PB4 (SS) PB3 (AIN1/OC0) PB2 (AIN0/INT2) PB1 (T1) PB0 (XCK/T0) GND VCC PA0 (ADC0) PA1 (ADC1) PA2 (ADC2) PA3 (ADC3) (MOSI) PB5 (MISO) PB6 (SCK) PB7 RESET VCC GND XTAL2 XTAL1 (RXD) PD0 (TXD) PD1 (INT0) PD2
TWI
STACK POINTER
TIMERS/ COUNTERS
第5章 STM32系列微控制器开发基础
系统总线
连接Cortex-M3内核的系统总线(外设总线)到总线矩阵，总线矩阵协调着内核和DMA间 的访问。
DMA总线
将DMA的AHB主控接口与总线矩阵相联，总线矩阵协调着CPU的DCode和DMA到 SRAM、闪存和外设的访问。
总线矩阵
协调内核系统总线和DMA主控总线之间的访问仲裁，仲裁利用轮换算法。AHB外设通过 总线矩阵与系统总线相连，允许DMA访问。
时钟和启动
• 在启动的时候还是要进行系统时钟选择，但复位的 时候内部8MHz的晶振被选作CPU时钟。可以选择一 个外部的4-16MHz的时钟，并且会被监视判定是否 成功。
嵌入式系统原理与接口技术
11
5.2 STM32F103系列微控制器
功能概述
Boot模式
• 在启动的时候，boot引脚被用来在三种boot选项中的 选择一种：从用户Flash导入；从系统存储器导入； 从SRAM导入。boot导入程序位于系统存储器，用于 通过USART1重新对Flash存储器进行编程。
• STM32F103xx系列微控制器嵌入了一个嵌套矢量中 断控制器，可以处理43个可屏蔽中断通道（不包括 Cortex-M3的16根中断线），提供16个中断优先级。
嵌入式系统原理与接口技术
10
5.2 STM32F103系列微控制器
功能概述
外部中断/事件控制器（EXTI）
• 外部中断/事件控制器由用于19条产生中断/事件请 求的边沿探测器线组成。每条线可以被单独配置用 于选择触发事件（上升沿，下降沿或者两者都可 以），也可以被单独屏蔽。
嵌入式系统原理与接口技术
第5章 STM32系列微控制器开发基础
教师：姓名
5.1 STM32系列微控制器概述