IRG4PC30UD中文资料
Eaton PDF34G0400P3DL 电源防御型号的产品说明说明书
Eaton PDF34G0400P3DLPower Defense Globally Rated 100% UL, Frame 3, Four Pole, 400A, 35kA/480V, PXR25 LSIG w/ Modbus RTU, CAM Link and Relays, Std Term Load Only (PDG3X4TA400)Eaton Power Defense molded case circuit breakerPDF34G0400P3DL 786679987773109.1 mm 257.1 mm 182.9 mm 7.68 kg Eaton Selling Policy 25-000, one (1) year from the date of installation of theProduct or eighteen (18) months from thedate of shipment of the Product,whichever occurs first.RoHS Compliant IEC 60947-2CCC MarkedProduct NameCatalog Number UPCProduct Length/Depth Product Height Product Width Product Weight WarrantyCompliancesCertifications400 AComplete breaker 3Four-pole (100% N)PD3 Global (100% UL) Class APXR 25 LSIGModbus RTU and CAM Link600 Vac600 V100% neutral protectionStandard Terminals Load Only35 kAIC at 480 Vac65 kAIC @240V (UL) 10 kAIC Icu @250 Vdc Eaton Power Defense PDF34G0400P3DL 3D drawingPower Xpert Protection Manager x32Consulting application guide - molded case circuit breakersPower Xpert Protection Manager x64StrandAble terminals product aidPower Defense technical selling bookletPower Defense brochurePower Defense molded case circuit breaker selection posterPower Xpert Release trip units for Power Defense molded case circuitAmperage RatingCircuit breaker frame type FrameNumber of poles Circuit breaker type ClassTrip Type CommunicationVoltage ratingVoltage rating - maxProtectionTerminalsInterrupt rating Interrupt rating range 3D CAD drawing package Application notesBrochuresCatalogsbreakersMolded case circuit breakers catalogCertification reportsPDG3 UL authorization 250-600a TMTUPDG3 UL authorization 100-400aInstallation instructionsPower Defense Frame 3 Breaker Instructions (IL012107EN).pdfMultimediaPower Defense Frame 5 Trip Unit How-To VideoEaton Power Defense for superior arc flash safetyPower Defense BreakersPower Defense Frame 6 Trip Unit How-To VideoPower Defense Frame 3 Variable Depth Rotary Handle Mechanism Installation How-To VideoPower Defense molded case circuit breakersPower Defense Frame 2 Variable Depth Rotary Handle Mechanism Installation How-To VideoSpecifications and datasheetsEaton Specification Sheet - PDF34G0400P3DLTime/current curvesPower Defense time current curve Frame 3 - PD3Warranty guidesSelling Policy 25-000 - Distribution and Control Products and ServicesWhite papersImplementation of arc flash mitigating solutions at industrial manufacturing facilitiesMolded case and low-voltage power circuit breaker healthIntelligent circuit protection yields space savingsIntelligent power starts with accurate, actionable dataMaking a better machineSafer by design: arc energy reduction techniquesMolded case and low-voltage breaker healthEaton Corporation plc Eaton House30 Pembroke Road Dublin 4, Ireland © 2023 Eaton. All Rights Reserved. Eaton is a registered trademark.All other trademarks areproperty of their respectiveowners./socialmedia。
日置模拟兆欧表IR4000系列和35
日置模拟兆欧表IR4000系列和34
日置模拟兆欧表IR4000系列和3490的使用指南
日置HIOKI去年新推出了模拟兆欧表IR4000系列（单量程）和3490（3档量程）。
对于使用方面，现在我们向大家介绍一些小窍门，让您的实际测量变得更加方便和简单。
(1)你知道吗？ IR4000系列以及3490的「自动放电功能」
关于绝缘电阻计的主机上面“闪电”的标记。
这个闪电标识是指绝缘电阻计试验电压被发生时会有亮灯。
这个设置为了探头前端发生高电压时，提醒使用者注意安全。
但是，闪电标识并不只在电压发生时才亮。
实际上，在“自动放电”进行的时候也是亮的。
当然，这点在说明书里面也并没有说明，因为不需要特别在主机上面设定，可能一不小心就会忽略这个重要的功能。
那幺，所谓“自动放电功能”到底是个什幺样的功能呢？。
Panduit WGR4PK30 Fiber Optic Cabling Accessories说明
ONE (1) WYR-GRID CENTER SUPPORT BRACKET
B
TWO (2) FIBERRUNNER/WYR-GRID QUIKLOCK CLIP ASSEMBLY
B
ONE (1) TOP OF RACK STRUT ASSEMBLY
STRUT
41
TWO (2) M10 THREADED RODS TWO (2) RACK MOUNTING CLIPS
14.3 .56
25.2 .99
6.60 .26
A
02A 12-15-14 TWV DWR
SEE SHT ONE FOR REVISIONS
REV DATE BY CHK APR
DESCRIPTION
2
DETAIL A SCALE 1:2
11.1 .44
V09000DE ECN
TITLE
WYR-GRID 4 POST RACK MOUNT BRACKET
CHK
SCALE
DWR
NONE
DRAWING NUMBER:
14D421AA-DC
SIZE
SHT 2 OF 2
A
1
40 1.6
47 1.8
WYR-GRID CENTER SUPPORT BRACKET
A
02A 12-15-14 TWV DWR
RELEASED TO PRODUCTION
REV DATE BY CHK APR
DESCRIPTION
2
STRUT
WYR-GRID CENTER SUPPORT BRACKET
1.6
INCLUDES REQUIRED MOUNTING HARDWARE. 3. ALL DIMENSIONS IN PARENTHESES ARE INCHES.
Aristo Origo Feed 3004, Feed 4804 维修手册说明书
Aristo®,Origo™Feed 3004,Feed 4804维修手册0740800181CN20210316Valid for:serial no.745-,910-,236-,540-,628-xxx-xxxx目录请先阅读 (3)引言 (4)布线图 (5)部件说明 (5)Feed3004，Feed4804 (6)技术参数 (8)操作说明 (9)1MMC面板 (9)13AP1控制板(Control board) (10)13AP1:1电源 (11)13AP1:2启动/停止 (12)13AP1:3气阀 (12)13AP1:4马达驱动/制动 (13)13AP1:5脉冲生成器输入 (14)13AP1:6监测冷却水连接 (14)13AP1:7监测焊丝和气体 (15)13AP1:8CAN总线 (15)13AP1:9电弧电压感应 (16)13AP1:10推拉和I/O (16)13AP1部件位置 (17)CAN适配器选项 (19)MiggyTrac，RailTrac (19)带牵引电机的焊枪 (20)电路板布局、CAN适配器和过滤板(filter board) (20)连接说明 (21)遥控 (22)故障代码 (23)故障日志 (23)故障代码摘要 (23)故障代码描述 (24)维修说明 (26)什么是ESD？ (26)维修援助 (26)备件 (28)保留变更技术规范的权利，恕不另行通知。
请先阅读请先阅读保养和维修工作必须由有经验的人完成，而电气工作只能由经过培训的电工进行。
只有使用推荐的更换零件。
此维修手册适用于经过电气/电子培训的技术人员，对故障跟踪和维修相关工作很有帮助。
使用布线图作为操作描述的索引方式。
电路板被分成带有编号的方块，操作描述中将分别对各部分进行详细介绍。
部件描述中列出了布线图中的部件名称。
请以备件清单为向导，查找部件在设备中的位置。
备件清单在单独的文件中公布，请参阅本手册中的“备件清单”章节。
FPGA可编程逻辑器件芯片EP4SGX230KF40C3中文规格书
231–1 PRBS pattern This PRBS pattern (13)is based on the generator polynomial x 31+x 28 + 1For more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217•PMA Attribute Codes on page 2223.1.2. Receiver PMAThe receiver recovers the clock information from the received serial data, deserializes the high-speed serial data and creates a parallel data stream for either the receiver EHIP_LANE, EHIP_CORE, RS-FEC, or the FPGA core.The receiver portion of the PMA consists of the receiver buffer , the clock data recovery (CDR) unit, and the deserializer .3.1.2.1. Receiver BufferThe receiver buffer receives serial data from the input pins and feeds it to the clock data recovery (CDR) unit and deserializer .The receiver buffer supports the following features:•Programmable termination mode •Receiver equalizationFor more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217•PMA Attribute Codes on page 2223.1.2.1.1. Programmable Termination ModesTermination modes are programmable. However , the differential impedance values are fixed (as per the Ethernet standard specifications).The transceiver RX is AC-coupled on-chip. This on-chip AC-coupling capacitor cannot be bypassed, and DC-coupling protocols are not supported. For AC coupling requirement details, refer the Device Family Pin Connection Guidelines "E-Tile Pins"table.For more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217(13)This polynomial generates data patterns whose run lengths are up to 31 1s or 30 0s in a row.The pattern repeats every 231–1 bits (approximately 2.15 Gbits).3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send Feedback•PMA Attribute Codes on page 222•Intel Stratix 10 Device Family Pin Connection Guidelines •Intel Agilex Device Family Pin Connection Guidelines3.1.2.1.2. RX Adaptation ModesThe E-tile supports the initial and continuous adaptation modes.Table 41.E-Tile Receiver PMA RX Adaptation Modes ModeDescription Initial adaptation During initial adaptation, the adaptation engine adapts all of the RX analog front end (AFE) parameters to optimize the receiver eye opening and adjusts the vertical and horizontal sampling location accordingly.•This mode calibrates the PMA to known good settings.•It is disruptive tuning and impacts the data traffic.Run initial adaptation under either of the following conditions:•On device configuration. Refer to PMA Bring Up Flow for more detail.•When there is change in the physical channel between TX and RX.•During debug, when you switch back and forth between internal serial loopback and mission mode and the BER readout is exceptionally high, Intel recommends that you issue a PMA reset followed by loopback mode and initial adaptation.Continuous adaptationThe goal of this adaptation is to maintain the signal quality at the sampler close to the initial adaptation over time and temperature.•This mode is run only after running initial adaptation during PMA bring up.•This mode tracks the temperature over time by continuously adapting new values of the RX AFE parameters.•This mode is a continuous and non-disruptive process, that is, it does not impact the data traffic.•During a link debug process with the hard PRBS generator and verifier , you cannot read out accumulated errors from the error counter unless you stop continuous adaptation. Details on PMA code and value to stop continuous adaptation are available in the PMA Register Map .For more details on Register Read/Write support and programming, refer to PMA Receiver Equalization Adaptation Usage Model and 0x000A: Receiver Tuning Controls to configure these parameters.3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send FeedbackTable 42.PMA Parameter Description and RangeThis table lists all PMA parameters that can be optimized either manually or by the adaptation tuning engine.Some of these parameters are tuned by the adaptation tuning engine during initial adaptation and continuous adaptation as shown below. You can also manually specify some of these parameters. To avoid getting your manually optimized parameter overwritten by the adaptation tuning engine, you must fix the parameter . Refer to PMA Avalon Memory-Mapped Interface Registers and PMA Receiver Equalization Adaptation Usage Model to understand how the parameter can be fixed such that it is not overwritten by the adaptation engine.ParameterMin Max Initial Adaptation Continuous Adaptation Manual Optimization Possible Firmware Default GainLF015Yes Yes Yes 8CTLE LF Min015N/AN/A Yes 0CTLE LF Max015N/A N/A Yes 15GainHF015Yes Yes Yes 0CTLE HF min015N/A N/A Yes 0CTLE HF max015N/A N/A Yes 15GS103No No Yes 0GS203No No Yes 0RF_P2-10(14)10Yes No No 0RF_P2_MIN-10(14)10N/A N/A Yes -10RF_P2_MAX-10(14)10N/A N/A Yes 10RF_P1015Yes Yes No 0RF_P1_MIN015N/A N/A Yes 0RF_P1_MAX015N/A N/A Yes 15RF_P0-15(14)15Yes Yes No 0RF_B108Yes Yes Yes 0RF_B005Yes Yes Yes 0RF_B0T050No No Yes 0RF_A - NRZ100160No No Yes 160RF_A - PAM4100160No No Yes 130PMA Initial Adaptation Effort Status•0 = Low Effort (00_effort) is for NRZ Ethernet AN/LT and CPRI protocols only and is the quickest to complete. This meets the 500 ms compliance time for Ethernet and 100 ms compliance time for CPRI.• 1 = Medium Effort (05_effort) is for the PAM4 Ethernet AN/LT protocol only, to meet the IEEE link-up time of 3 seconds.•2 = Full Effort (10_effort) is for general usage (NRZ and PAM4), to provide the best performance and stability, but takes the most time to complete compared to other initial adaptation efforts. This is the recommended adaptation mode.See the "Loading PMA Configuration Register START_ADAPTATION" figure.(14)Two’s complement, 16-bits3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send Feedback。
REF3033AIDBZRG4中文资料
PRODUCT REF3012
PACKAGE-LEAD SO T23-3
"
REF3020
"
SOT23-3
"
DBZ
"
–40°C to +125°C
"
R30B
"
REF3025
"
SOT23-3
"
DBZ
"
–40°C to +125°C
"
R30C
"
REF3030
"
SOT23-3
"to +125°C
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
FEATURES
q MicroSIZE PACKAGE: SOT23-3 q LOW DROPOUT: 1mV q HIGH OUTPUT CURRENT: 25mA q HIGH ACCURACY: 0.2% q LOW IQ: 50µA max q EXCELLENT SPECIFIED DRIFT PERFORMANCE: 50ppm/°C (max) from 0°C to +70°C 75ppm/°C (max) from –40°C to +125°C
g4pf50w场效应管引脚定义
g4pf50w场效应管引脚定义
1）NPN型三极管，适合射极接GND集电极接负载到VCC的情况。
只要基极电压高于射极电压（此处为GND）0.7V，即发射结正偏（VBE为正），NPN型三极管即可开始导通。
基极用高电平驱动NPN型三极管导通（低电平时不导通）；基极除限流电阻外，更优的设计是，接下拉电阻10-20k到GND；优点是，①使基极控制电平由高变低时，基极能够更快被拉低，NPN型三极管能够更快更可靠地截止；②系统刚上电时，基极是确定的低电平。
（2）PNP型三极管，适合射极接VCC集电极接负载到GND的情况。
只要基极电压低于射极电压（此处为VCC）0.7V，即发射结反偏（VBE为负），PNP型三极管即可开始导通。
基极用低电平驱动PNP型三极管导通（高电平时不导通）；基极除限流电阻外，更优的设计是，接上拉电阻10-20k到VCC；优点是，①使基极控制电平由低变高时，基极能够更快被拉高，PNP型三极管能够更快更可靠地截止；②系统刚上电时，基极是确定的高电平。
对NPN三极管来说，最优的设计是，负载R12接在集电极和VCC之间。
不够周到的设计是，负载R12接在射极和GND之间。
对PNP三极管来说，最优的设计是，负载R14接在集电极和GND之间。
不够周到的设计是，负载R14接在集电极和VCC之间。
这样，就可以避免负载的变化被耦合到控制端。
从电流的方向
可以明显看出。
4054 中文说明书(2)
４０５４产品规格书拟稿审核批准TP4054 线性锂离子电池充电器描述TP4054是一款完整的单节锂离子电池采用恒定电流/恒定电压线性充电器。
其SOT 封装与较少的外部元件数目使得4054成为便携式应用的理想选择。
4054可以适合USB 电源和适配器电源工作。
由于采用了内部PMOSFET 架构，加上防倒充电路，所以不需要外部检测电阻器和隔离二极管。
热反馈可对充电电流进行调节，以便在大功率操作或高环境温度条件下对芯片温度加以限制。
充电电压固定于4.2V ，而充电电流可通过一个电阻器进行外部设置。
当充电电流在达到最终浮充电压之后降至设定值1/10时，4054将自动终止充电循环。
当输入电压（交流适配器或USB 电源）被拿掉时，4054自动进入一个低电流状态，将电池漏电流降至2uA 以下。
也可将4054置于停机模式，以而将供电电流降至45uA 。
4054的其他特点包括充电电流监控器、欠压闭锁、自动再充电和一个用于指示充电结束和输入电压接入的状态引脚。
特点 ·高达800mA 的可编程充电电流； ·无需MOSFET、检测电阻器或隔离二极管；·用于单节锂离子电池、采用SOT23-5封装的完整线性充电器；·恒定电流/恒定电压操作，并具有可在无过热危险的情况下实现充电速率最大化的热调节功能；·直接从USB 端口给单节锂离子电池充电； ·精度达到±1%的4.2V 预设充电电压； ·用于电池电量检测的充电电流监控器输出； ·自动再充电；·充电状态输出引脚； ·C/10充电终止；·待机模式下的供电电流为45uA； ·2.9V涓流充电器件版本； ·软启动限制了浪涌电流； ·采用5引脚SOT-23封装。
应用 ·蜂窝电话、PDA、MP3播放器； ·充电座； ·蓝牙应用。
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PD 91462B
IRG4PC30UD
INSULATED GATE BIPOLAR TRANSISTOR WITH UltraFast CoPack IGBT
ULTRAFAST SOFT RECOVERY DIODE
Features
C
• UltraFast: Optimized for high operating frequencies 8-40 kHz in hard switching, >200 kHz in resonant mode
Parameter
Min. Typ. Max. Units
Conditions
V(BR)CES Collector-to-Emitter Breakdown VoltageS 600 ∆V(BR)CES/∆TJ Temperature Coeff. of Breakdown Voltage ----
IGBT's . Minimized recovery characteristics require less/no snubbing • Designed to be a "drop-in" replacement for equivalent industry-standard Generation 3 IR IGBT's
Parameter Junction-to-Case - IGBT Junction-to-Case - Diode Case-to-Sink, flat, greased surface Junction-to-Ambient, typical socket mount Weight
Min. -------------------------
A
1
10
100
f, Frequency (kHz)
Fig. 1 - Typical Load Current vs. Frequency (Load Current = IRMS of fundamental)
IC , Collector-to-E mitter Current (A)
100
TJ = 25°C TJ = 150°C
• Industry standard TO-247AC package
Benefits
• Generation -4 IGBT's offer highest efficiencies available
• IGBT's optimized for specific application conditions • HEXFRED diodes optimized for performance with
VCE(on)
Collector-to-Emitter Saturation Voltage -------
----
VGE(th)
Gate Threshold Voltage
3.0
∆VGE(th)/∆TJ Temperature Coeff. of Threshold Voltage ----
gfe
VGE = 0V, IC = 1.0mA
IC = 12A
VGE = 15V
IC = 23A
See Fig. 2, 5
IC = 12A, TJ = 150°C
VCE = VGE, IC = 250µA
VCE = VGE, IC = 250µA
VCE = 100V, IC = 12A
VGE = 0V, VCE = 600V
Measured 5mm from package
VGE = 0V VCC = 30V
See Fig. 7
ƒ = 1.0MHz
TJ = 25°C See Fig.
TJ = 125°C 14 TJ = 25°C See Fig.
IF = 12A
TJ = 125°C 15 TJ = 25°C See Fig.
Typ. ----------0.24 ----6 (0.21)
Max. 1.2 2.5 -----40 ------
Units °C/W
g (oz)
1
12/30/00
元器件交易网
IRG4PC30UD
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Diode Peak Reverse Recovery Current
Diode Reverse Recovery Charge
Diode Peak Rate of Fall of Recovery During tb
---- 50 75 ---- 8.1 12 ---- 18 27 ---- 40 ------- 21 ------- 91 140 ---- 80 130 ---- 0.38 ------- 0.16 ------- 0.54 0.9 ---- 40 ------- 22 ------- 120 ------- 180 ------- 0.89 ------- 13 ------- 1100 ------- 73 ------- 14 ------- 42 60 ---- 80 120 ---- 3.5 6.0 ---- 5.6 10 ---- 80 180 ---- 220 600 ---- 180 ------- 120 ----
Parameter Collector-to-Emitter Voltage Continuous Collector Current Continuous Collector Current Pulsed Collector Current Q Clamped Inductive Load Current R Diode Continuous Forward Current Diode Maximum Forward Current Gate-to-Emitter Voltage Maximum Power Dissipation Maximum Power Dissipation Operating Junction and Storage Temperature Range Soldering Temperature, for 10 sec. Mounting Torque, 6-32 or M3 Screw.
• Generation 4 IGBT design provides tighter parameter distribution and higher efficiency than Generation 3
• IGBT co-packaged with HEXFREDTM ultrafast, ultra-soft-recovery anti-parallel diodes for use in bridge configurations
Max. 600 23 12 92 92 12 92 ± 20 100 42 -55 to +150
300 (0.063 in. (1.6mm) from case) 10 lbf•in (1.1 N•m)
Units V
A
V W °C
Thermal Resistance
RθJC RθJC RθCS RθJA Wt
Forward Transconductance T
3.1
ICES
Zero Gate Voltage Collector Current
----
----
VFM
Diode Forward Voltage Drop
----
----
IGES
Gate-to-Emitter Leakage Current
----
Min. Typ. Max. Units
Conditions
Qg Qge Qgc td(on) tr td(off) tf Eon Eoff Ets td(on) tr td(off) tf Ets LE Cies Coes Cres trr
Irr
Qrr
di(rec)M/dt
Total Gate Charge (turn-on) Gate - Emitter Charge (turn-on) Gate - Collector Charge (turn-on) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Switching Loss Turn-Off Switching Loss Total Switching Loss Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Switching Loss Internal Emitter Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Diode Reverse Recovery Time
4
0 0.1
IRG4PC30UD
Duty cycle: 50% TJ = 125°C Tsink = 90°C Gate drive as specified Turn-on losses include effec ts of revers e recovery Power D iss ipation = 24W
10
1
0.1 0.1
VGE = 15V 20µs PU LSE W ID TH A
1
10
VCE , C o lle ctor-to -Em itter Vo ltag e (V)
Fig. 2 - Typical Output Characteristics