High-k dielectrics and MOSFET characteristics

Abstract High dielectric constant materials have been investigated for gate dielectric applications. In this paper, various techniques (e.g. optimization of interfacial layer, N and Si incorporation and optimized profiles, forming gas anneal) for improving channel mobility, EOT scaling and reliability of high-K devices will he discussed. Introduction High dielectric constant materials have been studied for future gate dielectric application. However, there are still many unanswered questions and challenges (e.g. mobility degradation). Optimization of interfacial layer and hulk high-k layer is known to he important. Nitrogen incorporation into high-k dielectrics for improved thermal stability and immunity to impurity penetration has been proposed [ I , 21. However, the effects of Si and N, and the optimized profiles have not been studied in detail. In this paper, we will first address the effects of varying thickness of interfacial and hulk layers on channel mobility. Then, we will present the effects of N and S i incorporation on the materials and device characteristics. Finally we will discuss the effects of high-temperature forming gas anneals on dielectric reliability. Experiment Self-aligned MOSFETs with either TaN or polysilicon gates were fabricated via process steps summarized in Table 1. For some samples, an intentional interfacial layer was grown in NO ambient at 800°C. Hf02 or HfSiON was deposited using sputtering techniques followed by post-deposition anneal. In some dielectrics, a Si layer was inserted into HfON in order to vary the N profile. After S D formation, forming gas anneal was performed at 400-6OO'C for 30 min for some samples. This was then completed with AI metallization and patteming. Equivalent oxide thickness (EOT) of HfO2 was calculated from measured C-V characteristics with the deduction of the quantum mechanical and polysilicon depletion effects. Nitrogen incorporation was confirmed by x-ray photoelectron spectroscopy (XPS). The crystallinity of Hf02 was characterized by x-ray diffraction (XRD). Results and Discussion
Effects o Interfacial and High-K Layer Thickness on f MobiliQ Various thicknesses of oxide interface layer, which was grown by oxidation in NO ambient, and HfOl were intentionally introduced to study the effects of trapped charge on device characteristics and its location in the dielectrics. Fig. 1 illustrates that the accumulation capacitance increases as the thickness of oxide interface layer decreases with a fixed HfOz thickness. However, the calculated flathand voltage is nearly unchanged. On the other hand, VpB shifts positively with increasing H f 0 2 thickness and fixed interface layer thickness (Fig. 2). Furthermore, the channel mobility increases with increasing oxide interface thickness and decreases with increasing HfOl thickness (Fig. 3). The VFe results, along with the mobility degradation with increasing HfOz thickness, strongly infer that the fixed charge is primarily distributed throughout the Hf02 hulk layer. Thus, optimizing the thickness and minimizing the charge density of both the interface and Hf02 layer are foremost important in improving device performance. Si Layer Insertion in HfON Film Nitrogen incorporation is known to reduce impurity penetration, reduce reaction at the Si interface and allow EOT scaling. However, for HfON dielectrics, the amount of nitrogen incorporation is limited to low value due to N out-diffusion. Most of the incorporated nitrogen piles up at the HfONiSi interface; which leads to channel mobility degradation. MOSCAPs and MOSFET devices have been fabricated with an insertion of a Si layer into the HfON dielectrics. By inserting a Si layer at varying position of HfON, one can modulate the nitrogen profile and study its effects. The fabrication process is illustrated in Fig. 4. Since Si traps N and suppresses nitrogen out-diffusion, hulk nitrogen amount increases as the Si layer is placed further away from the substrate (i.e. XSj increases) (Fig. 5). As the result, thinner EOT can he achieved (Fig. 6). Furthermore, the normalized drive current (i.e. Id x CET) and the channel mobility depend on the profile as well as the amount of N incorporated. In this experiment, it was found that the normalized drive current was the highest when the Si insertion layer is at the middle of the dielectrics.
High-K Dielectrics and MOSFET Characteristics