Interduction to Infocom——Ch3-Lightwave Technology_2（林金桐）

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夜光灯塔说明书

LD-Series542,00048 HOUR RUN TIME29 FT. 2 IN.Night-Lite Pro IIKEY FEATURES■ SHO-HD® Lamp Fixture■ SLS Sequenced Light System ■ Gull-Wing Style Doors- Heavy-duty battery- Block heater (120 VAC)- Arctic hydraulic fluid- Fluid containment system (FCS)OPTIONSArctic PackageBalloon Light features the AirStar Flex diffusedlighting system using Allmand® exclusive bulbs.This system provides reduced glare while stillilluminating a large area.AirStar Package- LSC - Light Sequence Commander™automatically starts engine at sunset and shutsdown engine at sunrise - programmable- Emergency stop switch on exterior of machineLSC™ with E-Stop Package- Heated fuel/water separator- Radiator cover- Low fuel shut off systemArctic Max Package(only available with Arctic Package)NLPROLD-0617Holdrege, Nebraska 68949P: (800) 562-1373 • F: (308) 995-5887Reliability, Performance and Integrity.SINCE1938- Telematics Package- 2 in (50.8 mm) Bulldog® Coupler- Engine Air Intake Shut-O Valve- Custom Paint- Skid Mount Available on Standard SKUsckage)When it comes to managing a jobsite, you want equipment thatwill not fail you when you need it most. You’re looking for trustand reliability. Allmand® brings that to your jobsite, with over 75years of respected experience. Our focus on Service and Supportallows users to get the parts, technical service and support theyneed. Product innovation has helped us develop state-of-the-art towable jobsite equipment, bringing portable light towers,mobile industrial heaters, ﬂ ashing arrow boards, portable lightstands, portable air compressors and mobile generators for theconstruction, mining, oil & gas, and rental markets.WHY ALLMAND®。

2038-xx-SM-277701

Characteristics*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011. Speciﬁ cations are subject to change without notice.Customers should verify actual device performance in their speciﬁ c applications.Test Methods per ITU-T (CCITT) K.12 and IEEE C62.31Impulse Transverse Delay ...............................100 V/µs ............................................................< 50 ns Insulation Resistance (IR) ...............................100 V ................................................................> 109 Ω Glow Voltage ...................................................10 mA ................................................................~ 70 V Arc Voltage ......................................................1 A .....................................................................~ 10 V Glow-Arc Transition Current .......................................................................................................< 0.5 A Capacitance.....................................................1 MHz ...............................................................< 1 pF DC Holdover Voltage (NOTE 2) .........................135 V (80 V for Model 2038-15) .......................< 150 ms Impulse Discharge Current ..............................10000 A, 8/20 µs (NOTE 3) .................................1 operation min. 5000 A, 8/20 µs .................................................> 10 operations 200 A, 10/1000 µs .............................................> 300 operations 200 A, 10/700 µs ..............................................> 500 operations 10 A, 10/1000 µs ..............................................> 1500 operations Alternating Discharge Current .........................10 Arms, 1 s (NOTE 3) ........................................1 operation min. 5 Arms, 1 s ........................................................> 10 operations Operating Temperature ............................................................................................................... -40 to +90 °C Climatic Category (IEC 60068-1)................................................................................................ 40/90/21Notes:• 2038-35 UL Recognized , ﬁ le E153537, 2038-110 CSA Approved , ﬁ le LR93265 (UL 1449).• The rated discharge current for Mini-TRIGARD™ GDTs is the total current equally divided between each line to ground.• Surface Mount (SM) parts may show a temporary increase in DCBD after the solder reﬂ ow process. Most devices will recoverwithin 24 hours time. It should be noted that there is no quality defect nor change in protection levels during the temporary change in DCBD.• Sparkover limits after life ±30 %. IR >108 Ω.• Operating characteristics per RUS PE-80 and Telcordia GR 1361 available on request.• At delivery AQL 0.65 Level II, DIN ISO 2859.1 Line to Line DC Sparkover tolerance typically less than +30 % at 100 V/s.2 Network applied.3 DC Sparkover may exceed ±30 % but will continue to protect without venting.CharacteristicModel No.2038-15-SM2038-20-SM2038-23-SM2038-30-SM2038-35-SMDC Sparkover ± 25 % @ 100 V/s L1/L2 to Gnd (NOTE 1)150 V 200 V 230 V 300 V 350 VTypical Impulse Sparkover L1/L2 to Gnd 100V/μs 1000V/μs 350 V 500 V 425 V 575 V 450 V 600 V 500 V 650 V 600 V 750 V high energy-handling capability, long and stable life performance and low capacitance of less than 1 pF. The 2038 series breakdownvoltages are nearly equal line to line as well as line to ground. Bourns ® Gas Discharge Tubes (GDT) are designed to prevent damage from transient disturbances by acting as a “crowbar” in creating a virtual short-to-ground circuit during conduction. When an electrical surge exceeds the deﬁ ned breakdown voltage level of the GDT, the gas becomes ionized and rapid conduction takes place. When the surge passes and the system voltage returns to normal levels, the GDT returns to its high-impedance (off) state.CharacteristicModel No.2038-42-SM2038-47-SM2038-60-SM2038-80-SM2038-110-SMDC Sparkover ± 25 % @ 100 V/s L1/L2 to Gnd (NOTE 1)420 V 470 V 600 V 800 V 1100 VTypical Impulse Sparkover L1/L2 to Gnd 100V/μs 1000V/μs675 V 850 V 750 V 950 V 850 V 1100 V 1150 V 1400 V 1500 V 1700 V*R o H S C O M P L I A N T V E R S I O N S A V A I L A B L ESpeciﬁ cations are subject to change without notice.Customers should verify actual device performance in their speciﬁ c applications.Product DimensionsHow to Order2038 - xx - SM - RP LFModel Number Designator Voltage (Divided by 10)Surface MountPackaging Options*Blank = Bulk Packaging (Standard)RP = Reelpack - 1000 pcs./reel (Optional) RP2 = Reelpack - 1000 pcs./reel (Optional)RoHS Compliant Option Blank = Standard ProductLF = RoHS Compliant Product*The optional -RP & -RP2 reelpacks contain 1000 pcs./reel. The reels are 330 mm (13 inches) in diameter. The -RP reelpack is 18 mm (0.71 inches) wide. The -RP2 reelpack is 26 mm (1.02 inches) wide.Recommended Pad LayoutDIMENSIONS:MM(INCHES)Packaging Speciﬁ cationsThe Model 2038-xx-SM ships standard bulk pack, 100 pieces per bag.The optional -RP & -RP2 reelpacks contain 1000 pcs./reel. The reels are 330 mm (13 inches) in diameter. The -RP reelpack is 18 mm (0.71 inches) wide. The -RP2 reelpack is 26 mm (1.02 inches) wide.Speciﬁ cations are subject to change without notice.Customers should verify actual device performance in their speciﬁ c applications.-RP-RP2.13(.005)TOLERANCES:UNLESS OTHERWISE NOTEDDIMENSIONS:MM(INCHES)REV. I 12/12Mouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:B ourns:2038-15-SM-RPLF。

MMBT3906 40V PNP 小信号晶体管 SOT23 数据手册说明书

MMBT3906Features• Epitaxial Planar Die Construction• Ideal for Medium Power Amplification and Switching • Complementary NPN Type: MMBT3904• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) • Halogen and Antimony Free. “Green” Device (Note 3) • Qualified to AEC-Q101 Standards for High Reliability • PPAP Capable (Note 4)Mechanical Data• Case: SOT23• Case Material: Molded Plastic, “Green” Molding Compound UL Flammability Classification Rating 94V-0 • Moisture Sensitivity: Level 1 per J-STD-020 • Terminals: Finish—Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 •Weight: 0.008 grams (Approximate)Ordering Information (Notes 4 & 5)Product Status Compliance Marking Reel Size (inches)Tape Width (mm)Quantity per ReelMMBT3906-7-F Active AEC-Q101 K3N 7 8 3000 MMBT3906Q-7-F Active Automotive K3N 7 8 3000 MMBT3906Q-13-F Active Automotive K3N 13 8 10,000 MMBT3906-13-FActive AEC-Q101 K3N 13 8 10,000Notes:1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.2. See https:///quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.4. Automotive products are AEC-Q101 qualified and are PPAP capable. Refer to https:///quality/.5. For packaging details, go to our website at /products/packages.html.Marking InformationDate Code KeyYear 2015 2016 2017 2018 2019 2020 2021 2022 CodeC DE F G HI JTop ViewSOT23Device SymbolTop View Pin-OutK3NY MK3N = Product Type Marking Code YM = Date Code Marking Y or Y = Year (ex: E= 2017)M or M = Month (ex: 9 = September)Absolute Maximum Ratings(@T A = +25°C, unless otherwise specified.)Thermal Characteristics(@T A = +25°C, unless otherwise specified.)Characteristic Symbol Value UnitPower Dissipation (Note 6)P D310mW (Note 7) 350Thermal Resistance, Junction to Ambient (Note 6)RϴJA403°C/W (Note 7) 357Thermal Resistance, Junction to Leads (Note 8) RϴJL350 °C/W Operating and Storage Temperature Range T J,T STG-55 to +150 °CNotes: 6. For a device mounted on minimum recommended pad layout 1oz copper that is on a single-sided FR4 PCB; the device is measured under still air conditions while operating in a steady-state.7. Same as Note 6 except the device is mounted on 15 mm × 15mm 1oz copper.8. Thermal resistance from junction to solder-point (at the end of the leads).9. Refer to JEDEC specification JESD22-A114 and JESD22-A115.Thermal Characteristics and Derating InformationTransient Therm al Im pedancePulse Width (s)Pulse Power DissipationPulse Width (s)MElectrical Characteristics(@T A = +25°C, unless otherwise specified.)Note: 10. Measured under pulsed conditions. Pulse width ≤ 300µs. Duty cycle ≤ 2%.Typical Electrical Characteristics (@T A = +25°C, unless otherwise specified.)h , D C C U R R E N T G A I NF E I , COLLECTOR CURRENT (mA)Figure 1 Typical DC Current Gainvs. Collector CurrentC V , C O L L E C T O R -E M I T T E R S A T U R A T I O N V O L T A G E (V )C E (S A T )I , COLLECTOR CURRENT (mA)Figure 2 Typical Collector-Emitter Saturation Voltagevs. Collector CurrentC 0.1110V , B A S E -E M I T T E R (V )B E (S A T )S A T U R A T I O N V O L T A G E I , COLLECTOR CURRENT (mA)Figure 3 Typical Base-Emitter Saturation Voltagevs. Collector CurrentC 100C A P A C I T A N C E (p F )V , REVERSE VOLTAGE (V)Figure 4 Typical Capacitance Characteristics RPackage Outline DimensionsPlease see /package-outlines.html for the latest version.SOT23SOT23Dim Min Max Typ A 0.37 0.51 0.40 B 1.20 1.40 1.30 C 2.30 2.502.40 D 0.89 1.03 0.915 F 0.45 0.60 0.535 G 1.78 2.05 1.83 H 2.803.00 2.90 J 0.013 0.10 0.05 K 0.890 1.00 0.975 K1 0.903 1.10 1.025 L 0.45 0.61 0.55 L1 0.25 0.55 0.40 M 0.085 0.150 0.110 a 0° 8° -- All Dimensions in mmSuggested Pad LayoutPlease see /package-outlines.html for the latest version.SOT23。

英特尔 DCI 用户指南说明书

Debugging via Intel® DCI User´s GuideRelease 02.2023Debugging via Intel® DCI User´s GuideTRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Documents ......................................................................................................................Intel® DCI [Direct Connect Interface] ..........................................................................................Debugging via Intel® DCI User´s Guide (1)Introduction (4)4-wire DCI OOB4 DCI OOB Hardware6 DCI DbC7 Target System Requirements8 Related Documents8Start a TRACE32 Session using Intel® DCI (9)Prepare Your Target9 Connecting to an Intel® SoC using DCI OOB9 Connecting to an Intel® Client or Server System using DCI OOB10 Connecting to an Intel® SoC using DCI DbC11 Connecting to an Intel® Client or Server System using DCI DbC12Troubleshooting (13)DCI error: no response to connect pattern13 Could not stop the target13 Target Power Fail13Intel® DCI Specific Commands (14)DCI Commands to configure the Intel® DCI trace handler14 DCI.DESTination Set trace destination14 DCI.ON Enable trace handler14 DCI.OFF Disable trace handler15 SYStem.DCI Intel® DCI specific SYStem commands16 SYStem.DCI.Bridge Select DCI bridge16 SYStem.DCI.BssbClock Configure DCI OOB clock rate16 SYStem.DCI.CKDIrouting Routing of the CK and DI signals17 SYStem.DCI.DisCONnect Force DCI disconnect17 SYStem.DCI.DOrouting Routing of the DO signals18 SYStem.DCI.PortPower Configure VBUS19 SYStem.DCI.TimeOut Configure timeouts of internal operations20Intel® DCI Specific Functions (21)In This Section21 SYStem.DCI.Bridge()Currently selected DCI bridge21 SYStem.DCI.BssbClock()Currently selected DCI OOB clock21 SYStem.DCI.TIMEOUT()Timeouts of internal operations22Debugging via Intel® DCI User´s GuideVersion 10-Feb-2023 IntroductionThe Intel® Direct Connect Interface (DCI) allows debugging of Intel® targets using the USB3 port. The technology supports debugging via the USB Stack (DCI DbC) as well as a dedicated protocol using a USB3 connector only (DCI OOB).4-wire DCI OOBDCI OOB uses a special protocol on the USB3 pins. This makes the mode independent of the actual USB implementation on the target board. This allows debugging of cold boot scenarios, reset flows, and sleep states.A BThe figure above illustrates a typical setup. A Power Debug Module with a CombiProbe and a Whisker Cable DCI OOB (LA-4515) [A] is connected to the debug host running TRACE32 PowerView. On the target side the Whisker Cable DCI OOB connects to a USB port of the target system using a short USB cable [B].TRACE32 sends DCI commands encoded in the DCI OOB protocol to the target system. In the target system the commands are decoded by the OOB module and forwarded to the DCI module where they are translated to JT AG sequences. These JT AG sequences allow to access the internal T AP of the SoC/PCH as well as externally connected JT AG devices (e.g., the CPU of a client or server system).T race data can be exported through the DCI module and recorded by the CombiProbe.DCI OOB HardwareIn the following the available DCI OOB hardware is shown.Whisker Cable DCI OOB for CombiProbe Version 1Whisker Cable DCI OOB for CombiProbe Version 2A USB cable to target system D USB connector for target system B VBUS jumper E 34-pin expansion connector (proprietary)C Cable to CombiProbeA USB cable to target system D USB connector for target system B VBUS sliderE 34-pin expansion connector (proprietary)C Cable to CombiProbeABCEDABCDEDCI DbCDCI DbC allows debugging using the OS USB stack.The figure above illustrates a typical setup. TRACE32 only runs on the debug host. The target system connects to the debug host using a USB cable.TRACE32 sends DCI commands encoded in the USB protocol to the target system using libusb and the USB Stack of the operating system. In the target system the commands are decoded by the USBimplementation and forwarded to the DCI module where they are translated to JT AG sequences. These JT AG sequences allow to access the internal T AP of the SoC/PCH as well as externally connected JT AG devices (e.g., the CPU of a client or server system).T race data can be directly exported via USB and recorded by TRACE32 on the debug host. DCI DbC also provides a DMA capability for fast download of the system RAM. Support of these capabilities by TRACE32 depends on the used target system.For using DCI DbC, please observe the “System Requirements” (usbdebug_user.pdf).Target System RequirementsFor debugging using Intel® DCI your target system must fulfill the following:•The BIOS must enable DCI debugging or provide a user option to do so. Please contact your BIOS manufacturer to clarify if your BIOS conforms to the Intel® BIOS Writer's Guiderequirements for DCI support.•For using DCI OOB, the USB part of your target system must be electrically designed such that DCI OOB signaling is not blocked. This is of special importance for USB Type-C solutions.Details about these requirements can be found in the appropriate Intel® Platform Design Guide.Related Documents•“Intel® x86/x64 Debugger” (debugger_x86.pdf)•“Debugging via USB User´s Guide” (usbdebug_user.pdf)Start a TRACE32 Session using Intel ® DCIPrepare Your TargetIrrespective of which DCI variant is used, debugging via DCI needs to be activated in the BIOS of the target system first. Please contact your BIOS manufacturer for instructions.Connecting to an Intel ® SoC using DCI OOB1.Connect your TRACE32 hardware and start the TRACE32 software, as described in “Starting a TRACE32 PowerView Instance” (training_debugger_x86.pdf).2.For SoCs configure the CPU, e.g., by executing the following command:3.Establish the debug connection:On a successful connect, the TRACE32state line displays “running” or “cpu power down”:You are now ready to debug the x86 core using DCI OOB. For information on how to continue, please refer to:•“Training Basic SMP Debugging for Intel® x86/x64” (training_debugger_x86.pdf) or •“Intel® x86/x64 Debugger” (debugger_x86.pdf)SYStem.CPU APOLLOLAKESYStem.AttachConnecting to an Intel ® Client or Server System using DCI OOB1.Connect your TRACE32 hardware and start the TRACE32 software, as described in “Starting a TRACE32 PowerView Instance” (training_debugger_x86.pdf).2.For client or server systems configure CPU, PCH, and core number e.g.:The results are displayed in the AREA.view window:3.Establish the debug connection:On a successful connect, the TRACE32state line displays “running” or “cpu power down”:You are now ready to debug the x86 core using DCI OOB. For information on how to continue, please refer to:•“Training Basic SMP Debugging for Intel® x86/x64” (training_debugger_x86.pdf) or •“Intel® x86/x64 Debugger” (debugger_x86.pdf)SYStem.CONFIG PCH SUNRISEPOINT SYStem.DETECT CPU SYStem.DETECT CORESSYStem.AttachConnecting to an Intel ® SoC using DCI DbC1.Install the target USB driver and start a TRACE32 session for USB debugging as described in “Debugging via USB User´s Guide” (usbdebug_user.pdf).2.For SoCs configure the CPU, e.g., by executing the following command:3.Select the IntelUSB0 debug port and configure the USB parameters for the debug connection, e.g., by executing the following commands:In this example, “1.” is the number of the debug enabled interface, “0x8087” is the vendor ID of the target system and “0x0A73” is the product ID of the target system.These parameters can be determined interactively as described in “Select a USB Device via the GUI” (usbdebug_user.pdf). For details, please refer to B .4.For tracing via DbC, add the configuration for the trace interface, e.g.:5.For using DMA via DbC, add the configuration for the DMA interface, e.g.:6.Establish the debug connection:On a successful connect, the TRACE32 state line displays “running” or “cpu power down”:You are now ready to debug the x86 core using DCI DbC. For information on how to continue, please refer to:•“Training Basic SMP Debugging for Intel® x86/x64” (training_debugger_x86.pdf) or •“Intel® x86/x64 Debugger” (debugger_x86.pdf)SYStem.CPU APOLLOLAKESYStem.CONFIG DEBUGPORT IntelUSB0SYStem.CONFIG USB SETDEVice Debug 1. 0x8087 0x0A73SYStem.CONFIG USB SETDEVice Trace 2. 0x08087 0x0A73SYStem.CONFIG USB SETDEVice DMA 3. 0x08087 0x0A73SYStem.AttachConnecting to an Intel ® Client or Server System using DCI DbC1.Install the target USB driver and start a TRACE32 session for USB debugging as described in “Debugging via USB User´s Guide” (usbdebug_user.pdf).2.Configure the PCH your board is using, e.g., by executing the following command:3.Configure the USB parameters for the debug connection, e.g., by executing the following commands:In this example, “1.” is the number of the debug enabled interface, “0x8087” is the vendor ID of the target system and “0x0A73” is the product ID of the target system.These parameters can be determined interactively as described in “Select a USB Device via the GUI” (usbdebug_user.pdf). For details, please refer to B .4.Run the following commands to detect CPU and core number automatically:The results are displayed in the AREA.view window:5.Establish the debug connection:On a successful connect, the TRACE32 state line displays “running” or “cpu power down”:You are now ready to debug the x86 core using DCI DbC. For information on how to continue, please refer to:•“Training Basic SMP Debugging for Intel® x86/x64” (training_debugger_x86.pdf) or •“Intel® x86/x64 Debugger” (debugger_x86.pdf)SYStem.CONFIG PCH SUNRISEPOINTSYStem.CONFIG DEBUGPORT IntelUSB0SYStem.CONFIG USB SETDEVice Debug 1. 0x8087 0x0A6ESYStem.DETECT CPU SYStem.DETECT CORESSYStem.AttachTroubleshootingThe following describes some possible error scenarios, along with suggestions how to resolve them: DCI error: no response to connect patternTRACE32 did not receive any response from the target.•Make sure the USB cable is connected to a DCI enabled USB port.•Make sure DCI is enabled in the BIOS of the target system.•Configure the DO-Routing manually. For details, see SYStem.DCI.DOrouting.•In case you are using a USB Type-C connector, try flipping the plug.•Consider removing common mode chokes in the USB path.Could not stop the targetTRACE32 could not halt the processor, but the DCI connection is working.•Make sure debugging is enabled in the BIOS of the target system.Target Power FailUsing DCI TRACE32 cannot detect whether the target system is powered. Thus all connection losses are interpreted as power fails. In case you are encountering target power fails, but your target system ispowered:•Try a lower DCI OOB clock. For details, see SYStem.DCI.BssbClock.•Consider removing common mode chokes in the USB path.Intel® DCI Specific CommandsDCI Commands to configure the Intel® DCI trace handlerThe Intel® DCI trace handler is a hardware module of the Intel® DCI implementation on the target system.This module is responsible for forwarding trace data coming from the Intel® T race Hub to a DCI transport.The DCI command group allows expert control of this hardware module. If using the Intel® T race Hub commands this configuration is done automatically (see ITH commands).See also■ DCI.DESTination ■ DCI.OFF ■ DCI.ON ■ SYStem.DCIDCI.DESTination Set trace destination Format:DCI.DESTination [OOB | DBC]Configures to which destination the trace data is routed.OOB (default)Stream the trace data to the Intel® DCI OOB interface.DBC Stream the trace data to the Intel® DCI DbC interface (USB).See also■ DCIDCI.ON Enable trace handler Format:DCI.ONEnables the trace handler.See also■ DCIDCI.OFF Disable trace handler Format:DCI.OFFDisables the trace handler.See also■ DCISYStem.DCI Intel® DCI specific SYStem commandsUsing the SYStem.DCI command group, you can configure target properties as well as the DCI OOB hardware.See also■ SYStem.DCI.Bridge ■ SYStem.DCI.BssbClock ■ SYStem.DCI.CKDIrouting ■ SYStem.DCI.DisCONnect ■ SYStem.DCI.DOrouting ■ SYStem.DCI.PortPower ■ SYStem.DCI.TimeOut ■ SYStem.state■ DCI❏ SYStem.DCI.Bridge() ❏ SYStem.DCI.BssbClock()▲ ’Intel® DCI Specific Functions’ in ’Debugging via Intel® DCI User´s Guide’SYStem.DCI.BridgeSelect DCI bridgeConfigures TRACE32 for the specific DCI bridge implementation used in your system. For known Intel ® SoCs and PCHs this setting is done automatically based on CPU/PCH settings.See also ■ SYStem.DCI❏ SYStem.DCI.Bridge()SYStem.DCI.BssbClockConfigure DCI OOB clock rateConfigures the operating frequency used by the TRACE32 DCI OOB hardware. The maximum frequency is 100 MHz. Format:SYStem.DCI.Bridge <bridge_name>Format:SYStem.DCI.BssbClock <frequency> [<slow_frequency>]<frequency>Frequency during normal operation. Default: 100MHz.<slow_frequency>Frequency used during connect and during low power phases. The default is based on the selected platform.Example: Set frequency to 50 MHz.SYStem.DCI.BssbClock 50.MHzSee also■ SYStem.DCI ❏ SYStem.DCI.BssbClock()SYStem.DCI.CKDIrouting Routing of the CK and DI signals Format:SYStem.DCI.CKDIrouting [STRAIGHTthrough | CROSSover] Configures how the CK and DI signals are mapped to the super speed rx signals on the USB 3 connector of the target. This configuration option is available for 4-wire DCI OOB only. The configuration must be set before trying to connect.STRAIGHTthrough The signals CK and DI are routed in compliance with the Intel DCIspecification. Set if the rx signals are connected one-to-one from the chipto the USB port.CROSSover The signals CK and DI are routed contrary to the Intel DCI specification.Set if the rx signals are connected cross-over from the chip to the USBport.See also■ SYStem.DCISYStem.DCI.DisCONnect Force DCI disconnect Format:SYStem.DCI.DisCONnectT erminates the low-level DCI connection.Normally TRACE32 will manage the connect and disconnect of the DCI connection used for the debug session automatically. However, in some cases explicit termination of the DCI connection is required, e.g., when TRACE32 is used together with the T32 Remote API.NOTE:SYStem.DCI.DisCONnect will not care about the overall state of your debugsession before disconnecting.T o avoid problems, execute SYStem.Down on all TRACE32 instances beforeexecuting this command.See also■ SYStem.DCISYStem.DCI.DOrouting Routing of the DO signals Format:SYStem.DCI.DOrouting [AUTO | STRAIGHTthrough | CROSSover] Configures how the DO signal pair is mapped to the super speed tx signals on the USB 3 connector of the target. This configuration option is available for 4-wire DCI OOB only. The configuration must be set before trying to connect.AUTO (default)TRACE32 tries to detect the routing automatically.STRAIGHTthrough The signals DO+ and DO- are routed in compliance with the Intel DCIspecification. Set if the tx signals are connected one-to-one from the chipto the USB port.CROSSover The signals DO+ and DO- are routed opposed to the Intel DCIspecification. Set if the tx signals are connected cross-over from the chipto the USB port.See also■ SYStem.DCISYStem.DCI.PortPower Configure VBUS Format:SYStem.DCI.PortPower <mode><mode>:OFFDISchargeSDPCDPDCPAUTODCPBC12DCPDIVSome TRACE32 DCI OOB hardware can drive the VBUS pin of the USB port from the debugger and emulate a USB charging port.Preconditions:•Base module is PowerDebug USB3.0 or PowerDebug Pro.•“Whisker Cable DCI OOB for CombiProbe Version 2”, page 6.•The yellow slider on the CombiProbe Whisker must be set to on.The following modes are available:OFF (default)Do not drive VBUS.DIScharge Discharge VBUS.SDP Standard Downstream Port according to the USB2.0 specification.CDP Charging Downstream Port according to the USB 2.0 BC1.2specification.DCPauto Dedicated Charging PortIn this mode the used DCP scheme is automatically detected.DCPBC12Dedicated Charging Port according to USB 2.0 BC1.2 specification.DCPDIV Dedicated Charging Port - Divider ModeD+ and D- of the USB port are driven to 2V and 2.7V, respectively.See also■ SYStem.DCISYStem.DCI.TimeOut Configure timeouts of internal operations Format:SYStem.DCI.TimeOut <operation> <time><operation>:SETtingsJTAGPMChandshakeConfigure the timeout for certain internal operations. Do not change unless instructed to do so by the Lauterbach support.The current value can be obtained using the SYStem.DCI.TimeOut() function.See also■ SYStem.DCI ❏ SYStem.DCI.TIMEOUT()Intel ® DCI Specific Functions In This SectionSee also■ SYStem.DCI ❏ SYStem.DCI.Bridge() ❏ SYStem.DCI.BssbClock() ❏ SYStem.DCI.TIMEOUT() SYStem.DCI.Bridge()Currently selected DCI bridge [build 68208 - DVD 09/2016]Returns the name of the currently selected DCI bridge. The bridge is selected with the SYStem.DCI.Bridge command.Return Value Type : String .Example :SYStem.DCI.BssbClock()Currently selected DCI OOB clock [build 68208 - DVD 09/2016]Returns the value of the current DCI OOB clock rate. The clock rate is configured with the SYStem.DCI.BssbClock command.Parameter Type : String .Return Value Type : Decimal value .Syntax:SYStem.DCI.Bridge() PRINT SYStem.DCI.Bridge()Syntax:SYStem.DCI.BssbClock(<clock_name>) <clock_name>:ACTIVE | DEFault | SLOW ACTIVEThe currently active DCI OOB clock. DEFaultThe value of the DCI OOB clock used during normal operation.SLOW The value of the DCI OOB clock used during connect and low powerphases.Example:PRINT SYStem.DCI.BssbClock(ACTIVE)SYStem.DCI.TIMEOUT()Timeouts of internal operations[build 79617 - DVD 02/2017] Syntax:SYStem.DCI.TIMEOUT(<operation>)<operation>:JTAG | SETtings | PMChandshakeReturns the current timeout of an internal operation. The timeout can be configured using theSYStem.CONFIG DCI.TimeOut command.Parameter Type: String.Return Value Type: Time value.。

NORMA 4000 5000 Power Analyzer 用户说明手册说明书

Since some countries or states do not allow limitation of the term of an implied warranty, or exclusion or limitation of incidental or consequential damages, the limitations and exclusions of this warranty may not apply to every buyer. If any provision of this Warranty is held invalid or unenforceable by a court or other decision-maker of competent jurisdiction, such holding will not affect the validity or enforceability of any other provision.
BEGRENZTE GEWÄHRLEISTUNG UND HAFTUNGSBESCHRÄNKUNG
Fluke gewährleistet, daß jedes Fluke-Produkt unter normalem Gebrauch und Service frei von Material- und Fertigungsdefekten ist. Die Garantiedauer beträgt 2 Jahre ab Versanddatum. Die Garantiedauer für Teile, Produktreparaturen und Service beträgt 90 Tage. Diese Garantie wird ausschließlich dem Erster

智能融合cSoC：多通道FFT共享处理器使用FPGA纤维说明书

Application Note AC381February 20121© 2012 Microsemi Corporation SmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA FabricTable of ContentsIntroductionThe SmartFusion ® customizable system-on-chip (cSoC) device integrates FPGA technology with a hardened ARM ® Cortex™-M3 processor based microcontroller subsystem (MSS) and programmable high-performance analog blocks built on a low power flash semiconductor process. The MSS consists of hardened blocks such as a 100 MHz ARM Cortex-M3 processor, peripheral direct memory access (PDMA), embedded nonvolatile memory (eNVM), embedded SRAM (eSRAM), embedded FlashROM (eFROM), external memory controller (EMC), Watchdog Timer, the Philips Inter-Integrated Circuit (I 2C),serial peripheral interface (SPI), 10/100 Ethernet controller, real-time counter (RTC), GPIO block, fabric interface controller (FIC), in-application programming (IAP), and analog compute engine (ACE).The SmartFusion cSoC device is a good fit for applications that require interface with many analog sensors and analog channels. SmartFusion cSoC devices have a versatile analog front-end (AFE) that complements the ARM Cortex-M3 processor based MSS and general-purpose FPGA fabric. The SmartFusion AFE includes three 12-bit successive approximation register (SAR) ADCs, one first order sigma-delta DAC (SDD) per ADC, high performance signal conditioning blocks, and comparators. The SmartFusion cSoCs have a sophisticated controller for the AFE called the ACE. The ACE configures and sequences all the analog functions using the sample sequencing engine (SSE) and post-processes the results using the post processing engine (PPE) and handles without intervention of Cortex-M3 processor.Refer to the SmartFusion Programmable Analog User’s Guide for more details.This application note describes the capability of SmartFusion cSoC devices to compute the Fast Fourier Transform (FFT) in real time. The Multi Channel FFT example design can be used in medical applications, sensor network applications, multi channel audio Spectrum analyzers, Smart Metering, and sensing applications (such as vibration analysis).This example design uses the Cortex-M3 processor in the SmartFusion MSS as a master and the FFT processor in the FPGA fabric as a slave. All three of the SmartFusion cSoC A2F500’s ADCs are used for data acquisition. The example design uses Microsemi’s CoreFFT IP and the advanced peripheral bus interface (CoreAPB3). A custom-made APB3 interface has been developed to connect CoreFFT with the MSS via CoreAPB3. The Cortex-M3 processor uses the PDMA controller in the MSS for the data transfer and thus helps to free up the Cortex-M3 processor instruction bandwidth.A basic understanding of the SmartFusion design flow is assumed. Refer to Using UART with SmartFusion - Microsemi Libero ® SoC and SoftConsole Flow Tutorial to understand the SmartFusion design flow.Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Design Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Design Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Implementing Multi Channel FFT on EVAL KIT BOARD . . . . . . . . . . . . . . . . . . . . . . . . . 7Running the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Appendix A – Design Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10SmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA Fabric2Design OverviewThis design example demonstrates the capability of the SmartFusion cSoC device to compute the FFT for multiple data channels. The FFT computation is a complex task that utilizes extensive logic resources and computation time. In general, for N number of channels, N number of FFT IP’s are needed to be instantiated, which in turn utilize more logic resources on the FPGA. A way to avoid this limitation is to use the same FFT logic for multiple input channels.This design illustrates the implementation of a Multichannel FFT to process multiple data channels through a single FFT and store FFT points in a buffer. The FFT computes the input data read from each channel and stores the N-point result in the respective channel’s allocated buffer. The channel multiplexing is done once each channel buffer has been loaded with the FFT length.Computing frequency components for a real time data of six channels is described in this application note. For sampling the input signals the AFE is used and the complex FFT computation is implemented in the fabric of the SmartFusion cSoC device. The Cortex-M3 processor in the MSS of the SmartFusion cSoC handles the buffer management and channel muxing.Figure 1 depicts the block diagram of six channel FFT co-processor in FPGA fabric.Design DescriptionThe design uses CoreFFT for computing the FFT results. You can download the core generator for CoreFFT at /soc/portal/default.aspx?r=4&p=m=624,ev=60.The design example uses a 512-point and 16-bit FFT. A custom-made APB3 interface has been developed to connect CoreFFT IP with the MSS’s FIC. The CoreFFT output data is stored in a 512x32FIFO within the fabric. The FIFO status signals are given in Table 1 on page 3. The status signals indicate that FFT is ready to receive data and data is available in the output of FIFO. These status signals are mapped to the GPIOs in the MSS. The Cortex-M3 processor can read the GPIOs to handle flow control in the data transfer process from the MSS to CoreFFT.Figure 1 • Multi Channel FFT Block DiagramDesign Description3Figure 2 shows the block diagram of logic in the fabric with custom-made APB3 bus.The data valid signal (ifiD_valid) is generated in custom logic whenever the master needs to write data into the input buffer of the FFT to process through the APB3 interface. The FFT_IP_RDY signal indicates the status of the input buffer of the FFT. If the input buffer is full, the FFT_IP_RDY goes low. The master can read the FFT_IP_RDY signal to get the FFT input buffer status. The FFT generates the processed data with a data valid signal (ifoY_valid). The processed data is stored in the FIFO. When FIFO is not ready to receive output data, it can stop the data fetching from the FFT by pulling down the ifiRead_y signal. The status signal FFT_OP_RDY is used to indicate to the master that processed data is available in the FIFO. FFT_OP_RDY goes High whenever processed data is available in the FFT output buffer.The master can use AEMPTY_OUT or EMPTY_OUT to determine whether the FIFO is empty and all the processed data has been read. Refer to the CoreFFT Handbook for more details on architecture and interface signal descriptions.Three ADCs are configured to have two channels, each channel with 100 ksps sampling rate. The external memory is used for input and output buffers. For each channel, one input buffer having length double to the length of FFT i.e. 1024 words and one output buffer having length equal to the length of FFT i.e. 512 words are used. After each channel's input buffer has 512 points required for the full length of the FFT, each channel, one after the other, streams its points from the FIFO through the FFT. During the FFT computational period, the sampled data values of each channel are stored in the second half of the input buffer. Once the FFT computations for the First half of input buffer completes then the points in the second half of the input buffer will be streamed to FFT. This operation utilizes a ping-pong method. The Cortex-M3 processor is used for data management, that is, buffering the sampled points and data routing or muxing of these values to the FFT computation block. Sampling of the real time data is done by the ACE. The PDMA handles the data transfer between the external SRAM (eSRAM) buffers and CoreFFT logic in FPGA fabric.Figure 2 • CoreFFT with APB Slave InterfaceTable 1 • FIFO Status Signals with DescriptionsSignalDescription FFT_IP_RDYFFT is ready to receive the Input from the master processor FFT_OP_RDYProcessed data is ready in output buffer of FFT AEMPTY_OUTOutput FIFO is almost empty EMPTY_OUT Output FIFO is emptySmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA Fabric4Figure 3 shows the implementation of multi channel FFT on the SmartFusion cSoC device.Hardware ImplementationThe MSS is configured with an FIC, clock conditioning circuit (CCC), GPIOs, EMC and a UART. The CCC generates 80 MHz clock, which acts as the clock source. The FIC is configured to use a master interface with an AMBA APB3 interface. Four GPIOs in the MSS are configured as inputs that are used to handle flow control in data transfer from MSS to FFT coprocessor. The EMC is configured for Region 0as Asynchronous RAM and port size as half word. The UART_0 is configured for printing the FFT values to the PC though a serial terminal emulation program.ADC0, ADC1, and ADC2 are configured with 12-bit resolution, two channels and the sampling rate is set to approximately 100 KHz. Figure 4 on page 5 shows the ACE configuration window.Figure 3 • Implementation of Multi Channel FFT on the SmartFusion cSoCDesign Description5The APB wrapper logic is implemented on the top of CoreFFT and connected to CoreAPB3. A FIFO of size 512*32 is used to connect to CoreFFT output.CoreAPB3 acts as a bridge between the MSS and the FFT coprocessor block. It provides an advanced microcontroller bus architecture (AMBA3) advanced peripheral bus (APB3) fabric supporting up to 16APB slaves. This design example uses one slave slot (Slot 0) to interface with the FFT coprocessor block and is configured with direct addressing mode. Refer to the CoreAPB3 Handbook for more details on CoreAPB3 IP .For more details on how to connect FPGA logic MSS, refer to the Connecting User Logic to the SmartFusion Microcontroller Subsystem application note.The logic in the FPGA fabric consumes 18 RAM blocks out of 24. We cannot use eSRAM blocks for implementing CoreFFT as the transactions between these SRAM blocks and FFT logic are very high and are time critical.Figure 5 on page 6 illustrates the multi channel FFT example design in the SmartDesign.Figure 4 • Configure ACESmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA Fabric6Table 2 summarizes the logic resource utilization of the design on the A2F500M3F device.Software ImplementationThe Cortex-M3 processor continuously reads the values from ACE and stores the values into the input buffers. If the first 512 points are filled then the processor initiates the FFT process. In the FFT process,the input buffers are streamed one after other to the CoreFFT with the help of PDMA. Using another channel of PDMA the output of FFT is moved to the corresponding channel output buffers.During the FFT process the Cortex-M3 processor stores the sampled values into the second half of the input buffers. Once the FFT process completes the first half of input buffer, then the second half of the input buffer are streamed to CoreFFT.Figure 5 • SmartDesign Implementation of Multi Channel FFTTable 2 • Logic Utilization of the Design on A2F500M3FCoreFFTOther Logic in Fabric Total Ram Blocks14418 (75%)Tiles 78424718313 (72.1%)Implementing Multi Channel FFT on EVAL KIT BOARD7The CALL_FFT(int *) application programmable interface (API) initiates the PDMA to transfer input buffer data to the FFT in the fabric. Before initiating PDMA it checks for FFT whether or not it is ready to read the data. The CALL_FFT(int *) API also checks if the output FIFO is empty so that all the FFT out values have been already read. When the input buffer has points equal to the full length of FFT, then it will be called.The Read_FFT() API initiates the PDMA for reading the FFT output values from FIFO in fabric to the corresponding output buffer. After reading all the values it calls the CALL_FFT() API with the next channel buffer to compute the FFT for next channel. This is done for all channels. After completion of FFT computation for all channels, if the continuous variable is not defined, it will print the FFT output values on the serial terminal. When FFT_OP_READY interrupt occurs then this API will be called.The GPIO1_IRQHandler() interrupt service routine occurs on the positive edge of FFT_OP_READY signal. It calls Read_FFT() API. This interrupt mechanism is used to read the sample values continuously while computing the FFT.If continuous variable is defined, then the FFT is computed without any loss of data samples. If #define continuous line is commented then after every completion of FFT computation of all channels the FFT output is printed on serial terminal. The printed values are in the form of complex numbers.The ping-pong mechanism is used for input data buffer to store the samples continuously. For each channel the input buffer length is double of the full FFT length. While computing the FFT for the first half of the buffer, the new sample values are stored in the second half of the input buffer and while computing the FFT for second half of buffer, the new sample values are stored in first half of the input buffer.Customizing the Number of ChannelsYou can change the design depending on your requirement. Configure the ADC (Figure 4 on page 5)with the required number of channels and required sampling rate. In SoftConsole project change the parameter value NUM_CHANNELS according to the ADC configuration. Edit the main code for reading ADCs data into buffers according to ACE configuration.Throughput CalculationsThe actual time to get 512 samples with 100 ksps is 5.12 ms. Each channel is configured to 100 ksps, so for every 5.12 ms we will have 512 samples in the input buffers.The actual time taken to compute the FFT for each channel is the sum of time taken to transfer 512points to CoreFFT, FFT computation time, and time to read FFT output to the output buffer.•Total time for computing FFT = (time taken to receive 512 data + computational latency for 512points + time taken to store 512 data) = 512*5 + 23292 + 512*5 =28412 clks •Time to compute FFT for 6 channels = 28412*6 = 170472 clksTime to compute FFT for six channels is 2.1309 ms (If CLK is 80 MHz). It is less than half the sample rate of 5.12 ms.If only one channel is configured with maximum sampling rate (600 ksps) then time to get 512 samples with 600 ksps is 0.853 ms. Time to compute FFT for these 512 samples is 0.355 ms. If you configure three ADCs with maximum sampling rate (1800 ksps) then time to compute the FFT for these three channels will be 1.065 ms which is higher than the sampling time. In this there is a loss of some samples.The design works fine up to 1440 ksps.Implementing Multi Channel FFT on EVAL KIT BOARDTo implement the design on the SmartFusion Evaluation Kit Board the FFT must be 256 point and 8 bit because the A2F200 device has less RAM blocks and logic cells. The ADC channels must be selected for only ADC0 and ADC1. Figure 6 on page 8 shows the implementation of multi channel FFT on the SmartFusion cSoC (A2F200M3F) device.SmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA Fabric8Table 3 summarizes the logic resource utilization of the design with 256 points 8-bit FFT on A2F200M3F device.Running the DesignProgram the SmartFusion Evaluation Kit Board or the SmartFusion Development Kit Board with the generated or provided *.stp file (refer to "Appendix A – Design Files" on page 10) using FlashPro and then power cycle the board.For computing continuous FFT values for the all six signals sampled through the ADCs, uncomment the line #define continuous in the main program. The FFT output values are stored in the rdata buffer. This buffer is updated for every computation of FFT.For printing the FFT values on serial terminal (HyperTerminal or PuTTy), comment the line #define continuous in the main program.Figure 6 • Implementation of Multi Channel FFT on the SmartFusion Evaluation Kit BoardTable 3 • Logic Utilization of the Design on A2F200M3F DeviceCoreFFTOther Logic in Fabric Total Ram Blocks718 (100%)Tiles 3201853286 (66%)Conclusion9Connect the analog inputs to the SmartFusion Kit Board with the information provided in Table 4.Invoke the SoftConsole IDE, by clicking on Write Application code under Develop Firmware in Libero ®System-on-Chip (SoC) project (refer to "Appendix A – Design Files") and launch the debugger. Start HyperTerminal or PuTTY with a baud rate of 57600, 8 data bits, 1 stop bit, no parity, and no flow control.If your PC does not have the HyperTerminal program, use any free serial terminal emulation program such as PuTTY or Tera Term. Refer to the Configuring Serial Terminal Emulation Programs Tutorial for configuring the HyperTerminal, Tera Term, or PuTTY .ConclusionThis application note describes the capability of the SmartFusion cSoC devices to compute the multi channel FFT. The Cortex-M3 processor, AFE, and FPGA fabric together gives a single chip solution for real time multi channel FFT system. This design example also shows the 6-channel data acquisition system.Table 4 • SettingsChannelEvaluation Kit Development Kit Channel 173 of J21 (signal header)ADC0 of JP4Channel 274 of J21 (signal header)ADC1 of JP4Channel 377 of J21 (signal header)77 of J21 (signal header)Channel 478 of J21 (signal header)78 of J21 (signal header)Channel 585 of J21 (signal header)Channel 686 of J21 (signal header)Figure 7 • FFT Output Data for 1 kHz Sinusoidal Signal on PUTTYSmartFusion cSoC: Multi-Channel FFT Co-Processor Using FPGA Fabric10Appendix A – Design FilesThe Design files are available for download on the Microsemi SoC Product Groups website:/soc/download/rsc/?f=A2F_AC381_DF.The design zip file consists of Libero SoC projects and programming file (*.stp) for A2F200 and A2F500.Refer to the Readme.txt file included in the design file for directory structure and description.51900249-0/02.12© 2012 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor solutions for: aerospace, defense and security; enterprise and communications; and industrial and alternative energy markets. Products include high-performance, high-reliability analog and RF devices, mixed signal and RF integrated circuits, customizable SoCs, FPGAs, and complete subsystems. Microsemi is headquartered in Aliso Viejo, Calif. Learn more at .Microsemi Corporate HeadquartersOne Enterprise, Aliso Viejo CA 92656 USAWithin the USA: +1 (949) 380-6100Sales: +1 (949) 380-6136Fax: +1 (949) 215-4996。

Innovation with Integrity UHR-TOF MS 产品介绍说明书

Innovation with IntegrityUHR-TOF MSGet the full picture the first timeimpact IISensational Capabilities of impact IIOptimize your LC-MS methods withoutcompromising performance: impact II delivers thefull range of specified performance parameterssimultaneously to solve your analytical challenges.The Ultra-High Resolution (UHR) QTOF technologypioneered by Bruker once again defines thestandards of what can be achieved using accuratemass LC-MS/MS.New innovations in time-of-flight instrumentationare now available in a robust and market-leadingbenchtop system.Market LeadingSensitivityDual ion funnelIonBooster SourceCaptiveSpray nanoBoosterNew collision cell with broadmass transferRobust & QuantitativeOutstanding Hardware PerformanceEnhanced dynamic range50 Gbit/sec data sampling technology10 bit ADC technologyNew TOF with improved resolving powerDeepest insight into your sample Instant Expertise™ SoftwareIDAS™Intensity Dependent Acquisition SpeedRT2™RealTime Re-Think SmartFormula 3D™Easy-to-useYour Success with impact IIInstant Expertise™Intelligent self-optimizing MS/MS routines deliver expert-caliber results first time from your complex biomarker discovery or small molecule unknown screening experiments where spectral fidelity is key. This also includes de novo molecular formula deter-mination.Let the impact II achieve your goals in:Biomarker discovery and validation in proteomics and metabolomicsDrug metabolite, degradant and impurity identification and quantitation Synthetic chemistry supportIntact protein analysis and characterization of biopharmaceuticalsForensic and doping control Food and water testingAnd all in an economical and benchtop design.Dynamic range – five orders of magnitude50 GBit/sec sampling technology enables high Dynamic range acquisition on an LC timescale Greatly increased robustness to sample variation allowing reduced samplepretreatment especially desirable in high throughput quantitative applications. Definitive trace analysis from complex, high-background matrices makes your analytical work more productive. Increased dynamic range, excellentrobustness, and full sensitivity gives you the deepest insight into your sample and what might be hiding underneath.SensitivityOne shot plug & play acquisition with market leading standard sensitivity Ensuring qualitative and quantitative results in one LC run delivers fastest possible time-to-success. Whether running with standard ESI, ionBooster or even nano-flow separation coupled with the patented CaptiveSpray nano-Booster the impact II with its dual ion funnel delivers extreme sensitivity for best qualitative and quantitative results in one run.Full sensitivity resolutionHaving to choose between resolution and sensitivity on other instruments restricts the depth to which you can understand your sample. Instead of beam shaping, the impact II features a new time-of-flight tube with improved resolving power for optimized detection.Robustness And Simplicity – All Day, Every DayVersatilitySensitive mass transfer from smallest fragment ions to monoclonal antibodiesPatented dual Ion-Funnel:Ruggedness and sensitivityChoice of rugged and sensitive ion sources39.022941.03795001000150020002500Intens.3840424446m/z22002400260028003000320034003600Low mass fragment ion of vanillic acid precursor at 0.1mDa Mass accuracy Mass Spectrum obtained from intact Adalimumab which has a molecule weight of 148k Da“The robustness, sensitivity and spectral accuracy of the impact QTOF-MS has accelerated the process to identify unknowncompounds. This is an integral part of long-term goal to ‘sequence’ the Medicago truncatula metabolome”Professor Lloyd W. Sumner, Analytical Biochemistry Plant Biology Division, The Samuel Roberts Noble Foundation Ardmore, OK, USASensitivityDeconvoluted mass: 148 kDaIn-spectrum dynamic range @ real LC speed –don’t miss low abundant peaks.195.087608219.106753+MS, 1.0min #550.00.26080100120140160180200220m/zCa ﬀeine 0.6ppm I = 9,230,400 countsUrea 0.8 ppm I = 52 counts1.7 x 105Much higher dynamic range in concentration reachableMarket-leading high-dynamic range 10 bit detection systemProductivity and….Robust proﬁ ling of large batches of complex biological samplesSimplicity: Fast and accurate acquisition of fragment spectraPeak shapes in urine sample remain constant:Instrument robustness enables comprehensive metabolic profiling studies of large sample sets.Looking at a selected compound: Phenylalanine. SmartFormula provides the correct molecular formula based on accurate mass and isotopic pattern fit: C 9H 12N 1O 2. Fully reproducible isotopic fidelity for phenylalanine across 100 samples injected – unambiguous molecular formula generation also for higher m/z values all day, every day.0,015,030,045,020406080100m S i g m aInjec ti on No.m S i g m a 897168169m/zppm mass accuracyisotopic patternigma = 4.4)0,015,030,045,020406080100m S i g m aInjec ti on No.m S i g m a 166.0863167.0897166167168169m/z-0.2 ppm mass accuracy True isotopic pattern (mSigma = 4.4)0,015,030,045,020406080100m S i g m aInjec ti on No.m S i g m a mSigma Value for phenylalanine in 100 urine samples measuredmSigma < 15= unambiguous molecular formula generation even for higher m/z values100 injections of human Urine sampleimpact II enables up to 50 Hz instrument scan speed combined with Instant Expertise TM software: All precursor ions fragmented in “one shot” acquisition of human urine sample spiked with vanillic acid.200400600800m/z246810Time [min]MS/MS Spectrum acquiredSeveral thousand high quality MS/MS spectra ready for spectral library searchThe low abundant target mass 169.0495 m/z of the vanillic acid precursor was fragmented successfully. Query in custom human metabolite MS/MS Library, provides correct identification. The library was generated in a different laboratory on a different impact QTOF instrument.…Versatility for OMICS researchIntact Protein Proﬁ lingThe combination of Isotopic fidelityand mass accuracy that makes theimpact II capable of delivering molecularformulae for metabolites is preservedover the mass range. Consequently,even proteins out of a complex mixture(here : overlapping compounds resolvedwith the Dissect™ algorithm in anE. coliextract) can be extracted and measuredwith an unrivalled mass accuracy and anexact isotopic pattern.Accurate Bottom-up proteomicsquantitationThe robustness of the impact II withits impressive dynamic range enablesaccurate quantitation. As an example theCV’s obtained for a selected subset of 10proteins out of 55 consecutive injectionsof an Hela Cell digest, separated with a90 min gradient and acquired with theInstant Expertise™ ID/Quant method:that illustrates the capabilities of theinstrument for label-free discoveryapproaches.Read more in Application NotesLCMS-81: “Introducing New ProteomicsAcquisiton Strategies with the compact™ –Towards the Universal Proteomics AcquisitionMethod“LCMS-89: “High quantification efficiency inplasma targeted proteomics with afull-capability discovery Q-TOF platform“Glycomics and GlycoproteomicsAn illustration of versatility. The impact IIaccurate mass and data for glycans andglycopeptide can be fully exploited inProtein Scape for screening, identificationand characterization operations.2934878910583477810150971943921099626741203711331116115591001713146106788692453638440576662281433867780519185723881614515671197611212521079060717921824475931610449231115512110983511820103429439687027541104102366532731811711448222995825951131085641306985642468101214Time [min]∆ppm/Theory (injec ti on 3)∆% abundancy/Theory (injec ti on3)0,30,60,2-0,60,2-2,2-0,06-0,50,011,9-0,020,0-0,02-1,2-0,0-0,8-0,2-0,5-0,10,1-0,20,50,3--0,10,3-0,10,10,0∆ppm/Theory (injec ti on 3)∆% abundancy/Theory (injec ti on3)∆Mr of monoisotopicpeak in 4 consecutiveinjections:1 : 0.08 ppm2 : -0.16 ppm3 : 0.04 ppm4 : 0.32 ppm510Peakareax1Peak area% CVIntact protein profiling: > 1000 proteoforms detected in 15 minQualitative and Quantitative Drug Metabolism CharacterizationMetabolite DetectionMetabolite Detect software compares the data file for the drug (in this case t 60) with the corresponding control sample.A base peak chromatogram of thedifference is created allowing metabolites m/z 354, 212 and even 392 to be easily observed.Drug and Metabolite Proﬁ lesIntegration is carried out on the EIC for the measured m/z of each metabolite +/- 0.005 Da. Plotting the ratio of metabolite to internal standard (MIS) vs. time produces the metaboliteprofiles. Half-life and clearance values are determined from the natural log (ln) of the drug profile vs time plot.Metabolite IDAuto MS/MS SpectrumSmartFormula3DFormula and Structure C 21H 18NOFCl212354376392 354FON+CY our Partner in Biopharmaceutical Analysiscomprehensive capabilities forRapidly and routinely acquiremonoisotopic antibody subunit data,in sequence confirmation and easydetection of heterogeneities.sequence variants with increasedMS/MS acquisition speed and widerdynamic range.Effective screening and quantitation ofSubunit analysis Comparison with reference material234202343023440m/z(mono) = 25442.5176Theore ti cal isotopes for Fd2410024110241202234002545025460Mr(mono) = 25442.5176 DaTheorem/z23400234102342023430254502547025480Mr(mono) =Theore ti cal isotopes for FdOne-Shot Full Picture of the Sample ...Full Sensitivity Resolution and highdynamic range are prerequisites to reach extreme low level of detection. High-resolution Extracted ionChromatogram identifying pesticides with full scan MS and bbCID acquisitionExcellent Isotopic fidelity at very low concentration levelDirect injection of 100 μl water: All analytes from 70 to 900 m/z are detected at 10 ng/l1st Isotope2nd Isotope3rd Isotope+MS 50 ppt Dimethoate C 5H 12N 1O 3P 1S 2 m/z 228.9996 err 0.55 mDa10 pptin single LC-TOF run. All analytes across the mass range from 70 to 900 m/z are detected. The new HDC collision cell with un-compromised mass-transfer and sensitivity allows for trace level residue screening, confirmation and quantitation.Example of Positive Amphetamine Finding at Trace Level AmphetamineAmphetamine (^13C)Amphetamine Fragm 119Amphetamine Fragm 913.8 4.0 4.2 4.4 4.6Time [min]... for Rapid Profiling and Screening of UnknownsHigh resolution, accurate mass MS and bbCID MS/MS data acquisition enables rapid reaction to emerging challenges in food safety and doping even before reference standards are availableFacilitates retrospective in-silicoanalysis for post-hoc identification of true unknown contaminantsAccurate mass screening databases for Food Testing and Forensic ToxicologyFood /Water/Forensic sampleUHPLC impact IIOne shot qual /quant analysis with no method development MS, Total Ion CID, MSMSIdentification, confirmation, quantitation, ID of new compounds and reportingProcessing with highquality database In silico retrospective analysis of new targets“We use the Bruker impact QTOF with bbCID to attain enhanced sensitivity for drugs-of-abuse and designer drug screening in a forensic setting, covering critical low concentration compounds like THC acid, buprenorphine, LSD, and synthetic cannabinoids. The bbCID workflow has been carefully validated against spectral library comparison, and it has proven to deliver equal confidence, but with a much higher efficiency, significantly increasing our productivity. Our forensic screening method has now been accredited by the Finnish Accreditation Service” Dr. Anna Pelander, Laboratory of Forensic Toxicology at the University of HelsinkiExaAmphetamine Fragm 119Amphetamine Fragm 913.84.0 4.2 4.4 4.6Time [min]Comprehensive forensic drug scree-ning with maximum confidence in the results with impact II. Accurate mass measurement of ‘diagnostic ions’, including the pseudo-molecular ion,adducts, isotopes as well as broad band CID (bbCID) fragment ions reduces or eliminates false positive findings, even incomplex matrices such as serum. At trace levels, ‘buried in the grass’ at RT=4.3 minutes, diagnostic fragmentions m/z 119 and m/z 91 and the 13Cisotope for amphetamine are observed. Amphetamine is truly detected as posi-tive finding from the screening result.To facilitate comprehensive screening for hundreds of target compounds, theBruker ToxScreener™ and Pesticide Screener™ solutions are supported by high quality accurate mass databases, enabling users to readily process the data and obtain accurate, reliable scree-ning results.B r u k e r D a l t o n i c s i s c o n t i n u a l l y i m p r o v i n g i t s p r o d u c t s a n d r e s e r v e s t h e r i g h tt o c h a n g e s p e c i f i c a t i o n s w i t h o u t n o t i c e . © B D A L 06-2014, 1829433Bruker Daltonik GmbHBremen · GermanyPhone +49 (0)421-2205-0Fax +49 (0)421-2205-103*************Bruker Daltonics Inc.Billerica, MA · USA Fremont, CA · USAPhone +1 (978) 663-3660 Phone +1 (510) 683-4300Fax +1 (978) 667-5993 Fax +1 (510) 687-1217**************************@For research use only. Not for use in diagnostic procedures.Dynamic Source ConfigurationIn addition to ESI sources, Bruker life science MS systems support a wide range of source options from Bruker and third-party vendors, all switchable within seconds.APCI with DIPAPPICaptiveSpray nanoBoosterCaptiveSpray™ nanoBoosterCaptiveSpray nanoBooster is the proteomics ion source that brings your MS to the nextperformance level – The operation is as easy as electrospray can be. The nanoBooster enables Glycoanalysis, supercharging and pushes up ID rates.ionBoosterThe ionBooster offers a 5–100x gain in sensitiv-ity for many compounds of interest in the fields of environmental analysis, food testing and therapeutic drug monitoring.APCIAtmospheric Pressure Chemical Ionization is used in metabolomics as well as for drug or pes-ticide screening for less polar molecules where ESI fails to deliver reasonable quantities of ions.APPIAtmospheric Pressure Photo Ionization is used for less polar or non-polar molecules that can not be ionized in either ESI or APCI.DIPThe DirectProbe add-on for the Bruker APCI II and APPI II ion sources allows direct analysis of liquid and solid samples without tedious sample preparation.GC-APCI IIThe GC-APCI II source with unique flexible, heated transfer line and calibrant delivery enables GC coupling to any Bruker TOF orQTOF, trap or FTMS system originally designed for LC coupling.“We have been using the impact since almost a year for routine shotgun bottom up pro-teomics. In association with the CaptiveSpray nanoBooster, the instrument has provided an excellent level of sustainable performances, being capable of delivering untouchedperformances for over 6-8 weeks of 24/7 use. This is of tremendous importance for the success of our label-free measurement campaigns”Prof. Alain Van Dorsselaer, LSMBO, StrasbourgGC-APCI II。

3GPP TS 36.331 V13.2.0 (2016-06)

3GPP TS 36.331 V13.2.0 (2016-06)Technical Specification3rd Generation Partnership Project;Technical Specification Group Radio Access Network;Evolved Universal Terrestrial Radio Access (E-UTRA);Radio Resource Control (RRC);Protocol specification(Release 13)The present document has been developed within the 3rd Generation Partnership Project (3GPP TM) and may be further elaborated for the purposes of 3GPP. The present document has not been subject to any approval process by the 3GPP Organizational Partners and shall not be implemented.This Specification is provided for future development work within 3GPP only. The Organizational Partners accept no liability for any use of this Specification. Specifications and reports for implementation of the 3GPP TM system should be obtained via the 3GPP Organizational Partners' Publications Offices.KeywordsUMTS, radio3GPPPostal address3GPP support office address650 Route des Lucioles - Sophia AntipolisValbonne - FRANCETel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16InternetCopyright NotificationNo part may be reproduced except as authorized by written permission.The copyright and the foregoing restriction extend to reproduction in all media.© 2016, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TSDSI, TTA, TTC).All rights reserved.UMTS™ is a Trade Mark of ETSI registered for the benefit of its members3GPP™ is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational PartnersLTE™ is a Trade Mark of ETSI currently being registered for the benefit of its Members and of the 3GPP Organizational Partners GSM® and the GSM logo are registered and owned by the GSM AssociationBluetooth® is a Trade Mark of the Bluetooth SIG registered for the benefit of its membersContentsForeword (18)1Scope (19)2References (19)3Definitions, symbols and abbreviations (22)3.1Definitions (22)3.2Abbreviations (24)4General (27)4.1Introduction (27)4.2Architecture (28)4.2.1UE states and state transitions including inter RAT (28)4.2.2Signalling radio bearers (29)4.3Services (30)4.3.1Services provided to upper layers (30)4.3.2Services expected from lower layers (30)4.4Functions (30)5Procedures (32)5.1General (32)5.1.1Introduction (32)5.1.2General requirements (32)5.2System information (33)5.2.1Introduction (33)5.2.1.1General (33)5.2.1.2Scheduling (34)5.2.1.2a Scheduling for NB-IoT (34)5.2.1.3System information validity and notification of changes (35)5.2.1.4Indication of ETWS notification (36)5.2.1.5Indication of CMAS notification (37)5.2.1.6Notification of EAB parameters change (37)5.2.1.7Access Barring parameters change in NB-IoT (37)5.2.2System information acquisition (38)5.2.2.1General (38)5.2.2.2Initiation (38)5.2.2.3System information required by the UE (38)5.2.2.4System information acquisition by the UE (39)5.2.2.5Essential system information missing (42)5.2.2.6Actions upon reception of the MasterInformationBlock message (42)5.2.2.7Actions upon reception of the SystemInformationBlockType1 message (42)5.2.2.8Actions upon reception of SystemInformation messages (44)5.2.2.9Actions upon reception of SystemInformationBlockType2 (44)5.2.2.10Actions upon reception of SystemInformationBlockType3 (45)5.2.2.11Actions upon reception of SystemInformationBlockType4 (45)5.2.2.12Actions upon reception of SystemInformationBlockType5 (45)5.2.2.13Actions upon reception of SystemInformationBlockType6 (45)5.2.2.14Actions upon reception of SystemInformationBlockType7 (45)5.2.2.15Actions upon reception of SystemInformationBlockType8 (45)5.2.2.16Actions upon reception of SystemInformationBlockType9 (46)5.2.2.17Actions upon reception of SystemInformationBlockType10 (46)5.2.2.18Actions upon reception of SystemInformationBlockType11 (46)5.2.2.19Actions upon reception of SystemInformationBlockType12 (47)5.2.2.20Actions upon reception of SystemInformationBlockType13 (48)5.2.2.21Actions upon reception of SystemInformationBlockType14 (48)5.2.2.22Actions upon reception of SystemInformationBlockType15 (48)5.2.2.23Actions upon reception of SystemInformationBlockType16 (48)5.2.2.24Actions upon reception of SystemInformationBlockType17 (48)5.2.2.25Actions upon reception of SystemInformationBlockType18 (48)5.2.2.26Actions upon reception of SystemInformationBlockType19 (49)5.2.3Acquisition of an SI message (49)5.2.3a Acquisition of an SI message by BL UE or UE in CE or a NB-IoT UE (50)5.3Connection control (50)5.3.1Introduction (50)5.3.1.1RRC connection control (50)5.3.1.2Security (52)5.3.1.2a RN security (53)5.3.1.3Connected mode mobility (53)5.3.1.4Connection control in NB-IoT (54)5.3.2Paging (55)5.3.2.1General (55)5.3.2.2Initiation (55)5.3.2.3Reception of the Paging message by the UE (55)5.3.3RRC connection establishment (56)5.3.3.1General (56)5.3.3.1a Conditions for establishing RRC Connection for sidelink communication/ discovery (58)5.3.3.2Initiation (59)5.3.3.3Actions related to transmission of RRCConnectionRequest message (63)5.3.3.3a Actions related to transmission of RRCConnectionResumeRequest message (64)5.3.3.4Reception of the RRCConnectionSetup by the UE (64)5.3.3.4a Reception of the RRCConnectionResume by the UE (66)5.3.3.5Cell re-selection while T300, T302, T303, T305, T306, or T308 is running (68)5.3.3.6T300 expiry (68)5.3.3.7T302, T303, T305, T306, or T308 expiry or stop (69)5.3.3.8Reception of the RRCConnectionReject by the UE (70)5.3.3.9Abortion of RRC connection establishment (71)5.3.3.10Handling of SSAC related parameters (71)5.3.3.11Access barring check (72)5.3.3.12EAB check (73)5.3.3.13Access barring check for ACDC (73)5.3.3.14Access Barring check for NB-IoT (74)5.3.4Initial security activation (75)5.3.4.1General (75)5.3.4.2Initiation (76)5.3.4.3Reception of the SecurityModeCommand by the UE (76)5.3.5RRC connection reconfiguration (77)5.3.5.1General (77)5.3.5.2Initiation (77)5.3.5.3Reception of an RRCConnectionReconfiguration not including the mobilityControlInfo by theUE (77)5.3.5.4Reception of an RRCConnectionReconfiguration including the mobilityControlInfo by the UE(handover) (79)5.3.5.5Reconfiguration failure (83)5.3.5.6T304 expiry (handover failure) (83)5.3.5.7Void (84)5.3.5.7a T307 expiry (SCG change failure) (84)5.3.5.8Radio Configuration involving full configuration option (84)5.3.6Counter check (86)5.3.6.1General (86)5.3.6.2Initiation (86)5.3.6.3Reception of the CounterCheck message by the UE (86)5.3.7RRC connection re-establishment (87)5.3.7.1General (87)5.3.7.2Initiation (87)5.3.7.3Actions following cell selection while T311 is running (88)5.3.7.4Actions related to transmission of RRCConnectionReestablishmentRequest message (89)5.3.7.5Reception of the RRCConnectionReestablishment by the UE (89)5.3.7.6T311 expiry (91)5.3.7.7T301 expiry or selected cell no longer suitable (91)5.3.7.8Reception of RRCConnectionReestablishmentReject by the UE (91)5.3.8RRC connection release (92)5.3.8.1General (92)5.3.8.2Initiation (92)5.3.8.3Reception of the RRCConnectionRelease by the UE (92)5.3.8.4T320 expiry (93)5.3.9RRC connection release requested by upper layers (93)5.3.9.1General (93)5.3.9.2Initiation (93)5.3.10Radio resource configuration (93)5.3.10.0General (93)5.3.10.1SRB addition/ modification (94)5.3.10.2DRB release (95)5.3.10.3DRB addition/ modification (95)5.3.10.3a1DC specific DRB addition or reconfiguration (96)5.3.10.3a2LWA specific DRB addition or reconfiguration (98)5.3.10.3a3LWIP specific DRB addition or reconfiguration (98)5.3.10.3a SCell release (99)5.3.10.3b SCell addition/ modification (99)5.3.10.3c PSCell addition or modification (99)5.3.10.4MAC main reconfiguration (99)5.3.10.5Semi-persistent scheduling reconfiguration (100)5.3.10.6Physical channel reconfiguration (100)5.3.10.7Radio Link Failure Timers and Constants reconfiguration (101)5.3.10.8Time domain measurement resource restriction for serving cell (101)5.3.10.9Other configuration (102)5.3.10.10SCG reconfiguration (103)5.3.10.11SCG dedicated resource configuration (104)5.3.10.12Reconfiguration SCG or split DRB by drb-ToAddModList (105)5.3.10.13Neighbour cell information reconfiguration (105)5.3.10.14Void (105)5.3.10.15Sidelink dedicated configuration (105)5.3.10.16T370 expiry (106)5.3.11Radio link failure related actions (107)5.3.11.1Detection of physical layer problems in RRC_CONNECTED (107)5.3.11.2Recovery of physical layer problems (107)5.3.11.3Detection of radio link failure (107)5.3.12UE actions upon leaving RRC_CONNECTED (109)5.3.13UE actions upon PUCCH/ SRS release request (110)5.3.14Proximity indication (110)5.3.14.1General (110)5.3.14.2Initiation (111)5.3.14.3Actions related to transmission of ProximityIndication message (111)5.3.15Void (111)5.4Inter-RAT mobility (111)5.4.1Introduction (111)5.4.2Handover to E-UTRA (112)5.4.2.1General (112)5.4.2.2Initiation (112)5.4.2.3Reception of the RRCConnectionReconfiguration by the UE (112)5.4.2.4Reconfiguration failure (114)5.4.2.5T304 expiry (handover to E-UTRA failure) (114)5.4.3Mobility from E-UTRA (114)5.4.3.1General (114)5.4.3.2Initiation (115)5.4.3.3Reception of the MobilityFromEUTRACommand by the UE (115)5.4.3.4Successful completion of the mobility from E-UTRA (116)5.4.3.5Mobility from E-UTRA failure (117)5.4.4Handover from E-UTRA preparation request (CDMA2000) (117)5.4.4.1General (117)5.4.4.2Initiation (118)5.4.4.3Reception of the HandoverFromEUTRAPreparationRequest by the UE (118)5.4.5UL handover preparation transfer (CDMA2000) (118)5.4.5.1General (118)5.4.5.2Initiation (118)5.4.5.3Actions related to transmission of the ULHandoverPreparationTransfer message (119)5.4.5.4Failure to deliver the ULHandoverPreparationTransfer message (119)5.4.6Inter-RAT cell change order to E-UTRAN (119)5.4.6.1General (119)5.4.6.2Initiation (119)5.4.6.3UE fails to complete an inter-RAT cell change order (119)5.5Measurements (120)5.5.1Introduction (120)5.5.2Measurement configuration (121)5.5.2.1General (121)5.5.2.2Measurement identity removal (122)5.5.2.2a Measurement identity autonomous removal (122)5.5.2.3Measurement identity addition/ modification (123)5.5.2.4Measurement object removal (124)5.5.2.5Measurement object addition/ modification (124)5.5.2.6Reporting configuration removal (126)5.5.2.7Reporting configuration addition/ modification (127)5.5.2.8Quantity configuration (127)5.5.2.9Measurement gap configuration (127)5.5.2.10Discovery signals measurement timing configuration (128)5.5.2.11RSSI measurement timing configuration (128)5.5.3Performing measurements (128)5.5.3.1General (128)5.5.3.2Layer 3 filtering (131)5.5.4Measurement report triggering (131)5.5.4.1General (131)5.5.4.2Event A1 (Serving becomes better than threshold) (135)5.5.4.3Event A2 (Serving becomes worse than threshold) (136)5.5.4.4Event A3 (Neighbour becomes offset better than PCell/ PSCell) (136)5.5.4.5Event A4 (Neighbour becomes better than threshold) (137)5.5.4.6Event A5 (PCell/ PSCell becomes worse than threshold1 and neighbour becomes better thanthreshold2) (138)5.5.4.6a Event A6 (Neighbour becomes offset better than SCell) (139)5.5.4.7Event B1 (Inter RAT neighbour becomes better than threshold) (139)5.5.4.8Event B2 (PCell becomes worse than threshold1 and inter RAT neighbour becomes better thanthreshold2) (140)5.5.4.9Event C1 (CSI-RS resource becomes better than threshold) (141)5.5.4.10Event C2 (CSI-RS resource becomes offset better than reference CSI-RS resource) (141)5.5.4.11Event W1 (WLAN becomes better than a threshold) (142)5.5.4.12Event W2 (All WLAN inside WLAN mobility set becomes worse than threshold1 and a WLANoutside WLAN mobility set becomes better than threshold2) (142)5.5.4.13Event W3 (All WLAN inside WLAN mobility set becomes worse than a threshold) (143)5.5.5Measurement reporting (144)5.5.6Measurement related actions (148)5.5.6.1Actions upon handover and re-establishment (148)5.5.6.2Speed dependant scaling of measurement related parameters (149)5.5.7Inter-frequency RSTD measurement indication (149)5.5.7.1General (149)5.5.7.2Initiation (150)5.5.7.3Actions related to transmission of InterFreqRSTDMeasurementIndication message (150)5.6Other (150)5.6.0General (150)5.6.1DL information transfer (151)5.6.1.1General (151)5.6.1.2Initiation (151)5.6.1.3Reception of the DLInformationTransfer by the UE (151)5.6.2UL information transfer (151)5.6.2.1General (151)5.6.2.2Initiation (151)5.6.2.3Actions related to transmission of ULInformationTransfer message (152)5.6.2.4Failure to deliver ULInformationTransfer message (152)5.6.3UE capability transfer (152)5.6.3.1General (152)5.6.3.2Initiation (153)5.6.3.3Reception of the UECapabilityEnquiry by the UE (153)5.6.4CSFB to 1x Parameter transfer (157)5.6.4.1General (157)5.6.4.2Initiation (157)5.6.4.3Actions related to transmission of CSFBParametersRequestCDMA2000 message (157)5.6.4.4Reception of the CSFBParametersResponseCDMA2000 message (157)5.6.5UE Information (158)5.6.5.1General (158)5.6.5.2Initiation (158)5.6.5.3Reception of the UEInformationRequest message (158)5.6.6 Logged Measurement Configuration (159)5.6.6.1General (159)5.6.6.2Initiation (160)5.6.6.3Reception of the LoggedMeasurementConfiguration by the UE (160)5.6.6.4T330 expiry (160)5.6.7 Release of Logged Measurement Configuration (160)5.6.7.1General (160)5.6.7.2Initiation (160)5.6.8 Measurements logging (161)5.6.8.1General (161)5.6.8.2Initiation (161)5.6.9In-device coexistence indication (163)5.6.9.1General (163)5.6.9.2Initiation (164)5.6.9.3Actions related to transmission of InDeviceCoexIndication message (164)5.6.10UE Assistance Information (165)5.6.10.1General (165)5.6.10.2Initiation (166)5.6.10.3Actions related to transmission of UEAssistanceInformation message (166)5.6.11 Mobility history information (166)5.6.11.1General (166)5.6.11.2Initiation (166)5.6.12RAN-assisted WLAN interworking (167)5.6.12.1General (167)5.6.12.2Dedicated WLAN offload configuration (167)5.6.12.3WLAN offload RAN evaluation (167)5.6.12.4T350 expiry or stop (167)5.6.12.5Cell selection/ re-selection while T350 is running (168)5.6.13SCG failure information (168)5.6.13.1General (168)5.6.13.2Initiation (168)5.6.13.3Actions related to transmission of SCGFailureInformation message (168)5.6.14LTE-WLAN Aggregation (169)5.6.14.1Introduction (169)5.6.14.2Reception of LWA configuration (169)5.6.14.3Release of LWA configuration (170)5.6.15WLAN connection management (170)5.6.15.1Introduction (170)5.6.15.2WLAN connection status reporting (170)5.6.15.2.1General (170)5.6.15.2.2Initiation (171)5.6.15.2.3Actions related to transmission of WLANConnectionStatusReport message (171)5.6.15.3T351 Expiry (WLAN connection attempt timeout) (171)5.6.15.4WLAN status monitoring (171)5.6.16RAN controlled LTE-WLAN interworking (172)5.6.16.1General (172)5.6.16.2WLAN traffic steering command (172)5.6.17LTE-WLAN aggregation with IPsec tunnel (173)5.6.17.1General (173)5.7Generic error handling (174)5.7.1General (174)5.7.2ASN.1 violation or encoding error (174)5.7.3Field set to a not comprehended value (174)5.7.4Mandatory field missing (174)5.7.5Not comprehended field (176)5.8MBMS (176)5.8.1Introduction (176)5.8.1.1General (176)5.8.1.2Scheduling (176)5.8.1.3MCCH information validity and notification of changes (176)5.8.2MCCH information acquisition (178)5.8.2.1General (178)5.8.2.2Initiation (178)5.8.2.3MCCH information acquisition by the UE (178)5.8.2.4Actions upon reception of the MBSFNAreaConfiguration message (178)5.8.2.5Actions upon reception of the MBMSCountingRequest message (179)5.8.3MBMS PTM radio bearer configuration (179)5.8.3.1General (179)5.8.3.2Initiation (179)5.8.3.3MRB establishment (179)5.8.3.4MRB release (179)5.8.4MBMS Counting Procedure (179)5.8.4.1General (179)5.8.4.2Initiation (180)5.8.4.3Reception of the MBMSCountingRequest message by the UE (180)5.8.5MBMS interest indication (181)5.8.5.1General (181)5.8.5.2Initiation (181)5.8.5.3Determine MBMS frequencies of interest (182)5.8.5.4Actions related to transmission of MBMSInterestIndication message (183)5.8a SC-PTM (183)5.8a.1Introduction (183)5.8a.1.1General (183)5.8a.1.2SC-MCCH scheduling (183)5.8a.1.3SC-MCCH information validity and notification of changes (183)5.8a.1.4Procedures (184)5.8a.2SC-MCCH information acquisition (184)5.8a.2.1General (184)5.8a.2.2Initiation (184)5.8a.2.3SC-MCCH information acquisition by the UE (184)5.8a.2.4Actions upon reception of the SCPTMConfiguration message (185)5.8a.3SC-PTM radio bearer configuration (185)5.8a.3.1General (185)5.8a.3.2Initiation (185)5.8a.3.3SC-MRB establishment (185)5.8a.3.4SC-MRB release (185)5.9RN procedures (186)5.9.1RN reconfiguration (186)5.9.1.1General (186)5.9.1.2Initiation (186)5.9.1.3Reception of the RNReconfiguration by the RN (186)5.10Sidelink (186)5.10.1Introduction (186)5.10.1a Conditions for sidelink communication operation (187)5.10.2Sidelink UE information (188)5.10.2.1General (188)5.10.2.2Initiation (189)5.10.2.3Actions related to transmission of SidelinkUEInformation message (193)5.10.3Sidelink communication monitoring (195)5.10.6Sidelink discovery announcement (198)5.10.6a Sidelink discovery announcement pool selection (201)5.10.6b Sidelink discovery announcement reference carrier selection (201)5.10.7Sidelink synchronisation information transmission (202)5.10.7.1General (202)5.10.7.2Initiation (203)5.10.7.3Transmission of SLSS (204)5.10.7.4Transmission of MasterInformationBlock-SL message (205)5.10.7.5Void (206)5.10.8Sidelink synchronisation reference (206)5.10.8.1General (206)5.10.8.2Selection and reselection of synchronisation reference UE (SyncRef UE) (206)5.10.9Sidelink common control information (207)5.10.9.1General (207)5.10.9.2Actions related to reception of MasterInformationBlock-SL message (207)5.10.10Sidelink relay UE operation (207)5.10.10.1General (207)5.10.10.2AS-conditions for relay related sidelink communication transmission by sidelink relay UE (207)5.10.10.3AS-conditions for relay PS related sidelink discovery transmission by sidelink relay UE (208)5.10.10.4Sidelink relay UE threshold conditions (208)5.10.11Sidelink remote UE operation (208)5.10.11.1General (208)5.10.11.2AS-conditions for relay related sidelink communication transmission by sidelink remote UE (208)5.10.11.3AS-conditions for relay PS related sidelink discovery transmission by sidelink remote UE (209)5.10.11.4Selection and reselection of sidelink relay UE (209)5.10.11.5Sidelink remote UE threshold conditions (210)6Protocol data units, formats and parameters (tabular & ASN.1) (210)6.1General (210)6.2RRC messages (212)6.2.1General message structure (212)–EUTRA-RRC-Definitions (212)–BCCH-BCH-Message (212)–BCCH-DL-SCH-Message (212)–BCCH-DL-SCH-Message-BR (213)–MCCH-Message (213)–PCCH-Message (213)–DL-CCCH-Message (214)–DL-DCCH-Message (214)–UL-CCCH-Message (214)–UL-DCCH-Message (215)–SC-MCCH-Message (215)6.2.2Message definitions (216)–CounterCheck (216)–CounterCheckResponse (217)–CSFBParametersRequestCDMA2000 (217)–CSFBParametersResponseCDMA2000 (218)–DLInformationTransfer (218)–HandoverFromEUTRAPreparationRequest (CDMA2000) (219)–InDeviceCoexIndication (220)–InterFreqRSTDMeasurementIndication (222)–LoggedMeasurementConfiguration (223)–MasterInformationBlock (225)–MBMSCountingRequest (226)–MBMSCountingResponse (226)–MBMSInterestIndication (227)–MBSFNAreaConfiguration (228)–MeasurementReport (228)–MobilityFromEUTRACommand (229)–Paging (232)–ProximityIndication (233)–RNReconfiguration (234)–RNReconfigurationComplete (234)–RRCConnectionReconfiguration (235)–RRCConnectionReconfigurationComplete (240)–RRCConnectionReestablishment (241)–RRCConnectionReestablishmentComplete (241)–RRCConnectionReestablishmentReject (242)–RRCConnectionReestablishmentRequest (243)–RRCConnectionReject (243)–RRCConnectionRelease (244)–RRCConnectionResume (248)–RRCConnectionResumeComplete (249)–RRCConnectionResumeRequest (250)–RRCConnectionRequest (250)–RRCConnectionSetup (251)–RRCConnectionSetupComplete (252)–SCGFailureInformation (253)–SCPTMConfiguration (254)–SecurityModeCommand (255)–SecurityModeComplete (255)–SecurityModeFailure (256)–SidelinkUEInformation (256)–SystemInformation (258)–SystemInformationBlockType1 (259)–UEAssistanceInformation (264)–UECapabilityEnquiry (265)–UECapabilityInformation (266)–UEInformationRequest (267)–UEInformationResponse (267)–ULHandoverPreparationTransfer (CDMA2000) (273)–ULInformationTransfer (274)–WLANConnectionStatusReport (274)6.3RRC information elements (275)6.3.1System information blocks (275)–SystemInformationBlockType2 (275)–SystemInformationBlockType3 (279)–SystemInformationBlockType4 (282)–SystemInformationBlockType5 (283)–SystemInformationBlockType6 (287)–SystemInformationBlockType7 (289)–SystemInformationBlockType8 (290)–SystemInformationBlockType9 (295)–SystemInformationBlockType10 (295)–SystemInformationBlockType11 (296)–SystemInformationBlockType12 (297)–SystemInformationBlockType13 (297)–SystemInformationBlockType14 (298)–SystemInformationBlockType15 (298)–SystemInformationBlockType16 (299)–SystemInformationBlockType17 (300)–SystemInformationBlockType18 (301)–SystemInformationBlockType19 (301)–SystemInformationBlockType20 (304)6.3.2Radio resource control information elements (304)–AntennaInfo (304)–AntennaInfoUL (306)–CQI-ReportConfig (307)–CQI-ReportPeriodicProcExtId (314)–CrossCarrierSchedulingConfig (314)–CSI-IM-Config (315)–CSI-IM-ConfigId (315)–CSI-RS-Config (317)–CSI-RS-ConfigEMIMO (318)–CSI-RS-ConfigNZP (319)–CSI-RS-ConfigNZPId (320)–CSI-RS-ConfigZP (321)–CSI-RS-ConfigZPId (321)–DMRS-Config (321)–DRB-Identity (322)–EPDCCH-Config (322)–EIMTA-MainConfig (324)–LogicalChannelConfig (325)–LWA-Configuration (326)–LWIP-Configuration (326)–RCLWI-Configuration (327)–MAC-MainConfig (327)–P-C-AndCBSR (332)–PDCCH-ConfigSCell (333)–PDCP-Config (334)–PDSCH-Config (337)–PDSCH-RE-MappingQCL-ConfigId (339)–PHICH-Config (339)–PhysicalConfigDedicated (339)–P-Max (344)–PRACH-Config (344)–PresenceAntennaPort1 (346)–PUCCH-Config (347)–PUSCH-Config (351)–RACH-ConfigCommon (355)–RACH-ConfigDedicated (357)–RadioResourceConfigCommon (358)–RadioResourceConfigDedicated (362)–RLC-Config (367)–RLF-TimersAndConstants (369)–RN-SubframeConfig (370)–SchedulingRequestConfig (371)–SoundingRS-UL-Config (372)–SPS-Config (375)–TDD-Config (376)–TimeAlignmentTimer (377)–TPC-PDCCH-Config (377)–TunnelConfigLWIP (378)–UplinkPowerControl (379)–WLAN-Id-List (382)–WLAN-MobilityConfig (382)6.3.3Security control information elements (382)–NextHopChainingCount (382)–SecurityAlgorithmConfig (383)–ShortMAC-I (383)6.3.4Mobility control information elements (383)–AdditionalSpectrumEmission (383)–ARFCN-ValueCDMA2000 (383)–ARFCN-ValueEUTRA (384)–ARFCN-ValueGERAN (384)–ARFCN-ValueUTRA (384)–BandclassCDMA2000 (384)–BandIndicatorGERAN (385)–CarrierFreqCDMA2000 (385)–CarrierFreqGERAN (385)–CellIndexList (387)–CellReselectionPriority (387)–CellSelectionInfoCE (387)–CellReselectionSubPriority (388)–CSFB-RegistrationParam1XRTT (388)–CellGlobalIdEUTRA (389)–CellGlobalIdUTRA (389)–CellGlobalIdGERAN (390)–CellGlobalIdCDMA2000 (390)–CellSelectionInfoNFreq (391)–CSG-Identity (391)–FreqBandIndicator (391)–MobilityControlInfo (391)–MobilityParametersCDMA2000 (1xRTT) (393)–MobilityStateParameters (394)–MultiBandInfoList (394)–NS-PmaxList (394)–PhysCellId (395)–PhysCellIdRange (395)–PhysCellIdRangeUTRA-FDDList (395)–PhysCellIdCDMA2000 (396)–PhysCellIdGERAN (396)–PhysCellIdUTRA-FDD (396)–PhysCellIdUTRA-TDD (396)–PLMN-Identity (397)–PLMN-IdentityList3 (397)–PreRegistrationInfoHRPD (397)–Q-QualMin (398)–Q-RxLevMin (398)–Q-OffsetRange (398)–Q-OffsetRangeInterRAT (399)–ReselectionThreshold (399)–ReselectionThresholdQ (399)–SCellIndex (399)–ServCellIndex (400)–SpeedStateScaleFactors (400)–SystemInfoListGERAN (400)–SystemTimeInfoCDMA2000 (401)–TrackingAreaCode (401)–T-Reselection (402)–T-ReselectionEUTRA-CE (402)6.3.5Measurement information elements (402)–AllowedMeasBandwidth (402)–CSI-RSRP-Range (402)–Hysteresis (402)–LocationInfo (403)–MBSFN-RSRQ-Range (403)–MeasConfig (404)–MeasDS-Config (405)–MeasGapConfig (406)–MeasId (407)–MeasIdToAddModList (407)–MeasObjectCDMA2000 (408)–MeasObjectEUTRA (408)–MeasObjectGERAN (412)–MeasObjectId (412)–MeasObjectToAddModList (412)–MeasObjectUTRA (413)–ReportConfigEUTRA (422)–ReportConfigId (425)–ReportConfigInterRAT (425)–ReportConfigToAddModList (428)–ReportInterval (429)–RSRP-Range (429)–RSRQ-Range (430)–RSRQ-Type (430)–RS-SINR-Range (430)–RSSI-Range-r13 (431)–TimeToTrigger (431)–UL-DelayConfig (431)–WLAN-CarrierInfo (431)–WLAN-RSSI-Range (432)–WLAN-Status (432)6.3.6Other information elements (433)–AbsoluteTimeInfo (433)–AreaConfiguration (433)–C-RNTI (433)–DedicatedInfoCDMA2000 (434)–DedicatedInfoNAS (434)–FilterCoefficient (434)–LoggingDuration (434)–LoggingInterval (435)–MeasSubframePattern (435)–MMEC (435)–NeighCellConfig (435)–OtherConfig (436)–RAND-CDMA2000 (1xRTT) (437)–RAT-Type (437)–ResumeIdentity (437)–RRC-TransactionIdentifier (438)–S-TMSI (438)–TraceReference (438)–UE-CapabilityRAT-ContainerList (438)–UE-EUTRA-Capability (439)–UE-RadioPagingInfo (469)–UE-TimersAndConstants (469)–VisitedCellInfoList (470)–WLAN-OffloadConfig (470)6.3.7MBMS information elements (472)–MBMS-NotificationConfig (472)–MBMS-ServiceList (473)–MBSFN-AreaId (473)–MBSFN-AreaInfoList (473)–MBSFN-SubframeConfig (474)–PMCH-InfoList (475)6.3.7a SC-PTM information elements (476)–SC-MTCH-InfoList (476)–SCPTM-NeighbourCellList (478)6.3.8Sidelink information elements (478)–SL-CommConfig (478)–SL-CommResourcePool (479)–SL-CP-Len (480)–SL-DiscConfig (481)–SL-DiscResourcePool (483)–SL-DiscTxPowerInfo (485)–SL-GapConfig (485)。

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Total Bitrate Bitrate / Ch Total BW Channel Spacing
OFC2001,阿尔卡特， 10Tb/s，100Km 256X40G， RA+宽带EDFA， FEC， TeraLight光纤
1300
15001700 nmChallenge 2.1 - Dispersion
信道密度
新窗口(L)
是提高光纤通信系统总容量的最终限制!
Intrachannel Nonlinearity
高速(40Gb/s)信号采用RZ时脉冲展宽导致重叠：
某脉冲的相位(频率)受到重叠脉冲的调制而改变，传输速度不同，在接收端导致抖动。
某脉冲的相位(频率)受到重叠脉冲的调制而改变，产生新的频率分量，使原脉冲振幅下降并产生shadow pulse。 Case by case
2
B[Gb / s]2 L[km ] PMD [ps / km ]2 104
OC 48 192 768
B[Gb/s] 2.5 10 40
PMDL1/2[ps] 40 10 2.5
L[km]* 40,000 2,500 156
*PMD link value=0.2ps/km 1/2.
10Gb/s下 PMD 问题不大，但40Gb/s下PMD成为（严重）问题！？
• 尚有高阶PMD问题，有PMD补偿器可能更坏 • 用RZ码时问题更加严重 • DCF的PMD可能成为主要限制因素
Nothing needed to be done or nothing can be done！
Challenge 2.3 – Dispersion Slope
宽带/高数据率工作需色散及色散斜率同时补偿相对色散斜率k =S/D相同;斜率补偿率 SC=k(补)/k(传) 当前DCF只能完全满足 G.652 的要求，但可以实现 e-LEAF或TW-RS中 40x10Gb/s数百公里传输。
Bit Rate per Channel
Opportunity & Challenge
Optical fiber amplifiers – REVOLUTIONARY IMPACT Optical amplifier and WDM – VAST BANDWITH Amplified transmission systems offer significant advantages of performance, flexibility, upgradability, reliability, and cost - DELIGHT THE NETWORK OPERATORS AND SERVICES PROVIDERS Fiber dispersion and nonlinear effects - INTERESTING NEW CHALLENGES Rapid introduction of amplified systems relies on ―concurrent R&D‖- RESURGENCE OF EXCITEMENT
Optical Bandwidth
Filter Sharpness Modulator Efficiency Modulator Chirp
Spectral Efficiency
Amplifier Power Mux/Demux Complexity Modulator Bandwidth Modulator Driver Bandwidth Receiver Bandwidth Fiber Dispersion Polarization Mode Dispersion Optical Amplifier Noise
LEAF Fiber
TrueWave Fiber
G.653色散位移光纤
传输光纤的改进（1） G.653色散位移光纤
0.6
G.652 Problem
17ps/nm.km
20 EDFA 频带 10
0.5
衰减 (dB/km)
0.4 0.3
非线性大
G.653
0
色散非常小@1550nm窗口不同信道的 -10 WDM信号传输速度相近四波混频FWM严重 -20 0.2
New Technologies to Increase the Transmission Capacity
信号畸变的光域补偿技术：色散（斜率）补偿/色散管理新型色散补偿光纤/器件; 更精密的色散管理技术; 偏振模弥散补偿技术; 提高光域信噪比/降低光纤非线性分布拉曼放大器（包括L波段）; 信号畸变的电域补偿技术预补偿技术; 前向纠错技术（FEC）; 新型调制码型技术差分相移键控、偏振复用…… 其它新技术...
B[Gb / s ] L[ km ] D[ ps / nm/ km ] 105
OC 48 192 768 B[Gb/s] 2.5 10 40 DL[ps/nm] 16,000 1,000(相当于 250kmG655 或 60kmG652) 62(相当于 15kmG655 或 4kmG652
Chromatic dispersion causes different wavelengths of a light pulse to travel at different speeds in fiber, resulting in pulse spreading
波长色散
Dispersion in Fiber
0.0034 0.0073 0.021 100 0.011 0.0065 ~65
DCF(leaf)
Lucent TW RS
DCF(twrs)
* 估计值
80 65 72 11* 55 15
Dispersion Slope Compensation: Necessary for high speed and wideband DWDM
HOW?
所有的OFN均正变于光功率密度:降低信道光功率(利用拉曼放大、前向纠错等，成本问题);增大光纤有效截面积 XPM, FWM (信道互作用)反变于信道间隔:与提高信道密度(以增加系统容量)的矛盾 OFN与光纤色散的关系较复杂
Challenges for Optical Systems Design Arranged on Three Orthogonal Axes
EDFA ，FBG ，DCF, Isolators, Couplers, Filters etc.
40G 高速系统
Challenge 2 – CD/PMD
色散限制: 与码率平方成反比。电中继距离500km时： 2.5Gb/s系统不需色散补偿 10Gb/s系统需要一定的色散补偿(C+L波段时，TW-RS优于LEAF) 40Gb/s系统需要精密的色散补偿
光纤色散：信号能量中的各种分量由于在光纤中传输速度不同，而引起的信号畸变。将引起光脉冲展宽和码间串扰，最终影响通信距离和容量。色散类型 •模间色散：不同模式对应有不同的模折射率，导致群速度不同和脉冲展宽（仅多模光纤有） •波导色散 ()：传播常数随频率变化 •材料色散 n()：折射率随频率变化 •偏振模色散PMD
Number of Wavelength
Wavelength Stability (Filters & Sources) Low Loss Fiber Windows Amplifier Bandwidth Dispersion Compensation Bandwidth Fiber Nonlinearity (Function of all axes) Volume= Capacity/Fiber
Fiber Type
D
传输光纤 DCF
D
[ps/nm/km]
S
[ps/km/nm ]
2

[nm]
SC
[%]
[ m2]
Aeff
G.652
Alcatel Teralight Corning LEAF
17 8.0 4.0 4.0 -100*
0.057 0.058 0.085 0.045 -0.65*
New Technologies to Increase the Transmission Capacity
提高信道数据率; 信道数据率：1040 ...Gb/s...
来自光纤本身的限制越来越大!
需要新技术以尽量减轻这些限制的影响成本增加。提高谱效率减小信道间隔(非线性!)；偏振复用；扩展带宽 C+L(+S)波段；信号畸变更低的传输媒质：新型光纤大有效面积；小色散及小色散斜率；小偏振模色散...
0.1 1100 1200 1300 1400 1500 1600 1700
波长(nm)
Break through the limitation of dispersion!
应用长途干线长途干线城/局域网城/局域网城/局域网
1530-1570 1530-1610 1490-1610 1450-1650 1300-1650
全波
光纤传输容量极限
增加谱宽：1300nm-1700nm=54.3THz; 提高谱利用率h ： h =0.5时可达~25Tb/s/光纤对；光纤性能已经变为CRITICAL！
Challenge 3 - Optical Nonlinear Effects
Modulation of Refractive Index 2 n n n | E | 1 2 －Self- Phase modulation (SPM) • Spectral Broadening Dispersion Penalty WD －Cross- Phase modulation (XPM) M! • Spectral Broadening Dispersion Penalty － Four- Wave Mixing (FWM) • Coherent Interference Crosstalk, Power Depletion Stimulated Scattering －Stimulated Raman scatting (SRS) • Power Depletion, Intersymbol Interference S/N Degradation －Stimulated Brilloun scatting (SBS) • Power Depletion S/N Degradation