DM74LS241

August 1986Revised March 2000DM74LS240 • DM74LS241Octal 3-STATE Buffer/Line Driver/Line ReceiverDM74LS240 •General DescriptionThese buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock driv-ers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133Ω. Features■3-STATE outputs drive bus lines directly■PNP inputs reduce DC loading on bus lines■Hysteresis at data inputs improves noise margins■Typical I OL (sink current)24mA■Typical I OH (source current)-15 mA■ Typical propagation delay timesInverting 10.5 nsNoninverting 12 ns■Typical enable/disable time 18 ns■Typical power dissipation (enabled)Inverting 130 mW Noninverting 135 mW DM74LS241 Octal 3-STATE Buffer/LineOrdering Code:Order Number Package Number Package DescriptionDM74LS240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 WideDM74LS240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WideDM74LS240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WideDM74LS241WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 WideDM74LS241N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WideDevices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.Connection DiagramsDM74LS240 DM74LS241Driver/Line Receiver © 2000 Fairchild Semiconductor Corporation D M 74L S 240 • D M 74L S 241Function TablesDM74LS240InputsOutputGAYL L H L H LHXZL = LOW Logic LevelH = HIGH Logic LevelX = Either LOW or HIGH Logic LevelZ = High ImpedanceDM74LS241InputsOutputsGG1A2A1Y2YX L L X LX L H X H XH X X ZHX X LL H X X H H LXXXZ2Absolute Maximum Ratings(Note 1)Supply Voltage 7V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not beInput Voltage 7V operated at these limits. The parametric values defined in the ElectricalCharacteristics tables are not guaranteed at the absolute maximum ratings. Operating Free Air Temperature Range 0︒C to +70︒C The “Recommended Operating Conditions” table will define the conditions Storage Temperature Range -65︒C to +150︒C for actual device operation.Recommended Operating ConditionsSymbol Parameter Min Nom Max Units VCC Supply Voltage 4.75 5 5.25 VVIH HIGH Level Input Voltage 2 VVIL LOW Level Input Voltage 0.8 VIOH HIGH Level Output Current -15 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 0 70 ︒C Electrical Characteristicsover recommended operating free air temperature range (unless otherwise noted)Symbol Parameter Conditions MinTypMax Units (Note 2)VI Input Clamp Voltage V CC= Min, I I= -18 mA -1.5 VHYS Hysteresis (V T+- V T-) VCC= Min 0.2 0.4 V Data Inputs OnlyVOH HIGH Level Output Voltage V CC= Min, V IH= Min 2.7V IL= Max, I OH= -1 mAV CC= Min, V IH= Min 2.4 3.4 VV IL= Max, I OH= -3 mAV CC= Min, V IH= Min 2V IL= 0.5V, I OH= MaxVOL LOW Level Output Voltage V CC= Min I OL= 12 mA 0.4V IL= Max IOL = Max 0.5 VV IH= MinIOZH Off-State Output Current, V CC= Max VO = 2.7V 20 μA HIGH Level Voltage Applied V IL= MaxIOZL Off-State Output Current, V IH= Min VO = 0.4V -20 μA LOW Level Voltage AppliedI I Input Current at Maximum V CC= Max 0.1 mAInput Voltage V I= 7VIIH HIGH Level Input Current V CC= Max, V I= 2.7V 20 μA IIL LOW Level Input Current V CC= Max, V I= 0.4V -0.2 mA IOS Short Circuit Output Current V CC= Max (Note 3) -40 -225 mA ICC Supply Current V CC= Max, Outputs HIGH 13 23Outputs OPENOutputs LOW 26 4427 46 mAOutputs Disabled 29 50 32 54Note 2: All typicals are at V CC= 5V, T A= 25︒C.Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.DM74LS240 • DM74LS241D M 74L S 240 • D M 74L S 241Switching Characteristics at V CC = 5V and T A = 25︒CSymbolParameterConditionsMaxUnitstPLH Propagation Delay Time C L = 45 pFDM74LS240 14 ns LOW-to-HIGH Level Output R L = 667Ω DM74LS241 18tPHLPropagation Delay Time C L = 45 pFDM74LS240 18 ns HIGH-to-LOW Level Output R L = 667Ω DM74LS241 18t PZLOutput Enable Time C L = 45 pFDM74LS240 30 ns to LOW Level R L = 667Ω DM74LS241 30tPZHOutput Enable Time C L = 45 pFDM74LS240 23 ns to HIGH Level R L = 667Ω DM74LS241 23t PLZOutput Disable Time C L = 5 pFDM74LS240 25 ns from LOW Level R L = 667Ω DM74LS241 25tPHZOutput Disable Time C L = 5 pFDM74LS240 18 ns from HIGH Level R L = 667Ω DM74LS241 18t PLHPropagation Delay Time C L = 150 pFDM74LS240 18 ns LOW-to-HIGH Level Output R L = 667Ω DM74LS241 21tPHLPropagation Delay Time C L = 150 pFDM74LS240 22 ns HIGH-to-LOW Level Output R L = 667Ω DM74LS241 22tPZLOutput Enable Time C L = 150 pFDM74LS240 33 ns to LOW Level R L = 667Ω DM74LS241 33tPZHOutput Enable Time C L = 150 pFDM74LS240 26 ns to HIGH LevelR L = 667ΩDM74LS241264DM74LS240 • DM74LS241 Physical Dimensions inches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 WidePackage Number M20BD M 74L S 240 • D M 74L S 241Physical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Description M20D6Physical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N20AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR U SE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1. Life support devices or systems are devices or systems2. A critical component in any component of a life supportwhich, (a) are intended for surgical implant into the device or system whose failure to perform can be rea- body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. DM74LS240 • DM74LS241 Octal 3 -STATE Buffer/Line Driver/Line Receiver。