MAX3762EEP中文资料
MAX471MAX472的中文资料大全
M A X471M A X472的中文资料大全(总4页)-本页仅作为预览文档封面，使用时请删除本页-MAX471/MAX472的特点、功能美国美信公司生产的精密高端电流检测放大器是一个系列化产品，有MAX471/MA X472、 MAX4172/MAX4173等。
它们均有一个电流输出端，可以用一个电阻来简单地实现以地为参考点的电流/电压的转换，并可工作在较宽电压内。
MAX471/MAX472具有如下特点：●具有完美的高端电流检测功能；●内含精密的内部检测电阻（MAX471）；●在工作温度范围内，其精度为2%；●具有双向检测指示，可监控充电和放电状态；●内部检测电阻和检测能力为3A，并联使用时还可扩大检测电流范围；●使用外部检测电阻可任意扩展检测电流范围（MAX472）；●最大电源电流为100μA；●关闭方式时的电流仅为5μA；●电压范围为3～36V；●采用8脚DIP/SO/STO三种封装形式。
MAX471/MAX472的引脚排列如图1所示，图2所示为其内部功能框图。
表1为MAX471/MAX472的引脚功能说明。
MAX471的电流增益比已预设为500μA/A，由于2kΩ的输出电阻（ROUT）可产生1V/A的转换，因此±3A时的满度值为3V.用不同的ROUT电阻可设置不同的满度电压。
但对于MAX471，其输出电压不应大于VRS+。
对于MAX472，则不能大于。
MAX471引脚图如图１所示，MAX472引脚图如图２所示。
MAX471/MAX472的引脚功能说明引脚名称功能MAX471MAX47211SHDN关闭端。
正常运用时连接到地。
当此端接高电平时，电源电流小于5μA2，3-RS+内部电流检测电阻电池（或电源端）。
“+”仅指示与SIGN输出有关的流动方向。
封装时已将2和3连在了一起-2空脚-3RG1增益电阻端。
通过增益设置电阻连接到电流检测电阻的电池端44GND地或电池负端55SIGN集电极开路逻辑输出端。
MAX3232ECPE中文资料
MAX3222EEPN -40°C to +85°C 18 Plastic DIP —
MAX3232ECAE 0°C to +70°C 16 SSOP
—
MAX3232ECWE 0°C to +70°C 16 Wide SO —
MAX3232ECPE 0°C to +70°C 16 Plastic DIP —
Next-Generation Device Features
♦ For Space-Constrained Applications MAX3228E/MAX3229E: ±15kV ESD-Protected, +2.5V to +5.5V, RS-232 Transceivers in UCSP
*Dice are tested at TA = +25°C, DC parameters only. **EP = Exposed paddle.
Ordering Information continued at end of data sheet.
Pin Configurations, Selector Guide, and Typical Operating Circuits appear at end of data sheet.
MAX3222EETP
20 Thin QFN-40°C to +85°C EP** (5mm x
5mm)
T2055-5
MAX3222EEUP -40°C to +85°C 20 TSSOP
—
MAX3222EEAP -40°C to +85°C 20 SSOP
—
MAX3222EEWN -40°C to +85°C 18 Wide SO —
SP202EEP中文资料
■Operates from Single +5V Power Supply ■Meets All RS-232D and ITU V.28Specifications■Operates with 0.1µF to 10µF Capacitors ■High Data Rate – 120Kbps Under Load ■Low Power Shutdown ≤1µA (Typical)■3-State TTL/CMOS Receiver Outputs ■Low Power CMOS – 3mA Operation ■Improved ESD Specifications:±15kV Human Body Model±15kV IEC1000-4-2 Air Discharge ±8kV IEC1000-4-2 Contact DischargeDESCRIPTION…The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance.The ESD tolerance has been improved on these devices to over ±15KV for both Human Body Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with Sipex's SP232A/233A/310A/312A devices as well as popular industry standards. As with the initial versions, the SP202E/232E/233E/310E/312E devices feature at least 120Kbps data rate under load, 0.1µF charge pump capacitors, and overall ruggedness for commercial applications.This family also features Sipex's BiCMOS design allowing low power operation without sacrificing performance. The series is available in plastic and ceramic DIP and SOIC packages operating over the commercial, industrial and military temperature ranges.Number of RS232No. of Receivers No. of ExternalModel Drivers Receivers Active in Shutdown 0.1µF CapacitorsShutdown WakeUp TTL Tri–StateSP202E 2204No No No SP232E 2204No No No SP233E 2200No No No SP310E 2204Yes No Yes SP312E2224Yes Yes YesABSOLUTE MAXIMUM RATINGS This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.Vcc .................................................................................................................................................................+6VV+....................................................................................................................(Vcc-0.3V) to +11.0V V-............................................................................................................................................................-11.0V Input VoltagesT IN .........................................................................................................................-0.3 to (Vcc +0.3V)RIN ............................................................................................................................................................±15VOutput VoltagesT OUT ....................................................................................................(V+, +0.3V) to (V-, -0.3V)ROUT ................................................................................................................-0.3V to (Vcc +0.3V)Short Circuit DurationT OUT .........................................................................................................................................ContinuousPower DissipationCERDIP..............................................................................675mW(derate 9.5mW/°C above +70°C)Plastic DIP..........................................................................375mW(derate 7mW/°C above +70°C)Small Outline......................................................................375mW(derate 7mW/°C above +70°C)SPECIFICATIONS元器件交易网元器件交易网PERFORMANCE CURVES+Figure 1. Typical Circuit using the SP202E or SP232E.FEATURES…The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that meet the specifications of RS-232 and V.28serial protocols with enhanced ESD perfor-mance. The ESD tolerance has been improved on these devices to over ±15KV for both Human Body Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compat-ible with Sipex's 232A/233A/310A/312A devices as well as popular industry standards.As with the initial versions, the SP202E/232E/233E/310E/312E devices feature10V/µs slew rate, 120Kbps data rate under load, 0.1µF charge pump capacitors, overall ruggedness for commercial applications, and increased drive current for longer and more flexible cable configurations. This family also features Sipex's BiCMOS design allowing low power operation without sacrificing performance.The SP202E/232E/233E/310E/312E devices have internal charge pump voltage converters which allow them to operate from a single +5V supply. The charge pumps will operate with polarized or non-polarized capacitors ranging from 0.1 to 10 µF and will generate the ±10V needed to generate the RS-232 output levels.Both meet all EIA RS-232 and ITU V.28specifications.The SP310E provides identical features as the SP232E with a single control line which simultaneously shuts down the internal DC/DC converter and puts all transmitter and receiver outputs into a high impedance state. The SP312E is identical to the SP310E with separate tri-state and shutdown control lines.THEORY OF OPERATIONThe SP232E , SP233E , SP310E and SP312Edevices are made up of three basic circuit blocks –1) a driver/transmitter, 2) a receiver and 3) a charge pump. Each block is described below.Driver/TransmitterThe drivers are inverting transmitters, which ac-cept TTL or CMOS inputs and output the RS-232signals with an inverted sense relative to the input logic levels. Typically the RS-232 output voltage swing is ±9V. Even under worst case loading conditions of 3kOhms and 2500pF, the output is guaranteed to be ±5V, which is consistent with the RS-232 standard specifications. The transmitter outputs are protected against infinite short-circuits to ground without degradation in reliability.元器件交易网The instantaneous slew rate of the transmitteroutput is internally limited to a maximum of 30V/µs in order to meet the standards [EIA RS-232-D 2.1.7, Paragraph (5)]. However, the transition re-gion slew rate of these enhanced products is typi-cally 10V/µs. The smooth transition of the loaded output from V OL to V OH clearly meets the mono-tonicity requirements of the standard [EIA RS-232-D 2.1.7, Paragraphs (1) & (2)].ReceiversThe receivers convert RS-232 input signals to inverted TTL signals. Since the input is usually from a transmission line, where long cable lengthsand system interference can degrade the signal, theinputs have a typical hysteresis margin of 500mV.This ensures that the receiver is virtually immune to noisy transmission lines.The input thresholds are 0.8V minimum and 2.4V maximum, again well within the ±3V RS-232requirements. The receiver inputs are also pro-tected against voltages up to ±15V. Should an input be left unconnected, a 5KOhm pulldown resistor to ground will commit the output of the receiver to a high state.Figure 2. Typical Circuits using the SP233ECP and SP233ECTFigure 3. Typical Circuits using the SP310E and SP312EFigure 4. Charge Pump — Phase 1Figure 5. Charge Pump — Phase 2In actual system applications, it is quite possible for signals to be applied to the receiver inputs before power is applied to the receiver circuitry.This occurs, for example, when a PC user attempts to print, only to realize the printer wasn’t turned on.In this case an RS-232 signal from the PC will appear on the receiver input at the printer. When the printer power is turned on, the receiver will operate normally. All of these enhanced devices are fully protected.Charge PumpThe charge pump is a Sipex –patented design (5,306,954) and uses a unique approach com-pared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 10V power supplies. There is a free–running oscillator that controls the four phases of the voltage shifting. A description of each phase follows.Phase 1— V SS charge storage —During this phase of the clock cycle, the positive side of capacitors C 1 and C 2 are initially charged to +5V. C l + is then switched to ground and the charge in C 1– is transferred to C 2–. Since C 2+ is connected to +5V, the voltage potential across capacitor C 2 is now 10V.Phase 2— V SS transfer — Phase two of the clock con-nects the negative terminal of C 2 to the V SS storage capacitor and the positive terminal of C 2to ground, and transfers the generated –l0V to C 3. Simultaneously, the positive side of capaci-tor C 1 is switched to +5V and the negative side is connected to ground.Phase 3— V DD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C 1 produces –5V in the negative terminal of C 1, which is applied to the negative side of capacitor C 2. Since C 2+ is at +5V, the voltage potential across C 2 is l0V.Phase 4— V DD transfer — The fourth phase of the clock connects the negative terminal of C 2 to ground,and transfers the generated l0V across C 2 to C 4,the V DD storage capacitor. Again, simultaneously with this, the positive side of capacitor C 1 is switched to +5V and the negative side is con-nected to ground, and the cycle begins again.Since both V + and V – are separately generated from V CC ; in a no–load condition V + and V – willFigure 6. Charge Pump Waveforms+10Va) C 2+GND GNDb) C 2––10VFigure 7. Charge Pump — Phase 3Figure 8. Charge Pump — Phase 4be symmetrical. Older charge pump approachesthat generate V – from V + will show a decrease in the magnitude of V – compared to V + due to the inherent inefficiencies in the design.The clock rate for the charge pump typically operates at 15kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating.Shutdown (SD) and Enable (EN) for the SP310E and SP312EBoth the SP310E and SP312E have a shutdown/standby mode to conserve power in battery-pow-ered systems. To activate the shutdown mode,which stops the operation of the charge pump, a logic “0” is applied to the appropriate control line.For the SP310E , this control line is ON/OFF (pin 18). Activating the shutdown mode also puts theSP310E transmitter and receiver outputs in a high impedance condition (tri-stated). The shutdown mode is controlled on the SP312E by a logic “0”on the SHUTDOWN control line (pin 18); this also puts the transmitter outputs in a tri–state mode. The receiver outputs can be tri–stated separately during normal operation or shutdown by a logic “1” on the ENABLE line (pin 1).Wake–Up Feature for the SP312EThe SP312E has a wake–up feature that keeps all the receivers in an enabled state when the device is in the shutdown mode. Table 1 defines the truth table for the wake–up function.With only the receivers activated, the SP312E typically draws less than 5µA supply current. In the case of a modem interfaced to a computer in power down mode, the Ring Indicator (RI) signal from the modem would be used to "wake up" the computer, allowing it to accept data transmission.After the ring indicator signal has propagated through the SP312E receiver, it can be used to trigger the power management circuitry of the computer to power up the microprocessor, and bring the SD pin of the SP312E to a logic high, taking it out of the shutdown mode. The receiver propagation delay is typically 1µs. The enable time for V+ and V– is typically 2ms. After V+ and V– have settled to their final values, a signal can be sent back to the modem on the data terminal ready (DTR) pin signifying that the computer is ready to accept and transmit data.Pin Strapping for the SP233ECTThe SP233E packaged in the 20–pin SOIC pack-age (SP233ECT) has a slightly different pinout than the SP233E in other package configurations. To operate properly, the following pairs of pins must be externally wired together:the two V– pins (pins 10 and 17)the two C2+ pins (pins 12 and 15)the two C2– pins (pins 11 and 16)All other connections, features, functions and performance are identical to the SP233E as specified elsewhere in this data sheet.ESD TOLERANCEThe SP202E/232E/233E/310E/312E devices incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD struc-ture is improved over our previous family for more rugged applications and environments sen-sitive to electro-static discharges and associated transients. The improved ESD tolerance is at least ±15KV without damage nor latch-up. There are different methods of ESD testing applied:a) MIL-STD-883, Method 3015.7b) IEC1000-4-2 Air-Dischargec) IEC1000-4-2 Direct ContactThe Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 9. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently.The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise元器件交易网Table 1. Wake-up Function Truth Table.Figure 9. ESD Test Circuit for Human Body ModelFigure 10. ESD Test Circuit for IEC1000-4-2with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC1000-4-2 is shown on Figure 10. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method.With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT)through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system.This energy, whether discharged directly or through air, is predominantly a function of theSP202E HUMAN BODY IEC1000-4-2FamilyMODEL Air Discharge Direct Contact LevelDriver Outputs ±15kV ±15kV ±8kV 4Receiver Inputs ±15kV±15kV±8kV4Figure 11. ESD Test Waveform for IEC1000-4-2t=0nst=30ns0A15A30At ➙i ➙Table 2. Transceiver ESD Tolerance Levelsdischarge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed.The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directlydischarged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC.The circuit models in Figures 9 and 10 represent the typical ESD testing circuit used for all three methods. The C S is initially charged with the DC power supply when the first switch (SW1) is on.Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through R S , the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2switch is pulsed so that the device under test receives a duration of voltage.For the Human Body Model, the current limiting resistor (R S ) and the source capacitor (C S ) are 1.5k Ω an 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (R S ) and the source capacitor (C S ) are 330Ω an 150pF, respectively.The higher C S value and lower R S value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point.元器件交易网ORDERING INFORMATIONModel.......................................................................................Temperature Range................................................................................Package SP202ECN.....................................................................................0°C to +70°C...........................................................................16–pin N–SOIC SP202ECP.....................................................................................0°C to +70°C.......................................................................16–pin Plastic DIP SP202ECT.....................................................................................0°C to +70°C................................................................................16–pin SOIC SP202EEN...................................................................................–40°C to +85°C..........................................................................16–pin N-SOIC SP202EEP...................................................................................–40°C to +85°C.....................................................................16–pin Plastic DIP SP202EET...................................................................................–40°C to +85°C..............................................................................16–pin SOICSP232ECN.....................................................................................0°C to +70°C...........................................................................16–pin N–SOIC SP232ECP.....................................................................................0°C to +70°C.......................................................................16–pin Plastic DIP SP232ECT.....................................................................................0°C to +70°C................................................................................16–pin SOIC SP232EEN...................................................................................–40°C to +85°C..........................................................................16–pin N-SOIC SP232EEP...................................................................................–40°C to +85°C.....................................................................16–pin Plastic DIP SP232EET...................................................................................–40°C to +85°C..............................................................................16–pin SOIC SP233ECP.....................................................................................0°C to +70°C.......................................................................20–pin Plastic DIP SP233ECT.....................................................................................0°C to +70°C................................................................................20–pin SOIC SP233EEP...................................................................................–40°C to +85°C.....................................................................20–pin Plastic DIP SP233EET...................................................................................–40°C to +85°C..............................................................................20–pin SOICSP310ECP.....................................................................................0°C to +70°C.......................................................................18–pin Plastic DIP SP310ECT.....................................................................................0°C to +70°C................................................................................18–pin SOIC SP310ECA.....................................................................................0°C to +70°C...............................................................................20–pin SSOP SP310EEP...................................................................................–40°C to +85°C.....................................................................18–pin Plastic DIP SP310EET...................................................................................–40°C to +85°C..............................................................................18–pin SOIC SP310EEA...................................................................................–40°C to +85°C.............................................................................20–pin SSOP SP312ECP.....................................................................................0°C to +70°C.......................................................................18–pin Plastic DIP SP312ECT.....................................................................................0°C to +70°C................................................................................18–pin SOIC SP312ECA.....................................................................................0°C to +70°C...............................................................................20–pin SSOP SP312EEP...................................................................................–40°C to +85°C.....................................................................18–pin Plastic DIP SP312EET...................................................................................–40°C to +85°C..............................................................................18–pin SOIC SP312EEA...................................................................................–40°C to +85°C.............................................................................20–pin SSOPPlease consult the factory for pricing and availability on a Tape-On-Reel option.CorporationSIGNAL PROCESSING EXCELLENCESipex CorporationHeadquarters andSales Office22 Linnell CircleBillerica, MA 01821TEL: (978) 667-8700FAX: (978) 670-9001e-mail: sales@Sales Office233 South Hillview DriveMilpitas, CA 95035TEL: (408) 934-7500FAX: (408) 935-7600Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.。
MAX3267ESA中文资料
19-4796; Rev 1; 6/00
KIT ATION EVALU E L B A IL AVA
1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs
General Description
Features
o 200nA Input-Referred Noise (MAX3266) 500nA Input-Referred Noise (MAX3267) o 920MHz Bandwidth (MAX3266) 1900MHz Bandwidth (MAX3267) o 1mA Input Overload o +3.0V to +5.5V Single-Supply Voltage
VCC 0.01µF 1.5k CFILTER 400pF FILTER PHOTODIODE IN OUT+ VCC 0.1µF
100Ω OUT-
MAX3266 MAX3267
GND
0.1µF
LIMITING AMPLIFIER
________________________________________________________________ Maxim Integrated Products
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
MAX3222E中文材料
MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E为+3.0V供电的EIA/TIA-232和V.28/V.24通信接口芯片，具有低功耗、高数据速率、增强型ESD保护等特性。
增强型ESD结构为所有发送器输出和接收器输入提供保护，可承受±15kV IEC 1000-4-2气隙放电、±8kV IEC 1000-4-2接触放电(MAX3246E为±9kV)和±15kV人体放电模式。
MAX3237E的逻辑引脚及接收器I/O引脚均提供上述保护，而它的发送器输出引脚提供±15kV人体放电模式的保护。
采用专有的低压差发送输出级，+3.0V至+5.5V供电时利用内部双电荷泵提供真正的RS-232性能。
工作于+3.3V电源时，荷泵仅需要四个0.1µF的小电容。
每款器件保证在250kbps数据速率下维持RS-232输出电平。
MAX3237E确保标准工作模式下提供250kbps的数据速率、在MegaBaud™工作模式下速率高达1Mbps。
MAX3222E/MAX3232E包括两个发送器和两个接收器；MAX3222E具有1µA关断模式，可降低电池供电便携式系统的功耗。
关断模式下，MAX3222E接收器仍保持有效状态，允许监视外设，而且仅消耗1µA的电源电流。
MAX3222E和MAX3232E的引脚、封装和功能分别兼容于工业标准的MAX242和MAX232。
MAX3241E/MAX3246E提供完备的串口(3个驱动器/5个接收器)，专为笔记本电脑和亚笔记本电脑设计。
MAX3237E (5个驱动器/3个接收器)非常适合要求高速数据传输的外围设备。
这些器件都具有关断模式，此模式下所有接收器仍保持有效状态，而且仅消耗1µA (MAX3241E/MAX3246E)或10nA (MAX3237E)的电流。
MAX3222E、MAX3232E和MAX3241E都具有节省空间的SO、SSOP、TQFN及TSSOP封装，MAX3237E提供SSOP封装，MAX3246E提供超小型6 x 6 UCSP™封装。
DSC-CN3762
参数
符号
测试条件
输入电压范围
VCC
低电压锁存阈值
UVLO
芯片工作电流 恒压充电电压
电流检测
流入 BAT 管脚电流
涓流充电阈值 涓流充电阈值迟滞 充电结束阈值 再充电阈值 过压阈值
IVCC VREG
VCS
IBAT1 IBAT2 VPRE HPRE Iterm VRE Vov
VBAT＞VREG 恒压充电，FB 连接到 BAT VBAT＞VPRE，VCSP－VBAT VBAT＜VPRE，VCSP－VBAT 充电结束模式，VBAT＝7.4V 睡眠模式，VBAT＝7.4V BAT管脚电压上升 BAT管脚电压下降 充电电流下降 BAT管脚电压下降 BAT 管脚电压上升
超出以上所列的极限参数可能造成器件的永久损坏。以上给出的仅仅是极限范围，在这样的极限条件下工作， 器件的技术指标将得不到保证，长期在这种条件下还会影响器件的可靠性。
3
Rev 1.0
如韵电子 CONSONANCE
电气特性:
（VCC＝15V，TA＝－40℃ 到 85℃，除非另有注明）
调整恒压充电电压
如果在CN3762的FB管脚和BAT管脚之间接一个电阻,可以提高恒压充电电压，以抵消电池内阻和连线电阻的 电压降，使得电池充电更饱满，如图3所示。
输入电压 9 VIN
FB 6
CN3762
Rx
GND BAT 7
如果采用图3中的连接方式，那么恒压充电电压典型值VREG为：
的正极。同时，此管脚和CSP管脚测量电流检测电阻RCS两端的
电压，并将此电压信号反馈给CN3762进行电流调制。 充电电流检测正输入端。此管脚和BAT管脚测量电流检测电阻
2N3763L中文资料
2N3763* 2N3765
60 60
Unit
Vdc Vdc Vdc Adc
TO-39* (TO-205AD) 2N3762, 2N3763
2N3762* 1 2N3763*
1.0
2N3764 2 2N3765
0.5 W
0
Total Power Dissipation @ TA = +250C Operating & Storage Junction Temp. Range
Output Capacitance VCB = 10 Vdc, IE = 0, 100 kHz ≤ f ≤ 1.0 MHz Input Capacitance VEB = 0.5 Vdc, IC = 0, 100 kHz ≤ f ≤ 1.0 MHz
SWITCHING CHARACTERISTICS
Street, Lawrence, MA 01841 1-800-446-1158 / (978) 794-1666 / Fax: (978) 689-0803
120101 Page 1 of 2
元器件交易网
2N3762, L, 2N3763, L, 2N3764, 2N3765 JAN SERIES
ELECTRICAL CHARACTERISTICS (con’t)
Characteristics Collector-Emitter Cutoff Current VEB = 2.0 Vdc, VCE = 20 Vdc VEB = 2.0 Vdc, VCE = 30 Vdc Emitter-Base Cutoff Current VEB = 2.0 Vdc VEB = 5.0 Vdc Symbol 2N3762, 2N3764 2N3763, 2N3765 All Types 2N3762, 2N3764 2N3763, 2N3765 ICEX Min. Max. 100 100 200 10 10 Unit ηAdc
MAX2682中文资料
元器件交易网
o <0.1µA Low-Power Shutdown Mode
o Ultra-Small Surface-Mount Packaging
Ordering Information
PART
TEMP. RANGE
PINPACKAGE
SOT TOP MARK
MAX2680EUT-T -40°C to +85°C 6 SOT23-6 AAAR
General Description
The MAX2680/MAX2681/MAX2682 miniature, low-cost, low-noise downconverter mixers are designed for lowvoltage operation and are ideal for use in portable communications equipment. Signals at the RF input port are mixed with signals at the local oscillator (LO) port using a double-balanced mixer. These downconverter mixers operate with RF input frequencies between 400MHz and 2500MHz, and downconvert to IF output frequencies between 10MHz and 500MHz.
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Note 1: Dice are tested at TA = +25°C. Note 2: Outputs terminated with 50Ω to VCC - 2V. Note 3: Voltage measurements are relative to VCC.
2
_______________________________________________________________________________________
________________________Applications
622Mbps LAN/ATM LAN Receivers 155Mbps LAN/ATM LAN Receivers
*Dice are designed to operate from -40°C to +85°C, but are tested and guaranteed only at TA = +25°C. +Denotes a lead-free/RoHS-compliant package.
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.5V to +5.5V, DISABLE = low, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +5.0V, TA = +25°C.) (Note 1) PARAMETER Power-Supply Current LOS Output TTL High LOS Output TTL Low LOS Output PECL High LOS Output PECL Low DISABLE Input Current DISABLE Input High DISABLE Input Low DISABLE Input PECL High DISABLE Input PECL Low PECL Data Output Voltage High (VOH) PECL Data Output Voltage Low (VOL) Disabled Differential Output Disabled Common-Mode Output MAX3761, IVCC MAX3762, IVCC MAX3761 MAX3761 (TA = +25°C to +85°C) (TA = -40°C to +25°C) -1150 -1830 2.65 0.8 -1160 -1470 -1150 -1830 -100 VCC - 0.7 -880 -1555 100 VCC -1.2 2.8 0.40 0.44 -880 -1555 100 CONDITIONS MIN TYP 25 30 MAX 37 46 UNITS mA V V mV mV μA V V mV mV mV mV mV V
_______________General Description
The MAX3761/MAX3762 limiting amplifiers, with 4mV sensitivity and PECL data outputs, are optimized for operation in low-cost, 622Mbps, LAN/ATM LAN fiber optics applications. An integrated power detector senses the input signal’s amplitude. A received-signal-strength indicator (RSSI) gives an analog indication of the power level, while the complementary loss-of-signal (LOS) outputs indicate if the input power level exceeds the programmed threshold level. The LOS threshold can be adjusted to detect signal amplitudes between 3mVp-p and 100mVp-p, providing a 15dB LOS adjustment in fiber optic receivers. The LOS outputs have 3.5dB of hysteresis, which prevents chatter when input signal levels are small. The MAX3761’s LOS outputs are compatible with TTL-logic levels. The MAX3762 has PECL LOS outputs. DISABLE and LOS can be used to implement a squelch function, which turns off the data outputs when the input signal is below the programmed threshold.
+5V 10nF RSSI VCCO 100pF BYPASS SUPPLY CIN 5.6nF VIN+ CIN 5.6nF VINVCC EN CZP CZN DISABLE LOS+ LOSOUTOUT+ 50Ω 50Ω GNDO GND VTH SUB VCC - 2V CAZ 150pF
MAX3761 MAX3762
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
16 VCCO 15 OUT+ 14 OUT13 GNDO 12 VTH 11 INV
MAX3761
ห้องสมุดไป่ตู้
FILTER 100pF +VCC R1 100kΩ R2 22kΩ CFILTER INV
QSOP
MAX3762 at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
元器件交易网
Low-Power, 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
♦ Chatter-Free Power Detector with Programmable Loss-of-Signal Outputs ♦ 4mV Input Sensitivity ♦ PECL Data Outputs ♦ Single 5V Power Supply ♦ 250ps Output Edge Speed ♦ Low 15ps Pulse-Width Distortion ♦ TTL Loss-of-Signal Interface Logic—MAX3761 ♦ PECL Loss-of-Signal Interface Logic—MAX3762
MAX3761/MAX3762
Ordering Information
PART MAX3761EEP+ MAX3761E/D MAX3762EEP+ MAX3762E/D TEMP RANGE -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PIN-PACKAGE 20 QSOP Dice* 20 QSOP Dice*
元器件交易网
19-1097; Rev 4; 8/08
KIT ATION EVALU LE B A IL A AV
Low-Power, 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
____________________________Features
Low-Power, 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
MAX3761/MAX3762
ABSOLUTE MAXIMUM RATINGS
VCC, VCCO............................................................-0.5V to +7.0V FILTER, RSSI, EN, VIN+, VIN-, CZP, CZN, DISABLE, LOS+, LOS-, INV, VTH...............-0.5V to (VCC + 0.5V) PECL Output Current (OUT+, OUT-, LOS+, LOS-) ............50mA Continuous Power Dissipation (TA = +85°C) QSOP (derate 9.1mW/°C above +85°C) .......................591mW Operating Junction Temperature Range ...........-40°C to +150°C Processing Temperature (die) .........................................+400°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C