A rapid optoelectronic half-adder logic

IEEE JOURNAL OF QUANTUM ELECTRONICS, VOL 26, NO 4. APRIL

1990

619

Quantum Electronics Letters

A Rapid Optoelectronic Half-Adder Logic Composed of a Pair of GaAs

Metal-Semiconductor-Metal Photodetectors

KAZUTOSHI NAKAJIMA, TAKASHI IIDA, KEN-ICHI SUGIMOTO, HIROFUMI KAN, AND

YOSHIHIKO MIZUSHIMA

Absfrucf-A novel optoelectronic half-adder logic, composed of only two GaAs metal-semiconductor-metal photodetectors (MSM-PD’s), is reported. The optoelectronic logic is made to utilize the feature of the MSM-PD, which has a symmetrical Schottky contact structure which

operates for both polarities of electrical bias (positive and negative). Without any other active devices like transistors, the output delay time is short, less than 100 ps, which assures a very fast arithmetic opera-

tion.

I. INTRODUCTION ECENTLY, several optical computing systems and R

their component devices have been reported [ 11-[3]. In this letter, we report a novel rapid optoelectronic half- adder logic. The inputs are optical signals, and the results are electrical signals. The output can be fed to laser diodes

converting into optical signals, thus optical input-output is easily realizable. By a tandem connection of this half-adder logic ele- ments, a full-adder is also possible, which will be re- ported later. Here we describe the essential feature of this one-bit half-adder for optical inputs. The half-adder is basically composed of only two GaAs metal-semiconductor-metal photodetectors (MSM-PD’s). Without any other active devices such as transistors, the optoelectronic logic is able to operate at an ultrahigh speed, since its capacitance is minimized. The GaAs MSM-PD has features of an ultrahigh speed, while the symmetrical Schottky contact structure allows a bias ap- plication in either polarity [4]-[ 111. The electrical output signals are generated in a polarity corresponding to the bias. Moreover, the planar structure of the MSM-PD is very suitable for monolithic integration [ 121-[18].

11. CIRCUIT FABRICATION AND OPERATION The optoelectronic half-adder logic circuit is shown in Fig. 1. For simplicity, the following experiment is per-

formed using discrete details. We show that even with such a preliminary setup on a table, a promising result can be obtained. Two GaAs MSM-PD’s are provided as the input gates for two optical signals. To each of the MSM- PD’s, 5 V biases with mutually opposite polarities, (V,)

Manuscript received July 3, 1989; revised November 10, 1989. The authors are with Hamamatsu Photonics, Hamamatsu 435, Japan.

IEEE Log Number 8933806.

Fig. 1. Optical half-adder logic gate composed of two GaAs

MSM-PD’s,

with resistances and a capacitance.

and (V,) are applied. As shown in Fig. 2, the MSM-PD has a 200 pm square active area. A pair of symmetrical Schottky contact electrodes are disposed interdigitally, on an undoped epitaxial GaAs substrate. Both the rise and falltimes are less than 50 ps for a 50 Cl load resistance.

The positive current signal generated at the electrode (a2) of MSM-PD (A) is divided at a point (4). Part of it is transferred to the SUM output terminal through the re- sistance ( RI ) and the other to the CARRY output terminal

through the resistance (R2). In order that the current sig- nal is equally divided at the point (q), these resistances

have the same magnitude. On the other hand, the negative current signal generated at the electrode (b, ) of MSM-PD (B) is transferred to the

SUM output terminal, and the positive current signal gen- erated at the electrode ( b2 ) is transferred to the CARRY

output terminal. The resistance (R2) must not be much

smaller than the load resistance at the output terminal, otherwise the resistance acts as a shunt for the MSM-PD (B) and the signal from the MSM-PD (B) becomes too small. If it is too large, the response time becomes slow. We choose 50 Cl for R2 and RI, which is the same as the load resistance. Resistance (R3) and capacitance (C) are for bias-blocking. The SUM output signal is obtained at a point (p) by an

XOR logic, from the electrode (a2) of MSM-PD (A) and (b, ) of MSM-PD (B). Because these electrical signals

are of the opposite polarities, the electrical signals from two MSM-PD’s cancel each other at the point (p). On

0018-9197/90/0400-0619$01 .OO 0 1990 IEEE