freecale_S12_msCAN
Freescale 16-bit MC9S12HY64 自动汽车仪表盘演示板用户指南说明书
Freescale Semiconductor Users GuideDocument Number:S12HY64ACDUGRev. 2, 12/2009 Contents1Demonstration BoardHardwareThe dashboard is developed with Freescale’s low cost 16-bit microcontroller the MC9S12HY, which is responsible for driving all the board functionality. The hardware comes complete with four motors that are shaft-illuminated (providing an aesthetic back-light for the needle pointers), a160-segment LCD display, molex CAN and LIN connections, a piezoelectric speaker to demonstrate sound capability, and a series of switches and LEDs to emulate standard dashboard functionality.1Demonstration Board Hardware . . . . . . . . . . . . . . . . . . . 1 2How to Set Up and Operate the Demo . . . . . . . . . . . . . . 2 3FAQs and Talking Points. . . . . . . . . . . . . . . . . . . . . . . . . 4 4Additional Resources and Materials . . . . . . . . . . . . . . . . 5MC9S12HY64 Automotive Cluster Demo Users Guideby:Steven McLaughlinApplications EngineerMicrocontroller Solutions Group, ScotlandHow to Set Up and Operate the DemoFigure1. MC9S12HY Dashboard Cluster Demo Board2How to Set Up and Operate the DemoThe demo is very straightforward to set up. It requires a 12 V DC supply, which is connected at the bottom right-hand side of the board, as shown in Figure1. Switch three should be set to the on position. (This demo does not use switch two, the ignition switch, so it can be in any state.) The demo will then start automatically in the initialization phase (described below) and all motors will return to zero all at once.How to Set Up and Operate the DemoFigure 2. Flow Diagram (With Pictures) of Demo OperationPower upInitialization phase:LCD displaysMotors return tozero position“S12HY”Buttons can initiate indicator LED, scroll to trip A/B screens,enter hazard mode — Potentiometer adjusts sound All modules moveat different speedsin clockwise andcounter-clockwisedirection and the LCDupdates varioussegmentsvolumeFAQs and Talking PointsBesides driving the motors and LCD, the demo incorporates some software solutions that enhance functionality.1.Pressing switch 5 activates a horn sound and pressing switch 4 toggles the cruise control on and off.2.Pressing the menu switch allows the user to scroll through the odometer, trip A meter, and trip Bmeter. This is indicated clearly on the LCD, and the user will also see the digits change.3.By pressing switch 4 and 5 simultaneously, the demo will enter hazard mode, shut down theoperation, enable an alarm sound, and begin to flash and display “hazard” on the LCD. Release the switches to return the demo to normal operation.4.The piezoelectric speaker plays a continuous indicator relay clicking sound. Turning thepotentiometer varies the amplitude of the PWM signal that is fed to the piezoelectric speaker. Further incorporated into this demo are two significant software solutions. First, it should be noted that the MC9S12HY does not contain a hardware stepper stall detect module (SSD), which means that the motor cannot detect the zero position and cannot determine when the end of travel has been reached. But this demo is capable of both — an integrated driver capable of performing stall detect with microstepping is used to enhance the motor functionality for these purposes.Second, the user will notice that the odometer value displayed on the LCD is maintained even after powering the demo off and then back on, despite the MC9S12HY device having no EEPROM. The demo uses an emulated EEPROM software driver, available for free on the Freescale website, which uses the device’s D-flash to read and write the odometer values.3FAQs and Talking Points1.Is the SSD software available for general use?—An application note, AN4024 has been released explaining the SSD software technique and is available with demo software.2.Only the odometer value is restored at POR — why aren’t the other values restored?—This application is for demonstration purposes, so only the odometer value has been programmed with the EEE driver. In a production application other values, such as the trip A/Bmeter, can be implemented in the same way.3.How are the shaft pointers illuminated?—Each motor includes an integrated white LED which is connected directly to a GPIO. (It should be pointed out that these require one GPIO each.) Shafts are illuminated by controlling theGPIO in a manner normally used for initiating LEDs.4.What is Jellyfish?—This is the internal code name for this device, which is why a jellyfish symbol and the word “Jellyfish” appear on the LCD screen.5.There are a number of other components that do not seem to be used, as well as somenon-populated components. What are they?—The non-populated components are for the 32-bit MPC5606S device. This board was built witha footprint for both MPC5606S (found on the underside of the board) and MC9S12HY. This isAdditional Resources and Materials why some LEDs and potentiometers do not operate with this demo: the MC9S12HY does notsupport them.6.The demo board contains a CAN and LIN molex connector. Do these work?—Yes, but they have not been enabled on this demo.7.Where can I find the schematics of the demo, and is there demo code available?—Axiom will provide a CD with both schematics and software when you purchase the board. The firmware for this demo is not openly available.8.Is it possible to have a backlit LCD?—It is not included on this demo, but it is possible. However, it may be difficult to implement if the LCD has already been soldered to the board. The backlight requires a 5 V DC power supplyand a GPIO has been made available on this demo for this purpose.9. I see a connection for auxiliary motors on the left-hand side of the board — what is it for?—This connector allows the connection of additional motors, but is not available for the MC9S12HY (which can drive a maximum of only four motors). It is for the MPC5606S only.10.If I don’t like the piezoelectric speaker sound, can I change it?—Yes. This is a PWM signal being fed via an amplifier, and it is possible to alter it.4Additional Resources and MaterialsApplication notes available at :•Application note titled Introduction to the Stepper Stall Detector Module (document AN3330).•Application note titled Comparison of the S12XS CRG Module with S12P CPMU Module (document AN3622) gives an explanation of the CPMU clock module.•Application note titled High Speed Stall Dtection on the S12HY Family (document AN4024).•Application note titled MC9S12HY Family Demonstration Lab Training (document AN4021). Application video:• A video tutorial demostrating the S12HY driving motors and LCD is available at S12HY Product Summary Page.Useful websites:•/?q=node/353 — contains software examples, VID motor documentation, and LCD glass documentation.•/?q=node/366 — contains schematics•/16bit — EEE driver software.Document Number: S12HY64ACDUGRev. 212/2009How to Reach Us:Home Page:Web Support:/supportUSA/Europe or Locations Not Listed:Freescale Semiconductor, Inc.Technical Information Center, EL5162100 East Elliot Road Tempe, Arizona 85284+1-800-521-6274 or +/supportEurope, Middle East, and Africa:Freescale Halbleiter Deutschland GmbH T echnical Information CenterSchatzbogen 781829 Muenchen, Germany +44 1296 380 456 (English)+46 8 52200080 (English)+49 89 92103 559 (German)+33 1 69 35 48 48 (French)/supportJapan:Freescale Semiconductor Japan Ltd.Headquarters ARCO T ower 15F1-8-1, Shimo-Meguro, Meguro-ku,T okyo 153-0064Japan 0120 191014 or +81 3 5437 9125***************************Asia/Pacific:Freescale Semiconductor China Ltd.Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 10 5879 8000**************************For Literature Requests Only:Freescale Semiconductor Literature Distribution Center 1-800-441-2447 or 303-675-2140Fax: 303-675-2150*********************************************Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document.Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics as their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see or contact your Freescale sales representative.For information on Freescale’s Environmental Products program, go to /epp .Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners.© Freescale Semiconductor, Inc. 2009. All rights reserved.。
基于Freescale S12微控制器的高速智能寻迹车设计与实现
freescale MC9S12P128中文手册
1Chapter1 Device Overview MC9S12P-Family 1.1介绍The MC9S12P 系列单片机是经过优化后有着低成本、高性能、低引脚数的汽车专业级单片机产品，该产品倾向于弥补高端16位单片及产品如MC9S12XS和低端8位单片机产品之间的空缺。
MC9S12P 主要针对于要求使用CAN 或者LIN/J2602通讯接口的汽车应用产品，典型的应用案例包括车身控制器、乘坐人员检测、车门控制、座椅控制、遥控车门开关信号接收器、智能执行器、车灯模块、智能接线器。
The MC9S12P 系列单片机使用了很多MC9S12XS系列单片机相同的功能，包括片内闪存错误纠正代码（ECC）、一个专为数据诊断或者数据存储的单独的数据闪存模块、高速AD转换器和高频调制锁相环（IPLL）有效改善电磁兼容性能。
MC9S12P系列单片机提供的所有16为单片机优点和微处理器效率，同时保持飞思卡尔用户熟悉的8位及16位单片机，低成本，功耗，EMC和高效的代码80针QFP、64针LQFP、40针QFN封装产品，最大限度的与MC9S12尺寸的优点，如同MC9S12XS一样可以无需等待外围设备和内存的状态既可以运行16为带款的寻址，MC9S12P系列单片机主要有XS引脚兼容. I/O口在各种模式下都可以使用，同时具有中断功能的I/O口还可以在停止或等待模式下唤醒。
1.2 芯片特性表一:提供了MC9S12P家庭成员特征摘要,1.P或D寄存器擦除或者编程需要最低总线频率为1MHZ1.2.2 芯片功能• S12 CPU 内核• 高达128 KB具有ECC功能的片上闪存• 4 Kbyte带ECC功能的数据闪存• 高达6 Kb片上静态存储器(SRAM)• 具有内部滤波器的锁相环倍频器(IPLL)• 4–16 MHz 皮尔斯振荡器• 1 MHz内部RC振荡器• 定时器(TIM) 具有16位输入捕捉、输出比较、计数器脉冲累加器功能• 具有8位6通道的脉冲调制模块(PWM)• 10通道12位分辨率的逐次逼近AD转换器• 1个串行通信外部接口(SPI)• 1个支持局域网通讯串行通信(SCI) 模块•一个多可扩展控制器区域网络(MSCAN) 模块(支持CAN 协议2.0A/B)•片上电压调节器(VREG) 可对内部供电及内部电压整流• 自主周期中断(API)1.3 模块特征1.3.1 CPUS12 CPU 是一个高速的16位处理单元:•全16-bit数据通道提供有效的数学运算和高速的数学执行• 包含很多单字节指令，可以有效的利用ROM空间• 宽域变址寻址功能：—采用堆栈指针作为所有变址操作的变址寄存器—除了在自增或自减模式下都可以利用程序计数器作为变址寄存器—使用A\B\D累加器做累加器偏移—自动变址，前递增(++a)、前递减(--a)、后递减（a--）、后递增（a++）(by –8 to +8)1.3.2 带ECC功能的片内闪存• 高达128 Kb程序闪存空间— 32 位数据加7 位ECC (纠错码) 允许单字节纠错和双字节纠错— 512字节擦出扇区空间—自动编程和擦除算法—用户设置读写页面边界—具有可以防止偶然编程或者擦除的保护结构• 4 Kb 数据闪存空间— 16 位数据加6位纠错码允许单字节和双字节纠错功能— 256 字节的擦出扇区空间—自动编程和擦除算法—用户设置读写页面边界1.3.3 片内静态存储器3高达6kb通用RAM1.3.4 外部晶振(XOSC)• 闭环控制皮尔斯晶振频率为4MHZ---16MHZ—振幅增益控制输出电流—低谐波失真信号Signal with low harmonic distortion—低功耗—良好的噪声免疫—无需外部限流电阻—跨导尺寸优化提供良好的振荡器启动保证1.3.5 内部RC晶振(IRC)• 可调的内部参考时钟—频率: 1 MHz—在–40°C to +125°C环境温度范围内调节精度达: 1.5%1.3.6 内部锁相环倍频器(IPLL)—无需外部元件—参考分频器和倍频器提供大变化量的时钟频率—自动带宽控制低频率抖动操作—自动锁定频率—可配置的选项，扩频减少电磁干扰EMC (频率调制frequency modulation) —参考时钟源:–外部4–16 MHz 共振器/晶振(XOSC)–内部RC晶振1 MHz (IRC)1.3.7 系统支撑• 上电复位(POR)• 系统复位发生器• 非法寻址复位•低电压检测中断或复位• 实时中断(RTI)• 计算机正常工作复位(COP) 开门狗—可通过相应窗口设置COP用以采用错误侦测复位通过位操作对闪存进行初始化复位•时钟监控器监控晶振功能正常工作1.3.8 定时器(TIM)• 8通道16位定时器可进行输入捕捉和输出比较• 16-bit带有7位精度预分频器的自由运行计数器•一通道16-bit 脉冲累加器1.3.9 脉冲带宽调制器(PWM)• 6通道8位or 3 通道16-bit脉宽调制器—每个通道都可以对周期和占空比进行编程—中心对齐或者左对齐输出—宽频率范围内可编程逻辑时钟1.3.10 局域网控制器(MSCAN)•速率达1Mbit/s, 满足CAN 2.0 A, B 协议—标准和扩展数据帧— 0–8 字节长度—可编程比特率达1 Mbps•5个FIFO(先进先出)的接收缓冲器•三个内部优先发送缓冲器• 灵活的标识符可编程选通滤波器s:— 2 x 32-bit— 4 x 16-bit— 8 x 8-bit•集成了低通滤波器的唤醒操作• 闭环反馈自检测• CAN 总线监听•总线关闭可通过软件干预或者自动恢复• 16-bit 接收发送信息时钟戳1.3.11 串行通信接口(SCI)•可选择全双工或单工模式•标准的不归零格式•通过可编程脉宽调制选用IrDA 1.4 反转归零格式• 13位波特率可选•可编程字符长度•可编程改变其接收和发送极性for transmitter and receiver•边沿触发接收唤醒•支持LIN总线的间隔检测和传输冲突检测1.3.12 Serial Peripheral Interface Module (SPI) •可配置8- or 16-bit 数据大小•全双工或单线双向•全双工接收和发送• Master or slave 模式•最高位优先or 最低位优先可换• 并口时钟频率相位和极性选择1.3.13 AD转换(ATD)• 10通道12位AD转换器— 3微妙转换时间— 8-/10-/12-位解决方案5—数据结果左对齐或右对齐—停止模式下使用内部晶振作为转换器晶振—低功耗模式下模拟信号比较唤醒—连续转换模式e—多通道扫描•引脚可作为IO口1.3.14 片内电压调节器(VREG)•具有带隙标准的线性电压稳压器• 具有低电压中断功能的低压检测器•上电复位(POR) 电路•低电压复位功能(LVR)•高温传感器1.3.15 背景调试(BDM)• 非插入内存访问指令• 支持在线对片内非易始性存储单元编程1.3.16 调试器(DBG)•64个入口跟踪缓冲器• 三个比较器(A, B and C)—比较器A比较全16位地址总线额16位数据总线—精确寻址和寻址范围比较•两种匹配比较类型—标记位—程序强行置位该类型是在一数学公式出现后一个指令边界可用•四个跟踪模式•四个阶段状态序列发生器stage state sequencer1.4 内部结构框图71.5 引脚图1.6 存储器映像表Table 1-2. Device Register Memory Map注意在表1-2中保留的寄存器空间不分配给任何模块，该寄存器的保留空间是留给以后使用的，对这些保留空间写操作没有任何效果，读该空间返回值都为零。
基于飞思卡尔MK10DN512ZVLL10的砂轮机电源管理控制器设计
刘 剑
（ 苏省 如皋 中等 专 业 学校 （ 苏省 如 皋 职 业教 育 中心校 ）江 苏 如皋 ２ ６０ ） 江 江 ， ２５０
摘要 ： 文章描述了如何用 Ｆｅｓａ 公司推 出的 Ａ ｒｅ ｌ ｃｅ ＲＭ ｏｔ 啦一 Ｃ ｒ ｘ Ｍ４系列 ＭＣ ｅ Ｕ作为控制核心，设计 了一款稳 定性 高，成本 低 的砂轮 机 电 源管理控 制 器 ，对企 业砂 轮机 电机 运 行进 行 智能 化 管理 ，达到 高 效生 产的 目的 ，
持 以及 Ｉ ｔｒ Ｉ ｏ ｎ ： ｎｅ—ＣＳｕｄ
（ ）强大 、灵 活的定 时器 ，用于包 括 电机控制 ６ 在 内的广泛应用；
图 ４ 过 零 检 测 电路 设 计
（ ）片外系统扩展 和数据存储选 项 ，包 括Ｓ 主 ７ Ｄ
机 、Ｎ Ｎ 闪存 、Ｄ Ａ 控制和飞思卡尔Ｆ ｅ ｕ 互联方 ＡＤ ＲＭ ｌｘ Ｂ ｓ
二 、硬件设计
本电源管理控制器划分硬件功能框 图如下 ：
４ Ｏ 中 新稿 业 ２ １ １ ８ 阖高 求企 ０１ ０
扩提供 了捷径和成本节省 ，从而能够及时地响应市场
需求 。这些系列包括 由模拟、通信和定时 以及控制外
设组成 的丰 富套件 ，功 能集成度 随闪存规模和输 入／ 输出数而增加 。所有Ｋ ｎ ｔｓ ｉｅ ｉ系列的通用特性包括 ： （ ）高速 １位模数转换器 ； １ ６ （ ） １ 位 数模 转 换 器 ，带 有 片上 模拟 电压 参 ２ ２
工业 自动 化控制 主要利现 。即是工业控制，或者是工厂 自动化控制 。 主要是指使用计算机技术 ，微 电子技术，电气手段 ， 使 工厂 的生 产和制 造过程 更 加 自动 化 、效率化 、精 确 化 ，并具 有可控 性及 可视 性 。本 文研 究设计 一款
Freescale msCAN教程
Nicrosystem NSCF51AC-R1开发板教程-------CAN 总线教程作者Bluehacker <QQ: 282074921> /bluehacker 版本V 1.0 日期2010年8月25日 版权说明 本教程以Nicrosystem 开发的NSCF51AC-R1型低成本飞思卡尔coldfire V1开发板为平台，但相关内容应该适用于其他公司开发的飞思卡尔coldfire V1或S08开发板，甚至对其他非飞思卡尔MCU 也有借鉴作用。
我们通过网络免费提供此教程电子版本，不收取任何费用，您可以自由下载传播，但请您不要更改本教程中的任何文字、图片、表格；更不得以任何形式声称拥有本教程的版权，侵占作者的劳动成果。
本教程可能有描述不当或错误之处，欢迎你指正，但作者和作者所在公司单位不对可能的错误负任何责任。
备注如果你发现本教程的问题，欢迎您通过 nicrosystem@ 与我们联系。
也欢迎你关注我们的产品和在电子论坛上的活动作者的博客：/bluehackerNicrosystem “我们的freescale ”专栏：/forum-100-1.htmlNicrosystem 定期在与非网社区开展系列针对飞思卡尔处理器的diy 活动和助学活动：Nicrosystem EDN “我们的freescale”小组：/2460/淘宝：一． CAN总线的特点和历史●什么是CAN?CAN，全称为“Controller Area Network”，即控制器局域网，是国际上应用最广泛的现场总线之一。
最初，CAN被设计作为汽车环境中的微控制器通讯，在车载各电子控制装置ECU 之间交换信息，形成汽车电子控制网络。
比如：发动机管理系统、变速箱控制器、仪表装备、电子主干系统中，均嵌入CAN控制装置。
一个由CAN 总线构成的单一网络中，理论上可以挂接无数个节点。
实际应用中，节点数目受网络硬件的电气特性所限制。
Freescale 芯片 MC9S12DG128 产品说明书
MC9S12DG128MFUE MC9S12DG128MPVE MC9S12DG128VPVE2x SCI 2x SPI2x CAN 2.0 A/BPWM8-bit, 8ch./16-bit,4-ch.I n t e r n a l B u sHCS12 CPU16-Key Wake-UpIRQ PortsVreg 5V to 2.5V Enhanced Capture Timer16-bit,8-ch.ATD010-bit,8-ch.8KB RAM128 KB Flash2KB EEPROMATD110-bit,8-ch.I 2C16-bit MicrocontrollersOverviewFreescale Semiconductor’s HCS12 Family of microcontrollers (MCUs) is the next generation of the highly successful 68HC12 ing Freescale’s industry-leading 0.25 µs Flash, the MC9S12DG128 is part of a pin-compatible family that scales from 32 KB to 512 KB of Flash memory. The MC9S12DG128 provides an upward migration path from Freescale’s 68HC08,68HC11 and 68HC12 architectures for applications that need larger memory, more peripherals and higher performance. Also, with the increasing number of CAN-based electronic control units (ECUs), its multiple network modules support this environment by enabling highly efficient communications between different network buses.Target Applications >Automotive applications >Industrial controlHigh-Performance 16-bit HCS12 CPU Core>25 MHz bus operation at 5V for 40 ns minimum instruction cycle time >Opcode compatible with the 68HC11 and 68HC12>C-optimized architecture produces extremely compact codeOn-Chip Debug Interface>Dedicated serial debug interface >On-chip breakpoints>Real-time in-circuit emulation and debug without expensive and cumbersome box emulators >Read/write memory and registers while running at full speedNetwork Modules >Two msCAN modules implementing the CAN 2.0 A/B protocol •Five receive buffers per module with FIFO storage scheme•Three transmit buffers per module with internal prioritization>Ability to link modules for higher buffer count >Programmable bit rate up to 1 Mbps >FIFO receive approach superior for event-driven networksIntegrated Third-Generation Flash Memory>In-application reprogrammable >Self-timed, fast programming •Fast Flash page erase—20 ms (512 bytes)•Can program 16 bits in 20 µs while in burst mode>5V Flash program/erase/read>Flash granularity—512 byte Flash erase/2 byte Flash program >Two independently programmable Flash arrays >Flexible block protection and security>Flexibility to change code in the field >Efficient end-of-line programming >Total program time for 128 KB code is less than five seconds >Reduces production programming cost through ultra-fast programming >No external high voltage or charge pump required >Virtual EEPROM implementation, Flash array usable for EE extension >Can erase one array while executing code from another2 KB Integrated EEPROM>Flexible protection scheme for protection against accidental program or erase >EEPROM can be programmed in 46 µs>Can erase 4 bytes at a time and program 2 bytes at a time for calibration, security,personality and diagnostic informationMC9S12DG128MFUE MC9S12DG128MPVE MC9S12DG128VPVE。
Freescale MC9S12G128微控制器的TWR-S12G128演示板用户指南说明书
D O C -0508-010, RE V AWeb Site: TWR-S12G128Demonstration Board for Freescale MC9S12G128MicrocontrollerUSER GUIDECONTENTSCAUTIONARY NOTES (4)TERMINOLOGY (4)FEATURES (5)MEMORY MAP (6)SOFTWARE DEVELOPMENT (7)DEVELOPMENT SUPPORT (7)OSBDM BOOTLOADER (8)BDM_PORT HEADER (8)POWER (8)POWER SELECT (9)RESET SWITCH (9)LOW VOLTAGE RESET (9)TIMING (10)COMMUNICATIONS (10)RS-232 (10)COM CONNECTCOR (11)COM_EN (11)LIN PORT (11)LIN ENABLE (12)LIN COM INPUT (12)LIN_PWR OPTION (12)MSTR OPTION (12)LIN-J1 CONNECTOR (13)CAN PORT (13)CAN TERMINATION ENABLE (14)STANDBY MODE (14)USER PERIPHERALS (14)POTENTIOMETER (14)USER LED’S (15)PUSHBUTTON SWITCHES (15)EDGE CONNECTOR PINOUT (16)FIGURESFigure 1: Memory Map (6)Figure 2: BDM_PORT Header (8)Figure 3: PWR_SEL Option Header (9)Figure 4: Serial Connections (10)Figure 5: COM1 Connector (11)Figure 6: COM_EN Option Header (11)Figure 7: LIN Block Diagram (11)Figure 8: JP6 Option Header (13)Figure 9: LIN Connector (13)Figure 10: CAN_PORT (13)Figure 11: CAN Termination Enable (14)Figure 12: JP1 Option Header (15)Figure 13: Primary Edge Connector (16)Figure 14: Secondary Edge Connector (18)REVISIONDate Rev CommentsCAUTIONARY NOTES1) Electrostatic Discharge (ESD) prevention measures should be used when handling thisproduct. ESD damage is not a warranty repair item.2) Axiom Manufacturing does not assume any liability arising out of the application or use ofany product or circuit described herein; neither does it convey any license under patent rights or the rights of others.3) EMC Information on the TWR-S12G128 board:a) This product as shipped from the factory with associated power supplies and cables,has been verified to meet with requirements of CE and the FCC as a CLASS A product.b) This product is designed and intended for use as a development platform for hardwareor software in an educational or professional laboratory.c) In a domestic environment, this product may cause radio interference in which case theuser may be required to take adequate prevention measures.d) Attaching additional wiring to this product or modifying the products operation from thefactory default as shipped may effect its performance and cause interference with nearby electronic equipment. If such interference is detected, suitable mitigating measures should be taken.TERMINOLOGYThis development module utilizes option select jumpers to configure default board operation. Terminology for application of the option jumpers is as follows:Jumper – a plastic shunt that connects 2 terminals electricallyJumper on, in, or installed = jumper is a plastic shunt that fits across 2 pins and the shunt is installed so that the 2 pins are connected with the shunt.Jumper off, out, or idle = jumper or shunt is installed so that only 1 pin holds the shunt, no 2 pins are connected, or jumper is removed. It is recommended that the jumpers be placed idle by installing on 1 pin so they will not be lost.Cut-Trace – a circuit trace connection between component pads. The circuit trace may be cut using a knife to break the default connection. To reconnect the circuit, simply install a suitably sized 0-ohm resistor or attach a wire across the pads.Signal names followed by an asterisk (*) denote active-low signals.FEATURESThe TWR-S12G128 is a demonstration board for the MC9S12G128 microcontroller; an automotive, 16-bit microcontroller focused on low-cost, high-performance in a low pin-count device. The MC9S12G128 provides16-bit wide accesses, without wait states, for all peripherals and memories. The MC9S12G128 targets automotive applications requiring CAN or LIN/J2602 communications. Examples include body controllers, occupant detection, etc… The board is designed to interface to the Freescale Tower System, a modular development platform which aids in rapid prototyping and tool-reuse. An integrated Open-Source BDM, software tools, and examples provided with the development board make application development and debug quick and easy. All MCU signals are available on one or both edge connectors.∙MC9S12G128, 100 LQFP∙128K Bytes Flash∙4096 Bytes EEPROM∙8192 Bytes RAM∙25MHz Bus Frequency∙Internal Oscillator∙SCI, SPI, MSCAN∙Integrated Open Source BDM (OSBDM)∙BDM_PORT header for external BDM cable support∙ 1 ea. High-Speed CAN Physical Layer Transceiver∙ 1 ea, Enhanced LIN Physical Layer Transceiver∙RS-232 Serial Data Physical Layer Transceiver∙On-board +5V regulator∙Power input from OSBDM, Tower System, or inputvias at E1/E2∙Power Input Selection Jumpers∙Power input from USB-BDM∙Power input from on-board regulator∙Power input from Tower System edge connector∙User Peripherals∙ 4 User Push Button Switches∙ 4 User LED Indicators∙5K ohm POT w /LP Filter∙User Option Jumpers to disconnect Peripherals∙Connectors∙BDM_PORT Connector for External BDM Cable∙USB mini-AB Connector∙2x5, 0.1” ctr, RS-232 Header∙1x4, 4.2mm, Molex CAN Cable Connector∙2x2, 4.2mm, Molex LIN Cable ConnectorSpecifications:Board Size 3.55” x 3.20” overallPower Input: +5V from USB connector or from Tower SystemNOTE: LIN functionality requires +12V on LIN +V input or +12V at E1/E2 input.MEMORY MAPFigure 1 below shows the target device memory map. Refer to the MC9S12G128 Reference Manual (RM) for further information.Figure 1: Memory Map0x000E–0x000F Reserved 20x0010–0x0017 MMC (memory map control)80x0018–0x0019 Reserved20x001A–0x001B Device ID register20x001C–0x001F PIM (port integration module)40x0020–0x002F DBG (debug module)160x0030–0x0033 Reserved40x0034–0x003F CPMU (clock and power management)120x0040–0x006F TIM0 (timer module)480x0070–0x009F ATD (analog-to-digital converter, 10 bit, 8-channel)48SOFTWARE DEVELOPMENTSoftware development requires the use of a compiler or an assembler supporting the HCS12(X) instruction set and a host PC running a debug interface. CodeWarrior Development Studio is supplied with this board for application development and debug. Refer to the supporting CodeWarrior documentation for details on use and capabilities.DEVELOPMENT SUPPORTApplication development and debug for the target TWR-S12 board is supported through the Open-Source Background Debug Mode (OSBDM) interface or an external BDM interface connector. The OSBDM is fully supported in CodeWarrior and provides direct, non-intrusive access to the target device internals. While in BDM mode, no internal resources are used. Code stepping and break-points are fully supported.Connection between a host PC and the target device is provided via a mini-B, USB connector. The OSBDM is capable of providing power to the target board eliminating the need for external power. Please note that power supplied by the OSBDM is limited by the USB specification. When powered through the OSBDM, total current draw, including the OSBDM, TWR-S12 board, and Tower System must remain less that 500mA. Otherwise, the USB bus will cause the host PC to disconnect the board. Damage to the host PC, target board, or Tower System may result if this current limit is violated.OSBDM BootloaderThe OSBDM is pre-programmed with a bootloader application to allow field updates. The USB bootloader communicates with a GUI application running on a host PC. The GUI application allows the user to update OSBDM firmware easily and quickly. Option jumper JP401 enables the bootloader at startup. This option header is not populated in default configuration. Refer to Freescale Application Note AN3561 for details on using the GUI application and bootloader. The application note may be found at or at /support. BDM_PORT HeaderA compatible HCS12 BDM cable can also be attached to the 6-pin BDM interface header at J3. This header allows the use of external programming/debug cables. Refer to the external programming/debug cable documentation for details on use. The figure below shows the pin-out for the DEBUG header.Figure 2: BDM_PORT HeaderJ4001 2 GND See the associated RM for complete DEBUGdocumentation3 4 RESET*5 6 VDDNOTE: This header is not installed in default configuration.POWERThe TWR-S12 board may be powered from the OSBDM, from the Tower System, from the LIN +V input, or 2 input vias at E1 & E2. The LIN +V input accepts +12V from the LIN bus and uses an on-board regulator to create the board operating voltage. Input vias at E1 & E2 allowconnecting external power to the board if desired. An on-board regulator is used to create the board operating voltage from this input.Use of the on-board regulator requires input voltage between +7.V and +27V. However, input voltage should be kept as low as possible to reduce device self-heating.Power SelectOption headers PWR_SEL selects the input power source for the target board. When powered from the Tower System, the OSBDM voltage output is disabled.Figure 3: PWR_SEL Option HeaderJP5 1●●2Select TWR voltage inputPWR_SEL ●●Select OSBDM voltage input (default)●●Select on-board regulator inputRESET SWITCHThe RESET switch applies an asynchronous RESET input to the MCU. The RESET switch is connected directly to the RESET* input on the MCU. Pressing the RESET switch applies a low voltage level to the RESET* input. A pull-up bias resistor allows normal MCU operation. LOW VOLTAGE RESETThe MC9S12G128 applies a Power-On Reset (POR) circuit and an internal Low Voltage Reset (LVR) circuit to ensure proper device operation. The POR circuit holds the MCU in reset until applied voltage reaches an appropriate level. The LVR forces the device into reset if input voltage falls too low, protecting against brown-out conditions. A user configurable Low-Voltage Detect (LVD) with interrupt output is also available. Consult the MC9S12G128 reference manual for details of POR, LVR, and LVD operation.TIMINGThe TWR-S12G128 internal timing source is active from RESET by default. An external 8MHz crystal oscillator, configured for low-power operation, is also installed. Refer to the target device RM for details on selecting and configuring the desired timing source.COMMUNICATIONSCommunications options for the TWR-S12G128 include serial RS-232, LIN, and CAN. Serial RS-232 communications is supported through a RS-232 physical layer device (PHY) and a 2x5 pin header. A high-speed, enhanced, LIN PHY provides LIN bus communications through a 2x2 Molex connector (pn 39-29-1048). A high-speed CAN PHY provides CAN bus communications through a 1 x 4 Molex connector (pn 39-30-3045).Connecting LIN cables require Molex housing, pn 39-01-2040 and pins, pn 39-00-0217. Connecting CAN cables require Molex housing, pn 39-01-4040, and pins, pn 39-00-0217.The COM_SEL option header connects the MCU SCI signal to either the LIN PHY or the RS-232 PHY. See Figure 6 below for jumper position options. See Figure 4 below for jumper position options.RS-232The TWR-S12G128 applies the MAX3387E, RS-232 transceiver to support serial communications. A standard 2x5 “Berg” pin-header on 0.1” centers and an IDC to DB9 cable supports connecting standard serial cables to the target board. Figure 4 below shows the SCI signal connections.Figure 4: Serial ConnectionsNOTE: For normal RS-232 operation, FORCEOFF* should be actively driven to the high level.Alternately, open CT5 to allow FORCEOFF* to float high.COM ConnectcorA 2x5, 0.1”, standard “Berg” pin-header provides external connections for the SCI port. Figure5 below shows the COM1 pin-out.Figure 5: COM1 Connector2, 71, 7TXD CTSRXD RTS1, 2 TP2GND NCCOM_ENThe COM_EN option header connects the MCU SCI port to either the SCI PHY or the LIN PHY. Figure 6 below shows the option jumper configuration for the COM_EN option header. Figure 6: COM_EN Option HeaderConnects target MCU SCI port to LIN PHY to enable LIN buscommunicationsConnects target MCU SCI port to RS-232 PHY to enable serialcommunicationsLIN PortThe TWR-S12G128 applies the MC33661 LIN bus physical layer device (transceiver) to support LIN communications. The PHY may be configured as a Master or Slave node on the LIN bus. LIN connectors J9 & J10 are configured in parallel to support pass-thru signaling. Figure 7 shows the LIN block diagram.Figure 7: LIN Block DiagramThe LIN interface provides optional features of slew rate control, network supply, and wake up option. Refer to the MC33661 Reference Manual for detail on PHY functionality. The following sections detail functionality for LIN option jumpers.LIN EnableThe LIN PHY is enabled by default. Disable the PHY by connecting the test point, TP3, to GND.LIN COM InputLIN inputs RX and TX are selectable using the COM_EN option header. Refer to Figure 6 above for details on configuring this header.LIN_PWR OptionThe LIN_PWR option jumper connects pin 1 of both LIN connectors to the +V input. In Master mode, this option may be used to power LIN slave devices. This option requires +12V be applied at E1/E2 inputs. In Slave mode, this option allows slave device to draw power from the LIN network. For Slave mode configuration, external power should not be applied to the target board. LIN_PWR is enabled by installing a shunt from JP3-1 to JP3-2. Refer to Figure 8 below.MSTR OptionThe MSTR option jumper allows the LIN transceiver to be configured for Master mode functionality. Master mode may also be set using the INH pin on the PHY. Refer to the MC33661 device datasheet for details on use and configuration. Refer to Figure 8 below.Figure 8: JP6 Option HeaderJP3Connects LIN bus to +V input (default)LIN_PWR Enables LIN Master mode functionality (default)NOTE: LIN PHY may also be configured as a Master Node using the INH pin. Refer to the LINPHY data sheet for details.LIN-J1 ConnectorThe TWR-S12G128 supports two, 2 x 2 Molex connectors to interface to the LIN bus. Figure 9 below details the pin-out of the LIN bus connector. Figure 9: LIN Connector4 3 +V2 1 GNDFront View – Looking into ConnectorNOTE: LIN Port Connector – Molex 39-29-1048 Mates with; Housing – Molex 39-01-2040, Pin – Molex 39-00-0036CAN PortOne, TJA1040T, High-Speed CAN physical-layer transceiver (PHY) is applied to support CANbus communications. A 4-pos, 4.22mm MOLEX connector interfaces to external CAN cabling. Differential input CAN signals, are terminated with 120 ohms. Option headers, JP13 and JP15 allow the user to optionally disconnect signal termination. Avalanche diodes protect the CAN PHY from voltage surges on the input differential signal lines. Figure 10 below shows the CAN connector pin-out. Figure 10: CAN_PORTN CG N DC A N LC A N HLooking into ConnectorNOTE: CAN Port Connector – Molex 39-30-3045Mates with; Housing – Molex 39-01-4040, Pin – Molex 39-00-0217CAN Termination EnableCAN bus termination of 120 ohm with virtual ground is applied to the differential CAN signals on both channels. The SPLIT output from each PHY is connected to the virtual ground providing common-mode stabilization. The differential CAN bus signal termination may be removed using option header JP13 or JP15. To prevent signal corruption, both option jumpers must be installed or both option jumpers must be removed. The CAN bus should not be operated with only 1 signal termination applied. Figure 11 below details the option header shunt positions.Figure 11: CAN Termination EnableEnables CANL termination1 2 Enables CANH terminationStandby ModeThe CAN PHY is configured for normal mode by default. To enable standby (STB) mode, apply a high logic level at test point TP1. Refer to the TJA1040T Reference Manual for use and capabilities of the Standby Mode.USER PERIPHERALSUser I/O includes 1 potentiometer, 4 push button switches, and 4 green LEDs for user I/O. The USER (JP14) option header enables or disables each User I/O function individually. The sections below provide details on user I/O. Figure 12 below shows the USER jumper settings.PotentiometerThe TWR-S12G128 target board applies a single-turn, 5K, ohm potentiometer (POT) to simulate analog input. The POT is connected to an ATD input on the target MCU and is decoupled to minimize noise transients during adjustment. Figure 12 below shows the USER jumper settings.User LED’sThe TWR-S12G128 target board applies 4, green, LEDs for output indication. Each LED is configured for active-low operation. A series, current-limit resistor prevents excessive diode current. Each LED is connected to a timer channel on the target MCU. Figure 12 below shows the USER jumper settings.Pushbutton SwitchesThe TWR-S12G128 provides 4 push-button switches for user input. Each push-button switch is configured for active-low operation and is connected to a key-wakeup input on the target MCU. No bias is applied to these push-button inputs and use of target MCU internal pull-ups is required for proper operation. Figure 12 below shows the USER jumper settings.Figure 12: JP1 Option HeaderSignal ON OFFPAD4/KWAD4/AN4 Enabled DisabledPAD5/KWAD5/AN5 Enabled DisabledPAD6/KWAD6/AN6 Enabled DisabledPAD7/KWAD7/AN7 Enabled DisabledPAD0/KWAD0/AN0 Enabled DisabledPT4/IOC4 Enabled DisabledPT5/IOC5 Enabled DisabledPT6/IOC6 Enabled DisabledPT7/IOC7 Enabled Disabled NOTE: User peripheral input/output is enabled by default.EDGE CONNECTOR PINOUTThe TWR-S12 board connects to the Freescale Tower System using the 2 PCIe Edge Connectors. Following the PCIe specification, the Bx signals are located on the top of the board and the Ax signals are located on bottom. Pin B1 for the primary and secondary connectors are at opposite ends of the board. The figures below show the pin-out of each edge connector.Figure 13: Primary Edge Connector5.0V Power Pri_B01 Pri_A01 5.0V PowerGround Pri_B02 Pri_A02 GroundPri_B03 Pri_A03Elevator Power Sense Pri_B04 Pri_A04Ground Pri_B05 Pri_A05 GroundGround Pri_B06 Pri_A06 GroundPS6/SCK0 Pri_B07 Pri_A07Pri_B08 Pri_A08PS7/API_EXTCLK/SS0 Pri_B09 Pri_A09 PD3Ground Pri_B49 Pri_A49 GroundPri_B50 Pri_A50 PA2Pri_B51 Pri_A51 PA3Pri_B52 Pri_A52 PA4Pri_B53 Pri_A53 PA5Pri_B54 Pri_A54 PA6Pri_B55 Pri_A55 PA7Pri_B56 Pri_A56Pri_B57 Pri_A57Figure 14: Secondary Edge ConnectorMISO1/KWJ0/PJ0 Sec_B11 Sec_A11Sec_B11ASec_B12 Sec_A12Sec_B13 Sec_A13Sec_B14 Sec_A14Sec_B15 Sec_A15PC1 Sec_B16 Sec_A16PC2 Sec_B17 Sec_A17 PC3PC4 Sec_B18 Sec_A18 PC5。
Freescale 9S12 系列单片机应用笔记(libmaker)
Freescale 9S12 系列单片机应用笔记(libmaker)飞思卡尔提供的9S12 系列单片机开发工具包CodeWarrior Development Studio 中包含一个非常有用的工具libmaker，可以将编译后的obj 文件打包为库文件。
还可以对现有的库文件进行一些基本的修改。
这东东有什么用呢，首先，将一系列的obj 文件打包为库文件后会提高最后的Link 阶段的速度。
还可以将自己一些不愿公开的代码打包为库文件，有助于知识产权的保护。
不说废话了，还是以一系列的例子来说明问题。
首先假设我们的项目中有三个源文件。
分别如下：/*add1.c*/charadd1(chara){returna+1;}/*add2.c*/charadd2(chara){returna+2;}/*add3.c */charadd1(chara){returna+3;}这3 个文件真是没个性，不过对于说明问题已经够用了。
编译后会形成三个Object 文件：add1.c.o add2.c.o add3.c.o然后可以利用libmaker 将这三个object 文件打包为库文件了。
这里需要些命令行操作，不熟悉的可以找些win 批处理文件的教程看看。
首先，在.o 文件所在目录建个a.bat 的批处理文件。
里面加入两行代码：set PATH=“D:\Program Files\Freescale\CWS12v5.1\Prog”;%PATH%cmd /k如果你的CWS12 安装在不同的目录，请做相应的修改。
然后双击 a.bat 文件，会打开一个命令行窗口，并且设置好环境变量。
执行下面的命令：Libmaker -Cmd( add1.c.o + add2.c.o + add3.c.o = add.lib)上面命令的+ 号可以省略，写为：。
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PIM PLL
msCAN 4 or IIC
msCAN 3
msCAN 2
msCAN 1
BDLC or msCAN 0
4K BYTES EEPROM
ECT 8 CHAN
msCAN Bus
Features:
Up to 5 msCAN Modules (msCAN) • 3 Tx message buffers each Automatically Mapped • 5 Background Rx Buffers • Programmable I/O modes
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN - Layered Architecture
• DATA LINK LAYER
• LOGICAL LINK CONTROL (LLC) SUB-LAYER - Acceptance Filtering - Overload Notification - Recovery Management • MEDIUM ACCESS CONTROL (MAC) SUB-LAYER Data Encapsulation/Decapsulation Frame Coding (Bit Stuffing/Unstuffing) Medium Access Management Error Detection/Signaling Acknowledgement Serialization/Deserialization
• PHYSICAL LAYER
- Bit Encoding/Decoding - Bit Timing - Synchronization
HCS12 Technical Training Module 12- MSCAN, Slide 6
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN12 Buffer Scheme
msCAN Receive / Transmit Engine
Internal Priority Scheduling
Identifier Filtering
Tx Buffer 0
Priority Register
Tx Buffer 1
Priority Register
CAN PROPERTIES
• Serial communications protocol developed by Bosch, initially for automotive multiplex wiring systems • Message prioritization defined by the user • Guaranteed minimum latency for highest priority messages • Multi - master protocol utilizes non - destructive collision resolution to ensure the highest priority message is transmitted onto bus • Flexible system configuration allows the user to create the network which best fits the application • Error detection and error signaling features are built into the CAN protocol, along with automatic retransmission of corrupted messages • Distinction between temporary errors and permanent node failures prevents faulty nodes from causing long-term disruptions of network traffic
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
TxE0
TxBG - Transmit Background Buffer
Priority
TxFG - Transmit Foreground Buffer Tx Buffer Pointer
Transmitter
msCAN
TxFG Tx1
TxE1
Priority
TxBG Tx2
Priority
TxE2 CPU
• Maskable interrupts
• Programmable loop-back for self test operation • Independent of the transmission medium (external transceiver is assumed) • Open network architecture
ATD 1
ATD 0
12K SRAM
256K FLASEEPROM
SCI 1
SCI 1
Internal Bus
SPI 2 SPI 1 or or PWM PWM PWM SPI 0 8 CH CH CHAN 4-7 0-3 BKP INT MMI
HCS12 PU
SIM CM BDM
MEBI PIT
HCS12 Technical Training Module 12- MSCAN, Slide 5
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
HCS12 Technical Training Module 12- MSCAN, Slide 4
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
• MINIMUM CAN REQUIREMENTS INCLUDE COMPATIBILITY WITH SPECIFICATION VERSION 2.0, PART A • MOST CURRENT INDUSTRIAL APPLICATIONS USE THE STANDARD (11-BIT) IDENTIFIER FORMAT
5X FIFO
Requirements of a CAN Controller
Microcontroller
• • • •
Simple user interface to CPU Message filtering and buffering Protocol handling Physical layer interface Message filtering + buffering
msCAN Message Buffer Organization
Receiver
msCAN Rx0 RxBG Rx1 Rx2
RxBG - Receive Background Buffer RxFG - Receive Foreground Buffer
Rx3 Rx4 RxFG RxF
CPU
TxBG Tx0
Note: All Tx Buffers map to same address
HCS12 Technical Training Module 12- MSCAN, Slide 7
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Tx Buffer 2
2 x 32 bits
Priority Register
or 4 x 16 bits
HCS12 Memory Mapped I/O Rx Buffer
or 8 x 8 bits
Rx Buffer