FPGA与DSP对比(精)
FPGA与DSP比较
FPGA与DSP的比较DSP和FPGA是嵌入式开发处理器的三大巨头之二，很多刚刚接触嵌入式的朋友都会心存疑问，到底DSP和FPGA哪个牛一点，学哪种好一点？FPGA与DSP相比较，哪个更有前途？今天，我就以自己的经验，和大家通俗介绍一下吧：FPGA是英文Field Programmable Gate Array（现场可编程门阵列）的缩写，它是在PAL、GAL、PLD等可编程器件的基础上进一步发展的产物，是专用集成电路（ASIC）中集成度最高的一种。
FPGA采用了逻辑单元阵列LCA（Logic Cell Array）这样一个新概念，内部包括可配置逻辑模块CLB（Configurable Logic Block）、输出输入模块IOB（Input Output Block）和内部连线（Interconnect）三个部分。
用户可对FPGA内部的逻辑模块和I/O模块重新配置，以实现用户的逻辑。
它还具有静态可重复编程和动态在系统重构的特性，使得硬件的功能可以像软件一样通过编程来修改。
作为专用集成电路（ASIC）领域中的一种半定制电路，FPGA既解决了定制电路的不足，又克服了原有可编程器件门电路数有限的缺点。
可以毫不夸张的讲，FPGA能完成任何数字器件的功能，上至高性能CPU,下至简单的74电路，都可以用FPGA来实现。
FPGA如同一张白纸或是一堆积木，工程师可以通过传统的原理图输入法，或是硬件描述语言自由的设计一个数字系统。
通过软件仿真，我们可以事先验证设计的正确性。
在PCB完成以后，还可以利用FPGA的在线修改能力，随时修改设计而不必改动硬件电路。
使用FPGA来开发数字电路，可以大大缩短设计时间，减少PCB面积，提高系统的可靠性。
DSP（digital singnal Processor）是一种独特的微处理器，有自己的完整指令系统，是以数字信号来处理大量信息的器件。
一个数字信号处理器在一块不大的芯片内包括有控制单元、运算单元、各种寄存器以及一定数量的存储单元等等，在其外围还可以连接若干存储器，并可以与一定数量的外部设备互相通信，有软、硬件的全面功能，本身就是一个微型计算机。
一文带你了解CPLD、FPGA、DSP之间的区别与联系
一文带你了解CPLD、FPGA、DSP之间的区别与联系ARM（Advanced RISC Machines）是微处理器行业的一家知名企业，设计了大量高性能、廉价、耗能低的RISC处理器、相关技术及软件。
ARM也是单片机。
ARM 架构是面向低预算市场设计的第一款RISC微处理器，基本是32位单片机的行业标准，它提供一系列内核、体系扩展、微处理器和系统芯片方案，四个功能模块可供生产厂商根据不同用户的要求来配置生产。
由于所有产品均采用一个通用的软件体系，所以相同的软件可在所有产品中运行。
目前ARM在手持设备市场占有90以上的份额，可以有效地缩短应用程序开发与测试的时间，也降低了研发费用。
DSP（digital singnal processor）是一种独特的微处理器，有自己的完整指令系统，是以数字信号来处理大量信息的器件。
一个数字信号处理器在一块不大的芯片内包括有控制单元、运算单元、各种寄存器以及一定数量的存储单元等等，在其外围还可以连接若干存储器，并可以与一定数量的外部设备互相通信，有软、硬件的全面功能，本身就是一个微型计算机。
DSP采用的是哈佛设计，即数据总线和地址总线分开，使程序和数据分别存储在两个分开的空间，允许取指令和执行指令完全重叠。
也就是说在执行上一条指令的同时就可取出下一条指令，并进行译码，这大大的提高了微处理器的速度。
另外还允许在程序空间和数据空间之间进行传输，因为增加了器件的灵活性。
其工作原理是接收模拟信号，转换为0或1的数字信号，再对数字信号进行修改、删除、强化，并在其他系统芯片中把数字数据解译回模拟数据或实际环境格式。
它不仅具有可编程性，而且其实时运行速度可达每秒数以千万条复杂指令程序，远远超过通用微处理器，是数字化电子世界中日益重要的电脑芯片。
它的强大数据处理能力和高运行速度，是最值得称道的两大特色。
由于它运算能力很强，速度很快，体积很小，而且采用软件编程具有高度的灵活性，因此为从事各种复杂的应用。
FPGA、CPLD、ASIC、DSP、单片机的区别
1. FPGAFPGA（Field－Programmable Gate Array），即现场可编程门阵列，它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。
它是作为专用集成电路（ASIC）领域中的一种半定制电路而出现的，既解决了定制电路的不足，又克服了原有可编程器件门电路数有限的缺点。
以硬件描述语言（Verilog或VHDL）所完成的电路设计，可以经过简单的综合与布局，快速的烧录至FPGA 上进行测试，是现代IC设计验证的技术主流。
这些可编辑元件可以被用来实现一些基本的逻辑门电路（比如AND、OR、XOR、NOT）或者更复杂一些的组合功能比如解码器或数学方程式。
在大多数的FPGA里面，这些可编辑的元件里也包含记忆元件例如触发器（Flip－flop）或者其他更加完整的记忆块。
系统设计师可以根据需要通过可编辑的连接把FPGA内部的逻辑块连接起来，就好像一个电路试验板被放在了一个芯片里。
一个出厂后的成品FPGA的逻辑块和连接可以按照设计者而改变，所以FPGA可以完成所需要的逻辑功能。
什么是FPGA?简单来说，FPGA就是“可反复编程的逻辑器件”。
FPGA取自Field Programmable Gate Array的首个字母，代表现场(Field)可编程(Programmable)逻辑阵列(Gate Array)。
由于在产品发售后您仍然可以对产品设计作出修改，因此我们可以顺利地对产品进行更新以及针对新的协议标准作出相应改进。
相对于对售后产品设计无法进行修改的ASIC和ASSP来说，这是FPGA特有的一个优势。
由于FPGA 可编程的灵活性以及近年来科技的快速发展，FPGA也正向高集成，高性能，低功耗，低价格的方向发展，并具备了与ASIC和ASSP 同等的性能，被广泛地使用在各行各业的电子及通信设备里。
FPGA与CPLD的区别尽管很多人听说过CPLD，但是关于CPLD与FPGA之间的区别，了解的人可能不是很多。
arm,dsp,fpga的用途与区别
ARM、DSP、FPGA的技术特点和区别——摘自华清远见嵌入式园地在嵌入式开发领域，ARM是一款非常受欢迎的微处理器，其市场覆盖率极高，DSP和FPGA则是作为嵌入式开发的协处理器，协助微处理器更好的实现产品功能。
那三者的技术特点以及区别是什么呢？下文就此问题略做了总结。
ARM（Advanced RISC Machines）是微处理器行业的一家知名企业，设计了大量高性能、廉价、耗能低的RISC处理器、相关技术及软件。
ARM架构是面向低预算市场设计的第一款RISC微处理器，基本是32位单片机的行业标准，它提供一系列内核、体系扩展、微处理器和系统芯片方案，四个功能模块可供生产厂商根据不同用户的要求来配置生产。
由于所有产品均采用一个通用的软件体系，所以相同的软件可在所有产品中运行。
目前ARM在手持设备市场占有90以上的份额，可以有效地缩短应用程序开发与测试的时间，也降低了研发费用。
DSP（digital singnal processor）是一种独特的微处理器，有自己的完整指令系统，是以数字信号来处理大量信息的器件。
一个数字信号处理器在一块不大的芯片内包括有控制单元、运算单元、各种寄存器以及一定数量的存储单元等等，在其外围还可以连接若干存储器，并可以与一定数量的外部设备互相通信，有软、硬件的全面功能，本身就是一个微型计算机。
DSP采用的是哈佛设计，即数据总线和地址总线分开，使程序和数据分别存储在两个分开的空间，允许取指令和执行指令完全重叠。
也就是说在执行上一条指令的同时就可取出下一条指令，并进行译码，这大大的提高了微处理器的速度。
另外还允许在程序空间和数据空间之间进行传输，因为增加了器件的灵活性。
其工作原理是接收模拟信号，转换为0或1的数字信号，再对数字信号进行修改、删除、强化，并在其他系统芯片中把数字数据解译回模拟数据或实际环境格式。
它不仅具有可编程性，而且其实时运行速度可达每秒数以千万条复杂指令程序，远远超过通用微处理器，是数字化电子世界中日益重要的电脑芯片。
选DSP还是FPGA？
选DSP还是FPGA？
电子发烧友网讯：智能交通旨在为交通参与者提供多样性服务，它的诞生是现代电子信息技术演进的必然结果。
交通安全是困扰当今国际交通领域最为严重的的一大难题。
而在交通安全中，交通监视和视频分析是必不可少的一部分。
试想一下，在这个碰瓷时代，交通监视遭遇重重挑战：如何在不同照明亮度、不同天气以及摄像机本身震动等种种条件下对交通运行情况进行有效的探测和正确的反馈是亟待解决的难题。
DSP与FPGA孰优孰劣的讨论由来已久，笔者以智能交通视频分析为主线，分析FPGA相较DSP方案，在攻克智能交通视频分析难题中将发挥何种优势。
基于FPGA的视频分析解决方案打造智能交通攻城利器
视频分析市场面临着诸如安装成本、源视频质量、摄像机处理能力以及实时判决等的重大挑战，相比传统工控机或DSP方案，FPGA的解决方案究竟有何优势？。
简述FPGA 和DSP的优缺点及使用场合
简述FPGA 和DSP的优缺点及使用场合。
DSP的结构特点是：1、采用数据和程序分离的哈佛结构和改进的哈佛结构，执行指令速度更快。
2、采用流水线技术，减少每条指令执行时间。
3、片内多总线，可同时进行取指及多个数据存取操作。
4、独立的累加器及加法器，一个周期内可同时完成相乘及累加运算。
5、有DMA通道控制器及串行通信口等，便于数据传送。
6、有中断处理器及定时控制器，便于构成小规模系统。
7、具有软硬件等待功能，能与各种存储器接口。
DSP作为专门的微处理器，主要用于计算，优势是软件的灵活性。
适用于条件进程，特别是复杂的多算法任务。
DSP通过汇编或高级语言(如C语言)进行编程，实时实现方案。
因此，采用DSP器件的优势在于：软件更新速度快，极大地提高了系统的可靠性、通用性、可更换性和灵活性。
缺点：受到串行指令流的限制；超过几MHZ的取样率，一个DSP 仅能完成对数据非常简单的运算；研发周期长。
DSP使用场合是：(系统较低取样速率、低数据率、多条件操作、处理复杂的多算法任务、使用C语言编程、系统使用浮点。
)适合于较低采样速率下多条件进程、特别是复杂的多算法任务。
FPAG的结构特点是：片内有大量的逻辑门和触发器，多为查找表结构，实现工艺多为SRAM。
规模大，集成度高，处理速度快，执行效率高。
能完成复杂的时序逻辑设计，且编程灵活，方便，简单，可多次重复编程。
许多FPAG可无限重复编程。
利用重新配置可减少硬件的开销。
缺点是：掉电后一般会丢失原有逻辑配置；时序难规划；不能处理多事件；不适合条件操作FPAG使用场合：(系统高速取样速率(≥几MHZ)、高数据率、框图方式编程、处理任务固定或重复、使用定点。
) 适合于高速采样频率下，特别是任务比较固定或重复的情况以及试制样机、系统开发的场合。
简述DSP总体设计步骤：(实时数字信号处理系统的设计)：1、总体方案设计，包括明确设计任务，给出设计任务书，并将其转化为量化的技术指标，确定最佳算法及参数，系统软硬件折衷，器件选型。
FPGA与DSP应用作比较
White PaperFPGA vs. DSP Design Reliability and MaintenanceMay 2007, ver. 1.11WP-01023-1.1IntroductionDigital signal processing (DSP) underpins modern wireless and wireline communications, medical diagnostic equipment, military systems, audio and video equipment, and countless other products, becoming increasingly common in consumers' lives. Due to advances in semiconductor technology, ever more complex DSP algorithms, protocols, and applications are now feasible, which, in turn, increase the complexity of the systems and products. As the complexity increases, the system reliability is no longer solely defined by the hardware platform reliability,typically quantified in mean time between failure (MTBF) calculations. System reliability is increasingly determined by hardware and software architecture, development and verification processes, and the level of design maintainability.One fundamental architecture issue is the type of hardware platform. DSP functions are commonly implemented on two types of programmable platforms: digital signal processors and field programmable gate arrays (FPGAs). Digital signal processors are a specialized form of microprocessor, while FPGAs are a form of highly configurable hardware. In the past, the use of digital signal processors was nearly ubiquitous, but with the needs of many applicationsoutstripping the processing capabilities of digital signal processors (measured in millions of instructions per second (MIPS)), the use of FPGAs is growing rapidly. Currently, the primary reason most engineers choose use a FPGA over a digital signal processors is driven by the application's MIPS requirements. Thus, the comparison between digital signal processors and FPGAs focuses on MIPS comparison, which, while certainly important, is not the only advantage of an FPGA. Equally important, and often overlooked, is the FPGA’s inherent advantage in product reliability and maintainability. This second advantage is the focus of this white paper.FPGA and Digital Signal Processor Development ProcessNearly all engineering project managers can readily quote the date of their next product software update, or release. At most technology companies, there is usually a long internal list of software bugs or problem reports along with the software releases that will contain the associated patches, or fixes. It has come to be expected that all software,including DSP code, will contain some level of bugs and that the best one can do is to minimize this. By comparison, FPGA designs tend to be updated much less frequently, and it is generally an unusual event for a manufacturer to issue a field upgrade of a FPGA configuration file.The reasons behind this are due to differences in the digital signal processor and FPGA engineering development process. There is a fundamental challenge in developing complex software for any type of processor. In essence, the digital signal processor is a specialized processing engine, which is constantly reconfigured for many different tasks, some DSP related, others more control or protocol oriented. Resources such as processor core registers, internal and external memory, DMA engines, and I/O peripherals are shared by all tasks, often referred to as “threads”. These create many opportunities for the tasks to interact, often in unexpected or non-obvious ways. In addition, most DSP algorithms are required to run in “real time,” so even unanticipated delays or latencies can cause system failures. A few of the more common causes of DSP software bugs are due to:■Non-uniform assumptions regarding processor resources by multiple engineers simultaneously developing and integrating disparate functions■Failure of interrupts to completely restore processor state upon completion■Blocking of critical interrupt by another interrupt or by an uninterruptible process ■Undetected corruption or non-initialization of pointers■Failing to properly initialize or disable circular buffering addressing modes■Memory leaks, the gradual consumption of available volatile memory due to failure of a thread to release all memory when finished■Dependency of DSP routines on specific memory arrangements of variables■Unexpected memory rearrangement by optimizing memory linkers and compliersFPGA vs. DSP Design Reliability and Maintenance Altera Corporation2■Use of special DSP “core mode” instruction options in core■Conflict or excessive latency between peripheral accesses, such as DMA, serial ports, L1, L2, and external SDRAM memories■Corrupted stack or semaphores■Subroutine execution times dependent on input data or configuration■Mixture of “C” or high-level language subroutines with assembly language subroutines ■Pipeline restrictions of some assembly instructionsManaging ResourcesMicroprocessor, digital signal processor, and operating system (OS) vendors have attempted to address these problems by creating different levels of protection or isolation between tasks or threads. The operating system, or kernel, is used to manage access to the processor resources, such as allowable execution time, memory, or common peripheral resources. However, there is an inherent conflict between processing efficiency and the level of protection offered by the OS. In digital signal processors (shown in Figure 1), where processing efficiency and deterministic latency are often critical, the result is usually minimal or zero OS isolation between tasks. Each task often requires unrestricted access to many processor resources in order to run efficiently.Compounding these development difficulties is incomplete verification coverage, during both initial development and regression testing for subsequent code releases. The near impossibility of testing all the possible permutations (often referred to as “corner cases”) and interactions between different tasks or threads that may occur during field operation makes it arguably the most challenging part of the software development process. Even with automated test scripts, it is not possible to test all possible scenarios. This process must be repeated after every update ormodification of the software to correct known bugs or to add new features. Occasionally, a new software release also inadvertently introduces new bugs, which forces yet another release to correct the new bug. As products grow in complexity, the lines of code increase, as do the number of processor cores, and an ever-greater percentage of the development effort is devoted to software testing.So how exactly does the FPGA development process improve on this unhappy state of affairs? The complexity of each task is more or less equivalent, no matter whether the design uses digital signal processor or FPGAimplementation. Both routes offer the option to use third-party implementations of common signal processingalgorithms, interfaces, and protocols. Each also offers the ability to reuse existing intellectual property (IP) on future designs, but that is where the similarity ends.Altera Corporation FPGA vs. DSP Design Reliability and Maintenance FPGAs offer a more native implementation for most DSP algorithms. Each task is allocated its own resources, and runs independently. It intuitively makes more sense to process each step of a continuously streaming signal processing chain in an assembly line-like process, with dedicated resources for each step. As Henry Ford discovered nearly 100 years ago, this process style dramatically increases the throughput.The FPGA resources assigned can be tailored to the task requirements, which can be broken up along logical partitions. This makes for a well-defined interface between tasks, and largely eliminates unexpected interaction between tasks. Because each task runs continuously, much less memory is required than in the digital signal processor, which must buffer the data and process it in batches. As FPGAs distribute memory throughout the device, each task is permanently allocated the dedicated memory it needs. This provides a high degree of isolation between tasks and results in modification of one task being unlikely to cause unexpected behavior in another task. This, in turn, allows developers to easily isolate and fix bugs in a logical and predictable fashion.FPGA Design VerificationAt the fundamental level, FPGA design and verification tools are closely related to ASIC development tools, and in practice, most ASIC designs are prototyped on FPGAs. This is critical, because bugs are not tolerated in ASICs. Since the possibility of field upgrades to remedy design bugs in an ASIC is remote, and because the time and development cost is very high, ASIC developers go to extreme lengths to verify designs. This has led to test methodologies that provide near-complete coverage of every gate in all scenarios with all possible inputs, accurate modeling of routing delays within the devices, and comprehensive timing analysis.FPGA verification tools are close cousins of their ASIC counterparts, and benefit enormously from many years of investment in the ASIC verification process. The use of FPGA partitioning, test benches, and simulation models makes both integration and on-going regression testing very effective in quickly isolating problems, speeding development processes, and simplifying product maintenance and feature additions. These crucial advantages in the FPGA versus digital signal processor development process comparison will increase as the complexity of designs and the size of development teams increase.For example, Altera® FPGAs are supported by a comprehensive set of in-house and third-party tools to provide a unified tool flow for architecture partitioning, floor planning, facilitation of design intent, simulation, timing closure, optimization, and maintainability. In particular, partitioning is integral to the design entry process. This partitioning, which normally includes all of the chip resources required within the partition, is extended during timing closure and34Copyright © 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific devicedesignations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services .101 Innovation Drive San Jose, CA FPGA vs. DSP Design Reliability and Maintenance Altera Corporationongoing maintenance phases of the development, which guarantees a high degree of isolation. Each logical partition, as well as the overall design, can have independent test benches and simulation models.ConclusionThe large electronic design automation (EDA) industry continually drives the development of FPGA and ASIC test and verification tools. It does not have a comparable counterpart in the software development world. This maychange, as the industry realizes the enormous costs and challenges in software verification, but for now, the practical software solution is to keep downloading the latest patch.Most engineering managers understand that the rate of software updates to remedy bugs far exceeds the rate of comparable FPGA updates in nearly all cases. It is expected and normal to roll out bug fixes on embedded software on a regular basis. With the availability of both low-cost and high-end DSP-optimized FPGA devices, extensive IP cores, availability of high-level design entry methods, and the inherent robustness of the design and verification process, FPGAs will increasingly be the preferred choice for implementing DSP.Acknowledgements■Michael Parker, Sr. Technical Marketing Manager, IP and Technology Product Marketing, Altera Corporation。
DSP、MCU、CPLD、ARM、FPGA芯片的区别
DSP、MCU、CPLD、ARM、FPGA芯片的区别1,单片机小型电脑处理器，最小可以到8个脚，价格便宜，最便宜2块钱2,PLC可变逻辑控制器，主要用在工业控制，里面是类似一个加强的单片机。
对输入输出均有做处理（抗干扰能力、带负载能力都增强）。
例如抗干扰，增加带负载驱动能力3,DSP 数字信号处理芯片，这个用途可做信号处理，例如图像处理,数据采集处理，它比单片要快很多，比单片机功能要强大4,FPGA、CPLD可变逻辑控制，这个做逻辑处理控制，小型的CPLD是没有中央处理器的,大型可以嵌入系统,功能在单片机之上，适合做大型的数据处理，逻辑控制。
其价格不便宜。
但是他和单片机有本质的区别。
例如单片机有内嵌外设AD，DA转换等，CPLD则需要通过控制其他外设IC。
要想诠释清楚，也非三言两语能道明,还是多看看书本吧学习可以以单片机为先，其次是FPGA，CPLD，DSP。
PLC比较简单，学会前面后面只要了解一周一般都会了一家之言，欢迎指证:DSP：数字信号处理器，处理器采用哈弗结构,工作频率较高，能大幅度提高数字信号处理算法的执行效率.MCU：微控制器，主要用于控制系统，工作频率一般来说比DSP低，硬件上具有多个IO 端口，同时也集成了多个外设，主要是便于在控制系统中的应用.至于ARM处理器，个人认为是MCU的高级版本，ARM本身只是一个内核,目前已经有多个版本.CPLD：复杂可编程逻辑器件FPGA：现场可编程门阵列后两者都是可编程器件，CPLD目前一半采用FLASH技术,而FPGA采用SRAM技术,这就决定了FPGA需要采用特定的配置技术。
同时FPGA的规模要比CPLD大得多，但CPLD 应用起来相对要简单的多。
DSP主要用做运算，如语音，图像等信号的运算处理，但基本不用做控制。
MCU,FPGA，ARM主要用做控制，MCU低价低功耗，但门限很少，结构简单，不能实现复杂控制。
ARM控制能力较强,但运算能力相对较弱。
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FPGA :
时序控制能力强。
(时序能力强,没有指令周期,速度快
控制能力较强(由于没有指令集,不如 ARM 和单片机。
数字信号处理及算法弱(这里讲的弱是指内部不集成 DSP 的前提下
DSP :
时序控制能力较弱。
(没办法。
有了指令集,就有指令周期。
而且受到时钟约束
控制能力较强(有指令集。
但是不是专业搞控制的
数字信号处理及算法强(专业特长嘛
DSP 和 FPGA 开发的概述:
DSP ,专用电路(内部结构已经固定通过对 RAM 内部的指令和数据工作(这个是CPU 和 ARM 等等的工作方式所以开发遵循嵌入式软件的设计原则。
调试应更注重于算法的实现。
FPGA , ASIC 一种 , 经典 FPGA 的内部结构是寄存器 +组合逻辑(查找表。
最后是按照逻辑电路进行设计。
所以是属于硬件设计原则。
调试除了需要关心功能以外, 还需要关心电路方面的特性。
比如说延迟,整体功率等等。
开发工具:
DSP 仿真器,开发板。
仿真器比较多,网上查吧, DSP 仿真器,网上大堆的,嫌不够正规, TI 网站自己找教程和 datasheet 。
FPGA :开发工具比较多,他分成综合工具,仿真工具和开发板,综合工具 altera 的Quartus 和 xilinx 的 ISE 以及 synplicity 的 synplify 用的比较多。
仿真么, modelsim ,时序仿真利器。
也是网上去找吧。
多滴很 ~~
技术支持你不用担心 ~TI和 Xilinx 和 Altera 的支持非常非常地道。
就一个问题。
英文要好。
至少你能静下心来看。
上了他们的网站。
你就知道什么叫专业。
fpga 还好, 因为就几家大公司才有能力出。
dsp 么,具体问题具体分析咯。
选择策略方面。
这个是经验谈啊:不能绝对的说。
DSP 么,专业性比较强。
而且的确能做别的 IC 做不了的事情(人家里面乘法器资源没话说稳定性和效率在数字信号处理这块基本无人能出其右 FPGA 呢相对来说可以运用的面比较广泛 (不过也是近期的事情。
其实 FPGA 很早就有。
只是当初设计领域都是通信方面的。
现在有集成 CPU 和 DSP 以及公司提供的软核的强力支持,设计面越来越广。