单片机AT89C2051中英文说明书
at89c52单片机简介中英文对照外文翻译文献
at89c52单片机简介中英文对照外文翻译文献中英文资料对照外文翻译A T89C52 Single-chip microprocessor introductionSelection of Single-chip microprocessor1. Development of Single-chip microprocessorThe main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。
Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。
Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。
AT89C2051单片机)
2．1 AT89C2051单片机及其引脚说明
AT89C2051说明
89C2051是由ATMEL公司推出的一种小型单片机。
95年出现在中国市场。
其主要特点为采用Flash存贮器技术，降低了制造成本，其软件、硬件与MCS-51完全兼容，可以很快被中国广大用户接受，其程序的电可擦写特性，使得开发与试验比较容易。
1 引脚
89C2051共有20条引脚，详见图1.从图中可见，2051继承了8031最重要引脚：P1口共8脚，准双向端口。
P3.0～P3.6共7脚，准双向端口，并且保留了全部的P3的第二功能，如P3.0、P3..1的串行通讯功能，P3.2、P3..3的中断输入功能，P3.4、P3.5的定时器输入功能。
在引脚的驱动能力上面，89C2051具有很强的下拉能力，P1,P3口的下拉能力均
可达到20mA.相比之下，89C51/87C51的端口下拉能力每脚最大
为15mA。
但是限定9脚电流之和小于71mA.这样，引脚的平均
电流只9mA。
89C2051驱动能力的增强，使得它可以直接驱动
LED数码管。
为了增加对模拟量的输入功能，2051在内部构造了一个模拟信
号比较器，其输入端连到P1.0和P1.1口，比较结果存入P3.6
对应寄存器，（P3.6在2051外部无引脚），原理见图2。
对于一些不大复杂的控制电路我们就可以增加少量元件来实
现，例如，对温度的控制，过压的控制等。
图3为测量示意图。
其中，R用于测量门限的调节，IN端接输
入模拟信号。
AT89C2051中文资料
AT89C205189C2051是由ATMEL公司推出的一种小型单片机。
95年出现在中国市场。
其主要特点为采用Flash存贮器技术，降低了制造成本，其软件、硬件与MCS-51完全兼容，可以很快被中国广大用户接受，其程序的电可擦写特性，使得开发与试验比较容易。
89C2051共有20条引脚，详见图1.从图中可见，2051继承了8031最重要引脚：P1口共8脚，准双向端口。
P3.0～P3.6共7脚，准双向端口，并且保留了全部的P3的第二功能，如P3.0、P3..1的串行通讯功能，P3.2、P3..3的中断输入功能,P3.4、P3.5的定时器输入功能。
在引脚的驱动能力上面，89C2051具有很强的下拉能力，P1,P3口的下拉能力均可达到20mA.相比之下，89C51/87C51的端口下拉能力每脚最大为15mA。
但是限定9脚电流之和小于71mA.这样，引脚的平均电流只9mA。
89C2051驱动能力的增强，使得它可以直接驱动LED数码管。
为了增加对模拟量的输入功能，2051在内部构造了一个模拟信号比较器，其输入端连到P1.0和P1.1口，比较结果存入P3.6对应寄存器，（P3.6在2051外部无引脚），原理见图2。
对于一些不大复杂的控制电路我们就可以增加少量元件来实现，例如，对温度的控制，过压的控制等。
图3为测量示意图。
其中，R用于测量门限的调节，IN端接输入模拟信号。
2 电源89C2051有很宽的工作电源电压，可为2.7～6V,当工作在3V时，电流相当于6V工作时的1/4。
89C2051工作于12Hz时，动态电流为5.5mA，空闲态为1mA,掉电态仅为20nA。
这样小的功耗很适合于电池供电的小型控制系统。
3 存储器89C2051片内含有2k字节的Flash程序存储器，128字节的片内RAM,与80C31内部完全类似。
由于2051内部设计全静态工作，所以允许工作的时钟为0～20MHz,也就是说，允许在低速工作时，不破坏RAM内容。
单片机AT89C2051中英文说明书
AT89C2051主要性能参数：与MCS-51产品指令系统完全兼容1．2k字节可重擦写闪速存储器2.1000次擦写周期3.2.7—6V的工作电压范围4.全静态操作：OHz—24MHz5.两级加密程序存储器6.128x8字节内部RAM7.15个可编程I/O口线8.两个16位定时/计数器9.6个中断源10.可编程串行UART通道11.可直接驱动LED的输出端口12.内置一个模拟比较器13.低功耗空闲和掉电模式功能特性概述A T89C2051提供以下标准的功能：2k字节Flash闪速存储器，128字节内部RAM,15个I/O 口线，两个16位定时/计数器，一个5向量两级中断结构，一个全双工串行通信口，内置一个精密比较器，片内振荡器及时钟电路。
同时，AT89C2051可降至0HZ的静态逻辑操作，并支持两种软件可选的节电工作模式。
空闲方式停止CPU的工作，但振荡器停止工作并禁止其他所有部件工作直到下一个硬件复位。
方框图引脚功能说明：Vcc:电源电压GND: 地P1口：p1口是一组8位双向I/O口，P1.2~P1.7提供内部上拉电阻，P1.0和p1.1内部无上拉电阻，主要考虑他们分别是内部精密比较器的相同输入器（AINO）和反相输入端（AINI）,如果需要应在外部接上拉电阻。
P1口输入缓冲器可吸收20mA电流并可直接驱动LED当P1口引脚写入“1”时可作输入端，当引脚P1.2~P1.7用作输入并被外部拉低时，他们将因为内部的上拉电阻位输出电流（In）。
P1口还在flash闪速编程及程序校验时接收代码数据。
P3口：P3口的P3.0~P3.5、P3.7是带有内部上拉电阻的7个双向I/O口。
P3.6没有引出，它作为一个通用的I/O口淡并不可以访问，但可以作为固定输入片内比较器的输出信号，P3.口缓冲器可吸收20mA电流。
当P3口写入“1”时，他们被内部上拉电阻拉高并可作为输入端口。
作为输入端是，被外部拉低的P3口将用上拉电阻输出电流（In）。
关于AT89C51单片机的中英翻译
The Introduction of AT 89C51 DescriptionMicrocontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, one five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system tocontinue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin Description·VCC: Supply voltage.·GND: Ground.·Port 0: Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull ups are required during program verification.·Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 1 also receives the low-order address bytes during Flash programming and verification.·Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory andduring accesses to external data memory that uses 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.·Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull ups.Port 3 also serves the functions of various special features of the AT89C51 as listed below。
51单片机AT89C51 AT89C2051中文资料
51单片机AT89C51/AT89C2051中文资料--------------------------------------------------------------------------------51单片机AT89C51/AT89C2051中文资料AT89C51是一种带4K字节闪烁可编程可擦除只读存储器（FPEROM—Falsh Programmable and Erasable Read Only Memory）的低电压，高性能CMOS8位微处理器，俗称单片机。
AT89C2051是一种带2K字节闪烁可编程可擦除只读存储器的单片机。
单片机的可擦除只读存储器可以反复擦除100次。
该器件采用ATMEL高密度非易失存储器制造技术制造，与工业标准的MCS-51指令集和输出管脚相兼容。
由于将多功能8位CPU和闪烁存储器组合在单个芯片中，ATMEL的A T89C51是一种高效微控制器，AT89C2051是它的一种精简版本。
AT89C单片机为很多嵌入式控制系统提供了一种灵活性高且价廉的方案。
1．主要特性：·与MCS-51 兼容·4K字节可编程闪烁存储器寿命：1000写/擦循环数据保留时间：10年·全静态工作：0Hz-24Hz·三级程序存储器锁定·128*8位内部RAM·32可编程I/O线·两个16位定时器/计数器·5个中断源·可编程串行通道·低功耗的闲置和掉电模式·片内振荡器和时钟电路2．管脚说明：VCC：供电电压。
GND：接地。
P0口：P0口为一个8位漏级开路双向I/O口，每脚可吸收8TTL门电流。
当P1口的管脚第一次写1时，被定义为高阻输入。
P0能够用于外部程序数据存储器，它可以被定义为数据/地址的第八位。
在FIASH编程时，P0 口作为原码输入口，当FIASH进行校验时，P0输出原码，此时P0外部必须被拉高。
AT89C2051中文资料
AT89C2051中文资料特性：·与MCS－51产品兼容·2K字节可重编程闪存－耐久性：1000次读/写周期·工作电压2.7V至V·全静态运行：0Hz至24MHz·两级程序锁存·128×8位内部RAM·15个可编程I/O口·两个16位定时器/计数器·六个中断源·可编程串行UART（= Universal Asynchronous Receiver Transmitter通用异步收发器）通道·可直接驱动LED的输出·芯片级模仿比较器·低功耗空闲模式和微功耗模式（Power-down mode）说明A T89C2051是一种低电压、高性能的8位CMOS微型计算机。
带2K字节的闪存和可擦可编程只读存储器（EPROM）。
该器件应用爱特美尔（Atmel）的高密度非易失性技术生产，与工业级MCS51架构组相兼容。
将一片通用的8位CPU与闪存集成在单块芯片上，爱特美尔A T89C2051是一种功能强盛的微型计算机。
它为许多嵌入式控制提供了高灵活性低成本的解决方案。
A T89C2051的标准特性如下：2K字节闪存，128字节RAM，15个I/O口，两个16位定时器/计数器，一个五失量两级中断结构，一个全双工串行通信口，一个精准模拟比较器，芯片级振荡器和时钟电路。
另外，A T89C2051用静态逻辑设计，可在低至零频下工作，支持两种软件可选节能模式。
空闲模式下CPU不工作，而RAM，定时器/计数器，串口和中断系统继承工作。
微功耗模式（power-down mode)下保存RAM的内容，但冻结振荡器，禁止其它所有的芯片功能直到下一个硬件复位到来。
特定指令的限制A T89C2051是爱特美尔微控制器家族中经济划算的一款产品。
它包含2K字节的闪速程度存储器。
它与MCS-51架构完全兼容，并且可以使用MCS-51指令组来编程。
AT89S52单片机中英文对照外文翻译文献
(文档含英文原文和中文翻译)中英文资料对照外文翻译英文原文：The Description of MCUMCU DescriptionSCM is also known as micro-controller (Microcontroller Unit), commonly used letters of the acronym MCU MCU that it was first used in industrial control. Only a single chip by the CPU chip developed from a dedicated processor. The first design is by a large number of peripherals and CPU on a chip in the computer system, smaller, more easily integrated into a complex and demanding on the volume control device which. INTEL's Z80 is the first designed in accordance with this idea processor, then on the development of microcontroller and dedicated processors have parted ways.Are 8-bit microcontroller early or 4 bits. One of the most successful is the INTEL 8031, for a simple, reliable and good performance was a lot of praise. Then developed in 8031 out of MCS51 MCU Systems. SCM systems based on this system until now is still widely used. With the increased requirements of industrial control field, began a 16-bit microcontroller, because the cost is not satisfactory but have not been very widely used. After 90 years with the great development of consumer electronics, microcontroller technology has been a huge increase. With INTEL i960 series, especially the later series of widely used ARM, 32-bit microcontroller quickly replace high-end 16-bit MCU status and enter the mainstream market. The traditional 8-bit microcontroller performance have been the rapid increase capacity increase compared to 80 the number of times. Currently, high-end 32-bit microcontroller clocked over 300MHz, the performance catching the mid-90's dedicated processor, while the average model prices fall to one U.S. dollars, the most high-end [1] model only 10 dollars. Modern SCM systems are no longer only in the development and use of bare metal environment, a large number of proprietary embedded operating system is widely used in the full range of SCM. The handheld computers and cell phones as the core processing of high-end microcontroller can even use a dedicated Windows and Linux operating systems.SCM is more suitable than the specific processor used in embedded systems, so it was up to the application. In fact the number of SCM is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will be integrated single chip. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse with a 1-2 in both the Department of SCM. Personal computer will have a large number of SCM in the work. General car with more than 40 SCM, complex industrial control systems may even have hundreds of SCM in the same time work! SCM is not only far exceeds the number of PC and other computing the sum, or even more than the number of human beingsSingle chip, also known as single-chip microcontroller, it is not complete a certain logic chips, but to a computer system integrated into a chip. Equivalent to a micro-computer, and computer than just the lack of a microcontroller I / O devices. General talk: a chip becomes a computer. Its small size, light weight, cheap, for the study, application and development of facilities provided. At the same time, learning to use the MCU is to understand the principle and structure of the computer the best choice.SCM and the computer functions internally with similar modules, such as CPU, memory, parallel bus, the same effect as well, and hard disk memory devices, and different is its performance of these components were relatively weak many of our home computer, but the price is low , usually not more than 10 yuan you can do with it ...... some control for a class is not very complicated electrical work is enough of. We are using automatic drum washing machine, smoke hood, VCD and so on appliances which could see its shadow! ...... It is primarily as a control section of the core componentsIt is an online real-time control computer, control-line is that the scene is needed is a stronger anti-jamming ability, low cost, and this is, and off-line computer (such as home PC), the main difference.Single chipMCU is through running, and can be modified. Through different procedures to achieve different functions, in particular special unique features, this is another device much effort needs to be done, some great efforts are very difficult to do. A not very complex functions if the 50's with the United States developed 74 series, or the 60's CD4000 series of these pure hardware buttoned, then the circuit must be a large PCB board! But if the United States if the 70's with a series of successful SCM market, the result will be a drastic change! Just because you are prepared by microcomputer programs can achieve high intelligence, high efficiency and high reliability!As the microcontroller on the cost-sensitive, so now the dominant software or the lowest level assembly language, which is the lowest level in addition to more than binary machine code language, and as so low why is the use? Many high-level language has reached the level of visual programming Why is not it? The reason is simply that there is no home computer as a single chip CPU, not as hard as a mass storage device. A visualization of small high-level language program which even if only one button, will reach tens of K of size! For the home PC's hard drive in terms of nothing, but in terms of the MCU is not acceptable. SCM in the utilization of hardware resources to be very high for the job so although the original is still in the compilation of a lot of use. The same token, if the giant computer operating system and applications run up to get home PC, home PC, also can not afford to.Can be said that the twentieth century across the three "power" era, that is, the age of electricity, the electronic age and has entered into the computer age. However, this computer, usually refers to the personal computer, referred to as PC. It consists of thehost, keyboard, monitor and other components. Another type of computer, most people do not know how. This computer is to give all kinds of intelligent machines single chip (also known as micro-controller). As the name suggests, this computer system took only a minimal integrated circuit, can be a simple operation and control. Because it is small, usually hidden in the charged mechanical "stomach" in. It is in the device, like the human brain plays a role, it goes wrong, the whole plant was paralyzed. Now, this microcontroller has a very broad field of use, such as smart meters, real-time industrial control, communications equipment, navigation systems, and household appliances. Once all kinds of products were using SCM, can serve to upgrade the effectiveness of products, often in the product name preceded by the adjective - "intelligent," such as intelligent washing machines. Now some technical personnel of factories or other amateur electronics developers to engage in out of certain products, not the circuit is too complicated, that function is too simple and can easily be copied. The reason may be stuck in the product did not use a microcontroller or other programmable logic device.SCM historySCM was born in the late 20th century, 70, experienced SCM, MCU, SoC three stages.First model1.SCM the single chip microcomputer (Single Chip Microcomputer) stage, mainly seeking the best of the best single form of embedded systems architecture. "Innovation model" success, laying the SCM and general computer completely different path of development. In the open road of independent development of embedded systems, Intel Corporation contributed.2.MCU the micro-controller (Micro Controller Unit) stage, the main direction of technology development: expanding to meet the embedded applications, the target system requirements for the various peripheral circuits and interface circuits, highlight the object of intelligent control. It involves the areas associated with the object system, therefore, the development of MCU's responsibility inevitably falls on electrical, electronics manufacturers. From this point of view, Intel faded MCU development has its objective factors. In the development of MCU, the most famous manufacturers as the number of Philips Corporation.Philips company in embedded applications, its great advantage, the MCS-51 single-chip micro-computer from the rapid development of the micro-controller. Therefore, when we look back at the path of development of embedded systems, do notforget Intel and Philips in History.Embedded SystemsEmbedded system microcontroller is an independent development path, the MCU important factor in the development stage, is seeking applications to maximize the solution on the chip; Therefore, the development of dedicated single chip SoC trend of the natural form. As the microelectronics, IC design, EDA tools development, application system based on MCU SoC design have greater development. Therefore, the understanding of the microcontroller chip microcomputer can be, extended to the single-chip micro-controller applications.MCU applicationsSCM now permeate all areas of our lives, which is almost difficult to find traces of the field without SCM. Missile navigation equipment, aircraft, all types of instrument control, computer network communications and data transmission, industrial automation, real-time process control and data processing, extensive use of various smart IC card, civilian luxury car security system, video recorder, camera, fully automatic washing machine control, and program-controlled toys, electronic pet, etc., which are inseparable from the microcontroller. Not to mention the area of robot control, intelligent instruments, medical equipment was. Therefore, the MCU learning, development and application of the large number of computer applications and intelligent control of the scientists, engineers.The single-chip microcomputer AT89S52 MCU as an example, the pair for further description:AT89S52 MCUFeatures• Compatible with MCS-51 Products• 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 10,000 Write/Erase Cycles• 4.0V to 5.5V Operating Range• Fully Static Operation: 0 Hz to 33 MHz• Three-level Program Memory Lock• 256 x 8-bit Internal RAM• 32 Programmable I/O Lines• Three 16-bit Timer/Counters• Eight Interrupt Sources• Full Duplex UART Serial Channel• Low-power Idle and Power-down Modes• Interrupt Recov ery from Power-down Mode• Watchdog Timer • Dual Data Pointer• Power-off Flag • Fast Programming Time• Flexible ISP Programming (Byte and Page Mode)• Green (Pb/Halide-free) Packaging Option1.DescriptionThe AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.2.Pin DescriptionVCC ：Supply voltage.GND ：Ground.Port 0：Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, eachpin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification.Port 1：Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX@ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash program-ming and verification.Port 3：Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the fol-lowing table.RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROG：Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing orclocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to exter-nal data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifier.3.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.3.1 Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.3.2 Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128bytes of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.4.Watchdog Timer (One-time Enabled with Reset-out)The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output RESET HIGH pulse at the RST pin.4.1 Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin. The RESET pulse dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.4.2 WDT During Power-down and IdleIn Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.5. UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51 and AT89C52. For further information on the UART operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF6. Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. For further information on the timers’ operation, please click on the document link below:/dyn/resources/prod_documents/DOC4316.PDF7. Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2in the SFR T2CON. Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 6-1. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscil-lator frequency.In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-sponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.7.1 Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transi-tion at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt.7.2 Auto-reload (Up or Down Counter)Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD . Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin. Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.8. Baud Rate GeneratorTimer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON. Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate according to the fol -lowing equation.The Timer can be configured for either timer or counter operation. In most applications, it is con-figured for timer operation (CP/T2 = 0). The timer operation is Timer 2 Overflow Rate Modes 1 and 3 Baud Rates = 16different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer.This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.9. Programmable Clock OutA 50% duty cycle clock can be programmed to come out on P1.0. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation.In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate gen-erator and a clock generator simultaneously. Note, however, Modes 1 and 3Oscillator Frequency Baud Rate 32[65536-RCAP2H,RCAP2L]=⨯Oscilator Frequency Clock-Out Frequency=4[65536-(RCAP2H,RCAP2L)]⨯。
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AT89C2051
主要性能参数：
与MCS-51产品指令系统完全兼容
1．2k字节可重擦写闪速存储器
2.1000次擦写周期
3.2.7—6V的工作电压范围
4.全静态操作：OHz—24MHz
5.两级加密程序存储器
6.128x8字节内部RAM
7.15个可编程I/O口线
8.两个16位定时/计数器
9.6个中断源
10.可编程串行UART通道
11.可直接驱动LED的输出端口
12.内置一个模拟比较器
13.低功耗空闲和掉电模式
功能特性概述
A T89C2051提供以下标准的功能：2k字节Flash闪速存储器，128字节内部RAM,15个I/O 口线，两个16位定时/计数器，一个5向量两级中断结构，一个全双工串行通信口，内置一个精密比较器，片内振荡器及时钟电路。
同时，AT89C2051可降至0HZ的静态逻辑操作，并支持两种软件可选的节电工作模式。
空闲方式停止CPU的工作，但振荡器停止工作并禁止其他所有部件工作直到下一个硬件复位。
方框图
引脚功能说明：
Vcc:电源电压
GND: 地
P1口：p1口是一组8位双向I/O口，P1.2~P1.7提供内部上拉电阻，P1.0和p1.1内部无上拉电阻，主要考虑他们分别是内部精密比较器的相同输入器（AINO）和反相输入端（AINI）,如果需要应在外部接上拉电阻。
P1口输入缓冲器可吸收20mA电流并可直接驱动LED当P1口引脚写入“1”时可作输入端，当引脚P1.2~P1.7用作输入并被外部拉低时，他们将因为内部的上拉电阻位输出电流（In）。
P1口还在flash闪速编程及程序校验时接收代码数据。
P3口：P3口的P3.0~P3.5、P3.7是带有内部上拉电阻的7个双向I/O口。
P3.6没有引出，它作为一个通用的I/O口淡并不可以访问，但可以作为固定输入片内比较器的输出信号，P3.口缓冲器可吸收20mA电流。
当P3口写入“1”时，他们被内部上拉电阻拉高并可作为输入端口。
作为输入端是，被外部拉低的P3口将用上拉电阻输出电流（In）。
P3口还用于实现AT89C2051特殊的功，如下表所示：
P3口还接收一些用于flash闪速编程及程序校验的控制信号。
RST:复位输入。
RST引脚一旦变成两个机器周期以上高电平，所有的I/O 口都将复制到“1”（高电平）状态，振荡器正在工作时，持续两个机器周期以上的高电平便可以王城复位，没个机器周期为12个振荡时钟周期。
XTAL1：振荡器反相放大器的内部时钟发生器的输入端。
XTA12：振荡器反相放大器的输出端。
振荡器的特征：
XTAL1、XTAL2为片内振荡器的反相放大器的输入或输出端，如下图所示。
可采用石英晶体或陶瓷振荡器振荡器组成时钟振荡器，如需从外部输入时钟驱动A T89C2051，时钟信号从XTAL1、XTAL2应悬空。
由于输入到内部电路是经过一个2分频触发器，所有输入的外部时钟信号无需特殊要求，但它必须符合电平的最大和最小值及时时序规范。
某些指令的约束条件：
A89C2051是经济型低价位的微控制器，它含有2k字节的flash闪速程序存储器，指令系统与MCS—51完全兼容，可使用MCS—51指令系统对其进行编程。
但是在使用某些有关指令进行编程时程序员须注意一些事项。
和跳转或分支有关的指令有一定的空间约束，使目的地址能安全落在A89C2051的2k 字节的物理程序存储器空间内，程序员必须注意这一点。
对于2K字节存储器的A89C2051来说，LJMP E0H是一条有效指令，而LJMP 900H则无效指令。
1.分支指令
对于LCALL、LJMP、ACALL、AJMP、JMP、MP@+DPTR等指令，只要程序员记住这些分支指令的目的地址在程序存储器大小的物理范围内，这些无条件分支指令就会正确执行，超出物理空间的限制会出现不可预知的程序出错。
JZ、NZ、CJB 等这些条件转移指令的使用与上述原则一样。
2 . 与MOVX相关的指令，数据存储器
A89C2051包含128字节内部数据存储器，这样，A89C2051的堆深度局限于内部RAM的128字节范围内，它既不支持外部数据存储器的访问，也不支持外部程序存储器的执行，因此程序中不应有MOVX指令。
程序存储器的加密：
A89C2051可使用对芯片上的两个加密位进行编程或不编程得到下表所示功能：
空闲模式：
在空闲模式下，CPU保持睡眠状态而所有片内的外设保持激活状态，这种方式有软件产生。
此时RAM和所有特殊功能寄存器的内容保持不变。
掉电模式：
在掉电模式下，振荡器停止工作，进入点点模式的指令时最后一条指令。
Flash闪速存储器的编程：
在擦出状态下用2k字节的片内PEROM带码存储进行封装微控制器，其程序存储器是可反复编程的。
数据查询：
AT89C2051具有写周期节航速的数据查询功能，在写周期期间，对最后写入的字节尝试读将令P1.7上写入数据的炒作结束。
当写周期完成，全部输出端的数据有效。
编程接口：
Flash闪速中的每一带码字节进行写入切整个存储器可在控制信号的正确组合下进行擦除。
11。