● Evaluation Methodology

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Result of A is used to compute address of B
Window Constraints
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Limitation on the number of read misses which can be held simultaneously in the instruction window
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Why read miss clustering?
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How do we implement it?
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Row-wise Traversal
for (...j<4;j++) for (...i<4;i++) ...A[j,i]
Spatial Locality Clustering
Column-wise Traversal (Step One: Interchange)
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Irregulars
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And finally we have f!!!
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f = freg + firreg
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freg = Σm Є RLR Cm firreg= Σm Є ILR Cm x Pm
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Unroll-and-jam is applied as much as possible while maintaining that f <= lρ x ρ Step four: Re-compute f!
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New leading references and increased iteration size Leading references may become non-leading references
Resolving Window Constraints
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Inter-iteration constraints
Step Three: Unroll and Jam
for(..j+=N)
for (...i++) { ...A[j,i] ...A[j+1,i] ...... ...A[j+N-1,i] }
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Stop column-wise traversal when miss clustering resources are fully utilized
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Cache-line dependences Address dependences Window constraintsCache-line Depe Nhomakorabeadence
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Memory operation B is cache-dependent on A if
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A is a leading reference, and miss on A brings in the data of B
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Occurs when independent read misses in W/i iterations do not fill the resources for memory parallelism Unrolling inner-loop until resources are filled Exposes independent misses to instruction scheduler Instruction scheduler packs independent read miss references in loop body close to one another
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Intra-iteration window constraints
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Experiment Methodology
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Environment: Rice Simulator for ILP Multiprocessors Benchmark: Latbench and five scientific applications Evaluation:
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What about f ?
Dynamic inner-loop unrolling
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Cm = W / (iLm)
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Cm : No. of copies of m that contribute overlapped misses W : Window size i : No. of instructions in a loop body Lm:: No. of iterations which share a cache line
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Weakness
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Questions?
Benefits
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Scalar Replacement Inner-loop iteration count does not change Clustering in postlude possible
Analysis
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Locality Analysis to determine leading references and inner-loop self-spatial locality
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Uniprocessor: 11-48% Multiprocessor: 9-39%
Conclusions
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Strengths
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Good performance Interactions with software pre-fetching provides greater benefits Legality of transformations are not clear
Code Transformations to Improve Memory Parallelism
Vijay S. Pai and Sarita Adve
Presenter: Divya Kumar
Objectives
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To introduce code transformation techniques which reduce memory stall time Why read miss clustering? Why unroll-and-jam? What are the limiting factors of performance? What is the impact on application execution time?
R – no. of nodes in the inner-loop recurrence ς – no. of iterations to traverse the cycle
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Floating-point operations in the inner-most loop
Number of stages in the floating-point pipeline
Background on Floating-Point Pipelining
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Unroll-and-jam has been previously used to improve floating-point pipelining To fill the pipeline, unroll-and-jam must be applied until f >= lρ x ρ R/ς
(M. E. Wolf and M. S. Lam. A Data Locality Optimizing Algorithm. In Proc. of the Conf. on Programming Language Design and Implementation, 1991.)
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Limitations to read miss parallelism
Read Miss Clustering
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Why do we need to overlap multiple read misses?
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Read stall time are bottleneck in ILP-based processors Read miss latencies are too long to overlap with other instruction types Overlap independent read misses within a single instruction window Unroll-and-jam
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Miss Patterns
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We need miss patterns to determine which leading reference instances miss together Regular Leading References
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Arrays Different leading references miss together All others! Miss pattern is not analyzable Overall Miss rate Pm
Leading References with Innerloop self-spatial locality
Inner-Loop dependence distance
Address Dependences
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Memory operation B is address dependent on A
Mapping to Memory Parallelism
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lρ – Maximum number of simultaneous outstanding misses supported by the processor ρ=R/ζ R: Leading references in the inner-loop recurrence – ζ: Number of iterations to traverse the cycle