INSTRUCTIONS FOR USE-PGA
pdsp1601a中文资料_数据手册_IC数据表
PDSP1601/PDSP1601A 1The PDSP1601 is a high performance 16-bit arithmetic logic unit with an independent on-chip 16-bit barrel shifter.The PDSP1601A has two operating modes giving 20MHz or 10MHz register-to-register transfer rates.The PDSP1601 supports Multicycle multiprecision operation. This allows a single device to operate at 20MHz for 16-bit fields, 10MHz for 32-bit fields and 5MHz for 64-bit fields.The PDSP1601 can also be cascaded to produce wider words at the 20MHz rate using the Carry Out and Carry In pins. The Barrel Shifter is also capable of extension, for example the PDSP1601 can used to select a 16-bit field from a 32-bit input in 100ns.APPLICATIONS s Digital Signal Processing s Array Processing s Graphicss Database AddressingsHigh Speed Arithmetic ProcessorsFEATURESs 16-bit, 32 instruction 20MHz ALUs 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter s Independent ALU and Shifter Operation s 4 x 16-bit On Chip Scratchpad Registers s Multiprecision Operation; e.g. 200ns 64-bit Accumulates Three Port Structure with Three Internal Feedback Paths Eliminates I/O Bottlenecks s Block Floating Point Supports 300mW Maximum Power Dissipations84-pin Pin Grid Array or 84 Contact LCC Packages or 100 pin Ceramic Quad Flat PackASSOCIATED PRODUCTSPDSP16112Complex MultiplierPDSP1611616 x 16 Complex Multiplier PDSP16318Complex Accumulator PDSP16330Pythagoras ProcessorFig.1 Pin connections - bottom viewORDERING INFORMATIONPDSP1601 MC GGCR 10MHz MIL883 Screened -QFP packagePDSP1601A BO AC 20MHz Industrial - PGA packageN.BFurther details of the Military grade part are available in a separate datasheet (DS3763)PDSP1601/PDSP1601AALU and Barrel ShifterDS3705ISSUE 3.0November 1998PDSP1601/PDSP1601A2FunctionGNDC8C9C10C11C12C13C14C15OEBFPVCCCORA0RA1RA2CIIA0IA1IA2IA3AC pinF9F11E11E10E9D11D10C11B11C10A11B10B9A10A9B8A8B6B7A7C7AC pinJ6J7L7K7L6L8K8L9L10K9L11K10J10K11J11H10H11F10G10G11G9FunctionIS0IS1IS2IS3SV0SV1SV2SV3SVOERS0RS1VCCRS2C0C1C2C3C4C5C6C7AC pinF3G3G1G2F1H1H2J1K1J2L1K2K3L2L3K4L4J5K5L5K6FunctionGNDMSA0MSA1A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0CEAMSCAC pinC6A6A5B5C5A4B4A3A2B3A1B2C2B1C1D2D1E3E2E1F1PIN DESCRIPTIONFunctionIA4MSBMSSB15B14B13B12B11B10B9B8B7B6B5B4B3B2B1B0CEBCLKGC51525354555657585960616263646566676869707172737475GC26272829303132333435363738394041424344454647484950SIGN/CN/CN/CN/CVCCC0RA0RA1RA2CIIA0IA1IA2IA3IA4MSBMSSB15B14B13B12B11B10B9B8SIGN/CN/CN/CN/CB7B6B5B4B3B2B1B0CEBCLKGNDMSA0MSA1A15A14A13A12A11A10A9A8SIGN/CN/CN/CN/CA7A6A5A4A3A2A1A0CEAMSCIS0IS1IS2IS3SV0SV1SV2SV3SVOERS0RS1GC767778798081828384858687888990919293949596979899100SIGN/CN/CN/CN/CVCCRS2C0C1C2C3C4C5C6C7GNDC8C9C10C11C12C13C14C15OEBFP GC12345678910111213141516171819202122232425N/C = not connected - leave open circuitAll GND and VDD pin must be usedhttps://PDSP1601/PDSP1601A3Symbol MSB MSS B15 - B0CEB CLKMSA0 - MSA1A15 - A0CEA MSC IS0 - IS3SV0 - SV3SVOERS0, RS1RS2C0 - C15OE BFP CO RA0 - RA2CI IA0 - IA3IA4Vcc GND DescriptionALU B-input multiplexer select control.1 This input is latched internally on the rising edge of CLK.Shifter Input multiplexer select control.1 This input is latched internally on the rising edge of CLK.B Port data input. Data presented to this port is latched into the input register on the rising edge of CLK. B15 is the MSB.Clock enable, B Port input register. When low the clock to this register is mon clock to all internal registered elements. All registers are loaded, and outputs change on the rising edge of CLK.ALU A-input multiplexer select control.1 These inputs are latched internally on the rising edge of CLK.A Port data input. Data presented to this port is latched into the input register on the rising edge of CLK. A15 is the MSB.Clock enable, A Port input register. When low the clock to this register is enabled.C-Port multiplexer select control.1 This input is latched internally on the rising edge of CLK.Instruction inputs to Barrel Shifter, IS3 = MSB.1 These inputs are latched internally on the rising edge of CLK.Shift Value I/O Port. This port is used as an input when shift values are supplied fromexternal sources, and as an output when Normalise operations are invoked. The I/O functions are determined by the IS0 - IS3 instruction inputs, and by the SVOE control.The shift value is latched internally on the rising edge of CLK.SV Output enable. When high the SV port can only operate as an input. When low the SV port can act as an input or as an output, according to the IS0 - IS3 instruction. This pin should be tied hihg or low, depending upon the application.Instruction inputs to Barrel Shifter registers.1 These inputs are latched internally on the rising edge of CLK.C Port data output. Data output on this port is selected by the C output multiplexer.C15 is the MSB.Output enable. The C Port outputs are in high impedance condition when this control is high.Block Floating Point Flag from ALU, active high.Carry out from MSB of ALU.Instruction inputs to ALU registers.1 These inputs are latched internally on the rising edge of CLK.Carry in to LSB of ALU.Instruction inputs to ALU.1 IA4 = MSB. These inputs are latched internally on the rising edge of CLK.+5V supply: Both Vcc pins must be connected.0V supply: Both GND pins must be connected.PIN DESCRIPTIONSNOTES1. All instructions are executed in the cycle commencing with the rising edge of the CLK which latches the inputs.https://PDSP1601/PDSP1601A4FUNCTIONAL DESCRIPTIONThe PDSP1601 contains four main blocks: the ALU, the Barrel Shifter and the two Register Files.The ALUThe ALU supports 32 instructions as detailed in Table 1.The inputs to the ALU are selected by the A and B MUXs.Data will fall through from the selected register through the A or B input MUXs and the ALU to the ALU output register file in 50ns for the PDSP1601A (100ns for the PDSP1601).The ALU instructions are latched, such that the instruction will not start executing until the rising edge of CLK latches the instruction into the device.The ALU accepts a carry in from the CI input and supplies a carry out to the CO output. Additionally, at the end of each cycle, the carry out from the ALU is loaded into an internal 1bit register, so that it is available as an input to the ALU on the next cycle. In the manner, multicycle, multiprecision operations are supported. (See MULTICYCLE CASCADE OPERATIONS).BFP FlagThe ALU has a user programmable BFP flag. This flag may be programmed to become active at any one of four conditions. Two of these conditions are intended to support Block Floating Point operations, in that they provide flags indicating that the ALU result is within a factor of two or four of overflowing the 16 bit number range. For multiprecision operations the flag is only valid whilst the most significant 16bit byte is being processed. In this manner the BFP flag may be used over any extended word width.The remaining two conditions detect either an overflow condition or a zero result. For the overflow condition to beactive the ALU result must have overflowed into the 16th (sign)bit, (this flag is only valid whilst the most significant 16 bit byte is being processed). The zero condition is active if the result from the ALU is equal to zero. For multiprecision operations the zero flag must be active for all of the 16 bit bytes of an extended word.The BFP flag is programmed by executing on of the four SBFXX instructions (see Table 1). During the execution of any of these four instructions, the output of the ALU is forced to zero.Multicycle/Cascade OperationThe ALU arithmetic instructions contain two or three options for each arithemtic operation.The ALU is designed to operate with two's complement arithmetic, requiring a one to be added to the LSB for all subtract operations. The instructions set includes instructions that will force a one into the LSB, e.g. MIAX1, AMBX1, BMAX1(see Table 1).These instructions are used for the least significant 16 bit byte of any subtract operation.The user has an option of cascading multiple devices, or multicycling a single device to extend the arithmetic precision.Should the user cascade multiple devices, then the cascade arithmetic instructions using the external CI input should be employed for all but the least significant 16 bit byte, e.g. MIACI,APBCI, BMACI (see Table 1).Should the user multicycle a single device, then the Multicycle Arithmetic instructions, using the internally registered CO bit should be employed for all but the least significant 16 bit byte, e.g. MIACO, APBCO, AMBCO,BMACO (see Table 1).Fig.2 PDSP1601 block diagramhttps://PDSP1601/PDSP1601A5Inst 000102030405060708090A 0B 0C 0D 0E 0FIA4-AI000000000010001000011001000010100110001110100001001010100101101100011010111001111Mnemonic CLRXX MIAX1MIACI MIACO A2SGN A2RAL A2RAR A2RSX APBCI APBCO AMBX1AMBCI AMBCO BMAX1BMACI BMACOOperation RESET MINUS A MINUS A MINUS A A/2A/2A/2A/2A PLUSB A PLUS B A MINUS B A MINUS B A MINUS B B MINUS A B MINUS A B MINUS AMode ---------LSBYTE CASCADE MULTICYCLE MSBYTE MULTICYCLE MULTICYCLE MULTICYCLE CASCADE MULTICYCLE LSBYTE CASCADE MULTICYCLE LSBYTE CASCADE MULTICYCLEFunctionCLEAR ALL REGISTERS NA Plus 1NA Plus CI NA Plus CO A/2 Sign Extend A/2 with RAL LSB A/2 with RAR LSB A/2 with RSX LSB A Plus B Plus CI A Plus B Plus CO A Plus NB Plus 1A Plus NB Plus CI A Plus NB Plus CO NA Plus B Plus 1NA Plus B Plus CI NA Plus B Plus COTable 1 ALU instructions1a. ARITHMETIC INSTRUCTIONSInst 1011121314151617IA4-AI01000010001100101001110100101011011010111Mnemonic ANXAB ANANB ANNAB ORXAB ORNAB XORAB PASXA PASNAOperation A AND B A AND NB NA AND B A OR B NA OR B A XOR B PASS A INVERT AFunction A. B A. NB NA. B A + B NA + B A XOR B A NA1c. CONTROL INSTRUCTIONSInst 18191A 1B 1C 1D 1E 1FIA4-AI01100011001110101101111100111011111011111Mnemonic SBFOV SBFU1SBFU2SBFZE OPONE OPBYT OPNIB OPALTOperationSet BFP Flag to OVR, Force ALU output to zero Set BFP Flag to UND 1 Force ALU output to zero Set BFP Flag to UND 2 Force ALU output to zero Set BFP Flag to ZERO Force ALU output to zero Output 0001 Hex Output 00FF Hex Output 000F Hex Output 5555 HexKEY A = A input to ALU B = B input to ALUCI = External Carry in to ALUCO = Internally Registered Carry out from ALU RAL = ALU Register (Left)RAR = ALU Register (Right)RSX= Shifter Register (Left or Right)MNEMONICSCLRXX Clear All Registers to zero MIAXX Minus A,XX = Carry in to LSB A2XXX A Divided by 2,XXX = Source of MSB APBXX A Plus B,XX = Carry in to LSB AMBXX A Minus B,XX = Carry in to LSB BMAXX B Minus A,XX = Carry in to LSB ANX-Y AND X = Operand 1, Y = Operand 2ORX-Y OR X = Operand 1, Y = Operand 2XORXY Exclusive OR X = Operand 1, Y = Operand 2PASXX Pass XX = Operand SBFXX Set BFP Flag XX = Function OPXXXOutput Constant XXX1b. LOGICAL INSTRUCTIONShttps://PDSP1601/PDSP1601A6Divide by TwoThe ALU has four (A2SGN, A2RAL, A2RAR, A2RSX)instructions used for right shifting (dividing by two) extended precision words. These words, (up to 64 bits) may be stored in the two on-chip register files. When the least significant 16bit word is shifted, the vacant MSB must be filled with the LSB from the next most significant 16 bit byte. This is achieved via the A2RAL, A2RAR or A2RSX instructions which indicate the source of the new MSB (see ALU INSTRUCTION SET).When the most significant 16 bit byte is right shifted, the MSB must be filled with a duplicate of the original MSB so as to maintain the correct sign (Sign Extension). This operation is achieved via the A2SGN instruction (see Table 1).ConstantsThe ALU has four instructions (OPONE, OPBYT, OPNIB,OPALT) that force a constant value onto the ALU output.These values are primarily intended to be used as masks, or the seeds for mask generation, for example, the OPONE instruction will set a single bit in the least significant position.This bit may be rotated any where in the 16 bit field by the Barrel Shifter, allowing the AND function of the ALU to perform bit-pick operations on input data.CLRThe ALU instruction CLRXX is used as a Master Reset for the entire device. This instruction has the effect of:1.Clearing ALU and Barrel Shifter register files to zero.2.Clearing A and B port input registers to zero.3.Clearing the R1 and R2 shift control registers to zero.4.Clearing the internally registered CO bit to zero.5.Programming the BFP flag to detect overflow conditions.The Barrel ShifterThe Barrel Shifter supports 16 instructions as detailed in Table 2. The input to the Barrel Shifter is selected by the S MUX. Data will fall through from the selected register, through the S MUX and the Barrel Shifter to the shifter output register file in 50ns for the PDSP1601A (100ns for the PDSP1601).The Barrel Shifter instructions are latched, such that the instructions will not start executing until the rising edge of CLK latches the instruction into the device.The Barrel Shifter is capable of Logical Arithmetic or Barrel Shifts in either direction.A.Logical shifts discard bits that exit the 16 bit field and fill spaces with zeros.B.Arithmetic shifts discard bits that exit the 16 bit field and fill spaces with duplicates of the original MSB.C.Barrel Shifts rotate the 16 bit fields such that bits tha exit the 16 bit field to the left or right reappear in the vacant spaces on the right or left.The amount of shift applied is encoded onto the 4 bit Barrel Shifter input as illustrated in Table 3. The type of shift and the amount are determined by the shift control block. The shift control block (see Fig.3) accepts and decodes the four bit ISO-3 instruction. The shift control block contains a priority encoder and two user programmable 4 bit registers R1 and R2.There are four possible sources of shift value that can be passed onto the Barrel Shifter, there are:1.The Priority Encoder 2.The SV input 3.The R1 register 4.The R2 register Mnemonic LSRSV LSLSV BSRSV BSLSV LSRR1LSLR1LSRR2LSLR2LR1SV LR2SV ASRSV ASRR1ASRR2NRMXX NRMR1NRMR2IS3-IS00000000100100011010001010110011110001001101010111100110111101111OperationLogical Shift Right by SV Logical Shift Left by SV Barrel Shift Right by SV Barrel Shift Left by SV Logical Shift Right by R1Logical Shift Left by R1Logical Shift Right by R2Logical Shift Left by R2Load Register 1 From SV Load Register 2 From SV Arithmetic Shift Right by SV Arithmetic Shift Right by R1Arithmetic Shift Right by R2Normalise Output PENormalise Output PE, Load R1Normalise Output PE, Load R2Inst 0123456789A B C D E FI/O I I I I X X X X I I I X X O O OTable 2 Barrel shifter instructionsKEY SV = Shift Value R1= Register 1R2= Register 2PE = Priority Encoder OutputI => SV Port operates as an Input O => SV Port operates as an Output X=> SV Port in a High Impedance StateMNEMONICSLSXYY Logical Shift,X = Direction YY = Source of Shift Value BSXYY Barrel Shift,X = Direction YY = Source of Shift Value ASXYY Arithmetic Shift,X = Direction YY = Source of Shift Value LXXYY Load XX = Target YY = SourceNRMYYNormalise by PE, Output PE value on SV Port, Load YY Reghttps://PDSP1601/PDSP1601A7SV30000000011111111SV20000111100001111SV10011001100110011SV00101010101010101Shift No shift 1 place 2 places 3 places 4 places 5 places 6 places 7 places 8 places 9 places 10 places 11 places 12 places 13 places 14 places 15 places(1)Priority encode the 16 bit input to the Barrel Shifter and place the 4 bit value in either of the R1 or R2 registers and output the value on the SV port (if enabled by SVOE ).(2)Shift the 16 bit input by the amount indicated by the Priority Encoder such that the output from the Barrel Shifter is a normalised value.SV InputIf the SV port is selected as the source of the shift value,then the input to the Barrel Shifter is shifted by the value stored in the internal SV register.SVOEThe SV port acts as an input or an output depending upon the IS0-3 instruction. If the user does not wish to use the normalise instructions, then the SV port mat be forced to be input only by typing SVOE control high. In this mode the SV port may be considered an extension of the instruction inputs.R1 and R2 RegistersThe R1 and R2 registers may be loaded from the Priority Encoder (NRMR1 and NRMR2) or from the SV input (LR1SV,LR2SV).Whilst the latter two instructions are executing, the Barrel Shifter will pass its input to the output unshifted.Priority EncoderIf the priority encoder is selected as the source of the shift value (instructions:- NRMXX, NRMR1, MRMRZ), then within one 100ns cycle or two 50ns cycles for the PDSP1601A (one 200ns or two 100ns cycles for the PDSP1601), the shift circuitry will:Table 3 Barrel shifter codesFig.3 Shift control blockhttps://PDSP1601/PDSP1601A8The Register FilesThere are two on-chip register files (ALU and Shifter), each containing two 16 bit registers and each supporting 8instructions (see Table 4). The instructions for the ALU register file and the Barrel Shifter Register file are the same.The Inputs to the register files come from either the ALU or the Barrel Shifter, and are loaded into the Register files on the rising edge of CLK.The register file instructions are latched such that the instruction will not start executing until the rising edge of theCLK latches the instruction into the device.The register file instructions (see Table 4) allow input data to be loaded into either, neither or both of the registers. Data is loaded at the end of the cycle in which the instruction is executing.The register file instructions allow the output to be sourced from either of the two registers, the selected output will be valid during the cycle in which the instruction is executing.OperationLoad Left Reg Output Right Reg Load Right Reg Output Left Reg Load Left Register, Output Left Reg Load Right Register, Output Right Reg Load Both Registers, Output Left Reg No Load Operation, Output Right Reg No Load Operation, Output Left RegNo Load Operation, Pass Barrel Shifter ResultOperationLoad Left Reg Output Right Reg Load Right Reg Output Left Reg Load Left Register, Output Left Reg Load Right Register, Output Right Reg Load Both Registers, Output Left Reg No Load Operation, Output Right Reg No Load Operation, Output Left Reg No Load Operation, Pass ALU ResultInst 01234567RA2-RA0000001010011100101110111Mnemonic LLRRR LRRLR LLRLR LRRRR LBRLR NOPRR NOPLR NOPPSALU REGISTER INSTRUCTIONSInst 01234567RA2-RA0000001010011100101110111Mnemonic LLRRR LRRLR LLRLR LRRRR LBRLR NOPRR NOPLR NOPPSSHIFTER REGISTER INSTRUCTIONSTable 4 ALU and shift register instructions mnemonicsMNEMONICSLXXYY Load XX = Target,YY = Source of Output LBOXX Load Both Registers,XX = Source of Output NOPXX No Load Operation,XX= Source of Outputhttps://PDSP1601/PDSP1601A9MARAX MAAPR MABPR MARSXMultiplexersThere are four user selectable on-chip multiplexers (A-MUX, B-MUX, S-MUX and C-MUX).These four multiplexers support instructions as tabulated in Table 5.The MUX instructions are latched such that the instruction will not start executing until the rising edge of CLK latches the instruction onto the device.MSA10011A-MUXOutputALU REGISTER FILE OUPUT A-PORT INPUT B-PORT INPUTSHIFTER REGISTER FILE OUTPUTMSB01B-MUXOutputB-PORT INPUTSHIFTER REGISTER FILE OUTPUTMSS01S-MUXOutputB-PORT INPUTSHIFTER REGISTER FILE OUTPUTMSC01C-MUXOutputALU REGISTER FILE OUTPUTSHIFTER REGISTER FILE OUTPUTTable 5MSA00101https://PDSP1601/PDSP1601A10INSTRUCTION SETALU Arithmetic Instructions FunctionOn the rising edge of CLK at the end of the cycle in which this instruction is executing, the A Port, B Port, ALU, Barrel Shifter, and Shift Control Registers will be loaded with zeros.The internal registered CO will also be set to zero, and the BFP flag will be set to activate on overflow conditions.The A input to the ALU is inverted and a one is added to the LSB.The A input to the ALU is inverted and the CI input is added to the LSB.The A input to the ALU is inverted and the CO output from the ALU on the previous cycle is added to the LSB.The A input to the ALU is right shifted one bit position. The LSB is discarded, and the vacant MSB is filled by duplicating the original MSB (Sign Extension).The A input to the ALU is right shifted one bit position. The LSB is discarded, and the vacant MSB is filled with the LSB from the ALU register.The A input to the ALU is right shifted one bit position. The LSB is discarded, and the vacant MSB is filled with the LSB from the ALU register.The A input to the ALU is right shifted one bit position. The LSB is discarded, and the vacant MSB is filled with the LSB from the B input to the ALU.The A input to the ALU is added to the B input, and the CI input is added to the LSB.The A input to the ALU is added to the B input, and the CO out from the ALU on the previous cycle is added to the LSB.The A input to the ALU is added to the inverted B input, and a one is added to the LSB.The A input to the ALU is added to the inverted B input, and the CI input is added to the LSB.The A input to the ALU is added to the inverted B input, and the CO out from the ALU on the previous cycle is added to the LSB.The inverted A input to the ALU is added to the B input, and a one is added to the LSB.The inverted A input to the ALU is added to the B input, and the CI input is added to the LSB.The inverted A input to the ALU is added to the B input, and the CO out from the ALU on the previous cycle is added to the LSB.Op Code <00><01><02><03><04><05><06><07><08><09><0A><0B><0C><0D><0E><0F>Mnemonic CLRXXMIAX1MIAC1MIACO A2SGN A2RAL A2RAR A2RSX APBCI APBCO AMBX1AMBCI AMBCO BMAX1BMAC1BMACOALU Logical Instructions FunctionThe A input to the ALU is logically 'ANDed' with the B input.The A input to the ALU is logically 'ANDed' with the inverse of the B input.The inverse of the A input to the ALU is logically 'ANDed' with the B input.The A input to the ALU is logically 'ORed' with the B input.The inverse A input to the ALU is logically 'ORed' with the B input.The A input to the ALU is logically Exclusive-ORed with the B input.The A input to the ALU is passed to the output.The inverse of the A input to the ALU is passed to the output.Op Code <10><11><12><13><14><15><16><17>Mnemonic ANXAB ANANB ANNAB ORXAB ORNAB XORAB PASXA PASNAhttps://ALU Control Instructions FunctionThe BFP flag is programmed to activate when an ALU operation causes an overflow of the 16 bit number range. This flag is logically the exclusive-or of the carry into and out of the MSB of the ALU. For the most significant Byte this flag indicates that the result of an arithmetic two's complement operation has overflowed into the sign bit. The output of the ALU is forced to zero for the duration of this instruction.The BFP flag is programmed to activate when an ALU operation comes within a factor of two of causing an overflow of the 16 bit number range. For the most significant Byte this flag indicates that the result of an arithmetic two's complement operation is within a factor of two of overflowing into the sign bit. The output of the ALU is forced to zero for the duration of this instruction.The BFP flag is programmed to activate when an ALU operation comes within a factor of four of causing an overflow of the 16 bit number range. For the most significant Byte this flag indicates that the result of an arithmetic two's complement operation is within a factor of four of overflowing into the sign bit. The output of the ALU is forced to zero for the duration of this instruction.The BFP flag is programmed to activate when an ALU operation causes a result of zero.The output of the ALU is forced to zero for the duration of this instruction. During the execution of this instruction the BFP flag will become active.The ALU will output the binary value 0000000000000001, the MSB on the left.The ALU will output the binary value 0000000011111111, the MSB on the left.The ALU will output the binary value 0000000000001111, the MSB on the left.The ALU will output the binary value 0101010101010101, the MSB on the left.Op Code <18><19><1A><1B><1C><1D><1E><1F>Mnemonic SBFOVSBFU1SBFU2SBFZEOPONE OPBYT OPNIB OPALTBarrel Shifter Instructions FunctionThe 16 bit input to the Barrel Shifter is right shifted by the number of places indicated by the magnitude of the four bit number present in the SV register. The LSBs are dicarded,and the vacant MSBs are filled with zeros.The 16 bit input to the Barrel Shifter is left shifted by the number of places indicated by the magnitude of the four bit number present in the SV register. The LSBs are dicarded, and the vacant MSBs are filled with zeros.The 16 bit input to the Barrel Shifter is rotated to the right by the number of places indicated by the magnitude of the four bit number present in the SV register. The LSBs that exit the 16 bit field to the right, reappear in the vacant MSBs on the left.The 16 bit input to the Barrel Shifter is rotated to the left by the number of places indicated by the magnitude of the four bit number present in the SV register. The LSBs that exit the 16 bit field to the right, reappear in the vacant MSBs on the right.The 16 bit input to the Barrel Shifter is right shifted by the number of places indicated by the magnitude of the four bit number resident within the R1 register. The LSBs are discarded, and the vacant MSBs are filled with zeros.The 16 bit input to the Barrel Shifter is left shifted by the number of places indicated by the magnitude of the four bit number resident within the R1 register. The LSBs are discarded,and the vacant LSBs are filled with zeros.The 16 bit input to the Barrel Shifter is right shifted by the number of places indicated by the magnitude of the four bit number resident within the R2 register. The LSBs are discarded, and the vacant MSBs are filled with zeros.The 16 bit input to the Barrel Shifter is left shifted by the number of places indicated by the magnitude of the four bit number resident within the R2 register. The LSBs are discarded,and the vacant LSBs are filled with zeros.Op Code <0><1><2><3><4><5><6><7>Mnemonic LSRSVLSLSVBSRSVBSLSVLSRR1LSLR1LSRR2LSLR2https://。
LTE_3GPP_36.213-860(中文版)
3GPP
Release 8
3
3GPP TS 36.213 V8.6.0 (2009-03)
Contents
Foreword ...................................................................................................................................................... 5 1 2 3
Internet
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© 2009, 3GPP Organizational Partners (ARIB, ATIS, CCSA, ETSI, TTA, TTC). All rights reserved. UMTS™ is a Trade Mark of ETSI registered for the benefit of its members 3GPP™ is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational Partners LTE™ is a Trade Mark of ETSI currently being registered for the benefit of i ts Members and of the 3GPP Organizational Partners GSM® and the GSM logo are registered and owned by the GSM Association
ADMP504ACEZ-RL7 超低噪声麦克风数据手册说明书
ADMP504ACEZ-RL7Ultralow Noise Microphone with Bottom Port and Analog OutputData SheetADMP504Rev. AInformation furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners.O ne Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.FEATURESTiny, 3.35 mm × 2.50 mm × 0.88 mm surface-mount package Omnidirectional response Very high SNR of 65 dBA Sensitivity of −38 dBVExtended frequency response from 100 Hz to 20 kHz Low current consumption: 180 µA Single-ended analog output 120 dB maximum SPL High PSR of 70 dBVCompatible with Sn/Pb and Pb-free solder processes RoHS/WEEE compliantAPPLICATIONSSmartphones and feature phones Tablet computersTeleconferencing systems Digital still and video cameras Bluetooth headsets Notebook PCsSecurity and surveillanceFUNCTIONAL BLOCK DIAGRAM10140-001DDOUTPUTFigure 1.10140-011Figure 2. Isometric Views of ADMP504 Microphone PackageGENERAL DESCRIPTIONThe ADMP5041 is a high performance, very low noise, low power, analog output, bottom-ported omnidirectional MEMS microphone. The ADMP504 consists of a MEMS microphone element, an impedance converter and an output amplifier. The ADMP504 sensitivity specification makes it an excellent choice for both near field and far field applications. The ADMP504 is function- and pin-compatible with the ADMP404 microphone, providing an easy upgrade path.The ADMP504 has very high SNR and extended wideband frequency response, resulting in natural sound with highintelligibility. Low current consumption enables long battery life for portable applications. The ADMP504 complies with the TIA-920 Telecommunications Telephone Terminal Equipment Transmission Requirements for Wideband Digital Wireline Telephones standard.The ADMP504 is available in an ultraminiature 3.35 mm × 2.5 mm × 0.88 mm surface-mount package. It is reflow solder compatible with no sensitivity degradation. The ADMP504 is halide free.1Protected by U.S. Patents 7,449,356; 7,825,484; 7,885,423; 7,961,897. Other patents are pending.OBS OEADMP504Data SheetRev. A | Page 2 of 12TABLE OF CONTENTSFeatures .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 4 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 Applications Information ................................................................ 7 Supporting Documents ................................................................7 Handling Instructions .......................................................................8 Pick-and-Place Equipment ..........................................................8 Reflow Solder .................................................................................8 Board Wash ....................................................................................8 PCB Land Pattern Layout .................................................................9 Reliability Specifications ................................................................ 10 Outline Dimensions ....................................................................... 11 Ordering Guide .. (11)REVISION HISTORY6/12—Rev. 0 to Rev. AChanges to Figure 2 .......................................................................... 1 Changes to General Description Section ...................................... 1 Change to Power Supply Rejection Parameter, Table 1 ............... 3 Changes to Supporting Documents Section ................................. 7 Changes to Reflow Solder Section .. (8)10/11—Revision 0: Initial VersionOBS OL E T EData SheetADMP504Rev. A | Page 3 of 12SPECIFICATIONST A = 25°C, V DD = 1.8 V , unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed. Table 1.Parameter Symbol Test Conditions/Comments Min Typ Max Unit PERFORMANCEDirectionalityOmni Sensitivity1 kHz, 94 dB SPL−41 −38 −35 dBV Signal-to-Noise Ratio SNR 20 Hz to 20 kHz, A-weighted 65 dBA Equivalent Input Noise EIN 20 Hz to 20 kHz, A-weighted29 dBA SPL Dynamic RangeDerived from EIN and maximum acoustic input 91 dB Frequency Response 1 Low frequency −3 dB point 100 HzHigh frequency −3 dB point >20 kHz Total Harmonic Distortion THD 104 dB SPL3 % Power Supply Rejection PSR217 Hz, 100 mV p-p square wave superimposed on V DD = 1.8 V −70 dBV Maximum Acoustic Input Peak, 10% THD 120 dB SPL POWER SUPPLY Supply Voltage V DD1.6 3.3 V Supply Current I S V DD = 1.8 V 180 200 µAV DD = 3.3 V 200 225 µA OUTPUT CHARACTERISTICS Output Impedance Z OUT 200 Ω Output DC Offset 0.8 V Output Current Limit90 µA Maximum Output Voltage 120 dB SPL input, peak0.25 V Noise Floor20 Hz to 20 kHz, A-weighted, rms−103dBV1See Figure 5 and Figure 7.OBS OL E T EADMP504Data SheetRev. A | Page 4 of 12ABSOLUTE MAXIMUM RATINGSTable 2.Parameter RatingSupply Voltage−0.3 V to +3.6 V Sound Pressure Level (SPL) 160 dB Mechanical Shock 10,000 gVibrationPer MIL-STD-883 Method 2007, Test Condition B Temperature Range−40°C to +85°CStresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ESD CAUTION101T E M P E R A T U R ETIMET TFigure 3. Recommended Soldering Profile LimitsTable 3. Recommended Soldering Profile LimitsProfile FeatureSn63/Pb37Pb-FreeAverage Ramp Rate (T L to T P ) 1.25°C/sec maximum 1.25°C/sec maximum PreheatMinimum Temperature (T SMIN ) 100°C 150°C Maximum Temperature (T SMAX ) 150°C200°CTime (T SMIN to T SMAX ), t S 60 sec to 75 sec 60 sec to 75 sec Ramp-Up Rate (T SMAX to T L )1.25°C/sec1.25°C/sec Time Maintained Above Liquidous (t L ) 45 sec to 75 sec ~50 sec Liquidous Temperature (T L ) 183°C217°CPeak Temperature (T P )215°C + 3°C/−3°C 260°C + 0°C/−5°C Time Within 5°C of Actual Peak Temperature (t P ) 20 sec to 30 sec 20 sec to 30 sec Ramp-Down Rate3°C/sec maximum 3°C/sec maximum Time 25°C to Peak Temperature5 minutes maximum 5 minutes maximumOBS T EData SheetADMP504Rev. A | Page 5 of 12PIN CONFIGURATION AND FUNCTION DESCRIPTIONSGNDOUTPUTTOP VIEW(TERMINAL SIDE DOWN)Not to ScaleADMP5041V DD3210140-003Figure 4. Pin ConfigurationTable 4. Pin Function DescriptionsPin No. Mnemonic Description1 OUTPUT Analog Output Signal2 GND Ground3V DDPower SupplyOBS OL E T EADMP504Data SheetRev. A | Page 6 of 12TYPICAL PERFORMANCE CHARACTERISTICS–10–8–6–4–2024681010010k 1kFREQUENCY (Hz)S E N S I T I V I T Y(d B )10140-004Figure 5. Frequency Response Mask0–8010010kFREQUENCY (Hz)P S R (d B )1k–10–20–30–40–50–60–7010140-005Figure 6. Typical Power Supply Rejection vs. Frequency10–2020FREQUENCY (Hz)S E N S I T I V I T Y (d B )1001k 10k5–10–5–1510140-006Figure 7. Typical Frequency Response (Measured)OBS OL E T EData SheetADMP504Rev. A | Page 7 of 12APPLICATIONS INFORMATIONThe ADMP504 output can be connected to a dedicated codecmicrophone input (see Figure 8) or to a high input impedance gain stage (see Figure 9). A 0.1 μF ceramic capacitor placed close to the ADMP504 supply pin is used for testing and is recom-mended to adequately decouple the microphone from noise on the power supply. A dc-blocking capacitor is required at the output of the microphone. This capacitor creates a high-pass filter with a corner frequency atf C = 1/(2π × C × R )where R is the codec’s input impedance.A minimum value of 2.2 μF is recommended in Figure 8 because the input impedance of the ADAU1361/ADAU1761 can be as low as 2 kΩ at its highest PGA gain setting, which would result in a high-pass filter corner frequency at about 37 Hz. Figure 9 shows the ADMP504 connected to an ADA4897-1 op amp configured as a noninverting preamplifier.10140-007Figure 8. ADMP504 Connected to the Analog Devices ADAU1761or ADAU1361 Codec10140-008GAIN =(R1+R2)/R1OUTFigure 9. ADMP504 Connected to the ADA4897-1 Op AmpSUPPORTING DOCUMENTSEvaluation Board User GuideUG-325, EVAL-ADMP504Z-FLEX: Bottom-Ported Analog Output MEMS Microphone Evaluation BoardCircuit Note CN-0207, High Performance Analog MEMS Microphone’s Simple Interface to SigmaDSP Audio CodecApplication NotesAN-1003, Recommendations for Mounting and Connecting Analog Devices, Inc., Bottom-Ported MEMS Microphones AN-1068, Reflow Soldering of the MEMS Microphone AN-1112, Microphone Specifications ExplainedAN-1124, Recommendations for Sealing Analog Devices, Inc., Bottom-Port MEMS Microphones from Dust and Liquid IngressAN-1140, Microphone Array BeamformingOBS L E T EADMP504Data SheetRev. A | Page 8 of 12HANDLING INSTRUCTIONSPICK-AND-PLACE EQUIPMENTThe MEMS microphone can be handled using standard pick-and-place and chip shooting equipment. Take care to avoid damage to the MEMS microphone structure as follows: •Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface.•Use care during pick-and-place to ensure that no high shock events above 10 k g are experienced because this may cause damage to the microphone.•Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. Do not pull air out or blow air into the microphone port. • Do not use excessive force to place the microphone on the PCB.REFLOW SOLDERFor best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified in Figure 3 and Table 3.BOARD WASHWhen washing the PCB, ensure that water does not make contact with the microphone port. Blow-off procedures and ultrasonic cleaning must not be used.OBS OL E T EData SheetADMP504Rev. A | Page 9 of 12PCB LAND PATTERN LAYOUTThe recommended PCB land pattern for the ADMP504 should be laid out to a 1:1 ratio to the solder pads on the microphone package, as shown in Figure 10. Take care to avoid applying solder paste to the sound hole in the PCB. A suggested solder paste stencil pattern layout is shown in Figure 11. The diameter of the sound hole in the PCB should be larger than the diameter of the sound port of the microphone. A minimum diameter of 0.5 mm is recommended.10140-009Figure 10. PCB Land Pattern Layout10140-0101.55/1.05 DIA.Figure 11. Suggested Solder Paste Stencil Pattern LayoutOADMP504Data SheetRev. A | Page 10 of 12RELIABILITY SPECIFICATIONSThe microphone sensitivity after stress must deviate by no more than 3 dB from the initial value. Table 5.Stress TestDescriptionLow Temperature Operating Life −40°C, 1000 hrs, powered High Temperature Operating Life +125°C, 1000 hrs, poweredTemperature Humidity Bias (THB) +85°C/+85% relative humidity (RH), 1000 hrs, powered Temperature Cycle−40°C/+125°C, one cycle per hour, 1000 cycles High Temperature Storage +150°C, 1000 hrs Low Temperature Storage −40°C, 1000 hrs Component CDM ESD All pins, 0.5 kV Component HBM ESD All pins, 1.5 kV Component MM ESDAll pins, 0.2 kVOBS OL E T EData SheetADMP504Rev. A | Page 11 of 12OUTLINE DIMENSIONS06-16-2010-AREFREFDIA.DIA.THRU HOLE (SOUND PORT)Figure 12. 3-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV]3.35 mm × 2.50 mm Body(CE-3-2)Dimensions shown in millimetersORDERING GUIDEModel 1Temperature Range Package DescriptionPackage Option 2 Ordering Quantity ADMP504ACEZ-RL −40°C to +85°C 3-Terminal LGA_CAV, 13” Tape and Reel CE-3-2 10,000 ADMP504ACEZ-RL7 −40°C to +85°C 3-Terminal LGA_CAV, 7” Tape and Reel CE-3-2 1,000 EVAL-ADMP504Z-FLEXFlex Evaluation Board1 Z = RoHS Compliant Part.2This package option is halide free.OBS OL E TADMP504Data SheetRev. A | Page 12 of 12NOTES©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.D10140-0-6/12(A)OBS OL ET EADMP504ACEZ-RL7。
AWARDBIOS中设置选项的含义和设置方法
AWARD BIOS中设置选项的含义和设置方法Hello, I am a friend, today is boring, let my friends learn something more, xi xi... Just want to order water, but also be useful, is a very good opportunity for beginners, because it is Chinese translation, need not use mind, also don't need to seek data. It will make a great impression. Well, I'm not good at it, but let's get to the point.The AWARD is one of the world's largest manufacturer of BIOS, and its products are widely used. But due to the inside of the AWARD BIOS information is based on English and requires the user to the understanding of the relevant professional knowledge relatively deep, make ordinary users to set up difficulty is very big. And if these are not properly set up, it will affect the performance Settings of the entire computer, so a detailed set of instructions is necessary. Here is an introduction to the meaning and setup of the Settings options in the AWARD BIOS.[Standard CMOS Setup]In this menu, the user can modify the date, time, the first main IDE device (hard disk) and IDE devices (hard disk or cd-rom), the second main IDE devices (hard disk or cd-rom), and from the IDE device (hard disk or cd-rom), floppy drive A and B, the type of display system, any error condition to lead to suspension system startup, etc. The main instructions are as follows:(1) the user can be set to Auto in Type (Type) and Mode (Mode), so that the BIOS automatically detects the hard disk. You can also set it up in the main menu (IDE HDD Auto Detection). Users can also use the User option to manually set the parameters ofthe hard disk. You must enter the number of cylinders (Cyls), head count (Heads), writing precompensation (Precomp), head landing zone (Landz), each cylinder sectors (Sectorxs), work Mode (Mode, see below) and so on several parameters. The size of the hard drive is automatically generated after the parameters are set.Three options for the hard drive MODE (MODE) :NORMAL mode: traditional standard mode that supports hard disk capacity up to 528MB.LARGE mode: this option is available when the hard disk or operating system does not support the LBA mode when the hard disk capacity exceeds 528MB.Logical Block Addressing Mode: applied to the hard disk capacity over 528M and supports the "Logical Block address" (LBA) function (which is commonly used)(2) optional EGA/VGA display type (EGA, VGA, SEGA, SVGA, PGA display adapter card is chosen), CGA40 (CGA display card, 40), CGA80 (CGA display card, 80), MONO (monochrome display mode, including high resolution graphics) of four kinds of, the user should be selected according to situation right.(3) the pending error status options are:AllErrors: the BIOS detects any errors and the system startup stops and gives an error message.NoErrors: the BIOS detects that any error does not cause the system to start a pause.All, But Keyboard: in addition to the Keyboard error, the BIOS detects any other errors and suspends the system and gives an error message.All, But Disk/Key: in addition to the keyboard and Disk errors, the BIOS detects any other errors and suspends the system and gives an error message.[BIOS Features Setup]The used to set up the system configuration options list, some of the options from the motherboard design, some options for the user can modify Settings, in order to improve the performance of the system. The main instructions are as follows:VirusWarning: (1) virus defense warning (the default value for the Disable), this function can prevent the key of magnetic hard disk and partition is changed, any attempt to write the form of operation will lead to system crash and warning information.Note: when installing a new operating system (such as Win95), disable this feature so that you don't have to install it because of the conflict.(2) CPU Internal Cache: the default is Enable (open), which allows the system to use the first level Cache within the CPU.The 486, 586 level of CPU usually has a Cache, which is generally not easily changed unless the system is working when the system is open. If the item is disabled (closed), it will degrade the performance of the system.(3) External Cache: the default is Enable, which controls the second level (L2) Cache on the motherboard. Select the Settings for the item on the mainboard with the Cache.(4) Quick Power On Self Test: the default setting is Enable. The main function is to speed up the system's electrical self-test, which will skip some self-testing. Speed up the boot process.(5) IDE HDD Block Mode: IDE hard disk set, default value is HDDMAX. New IDE drives generally support the ability to transmit multiple magnetic blocks at once. Enable this capability to speed up the disk access. Options have HDDMAX, Disabled, 2, 4, 8, 16, and 32.(6) HDD Sequence SCSI/IDE First: IDE/SCSI hard disk is set in priority order, and the default value is IDE. When both SCSI and IDE hard drives are installed, this option can be used to select either SCSI or IDE hard disk as the boot disk.(7) BootSequence: select the drive order. In general, there are several starting sequences:[A, cd-rom, C], C, A], [D, A], [D], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C], [C],Note that some of the older motherboards do not support the cd-rom boot, and the new mainboards now add more startup sequences such as LS120, ZIP, etc.(8) Swap Floppy Drive: Disable by default. When it is Disable, the BIOS takes the floppy disk drive connected to the floppy disk as the first drive. When it is turned on, the BIOS will use the floppy disk drive connected to the floppy disk as the first drive, which is used as A B disk in DOS, and B disks for A disk.(9) BootUp Floppy Seek: when the machine is enabled, the BIOS will search for the Floppy drive.(10) Floppy Disk Access Contol: when this is in the R/W state, the Floppy drive can be read and write, and other states can only be read.(11) BootUp Numlock Strtus: this option is used to set the default state of the small keyboard. When set to ON, the default of the keypad is numeric state after the system is started; When set to OFF, the state of the small keyboard is the state of the arrow after the system is started.(12) BootUp System Speed: this option is used to determine whether the System starts at HIGH or LOW.(13) Typematic Rate Setting: the optional Enable and Disable. When set to Enable, if you press a key on the keyboard, the machine will press the button as you repeat (repeat the buttonspeed to be set in the following option); When it is Disable, press the key on the keyboard if you press a key on the keyboard.(14) Typematic Rate: if the above options to Enable, you can use this option to set when you press a key on the keyboard for a second, then the equivalent to press the key 6 times. This is optional 6, 8, 10, 12, 15, 20, 24, 30.(15) Typematic Delay: if (13) for the Enable option, you can use this option to set by pressing a key, after how long Delay began as a repeat type in the key. The option is 250, 500, 750, 1000, in milliseconds.(16) the Security Option: choose the System, the computer will prompt you for a password when starting, choosing the Setup, only when they enter the CMOS Setup prompts you to enter the password (this setting only in the case of setting the password valid).(17) PS / 2Mouse Function Control: when this is enabled, the machine provides support for the PS / 2 mouse. Otherwise, choose Disable.(18) Assign PCI IRQ For VGA: when selecting Enable,The machine will automatically set the PCI display card's IRQ to the system's DRAM to improve the display speed and improve the performance of the system.(19) PCI/VGA Palett Snoop: this is used to set PCI/VGA CARDS with MPEGISA/VESAVGA card. When the PCI/VGA card is used withthe MPEGISA/VESAVGA card, the item should be set to Enable, otherwise it will be Disable.(20) OS / 2 Select For DRAM > 64MB: this allows you to use more than 64M memory in OS / 2 operating systems. This will be non-os2, OS2.(21) System BIOS Shadow: this option is the default setting is Enable by default, when it opened, will be copied to the System BIOS System Dram, to improve the running speed of the System and improve the performance of System.(22) Video BIOS Shadow: the default setting is open (Enable), when it opens, the BIOS of the display card will be copied to the system DRAM to improve the display speed and improve the performance of the system.(23) C8000 - CBFFF Shadow/DFFFF Shadow: these memory areas are used as ROM mapping areas for other extended CARDS, which are generally set to Disable (Disable). If an extended card ROM needs to be mapped, the user should be aware that the ROM will map the address and scope, which can be set to Enable the above memory areas. But this creates a waste of memory space. Because the address space in the mapping area will take up a certain amount of memory between the system's 640K ~ 1024K.[Chipset Features Setup]This is used to set the chip on the system board. It has the following options:Note: the options under this menu are different from different motherboards, and if you don't know much about their functionality, it's best to set it to the default.(1) ISA Bus Clockfrequency (PCICLK / 4) ISA: transmission rate setting, set value: PCICLK / 3; PCICLK / 4.(2) Auto Configuration: automatic state setting, when set to Enabled the BIOS setting in accordance with the best state, the BIOS will automatically set DRAMTiming, so there will be unable to modify the details of timing of DRAM, we strongly recommend choose Enabled, because any change of DRAM sequence may cause system instability or not boot.(3) the Aggressive Mode: advanced Mode is set, when you want to achieve good performance, and the system in a very stable state, can try Enabled the function to increase the system efficiency, but must use a more rapid DRAM (below 60 ns).(4) the VIDEO BIOS Cacheable: (VIDEO quick fetch function, the default value is Disable), Enable fast fetching to speed up the display speed for Enable. Disable this feature for Disable.(5) the Memory Holeat Address: (the default value is None), some ISA card will require the use of 14-16 MB or 15 to 16 MB of Memory Address space, if a selected 14 MB - 16 MB or 15 MB - 16 MB, the system will not be able to use this part of the Memory space. You can select None to cancel this function.(6) OnboardFDC SwapA: B: (A, B), the default value is NoSwap, and when the (enable) feature is enabled, A, B, swap. Theoriginal A plate was designated B, and B was designated as A. That way, you don't need to open the machine box to swap lines.(7) OnboardSerialPort1: (the default value is 3F8H/IRQ4), set the address of the serial port on the host board and IRQ, and the options are: 3F8H/IRO4, 2F8H/IRQ3, 3E8H/IRQ4, 2E8H/IRQ10, Disable.(8) OnboardSerialPort2: (the default value is 2F8H/IRQ3), set the address of serial port 2 on the host board and IRQ, which is: 3F8H/IRQ4, 2F8H/IRQ8, 3E8H/IRQ4, 2E8H/IRQ10, Disable.(9) OnboardParallelPort: (the default is 378H/IRQ7), set the address and IRQ on the host board.(10) Parallel port mode: (the Parallel port mode, the default value is ECP + EPP),The parallel operation mode has the following options:Normal: Normal speed one-way operation.EPP: the maximum speed is bi-directional.ECP: super-fast dual running.ECP + EPP: ECP and EPP.(11) ECP DMA Select: (ECP DMA channel selection, default value 3), when operating under ECP mode, the DMA channel selection is provided, 1, 3, and Disable 3 Settings.(12) UART2 UseInfrared: (the default value is Disable), this feature is used to support infrared (IR) transmission. For Enable, the second sequence of UART is set to support infrared transmission. To Disable, set a second sequence UART to support COM2.Note: if there is no infrared equipment, do not Enable this, otherwise it will cause unnecessary trouble, such as the system does not identify the MODEM.(13) Onboard PCI IDE Enable: (the host board IDE channel Settings, the default value is Both), to Enable the built-in IDE channel. Options are:Primary IDE Channel: only start the main IDE Channel (that is, the first IDE Channel).Secondary IDE Channel: only boot the auxiliary IDE Channel (the second IDE Channel).Both: first and second IDE channels are enabled.Disable: Disable all IDE channels.(14) IDE PIO Mode: this setting depends on the speed of the system hard disk, including AUTO, five options, 0,1,2,3,4 Mode4 hard drive transmission rate and 16.6 MB/SEC, the other is less than the rate of pattern. Do not choose a schema that exceeds the hard drive rate, which will lose the data.(15) the IDE UDMA (UltraDMA) Mode: the chip that provides the Ultra DMA Mode after the Intel 430tx will raise the transmission rate to a new level.(16) IDE0Master/SlaveMode IDE1Master/SlaveMode: (hard disk time-series model set, the default value is Auto), is set to Auto, the system will automatically check time-series model of four IDE devices to ensure that running at optimum speed. You can also set the sequential mode (0, 1, 2, 3, 4).[Power Management Setup]The project is designed to control the "green" function on the motherboard. The feature is timed to close the video display and hard disk drives to achieve the energy saving effect. In particular, there are four types of power-saving patterns:Doze mode: when the time is set, the CPU clock slows down and the other devices operate as usual.The Standby mode: when the time is set, the hard drive and display will stop working and the other equipment will operate as usual.Suspend mode: when the time is set, all equipment except CPU will stop working.4, HDD Power Down mode: when the time is set, the hard disk stops working and the other devices operate as usual.The options below for the menu item include the following:(1) Power Management: the main control terms of thepower-saving model, there are four types of Settings:Max Saving: (maximum power Saving) in a shorter system inactive period (Doze, Standby, Suspend, HDDPowerDown four patterns of the default values are 1 minute), enables the system to enter power Saving mode, this mode power Saving is the largest.MIN Saving: (minimum Power Saving) in a system with long cycle of inactivity, in this case, (Doze, Standby, Suspend three modes of default values are 1 hour, HDD Power Down mode of the default value is 15 minutes), make the system to enter Power Saving mode.Disable: turn off the power saving feature, which is the default setting.User Defined (User definition) allows the User to set the power saving mode according to his own needs.(2) VideoOFFOption: (the display closes setting, the default value is Susp, stby-> Off). This option is used to determine which mode to turn Off the display.1. Susp,Stby-> Off: turn Off the display only when Standby (Standby) or Suspend (Suspend) power mode.Suspend -> Off: only turn Off the monitor when the Suspend modeis suspended.Alwayson: no matter in any mode, the monitor will display as usual.Alls-> Off: turn Off the monitor in any power-saving mode.(3) Video Off Method (Video)。
PGA309 程序可编程压力传感器信号条件器：为非线性压力传感器世界带来线性说明书
– Variations @ 25oC – Linear changes with Temperature – NonLinear changes with Temperature
• Bandwidth
– <4kHz for most pressure sensor applications
80
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Pnl = 2.5%Span
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0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1
0
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-2.5%< Pnl <+2.5% (of Span)
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Pin Pnonl i n( Pi n)
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NonLinear Pressure Out put o f Sensor 100
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20 40 31 22 13 4 5 14 23 32 41 50 59 68 77 86 95 104113122131 140
Omega OM-SGD-35-M 智能图形显示仪用户指南说明书
e-mail:**************For latest product manuals: OM-SGD-35-MShop online at ®User’s Guide• 3.5” color TFT screen• Use PanelPilot software, to setup and customize the display • Compatible with Windows XP, 2000, Vista and Windows 7 • Over 40 meter templates to choose from• New templates automatically download in PanelPilot software • Programmable via the USB interface • Simple panel mounting solution• Wide operating voltage of 4V – 30V d.c. • Measures voltage from 0 – 40V d.c. • Digital holdThe OM-SGD-35-M is a smart graphics displaywith a 320 x 240 pixel (QVGA) color display and USB programming ing the PanelPilot software (available for Windows XP, 2000, Vista and 7),users are able to choose from an ever-increasing number of configurations (six voltmeters at launch)which can then be customized to their needs.Colors, text labels, splash screen and input voltage scaling can all be customized by the user through the software and then uploaded to the OM-SGD-35-M through the USB connection.Panel or enclosure installation of the display is simple, using a panel fixing clip to mount the display, and 4 screw terminals to connect the inputs.OM-SGD-35-MSmart Graphics DisplayVoltage InputThe OM-SGD-35-M features 2 voltage inputs, which use a Programmable Gain Amplifier (PGA) to make the best use of available resolution The input voltage range is decided using the two voltages that the user enters in the scaling section of the Panel Pilot software. The software uses the smallest range available, which can accommodate both of the voltages entered by the user. The absolute maximum voltage input is 40V d.c.For example:Entering a voltage scale of 0 – 30V in the software will use the 0 – 40V range.Entering a voltage scale of 0 – 3V in the software will use the 0 – 4V range.Entering a voltage scale of 5 – 15V in the software will use the 0 – 20V range.HARDWAREScrew Terminal Functions1 IN2 Analog voltage input 2 (maximum of 40V d.c.)2 IN1 Analog voltage input 1 (maximum of 40V d.c.)3 0V 0V power supply input4 V+Positive power supply input (4V – 30V d.c.)Typical Supply CurrentUSB connectionA ‘Type A to Mini-B’ USB cable is required to program and customize the OM-SGD-35-M. It typically takes 10 seconds to send a configuration,with an additional 5 seconds needed for the hardware to reset.The OM-SGD-35-M can be powered directly from USB and is compatible with both USB 1.1 and USB 2.0. The screw terminals and advanced connector can remain connected whilst using USB, but it is not necessary for V+ to be powered.15030041330C u r r e n t (m A )Voltage (V)DIMENSIONSAll dimensions in mm (inches)Panel MountingThe OM-SGD-35-M can be fitted into panels 1mm - 3mm deep. A silicone seal is included to improve fitting on thin panels.Panel cut-out is 92mm x 74mm.NOTE: The display is NOT protected against moisture or dust.Advanced ConnectorThe DIL IDC socket provides an alternative connection method to the screw-teminals (V+, 0V, IN1 and IN2 are duplicated). It also includes provision for future expansion using data buses (SPI and I2C) and alarm ouputs. Some expansion options may require an additional interface board - Visit for information on which features are currently supported.DisplayThe display is a 3.5” TFT panel, with a resolution of 320 x 240 pixels and a 16-bit color depth. Any graphics that are uploaded to the meter are automatically converted to this specification. A resistive touchscreen is fitted, for use with supporting applications. Clean the screen with a damp, soft, lint free cloth.DAC1DIGI5DIGI3DIGI1ALM10V IN10V DIGI6DIGI4DIGI2ALM2V+IN2Panel Cut-out: 92 x 75 (3.62 x 2.95)VARIOUS OPERATING MODESPANELPILOT SOFTWAREOmega’s PanelPilot software is available for download free of charge from . Easy to install and use, the control software runs under Windows 2000, XP, Vista and 7. The software is used to setup the appearance and operation of the meter and then upload these settings to the meter.The software allows the following parameters to be configured: • Meter type• Text labels (including units and graph labels) • Background, graph segment and text colors • Input scaling / calibration (at two points) • Decimal points (entered during scaling)• Splashscreen image selection (to display a user image, such as a logo, when the meter is powered up)Measuring a voltage sourceMeasuring 0 - 2 amps current e a 1 Ω resistor, with a 4W rating.Setup scaling in software: 0V = 0.00 and 2V = 2.00Measuring 0 - 100V (d.c. only).Input a known voltage of between 0 and 100V (V1)Measure the voltage between IN1 and 0V (V2)Setup scaling in software: 0V = 0.0V2 = V1 (Enter with the same number of decimal points,i.e 50.0)0 - 40V 0 - 40V 4 - 30VS - V L )I L4 - 20mAVARIOUS OPERATING MODESDIGITAL HOLDDIGI1 will hold the display for IN1DIGI2 will hold the display for IN2ALARM OUTPUTSApplications that feature an alarm can be connected as above.ALM1 and ALM2 must not sink more than 10mA maximum each.If supply voltage varies, use an appropriate voltage regulator.MEASURING 4-20mAUse a 50 Ω resistor with a 200mW rating.Setup scaling in software 0.2V=4.0 and 1V=20.0Cannot be loop powered. Supply must be isolated from current loop.OMEGA’s policy is to make running changes, not model changes, whenever an improvement is possible. This affords our customers the latest in technology and engineering.OMEGA is a registered trademark of OMEGA ENGINEERING, INC.© Copyright 2014 OMEGA ENGINEERING, INC. All rights reserved. T his document may not be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form, in whole or in part, without the FOR WARRANTY RETURNS, please have the following information available BEFORE contacting OMEGA:1. P urchase Order number under which the product was PURCHASED,2. M odel and serial number of the product under warranty, and3. Repair instructions and/or specific problems relative to the product.FOR NON-WARRANTY REPAIRS, consult OMEGA for current repair charges. Have the followinginformation available BEFORE contacting OMEGA:1. Purchase Order number to cover the COST of the repair,2. Model and serial number of the product, and3. Repair instructions and/or specific problems relative to the product.RETURN REQUESTS/INQUIRIESDirect all warranty and repair requests/inquiries to the OMEGA Customer Service Department. BEFORE RET URNING ANY PRODUCT (S) T O OMEGA, PURCHASER MUST OBT AIN AN AUT HORIZED RET URN (AR) NUMBER FROM OMEGA’S CUST OMER SERVICE DEPART MENT (IN ORDER T O AVOID PROCESSING DELAYS). The assigned AR number should then be marked on the outside of the return package and on any correspondence.The purchaser is responsible for shipping charges, freight, insurance and proper packaging to prevent breakage in transit.WARRANTY/DISCLAIMEROMEGA ENGINEERING, INC. warrants this unit to be free of defects in materials and workmanship for a period of 13 months from date of purchase. OMEGA’s WARRANTY adds an additional one (1) month grace period to the normal one (1) year product warranty to cover handling and shipping time. This ensures that OMEGA’s customers receive maximum coverage on each product.If the unit malfunctions, it must be returned to the factory for evaluation. OMEGA’s Customer Service Department will issue an Authorized Return (AR) number immediately upon phone or written request. Upon examination by OMEGA, if the unit is found to be defective, it will be repaired or replaced at no charge. OMEGA’s WARRANT Y does not apply to defects resulting from any action of the purchas-er, including but not limited to mishandling, improper interfacing, operation outside of design limits, improper repair, or unauthorized modification. T his WARRANT Y is VOID if the unit shows evidence of having been tampered with or shows evidence of having been damaged as a result of excessive corrosion; or current, heat, moisture or vibration; improper specification; misapplication; misuse or other operating conditions outside of OMEGA’s control. Components in which wear is not warranted, include but are not limited to contact points, fuses, and triacs.OMEGA is pleased to offer suggestions on the use of its various products. However, OMEGA neither assumes responsibility for any omissions or errors nor assumes liability for any damages that result from the use of its products in accordance with information provided by OMEGA, either verbal or written. OMEGA warrants only that the parts manufactured by the company will be as specified and free of defects. OMEGA MAKES NO OTHER WARRANTIES OR REPRESENTATIONS OF ANY KIND WHATSOEVER, EXPRESSED OR IMPLIED, EXCEPT THAT OF TITLE, AND ALL IMPLIED W ARRANTIES INCLUDING ANY W ARRANTY OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. LIMITATION OF LIABILITY: The remedies of purchaser set forth herein are exclusive, and the total liability of OMEGA with respect to this order, whether based on contract, warranty, negligence, indemnification, strict liability or otherwise, shall not exceed the purchase price of the component upon which liability is based. In no event shall OMEGA be liable for consequential, incidental or special damages.CONDITIONS: Equipment sold by OMEGA is not intended to be used, nor shall it be used: (1) as a “Basic Component” under 10 CFR 21 (NRC), used in or with any nuclear installation or activity; or (2) in medical applications or used on humans. Should any Product(s) be used in or with any nuclear installation or activity, medical application, used on humans, or misused in any way, OMEGA assumes no responsibility as set forth in our basic WARRANTY /DISCLAIMER language, and, additionally, purchaser will indemnify OMEGA and hold OMEGA harmless from any liability or damage whatsoever arising out of the use of theProduct(s) in such a manner.Where Do I Find Everything I Need for Process Measurement and Control?OMEGA…Of Course!Shop online at SMTEMPERATUREM U Thermocouple, RTD & Thermistor Probes, Connectors, Panels & AssembliesM U Wire: Thermocouple, RTD & ThermistorM U Calibrators & Ice Point ReferencesM U Recorders, Controllers & Process MonitorsM U Infrared PyrometersPRESSURE, STRAIN AND FORCEM U Transducers & Strain GagesM U Load Cells & Pressure GagesM U Displacement TransducersM U Instrumentation & AccessoriesFLOW/LEVELM U Rotameters, Gas Mass Flowmeters & Flow ComputersM U Air Velocity IndicatorsM U Turbine/Paddlewheel SystemsM U Totalizers & Batch ControllerspH/CONDUCTIVITYM U pH Electrodes, Testers & AccessoriesM U Benchtop/Laboratory MetersM U Controllers, Calibrators, Simulators & PumpsM U Industrial pH & Conductivity EquipmentDATA ACQUISITIONM U Data Acquisition & Engineering SoftwareM U Communications-Based Acquisition SystemsM U Plug-in Cards for Apple, IBM & CompatiblesM U Data Logging SystemsM U Recorders, Printers & PlottersHEATERSM U Heating CableM U Cartridge & Strip HeatersM U Immersion & Band HeatersM U Flexible HeatersM U Laboratory HeatersENVIRONMENTALMONITORING AND CONTROLM U Metering & Control InstrumentationM U RefractometersM U Pumps & TubingM U Air, Soil & Water MonitorsM U Industrial Water & Wastewater TreatmentM U pH, Conductivity & Dissolved Oxygen Instruments。
Omega 4.3英寸智能图形显示器用户指南说明书
e-mail:**************For latest product manuals: OM-SGD-43-AShop online at ®User’s GuideOM-SGD-43-A4.3” Smart Graphics Display* For measurement ranges up to ±10V.** Hardware capability, but not available in software at launchDisplay 4.3” TFT with 262k colours Touchscreen Capacitive Resolution 480 x 272pxProcessor Freescale i.MX283 (454MHz, 32bit, ARM 9)Analogue Inputs 4 x ±40V or 4-20mA (16bit ADC with 0.05% ±1mV typical accuracy*)Serial Buses RS232**, SPI**, I2C**, RS485**, Ethernet**Memory1Gbit DDR2 SDRAM and 2GB SD card Operating Temperature 0 to 40°C (32 to 104°F)Supply5 to 30V d.c. (300mA typical at 5V d.c.)Outside Dimensions119.3 (4.7) x 79.8 (3.1) x 20.0 (0.8) mm (in)SpecificationsThe OM-SGD-43-A is the first in a range of PanelPilotACE compatible displays and panel meters. The low-profile display features a 4.3” capacitive touch screen and an ARM Cortex A9 processor running embedded Linux. The display can be powered from either USB or a 5 to 30V d.c. supply and offers users a wealth of hardware interfaces which include four 16bit bi-polar analogue inputs (to a maximum of ±40V d.c.), eight digital input/output pins, two alarm outputs (maximum current sink 10mA) and four 8bit PWM outputs.Users program the display using the free PanelPilotACE Design Studio software which allows the creation of anything from simple meters and dials, through to advanced user interfaces with control elements.OM-SGD-43-A is a 4.3” capacitive touch display designed for use with PanelPilotACE Design Studio, a free drag-and-drop style software packagefor rapid development of advanced user interfacesand panel meters.PanelPilotACE Design StudioMaking Industrial User Interface Design SimpleThe design software provides a number of building blocks which allow users to drag-and-drop elements onto the screen to quickly create advanced user interfaces. From background images to text elements, analogue style meters, touch screen navigation elements and even complex logic statements, users can build up multi-screen interfaces without needing to write a line of code.There is a library of pre-defined elements such as meters, buttons and switches, and users can create their own content by combining elements or importing graphics in a number of formats (including jpg, png, tif, bmp and gif). The software includes support for transparency and multiple layers.Hardware interfacing is similarly intuitive, with hardware elements being dragged into a function builder where associations with graphical elements (such as a needle on a meter) can be defined. Here users can determine scaling for analogue inputs, define alarm triggers, behaviours for digital inputs and outputs and configure PWM outputs. Previewing and Uploading ProjectsThe software includes a ‘Preview in Emulator’ function which emulates the hardware’s inputs and outputs, allowing users to test their projects prior to upload. Projects are uploaded to the OM-SGD-43-A via a mini USB port. PanelPilotACE Design Studio is compatible with Windows XP (SP3), Vista, 7 and 8 and can be downloaded free from .119.3 (4.7)115.0 (4.5)79.8 (3.1)76.0 (3.0)2.0 (0.1)DimensionsAll dimensions are in mm (in)Panel Cut-Out and FittingThe panel cut-out is 117.0 x 78.0mm (4.6” x 3.07”). There are two mounting methods:The first uses clips that protude from the plastic assembly and is suitable for panels between 1 and 3mm (0.04” and 0.12”) in thickness.The second method uses a rear mounting plastic bracket featuring grub screws for a more secure and adaptable fit. This second mounting method is suitable for panels between 0.5 and 4.0mm (0.01” and 0.15”) in thickness.Pin OutPL4: Alarms, Serial Input and Digital I/OPin Number Function10V2Supply Voltage (V+)3Alarm 1 (ALM1)4Alarm 2 (ALM2)5I2C0 SCL6I2C0 SDA7SPI SS18SPI MOSI9SPI MISO10SPI SCK11Digital I/O Channel 1 (DIG1) 12Digital I/O Channel 2 (DIG2) 13Digital I/O Channel 3 (DIG3) 14Digital I/O Channel 4 (DIG4) 15Digital I/O Channel 5 (DIG5) 16Digital I/O Channel 6 (DIG6) 17Digital I/O Channel 7 (DIG7) 18Digital I/O Channel 8 (DIG8) 19PWM Channel 1 (PWM1) 20PWM Channel 2 (PWM2) 21PWM Channel 3 (PWM3)22PWM Channel 4 (PWM4) 23DUART TX (for internal use) 24DUART RX (for internal use) 25USB D+26USB D-27I2C1 SDA (for internal use) 28I2C1 SCL (for internal use) 29+5V Output Voltage30High Speed ADC31+3V3 Output Voltage320V33Shorted together to enablefirmware upgrade34TBLK1: Power & Analogue InputsPin Number Function1Supply Voltage (V+) 20V3Analogue Input 4 (IN4) 4Analogue Input 3 (IN3) 5Analogue Input 2 (IN2) 6Analogue Input 1 (IN1)PL5: Programming Interface (JTAG)Pin Number Function1+3V3 Output Voltage 2N/C (no connection)3JTAG_TRST 4OV 5JTAG_TDI 6OV 7JTAG_TMS 8OV 9JTAG_TCK 10OV 11JTAG_RTCK 12OV 13JTAG_TDO 140V15n_reset 160V 17N/C 180V190V via a 47k Ohms resistor 200VPin Out (continued...)PL6: Ethernet & Expansion I/OPin Number Function 1ENT CLK 2ENT MDC 3ENT MDIO 4ENT RXD05ENT RXD16ENT RX EN 7ENT TXD08ENT TXD19ENT TX EN10Digital I/O 9 (expansion)11Digital I/O 10 (expansion)12Digital I/O 11 (expansion)13Digital I/O 12 (expansion)14Digital I/O 13 (expansion)15Digital I/O 14 (expansion)16Digital I/O 15 (expansion)17Digital I/O 16 (expansion)18Digital I/O 17 (expansion)19+5V 200V21External Module Hardware ID 22External Module Hardware IDPin Out (continued...)PL11: Analogue InputsPin Number Function1Analogue Input 1 (IN1)20V3Analogue Input 2 (IN2)40V5Analogue Input 3 (IN3)60V7Analogue Input 4 (IN4)80VPL8: 4-20mA Current Loop MeasurementPin Number Function1-24-20mA current loop measurement (IN1) when shorted 3-44-20mA current loop measurement (IN2) when shorted 5-64-20mA current loop measurement (IN3) when shorted 7-84-20mA current loop measurement (IN4) when shortedPL7: RS232 InterfacePin Number Function 1TX 2RTS 3RX 4CTS 50V5 - 30V d.c.0VVarious Operating ModesSupply Voltage Screw Terminals (TBLK1)Pin (PL4)V+120V21Measuring an Analogue VoltageAn analogue voltage can be connected to either the screwterminals (TBLK1) or pins (PL11).Analogue Input Screw Terminals (TBLK1)Pin (PL11)1IN1610V 222IN2530V 243IN3450V 264IN4370V28To minimise offsets it is best practice to connect analogue grounds directly to the meter pins (PL11) or screw terminals (TBLK1).The OM-SGD-43-A uses a programmable gain amplifier (PGA) together with a 16-bit analogue to digital converter (ADC) for its analogue voltage measurements. The PGA is automatically set when the analogue range of a channel is input into the PanelPilotACE Design Studio.The table to the right shows the maximum resolution of the OM-SGD-43-A’s analogue measurements across a number of voltage ranges.40V d.c.5 - 30V d.c.0V0V Supply VoltageSupply to the display module can be connected to either the screw terminals (TBLK1), pins (PL4), or the mini-USB connector. For best results, ensure the power supply is free from electrical noise.Analogue Input Resolution ±1.25V 0.04mV ±2.5V 0.08mV ±5V 0.16mV ±10V 0.33mV ±20V 0.66mV ±40V1.3mVOM-SGD-43-A4.3” Smart Graphics DisplayDriving an Alarm OutputThe alarm outputs are open-collector. When an alarm is active, the output can sink up to 10mA.Alarm outputs are connected via PL4:Alarm Output Pin (PL4)ALM13ALM24Measuring a 4-20mA CurrentThe 4-20mA signal should be connected as for “Measuring an Analogue Voltage” but a jumper link should be placed across pins PL8 for each analogue channel being used:Analogue Voltage Jumper link (PL8)IN1 1 & 2IN2 3 & 4IN3 5 & 6IN47 & 8Scaling: The sense resistors used are 110Ω. Therefore in software scaling 4mA equates to 0.44V and 20mA equates to2.2V.Note: transmitter terminals (+ or -) must be isolated from the power supplyVarious Operating Modes (continued...)Driving a relay using alarm outputDriving an LED using alarm outputUsing Digital Input/Output PinsDigital inputs/outputs are connected via PL4: Various Operating Modes (continued...) Digital I/O Pin (PL4)DIG111DIG212DIG313DIG414DIG515DIG616DIG717DIG818The characteristics of the digital I/O pins are as follows:Parameter Min Max Unit Input voltage (high)2 3.3V Input voltage (low)00.8V Output voltage (high) 2.6 3.3V Output voltage (low)00.4V Output source current-11.4-mA Output sink current9.0-mA Generating a digital input with a push buttonVarious Operating Modes (continued...)Using PWM output to convert digital to analogue Using PWM output to drive a buzzerPWM Output Pin (PL4)PWM119PWM220PWM321PWM422Using PWM OutputIf the OM-SGD-43-A is configured to have PWM output, it can be used to drive a buzzer or produce a simple digital-to-analogue converter.The PWM outputs are connected via PL4:The characteristics of the PWM output pins are as follows:Parameter Min Max Unit Voltage0 3.3V Output source current (PWM)-9.5-mA Output sink current (PWM)7.7-mAOMEGA’s policy is to make running changes, not model changes, whenever an improvement is possible. This affords our customers the latest in technology and engineering.OMEGA is a registered trademark of OMEGA ENGINEERING, INC.© Copyright 2014 OMEGA ENGINEERING, INC. All rights reserved. T his document may not be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form, in whole or in part, without the prior written consent of OMEGA ENGINEERING, INC.FOR WARRANTY RETURNS, please have the following information available BEFORE contacting OMEGA:1. P urchase Order number under which the product was PURCHASED,2. M odel and serial number of the product under warranty, and3. Repair instructions and/or specific problems relative to the product.FOR NON-WARRANTY REPAIRS, consult OMEGA for current repair charges. Have the followinginformation available BEFORE contacting OMEGA:1. Purchase Order number to cover the COST of the repair,2. Model and serial number of the product, and3. Repair instructions and/or specific problems relative to the product.RETURN REQUESTS/INQUIRIESDirect all warranty and repair requests/inquiries to the OMEGA Customer Service Department. BEFORE RET URNING ANY PRODUCT (S) T O OMEGA, PURCHASER MUST OBT AIN AN AUT HORIZED RET URN (AR) NUMBER FROM OMEGA’S CUST OMER SERVICE DEPART MENT (IN ORDER T O AVOID PROCESSING DELAYS). The assigned AR number should then be marked on the outside of the return package and on any correspondence.The purchaser is responsible for shipping charges, freight, insurance and proper packaging to prevent breakage in transit.WARRANTY/DISCLAIMEROMEGA ENGINEERING, INC. warrants this unit to be free of defects in materials and workmanship for a period of 13 months from date of purchase. OMEGA’s WARRANTY adds an additional one (1) month grace period to the normal one (1) year product warranty to cover handling and shipping time. This ensures that OMEGA’s customers receive maximum coverage on each product.If the unit malfunctions, it must be returned to the factory for evaluation. OMEGA’s Customer Service Department will issue an Authorized Return (AR) number immediately upon phone or written request. Upon examination by OMEGA, if the unit is found to be defective, it will be repaired or replaced at no charge. OMEGA’s WARRANT Y does not apply to defects resulting from any action of the purchaser, including but not limited to mishandling, improper interfacing, operation outside of design limits, improper repair, or unauthorized modification. T his WARRANT Y is VOID if the unit shows evidence of having been tampered with or shows evidence of having been damaged as a result of excessive corrosion; or current, heat, moisture or vibration; improper specification; misapplication; misuse or other operating conditions outside of OMEGA’s control. Components in which wear is not warranted, include but are not limited to contact points, fuses, and triacs.OMEGA is pleased to offer suggestions on the use of its various products. However, OMEGA neither assumes responsibility for any omissions or errors nor assumes liability for any damages that result from the use of its products in accordance with information provided by OMEGA, either verbal or written. OMEGA warrants only that the parts manufactured by the company will be as specified and free of defects. OMEGA MAKES NO OTHER WARRANTIES OR REPRESENTATIONS OF ANY KIND WHATSOEVER, EXPRESSED OR IMPLIED, EXCEPT THAT OF TITLE, AND ALL IMPLIED W ARRANTIES INCLUDING ANY W ARRANTY OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. LIMITATION OF LIABILITY: The remedies of purchaser set forth herein are exclusive, and the total liability of OMEGA with respect to this order, whether based on contract, warranty, negligence, indemnification, strict liability or otherwise, shall not exceed the purchase price of the component upon which liability is based. In no event shall OMEGA be liable for consequential, incidental or special damages.CONDITIONS: Equipment sold by OMEGA is not intended to be used, nor shall it be used: (1) as a “Basic Component” under 10 CFR 21 (NRC), used in or with any nuclear installation or activity; or (2) in medical applications or used on humans. Should any Product(s) be used in or with any nuclear installation or activity, medical application, used on humans, or misused in any way, OMEGA assumes no responsibility as set forth in our basic WARRANTY /DISCLAIMER language, and, additionally, purchaser will indemnify OMEGA and hold OMEGA harmless from any liability or damage whatsoever arising out of the use of theProduct(s) in such a manner.Where Do I Find Everything I Need forProcess Measurement and Control?OMEGA…Of Course!Shop online at SMTEMPERATUREM U Thermocouple, RTD & Thermistor Probes, Connectors, Panels & AssembliesM U Wire: Thermocouple, RTD & ThermistorM U Calibrators & Ice Point ReferencesM U Recorders, Controllers & Process MonitorsM U Infrared PyrometersPRESSURE, STRAIN AND FORCEM U Transducers & Strain GagesM U Load Cells & Pressure GagesM U Displacement TransducersM U Instrumentation & AccessoriesFLOW/LEVELM U Rotameters, Gas Mass Flowmeters & Flow ComputersM U Air Velocity IndicatorsM U Turbine/Paddlewheel SystemsM U Totalizers & Batch ControllerspH/CONDUCTIVITYM U pH Electrodes, Testers & AccessoriesM U Benchtop/Laboratory MetersM U Controllers, Calibrators, Simulators & PumpsM U Industrial pH & Conductivity EquipmentDATA ACQUISITIONM U Data Acquisition & Engineering SoftwareM U Communications-Based Acquisition SystemsM U Plug-in Cards for Apple, IBM & CompatiblesM U Data Logging SystemsM U Recorders, Printers & PlottersHEATERSM U Heating CableM U Cartridge & Strip HeatersM U Immersion & Band HeatersM U Flexible HeatersM U Laboratory HeatersENVIRONMENTALMONITORING AND CONTROLM U Metering & Control InstrumentationM U RefractometersM U Pumps & TubingM U Air, Soil & Water MonitorsM U Industrial Water & Wastewater TreatmentM U pH, Conductivity & Dissolved Oxygen InstrumentsM5535/0116。
Scale User's Manual
detection message
while scale detects
its load and auto‐zero itself.
Power Off
) Press
for 1 second
to power off scale.
; Display shows
power‐off message.
Chinese GB/T 11883‐2002 Class III Equivalent to OIML R76 100% F.S. ±50% F.S. ±2% F.S. 0.5e/s
≤10 seconds
Sable and no action in 3 sec. Sable and no action in 3 min. 100% F.S. + 9e
 Inspect shackle and hook before using.  When the scale runs out of power, replace the
battery with full ones.
 Do NOT use the scale under thunder or rain.  Do NOT attempt to repair the scale yourself.
1. Introduction
Notice
Before you use the scale, please read this manual through carefully, and keep it properly for future use.
Safety Guide
For good performance and precise measurement, be careful with daily operation and maintenance. Note the following instructions:
ISaGRAF用户指南：定义自己的函数说明书
Can I create my own functions inside ISaGRAF ?ISaGRAF supoorts functions written in ST, FBD, IL and QLD languages. User-defined functions are normally for some algorithm which been used again and again.A function always has an return value (output parameter) and its name should be the same name as the function, and may have up to 31 input parameters. The code written inside functions can not call any function block, however can call other ISaGRAF standard functions and c functions provided by ICP DAS.We are going to creating a function to save an integer value to the EEPROM. Its format is as the below. Function name : W_EEPDescription: Save an integer to the EEPROM when its value changedInput parameters:ADDR_ (integer) : the address of the EEPROM to writeV1_ (integer) : New valueV2_ (integer) : Old valueReturn parameter:W_EEP (integer): return the new valueNote: The parameter names been used will become reserved names. That’s why we use ADDR_ , V1_ , V2_ rather than ADDR , V1 & V2.15.1: Creating functions inside one projectFunctions created inside one project can be only called by other programs written in the same project.A. Click on “Create new program” inside the project. Given Name as “W_EEP”, Language as “ST:…”,Style as “Function”.B. Double click on the function to get into it. Then click on “Sub-program parameters” to define inputand output parameters.C. Declare local variables. We need a local boolean internal variable “TMP” in this example.D. Enter function codes.E. Verify the function.F. Call it in other programs in the same project.Global variables used in the project:Name Type Attribute DescriptionINIT BooleanInternal initial value at “TRUE”. TRUE means 1st scan cycle K1 BooleanInput Connect to 1st ch. Of “push4key”, press it to get “Val”New_Val Integer Internal New value wish to save to the EEPROMOld_Val Integer Internal Old valueVal IntegerInternal Read back value of the EEPROMProject architecture:ST program – “end_init” in the “End” area :IF INIT=TRUE THENINIT := FALSE ;END_IF ;LD program – “demo” :G. Set Compiler Options and compile the project.After download to the controller, you may change the “New_Val”, and then press “K1” to see what it happens.15.2: Creating functions in the libraryFunctions created in the library can be called by programs in any project.The steps is similar to the former section 15.1. Please refer to it in advance.A. Get into the library. Then click on “Functions”B. Create an new function and given Name as “W_EEP_N” , Language as “Structured Text”.C. Define input and return parametersD. Add codes.E. Declare local variables. We need a boolean internal variable – “TMP”F. Save the function and set compiler options.G. Verify the function.Then you can call it in any project.。
PGA-105+
Monolithic AmplifierNotesA. Performance and quality attributes and conditions not expressly stated in this specification document are intended to be excluded and do not form a part of this specification document.B. Electrical specifications and performance data contained in this specification document are based on Mini-Circuit’s applicable established test performance criteria and measurement instructions.The Big DealProduct OverviewPGA-105+ (RoHS compliant) is an advanced ultra flat gain amplifier fabricated using E-PHEMT technology and offers extremely high dynamic range over a broad frequency range and with low noise figure. In addition, the PGA-105+ has good input and output return loss over a broad frequency range without the need for external matching components. Lead finish is SnAgNi and is enclosed in a SOT-89 package forgood thermal performance.PGA-105+50Ω 0.04 to 2.6 GHz SOT -89 PACKAGE• Ultra Flat Gain• Low Noise, High Dynamic Range• Excellent Input and Output Return Losswithout use of external matching componentsUltra Flat Gain, Low Noise/High Dynamic RangeMonolithic AmplifierNotesA. Performance and quality attributes and conditions not expressly stated in this specification document are intended to be excluded and do not form a part of this specification document.B. Electrical specifications and performance data contained in this specification document are based on Mini-Circuit’s applicable established test performance criteria and measurement instructions.simplified schematic and pin description0.04-2.6 GHzCASE STYLE: DF782PGA-105+Product Features• Excellent gain flatness, ±0.25 dB over 0.1-2.0 GHz • Gain, 15.0 dB typ. at 2 GHz• High IP3, 39 dBm typ. at 0.9 GHz • P1dB 19.3 dBm typ. at 2 GHz • Low noise figure, 1.9 dB at 2 GHz• No external matching components requiredGeneral DescriptionPGA-105+ (RoHS compliant) is an advanced ultra flat gain amplifier fabricated using E-PHEMT technology and offers extremely high dynamic range over a broad frequency range and with low noise figure. In addition, the PGA-105+ has good input and output return loss over a broad frequency range without the need for external matching components. Lead finish is SnAgNi. It has repeatable performance from lot to lot and is enclosed in a SOT-89 package for good thermal performance.Typical Applications• Base station infrastructure • Portable Wireless • CATV & DBS• MMDS & Wireless LAN • LTEUltra Flat Gain, Low Noise(1)(2) (Current at 85°C — Current at -45°C)/130Characterization Test Circuitnote AN-60-063)Product MarkingP105NotesA.Performance and quality attributes and conditions not expressly stated in this specification document are intended to be excluded and do not form a part of this specification document.NotesA. Performance and quality attributes and conditions not expressly stated in this specification document are intended to be excluded and do not form a part of this specification document.MSL Test Flow ChartESD RatingHuman Body Model (HBM): Class 1A (250 to <500V) in accordance with ANSI/ESD STM 5.1 - 2001 Machine Model (MM): Class M1( pass 25V) in accordance with ANSI/ESD STM5.2-1999MSL RatingMoisture Sensitivity: MSL1 in accordance with IPC/JEDEC J-STD-020D。
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INSTRUCTIONS FORUSEPGA SUTURE synthetic absorbable sterile surgical sutureDescription PGA suture is a synthetic absorbable sterile surgical suture composed of homopolymers of glycolide (100%). PGA suture is undyed or dyed violet with D&C violet #2 and coated. PGA meets all requirements established by the United States Pharmacopeia (U.S.P.) for synthetic absorbable surgical sutures.Indications PGA is indicated for use in general soft tissue approximation and/or ligation, including use in ophthalmic procedures, but not for use in cardiovascular and neurological procedures.Actions PGA elicits minimal acute inflammatory reaction in tissues, which is followed by gradual encapsulation of the suture by fibrous connective tissue. Progressive loss of tensile strength and eventual absorption of PGA synthetic absorbable suture occurs by means of hydrolysis, where the polymer degrades to either glycolic acid or glycolic and lactic acids which are subsequently absorbed and metabolized by the body. Absorption begins as a loss of tensile strength without appreciable loss of mass. Implantation studies in animals indicate that PGA retains approximately 73% of its original tensile strength at two weeks post implantation, with approximately 33% remaining at three weeks. Absorption of PGA synthetic absorbable surgical suture is essentially complete between 60 and 90 days.Contraindications This suture, being absorbable, should not to be used where extended approximation of tissue is required.Warnings DO NOT RESTERILIZE. DISCARD OPEN UNUSED SUTURES. STORE AT ROOM TEMPERATURE. AVOID PROLONGED EXPOSURE TO ELEVATED TEMPERATURES. As with any foreign body, prolonged contact of this or any other suture with salt solutions, such as those found in the urinary or biliary tracts, may result in calculus formation. Users should be familiar with surgical procedures and techniques involving absorbable sutures before employing PGA synthetic absorbable suture for wound closure, as risk of wound dehiscence may vary with the site of application and the suture material used. Acceptable surgical practice should be followed with respect to drainage and closure of contaminated or infected wounds. The use of this suture may be inappropriate in elderly, malnourished, or debilitated patients, or in patients suffering from cancer, anemia, obesity, diabetes, infection, or other conditions which may delay wound healing. As this is an absorbable suture material, the use of supplementalnon-absorbable sutures should be considered by the surgeon in the closure of the abdomen, chest, joints, or other sites which may undergo expansion, stretching, or distension, or which may require additional support. Precautions Under some circumstances, notably orthopedic procedures, immobilization by external support may be employed at the discretion of the surgeon. Skin sutures which must remain in place longer than seven (7) days may cause localized irritation and should be snipped off or remove as indicated. In handling this or any other suture material, care should be taken to avoid damage from handling. Avoid crushing or crimping damage due to application of surgical instruments, such as forceps or needle holders. Adequate knot security requires the accepted surgical techniques of flat, square ties, with additional throws as warranted by surgical circumstance and the experience of the surgeon. The use of additional throws may be particularly appropriate when knotting monofilaments.Adverse Reactions Adverse effects associated with the use of this device include wound dehiscence, failure to provide adequate wound support in closure of the sites where expansion, stretching or distension occur, failure to provide adequate wound support in elderly, malnourished or debilitated patients or in patients suffering from cancer, anemia, obesity, diabetes, infection, or other conditions which may delay wound healing, enhanced bacterial infectivity, minimal acute inflammatory tissue reaction, Localized irritation when skin sutures are left in place for greater than seven (7) days, calculi formation in urinary and biliary tracts when prolonged contact with salt solutions, such as urine and bile occurs, and pain, edema, and erythema at the wound site.How Supplied PGA synthetic absorbable suture is available in sizes U.S.P. 6-0 through 2 (metric sized0.7-3.0). The suture is supplied sterile in “pre-cut” lengths (non-needled) ,12*45CM,5*70CM,24pcs in one boxed.Figures In U.S.P Standard:Manufacturer:HUAIAN W ANJIA MEDICAL DEVICE CO.,LTD.Address: No.1, huang ma industrial park, qingpu, huaian city, ChinaE-mail: wan67210@ MSN：wan67210@Tel: 0086-517-83577757 83765785 86157801 83571596(FAX)。