数字电路Chapter 6 Functions of Combinational Logic
数字电路答案第六章
第六章可编程逻辑器件PLD可编程逻辑器件PLD是由用户借助计算机和编程设备对集成电路进行编程，使之具有预定的逻辑功能，成为用户设计的ASIC芯片。
近年来，可编程逻辑器件从芯片密度上、速度上发展相当迅速，已成为集成电路的一个重要分支。
本章要求读者了解PLD器件的工作原理，掌握用可编程逻辑器件设计数字电路的方法。
为掌握使用电子设计自动化和可编程逻辑器件设计电路系统的后续课程打下良好的基础。
第一节基本知识、重点与难点一、基本知识（一）可编程逻辑器件PLD基本结构可编程逻辑器件PLD包括只读存储器ROM、可编程只读存储器PROM、可编程逻辑阵列PLA、可编程阵列逻辑PAL、通用阵列逻辑GAL和可擦写编程逻辑器件EPLD等。
它们的组成和工作原理基本相似，其基本结构由与阵列和或阵列构成。
与阵列用来产生有关与项，或阵列把所有与项构成“与或”形式的逻辑函数。
在数字电路中，任何组合逻辑函数均可表示为与或表达式，因而用“与门－或门”两级电路可实现任何组合电路，又因为任何时序电路是由组合电路加上存储元件（触发器）构成的，因而PLD的“与或”结构对实现数字电路具有普遍意义。
（二）可编程逻辑器件分类1.按编程部位分类PLD有着大致相同的基本结构，根据与阵列和或阵列是否可编程，分为三种基本类型：（1）与阵列固定，或阵列可编程；（2）与或阵列均可编程；（3）与阵列可编程，或阵列固定。
2.按编程方式分类（1）掩膜编程；（2）熔丝与反熔丝编程；（3）紫外线擦除、电可编程；（4）电擦除、电可编程；（5）在系统编程（Isp）。
（三）高密度可编程逻辑器件HDPLD单片高密度可编程逻辑器件HDPLD（High Density Programmable Logic Device）芯片内，可以集成成千上万个等效逻辑门，因此在单片高密度可编程逻辑器件内集成数字电路系统成为可能。
HDPLD器件在结构上仍延续GAL的结构原理，因而还是电擦写、电编程的EPLD 器件。
数字电路与系统分析第六章习题答案
解：1）分析电路结构：该电路是由七个与非门及一个JKFF组成，且CP下降沿触发，属于米勒电路，输入信号X1，X2，输出信号Z。
2）求触发器激励函数：J=X1X2，K =X 1X2触发器次态方程：Q n+1=X1X 2Q n +X 1X2Q n=X1X 2Q n+(X1+X2)Q n电路输出方程：Z = X 1X2Q n+X 1X 2Q n +X1X 2Q n+X1X2Q n3)状态转移表：表6.3.1输入X1X2S(t)Q nN(t)Q n+1输出Z0 0 0 0 0 10 11 0 1 0 1 1 1 101111111111114)X1X2Q n为低位来的进位，Q n+1表示向高位的进位。
且电路每来一个CP，实现一次加法运算，Z为本位和，Q 在本时钟周期表示向高位的进位，在下一个时钟周期表示从低位来的进位。
例如X1=110110，X2=110100，则运算如下表所示：LSB MSB表6.3.2节拍脉冲CP CP1 CP2 CP3 CP4 CP5 CP6 CP7被加数X10 1 1 0 1 1 0加数X20 0 1 0 1 1 0低位进位Q n0 0 0 1 0 1 16.2 试作出101序列检测器的状态图，该同步电路由一根输入线X，一根输出线Z，对应与输入序列的101的最后一个“1”，输出Z=1。
其余情况下输出为“0”。
（1）101序列可以重叠，例如：X：010101101 Z：000101001（2）101序列不可以重叠，如：X：010******* Z：0001000010解：1）S0：起始状态，或收到101序列后重新检测。
S1：收到序列“1”。
S2：连续收到序列“10”。
0/01/0X/Z0/011…100…S2S1S1/00/01/12）0/01/0X/Z0/011…100…S2S1S1/00/01/1解：（1）列隐含表：A B CDCB×A B CDCB×ADBC××(a)(b)进行关联比较得到所有的等价类为：AD，BC。
课程名称英文翻译
课程名称英文翻译自然辩证法natural dialectics英语english language数理统计numeral statistic/numerical statistic人工智能及其体系结构artificial intelligence & its architecture高级数理逻辑advanced numerical logic高级程序设计语言的设计与实现advanced programming language s de sign & implementation软件工程基础foundation of software engineering专业英语specialized english计算机网络computer network高级计算机体系结构advanced computer architectureibm汇编及高级语言的接口ibm assembly & its interfaces with advanc ed programming languages分布式计算机系统distributed computer system / distributed system计算机网络实验computer network experiment高等代数elementary algebra数学分析mathematical analysis中共党史history of the chinese communist party算法语言algorithmic language体育physical education英语english language力学实验mechanics-practical德育moral educationpascal语言pascal language政治经济学political economics电学实验electrical experiment数字逻辑mathematical logic普通物理general physics计算方法computing method离散数学discrete mathematics汇编原理principles of assembly概率与统计probability & statistics数据结构data structure哲学philosophy微机原理principles of microcomputer编译方法compilation method系统结构system structure操作系统原理principles of operating system 文献检索documentation retrieval数据库概论introduction to database网络原理principles of network人工智能artificial intelligence算法分析algorithm analysis毕业论文graduation thesisadvanced computational fluid dynamics 高等计算流体力学advanced mathematics 高等数学advanced numerical analysis 高等数值分析algorithmic language 算法语言analogical electronics 模拟电子电路artificial intelligence programming 人工智能程序设计audit 审计学automatic control system 自动控制系统automatic control theory 自动控制理论auto-measurement technique 自动检测技术basis of software technique 软件技术基础calculus 微积分catalysis principles 催化原理chemical engineering document retrieval 化工文献检索circuitry 电子线路college english 大学英语college english test (band 4) cet-4college english test (band 6) cet-6college physics 大学物理communication fundamentals 通信原理comparative economics 比较经济学complex analysis 复变函数论computational method 计算方法computer graphics 图形学原理computer organization 计算机组成原理computer architecture 计算机系统结构computer interface technology 计算机接口技术contract law 合同法cost accounting 成本会计circuit measurement technology 电路测试技术database principles 数据库原理design & analysis system 系统分析与设计developmental economics 发展经济学discrete mathematics 离散数学digital electronics 数字电子电路digital image processing 数字图像处理digital signal processing 数字信号处理econometrics 经济计量学economical efficiency analysis for chemical technology 化工技术经济分析economy of capitalism 资本主义经济electromagnetic fields & magnetic waves 电磁场与电磁波electrical engineering practice 电工实习enterprise accounting 企业会计学equations of mathematical physics 数理方程experiment of college physics 物理实验experiment of microcomputer 微机实验experiment in electronic circuitry 电子线路实验fiber optical communication system 光纤通讯系统finance 财政学financial accounting 财务会计fine arts 美术functions of a complex variable 单复变函数functions of complex variables 复变函数functions of complex variables & integral transformations 复变函数与积分变换fundamentals of law 法律基础fuzzy mathematics 模糊数学general physics 普通物理graduation project(thesis) 毕业设计（论文）graph theory 图论heat transfer theory 传热学history of chinese revolution 中国革命史industrial economics 工业经济学information searches 情报检索integral transformation 积分变换intelligent robot(s); intelligence robot 智能机器人international business administration 国际企业管理international clearance 国际结算international finance 国际金融international relation 国际关系international trade 国际贸易introduction to chinese tradition 中国传统文化introduction to modern science & technology 当代科技概论introduction to reliability technology 可靠性技术导论java language programming java 程序设计lab of general physics 普通物理实验linear algebra 线性代数management accounting 管理会计学management information system 管理信息系统mechanic design 机械设计mechanical graphing 机械制图merchandise advertisement 商品广告学metalworking practice 金工实习microcomputer control technology 微机控制技术microeconomics & macroeconomics 西方经济学microwave technique 微波技术military theory 军事理论modern communication system 现代通信系统modern enterprise system 现代企业制度monetary banking 货币银行学motor elements and power supply 电机电器与供电moving communication 移动通讯music 音乐network technology 网络技术numeric calculation 数值计算oil application and addition agent 油品应用及添加剂operation & control of national economy 国民经济运行与调控operational research 运筹学optimum control 最优控制petroleum chemistry 石油化学petroleum engineering technique 石油化工工艺学philosophy 哲学physical education 体育political economics 政治经济学principle of compiling 编译原理primary circuit （反应堆）一回路principle of communication 通讯原理principle of marxism 马克思主义原理principle of mechanics 机械原理principle of microcomputer 微机原理principle of sensing device 传感器原理principle of single chip computer 单片机原理principles of management 管理学原理probability theory & stochastic process 概率论与随机过程procedure control 过程控制programming with pascal language pascal语言编程programming with c language c语言编程property evaluation 工业资产评估public relation 公共关系学pulse & numerical circuitry 脉冲与数字电路refinery heat transfer equipment 炼厂传热设备satellite communications 卫星通信semiconductor converting technology 半导体变流技术set theory 集合论signal & linear system 信号与线性系统social research 社会调查software engineering 软件工程spc exchange fundamentals 程控交换原理specialty english 专业英语statistics 统计学stock investment 证券投资学strategic management for industrial enterprises 工业企业战略管理technological economics 技术经济学television operation 电视原理theory of circuitry 电路理论turbulent flow simulation and application 湍流模拟及其应用visual c++ programming visual c++程序设计windows nt operating system principles windows nt操作系统原理word processing 数据处理上文已完。
数字电路第六章
decoder
n-bit m-bit
enable input
Output code word
1-out-of-m code
n<m
13.7.31
chapter 6
12
1、bianry decoders
input code：n-bit I1 output code：2n-bit I0 ⑴2-4 decoder（2-22）
27
5、BCD decoder（二—十进制译码器）
Y0
gnd g f a b a f e g d b c dp
e d c dp gnd
13.7.31chapter 6 Nhomakorabea25
• 7-segment decoder transform the input BCD code to 7-segment displaying code. • devices： 7446A、74LS47 （驱动共阳） 74LS48、 74LS49（驱动共阴）
13.7.31
chapter 6
7
4×3 with 6 product terms
AND array
OR array
13.7.31
chapter 6
8
13.7.31
chapter 6
9
2. Programmable Array Logic Devices
Fixed OR array，programmable AND array Bidirectional input/output pins，熔丝型 PAL16L8， Output enable
VCC 5V U1
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
数字电路面试题
数字电路面试题Digital Circuit Interview QuestionsIntroduction:In today's technological era, digital circuits serve as the cornerstone of various electronic devices and systems. It is essential for individuals involved in the field of electrical engineering to possess a comprehensive understanding of digital circuits. This article presents a selection of frequently asked interview questions regarding digital circuits, providing insights into key concepts, design methodologies, and problem-solving abilities.Question 1: What is a digital circuit?A digital circuit is a network of interconnected electronic components designed to process digital signals or information in the form of "bits" - binary digits. These circuits utilize logic gates, flip-flops, registers, and other building blocks to perform operations such as arithmetic, logic, and memory functions.Question 2: Differentiate between combinational and sequential logic circuits.Combinational logic circuits generate an output based solely on the current input values. They lack memory elements, ensuring that the output is solely determined by the present inputs. Conversely, sequential logic circuits output not only depend on the present inputs but also on the past inputs and stored information, using memory elements such as flip-flops.Question 3: How can you convert a given logic circuit into its corresponding truth table?To convert a logic circuit into a truth table, one needs to consider all possible input combinations. For each combination, determine the output based on the circuit's logic gates and connections. The resulting truth table will list all possible input combinations alongside their corresponding output values.Question 4: Explain the concept of propagation delay in digital circuits.Propagation delay refers to the time taken for the output of a logic gate to change in response to a change in its input. It is caused by the finite speed of signal transmission within digital circuits due to factors such as gate delays and interconnect lengths. Minimizing propagation delays is crucial to ensure proper circuit operation and timing.Question 5: What is Moore's law, and how does it relate to digital circuits?Moore's law, formulated by Gordon Moore, states that the number of transistors in an integrated circuit doubles approximately every two years. This observation highlights the trend of exponentially increasing computational power and efficiency in digital circuits over time. Integrated circuits incorporating more transistors enable the design and implementation of complex digital systems.Question 6: Describe the concept of clock skew in clock distribution networks.Clock skew refers to the variation in arrival times of clock signals across different components or clock distribution lines within a digital circuit. It can lead to synchronization issues and affect the proper functioning of sequential logic circuits. Minimizing clock skew is crucial to maintain accurate timing and prevent data corruption.Question 7: What are the commonly used design methodologies for digital circuits?Several design methodologies are employed in digital circuit design, including the following:1. RTL (Register Transfer Level) Design: Describing the circuit's behavior using high-level abstractions, focusing on the flow of data between registers.2. Gate-Level Design: Utilizing predefined standard cells and logic gates to implement the circuit's functionality.3. Behavioral Design: Describing the circuit's behavior using programming languages such as VHDL or Verilog to simulate and synthesize the design.4. Physical Design: Involves designing the layout and placement of components, considering factors such as power consumption, noise, and heat dissipation.Question 8: Discuss the concept of hazard in digital circuits.In digital circuits, a hazard refers to a temporary glitch or deviation in the expected output caused by a transition in the input signals. Hazards canoccur due to circuit delays, complex combinational paths, or improper synchronization. Designers must identify and eliminate hazards through techniques such as hazard coverings or hazard-free logic restructuring.Question 9: Explain the advantages and disadvantages of using FPGA (Field-Programmable Gate Array) in digital circuit design.Advantages:1. Versatility: FPGA allows rapid prototyping and design alterations, eliminating the need for fabricating custom integrated circuits.2. Flexibility: Designs can be modified or reprogrammed as required, providing flexibility in adapting to changing requirements.3. Time-to-Market: FPGA-based designs can be developed and deployed quickly, reducing the time required to bring a product or solution to market.4. Cost-Efficiency: FPGA eliminates the high upfront costs associated with ASIC (Application-Specific Integrated Circuit) production.Disadvantages:1. Power Consumption: FPGA can consume more power compared to ASIC, impacting battery-powered devices.2. Limited Scalability: FPGA designs may face limitations in terms of size, complexity, and performance compared to ASIC designs.3. Higher Unit Cost: While FPGA offers cost benefits for low to medium volume production, it may become costlier for high-volume production due to per-unit costs.Question 10: How do you mitigate hazards caused by glitches in digital circuits?To mitigate hazards caused by glitches, designers can employ the following techniques:1. Use Gate Delay Elements: Introduce specialized elements within the circuit to ensure uniform delays and minimize glitches.2. Hazard Covering: Introduce additional logic elements to detect and fix hazards.3. Logic Restructuring: Optimize the circuit's logic gates and structural elements to eliminate or reduce potential hazards.4. Pipeline the Circuit: Introduce pipeline stages to divide the circuit into smaller sections, ensuring proper synchronization and reducing hazards.Conclusion:Digital circuit knowledge and problem-solving skills are crucial for individuals seeking a career in electrical engineering or related fields. By understanding the fundamental concepts, design methodologies, and problem-solving approaches, one can confidently tackle digital circuit interview questions, paving the way for success in this domain. Remember to stay updated with the latest advancements and continuously enhance your skills as digital circuit technology continues to evolve.。
数电Chapter6
Architecture behavior of SR_latch2 IS Begin p0 ： process (R, S ) IS Begin Case std_logic_vector（R, S） is （ ） when “00” => Q <=‘1’； ； Q’<=‘1’； ； when “01” => Q <=‘1’ ； Q’<=‘0’ ； when “10” => Q <=‘0’ ； Q’<=‘1’ ； When Others => Null ； End Case; End Process P0 ; End Architecture behavior ;
CLK=EN S
R Q
图6.3.2（a）Enable作控制信号 作控制信号
EN S R Q
Sec.6.3 D-F.F.
The transparent data flip-flop
门控D锁和D触发器 门控D锁和D
G1 D ＆ S’ ＆ Q
D
Q
Enable ＆ R G2 ＆ R’ Q’
En
Q’
（a） 图6.3.5
1. The gate Set-Reset Flip-Flop
思路： cp（ pulse） 思路：引入 cp（clock pulse）做控制信号
Characteristic Equation:
set 1 cp Reset Q
• Qn+1=S +R’Qn • RS=0
2 Q’
2.The gate Set-Reset Flip-Flop（Latch） （ ） true table
NOR 锁
SD RD 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 Qn 0 1 0 1 0 1 0 1 Qn+1 0 1 1 1 0 0 1※ 1※
数字电路介绍外文翻译
附录1 译文数字电路介绍数字电路定义：用数字信号完成对数字量进行算术运算和逻辑运算的电路称为数字电路，或数字系统。
由于它具有逻辑运算和逻辑处理功能，所以又称数字逻辑电路。
数字逻辑电路分类（按功能分）：1、组合逻辑电路简称组合电路，它由最基本的的逻辑门电路组合而成。
特点是：输出值只与当时的输入值有关，即输出惟一地由当时的输入值决定。
电路没有记忆功能，输出状态随着输入状态的变化而变化，类似于电阻性电路，如加法器、译码器、编码器、数据选择器等都属于此类。
2、时序逻辑电路简称时序电路，它是由最基本的逻辑门电路加上反馈逻辑回路（输出到输入）或器件组合而成的电路，与组合电路最本质的区别在于时序电路具有记忆功能。
时序电路的特点是：输出不仅取决于当时的输入值，而且还与电路过去的状态有关。
它类似于含储能元件的电感或电容的电路，如触发器、锁存器、计数器、移位寄存器、储存器等电路都是时序电路的典型器件。
数字电路的特点：1、同时具有算术运算和逻辑运算功能数字电路是以二进制逻辑代数为数学基础，使用二进制数字信号，既能进行算术运算又能方便地进行逻辑运算（与、或、非、判断、比较、处理等），因此极其适合于运算、比较、存储、传输、控制、决策等应用。
2、实现简单，系统可靠以二进制作为基础的数字逻辑电路，简单可靠，准确性高。
3、集成度高，功能实现容易集成度高，体积小，功耗低是数字电路突出的优点之一。
电路的设计、维修、维护灵活方便，随着集成电路技术的高速发展，数字逻辑电路的集成度越来越高，集成电路块的功能随着小规模集成电路（SSI）、中规模集成电路（MSI）、大规模集成电路（LSI）、超大规模集成电路（VLSI）的发展也从元件级、器件级、部件级、板卡级上升到系统级。
电路的设计组成只需采用一些标准的集成电路块单元连接而成。
对于非标准的特殊电路还可以使用可编程序逻辑阵列电路，通过编程的方法实现任意的逻辑功能。
数字电路的应用：数字电路与数字电子技术广泛的应用于电视、雷达、通信、电子计算机、自动控制、航天等科学技术各个领域。
数字电路数字电子技术第6章
J0 K0 1
J1 K1 XQ0 X Q0
J 2 K2 XQ0Q1 X Q0 Q1
J3 K3 XQ0Q1Q2 X Q0 Q1 Q2
数字电子技术基础
Q3 Q2
6.3 计数器
FF0：每来一个CP，向相反的状态翻转一次。所以选：J0=K0=1
Q1
Q0 1
FF3 Q 1J & C1
FF2 Q 1J & C1 1K & R Q
FF1
1J Q ∧
FF0
1J C1 1K R CP 计数脉冲 CR 清零脉冲 ∧ 下一页
∧
C1
1K & R
1K R
数字电子技术基础
n Q1n 1 Q0 Q1n
X=1时的状态图
Q 1Q 0 00 /1 10 /0 /0 01
n 输出方程简化为： Z Q1n Q0
n Z ( X Q1n ) Q0 作出X=1的状态表：
现
态
次
态
输 出 Z
Q1 n Q0 n
Q1 n+1 Q0 n+1
完整的状态图
0/0
00 1/1 0/1 10
工作原理： 4个JK触发器都接成T’触发器。 每来一个CP的下降沿时，FF0向相反的状态翻转一次；
每当Q0由1变0，FF1向相反的状态翻转一次；
每当Q1由1变0，FF2向相反的状态翻转一次； 每当Q2由1变0，FF3向相反的状态翻转一次。
数字电子技术基础
上一页
下一页
回目录
退出
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
Example: An 8-bit magnitude comparator using two 74HC85s.
Why?
28
6.5 Decoders
Decoder
Detects the presence of a specified combination of bits on its inputs
21
The logic diagram of a 4-stage look-ahead carry adder
22
6.4 Comparators
Determine whether two numbers are equal
Equal inequal
23
Basic comparator operation.
13
Example: Two 74LS283 adders connected as an 8-bit parallel adder (pin numbers are in parentheses). A8A7A6A5A4A3A2A1=10111001, B8B7B6B5B4B3B2B1=10011110
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
ABCin ABCin ABCin ABCin
A B Cin
Cout ABCin ABCin ABCin ABCin
AB A BCin
5
Full-adder logic and implementation
1
Outline
Basic Adders Parallel Binary Adders Ripple Carry versus Look-Ahead Carry Adders Comparators Decoders Encoders Code Converters Multiplexers Demultiplexers Parity Generators/Checkers
16
Figure 6–15 A 4-bit parallel ripple carry adder showing “worst-case” carry propagation delays.
17
The look-ahead carry adder
Carry generation
Cg AB
1
5
0 1 01
1 01 1 01
1
6
011 0
001 1 1 1
1
7
011 1
1 1 1 000
0
8
1 000
111111
1
9
1 001
1 1 1 001
1
10
1 01 0
0001 1 0
1
11
1 01 1
001 1 00
1
12
1 10001 01
1
14
1 110
How to interpret the above logic expressions?
26
Figure 6–24 Pin diagram and logic symbol for the 74HC85 4-bit magnitude comparator (pin numbers are in parentheses).
7
Figure 6–7 Block diagram of a basic 2-bit parallel adder using two full-adders 8
Figure 6–8 Determine the sum generated by the 3-bit parallel adder in the following figure and show the intermediate carries when the binary numbers 101 and 011 are being added.
14
Figure 6–14 A voting system using full-adders and parallel binary adders.
15
6.3 Ripple Carry Versus Look-Ahead Carry Adders
Ripple carry adder: the carry output of each fulladder is connected to the carry input of the next higher-order stage.
Truth table for a 4-16bit decoder
33
Figure 6–29 Pin diagram and logic symbol for the 74HC154 1-of-16 decoder. 34
Example: A certain application requires that a 5-bit number be decoded. Use 74HC154 decoders to implement the logic.
6
6.2 Parallel Binary Adders
To add binary numbers with more than one bit, additional full-adders must be used.
The carry output of each adder is connected to the carry input of the next higher-order adder.
Carry propagation
Cp A B
Output carry
Cout Cg C pCin
18
Figure 6–17 Carry generation and carry propagation in terms of the input bits to a 4-bit adde
20
Figure 6–18 Logic diagram for a 4-stage look-ahead carry adder.
The output carry for each full-adder stage is dependent only on the initial input carry (Cin1), the Cg and Cp functions of that stage, and the Cg and Cp functions of the preceding stages.
25
Compare A3 A2 A1A0 with B3B2B1B0 Y( AB) A3B3 ( A3 B3 ) A2B2 ( A3 B3 )( A2 B2 ) A1B1
( A3 B3)( A2 B2 )( A1 B1) A0B0 Y( AB) ( A3 B3 )( A2 B2 )( A1 B1)( A0 B0 ) Y( AB) (Y( AB) Y( AB) )
0001 1 1
1
15
1 111
000000
0
41
Truth table
Karnaugh Map
42
The logic diagram of BCD 7-segment display device (7448)
Time delay
The look-ahead carry adder: anticipates the output carry of each stage, and based on the inputs, produces the output carry by either carry generation or carry propagation.
Active-LOW outputs
39
The BCD-to-7-Segment Decoder
Figure 6–34 Logic symbol for a BCD-to-7-segment decoder/driver with active-LOW outputs.
7(8)-segment display device
9
Example: A 4-bit parallel adder.
10
Example 74LS283 4-bit parallel adder
11
Figure 6–11 Propagation delay characteristics for the 74LS283. 12
Examples: Adder expansion.
Indicates the presence of that code by a specified output level
Has n input lines and 2n output lines
29
The basic binary decoder
Figure 6–26 Decoding logic for the binary code 1001 with an active-HIGH output. 30
Logic diagram for equality comparison of two 2-bit numbers
24
Logic symbol for a 4-bit comparator with inequality indication.
1, If A3=1 and B3=0, number A is greater than number B; 2, If A3=0 and B3=1, number A is less than number B; 3, If A3=B3, examine the next lower bit position for an inequality.